mirror of
https://github.com/holub/mame
synced 2025-04-19 15:11:37 +03:00
First chunk of cleaning up PC9801: move state to includes, make variables to have sane accessors (nw)
This commit is contained in:
parent
ada5d4787b
commit
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@ -2416,6 +2416,7 @@ files {
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MAME_DIR .. "src/mame/drivers/pc88va.cpp",
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MAME_DIR .. "src/mame/drivers/pc100.cpp",
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MAME_DIR .. "src/mame/drivers/pc9801.cpp",
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MAME_DIR .. "src/mame/includes/pc9801.h",
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MAME_DIR .. "src/mame/machine/pc9801_kbd.cpp",
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MAME_DIR .. "src/mame/machine/pc9801_kbd.h",
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MAME_DIR .. "src/mame/machine/pc9801_cd.cpp",
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@ -3,7 +3,7 @@
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/**********************************************************************
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CCBUS Slot interface for PC-98xx family
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**********************************************************************/
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#include "emu.h"
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@ -433,329 +433,8 @@ Keyboard TX commands:
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#include "formats/dip_dsk.h"
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#include "formats/nfd_dsk.h"
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#define UPD1990A_TAG "upd1990a"
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#define UPD8251_TAG "upd8251"
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#define SASIBUS_TAG "sasi"
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#include "includes/pc9801.h"
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class pc9801_state : public driver_device
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{
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public:
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pc9801_state(const machine_config &mconfig, device_type type, const char *tag) :
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driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_dmac(*this, "i8237"),
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m_pit8253(*this, "pit8253"),
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m_pic1(*this, "pic8259_master"),
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m_pic2(*this, "pic8259_slave"),
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m_fdc_2hd(*this, "upd765_2hd"),
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m_fdc_2dd(*this, "upd765_2dd"),
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m_rtc(*this, UPD1990A_TAG),
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m_keyb(*this, "keyb"),
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m_sio(*this, UPD8251_TAG),
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m_hgdc1(*this, "upd7220_chr"),
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m_hgdc2(*this, "upd7220_btm"),
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m_sasibus(*this, SASIBUS_TAG),
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m_sasi_data_out(*this, "sasi_data_out"),
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m_sasi_data_in(*this, "sasi_data_in"),
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m_sasi_ctrl_in(*this, "sasi_ctrl_in"),
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m_ide1(*this, "ide1"),
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m_ide2(*this, "ide2"),
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m_video_ram_1(*this, "video_ram_1"),
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m_video_ram_2(*this, "video_ram_2"),
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m_ext_gvram(*this, "ext_gvram"),
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m_beeper(*this, "beeper"),
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m_ram(*this, RAM_TAG),
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m_ipl(*this, "ipl_bank"),
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m_gfxdecode(*this, "gfxdecode"),
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m_palette(*this, "palette"),
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m_screen(*this, "screen")
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{
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}
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required_device<cpu_device> m_maincpu;
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required_device<am9517a_device> m_dmac;
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required_device<pit8253_device> m_pit8253;
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required_device<pic8259_device> m_pic1;
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required_device<pic8259_device> m_pic2;
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required_device<upd765a_device> m_fdc_2hd;
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optional_device<upd765a_device> m_fdc_2dd;
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required_device<upd1990a_device> m_rtc;
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required_device<pc9801_kbd_device> m_keyb;
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required_device<i8251_device> m_sio;
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required_device<upd7220_device> m_hgdc1;
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required_device<upd7220_device> m_hgdc2;
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optional_device<scsi_port_device> m_sasibus;
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optional_device<output_latch_device> m_sasi_data_out;
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optional_device<input_buffer_device> m_sasi_data_in;
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optional_device<input_buffer_device> m_sasi_ctrl_in;
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optional_device<ata_interface_device> m_ide1;
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optional_device<ata_interface_device> m_ide2;
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required_shared_ptr<uint16_t> m_video_ram_1;
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required_shared_ptr<uint16_t> m_video_ram_2;
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optional_shared_ptr<uint32_t> m_ext_gvram;
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required_device<beep_device> m_beeper;
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optional_device<ram_device> m_ram;
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optional_device<address_map_bank_device> m_ipl;
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required_device<gfxdecode_device> m_gfxdecode;
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required_device<palette_device> m_palette;
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required_device<screen_device> m_screen;
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virtual void video_start() override;
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uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
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virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
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enum
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{
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TIMER_VBIRQ
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};
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emu_timer *m_vbirq;
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uint8_t *m_char_rom;
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uint8_t *m_kanji_rom;
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uint8_t m_dma_offset[4];
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uint8_t m_dma_autoinc[4];
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int m_dack;
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uint8_t m_video_ff[8],m_gfx_ff;
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uint8_t m_txt_scroll_reg[8];
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uint8_t m_pal_clut[4];
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std::unique_ptr<uint16_t[]> m_tvram;
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uint16_t m_font_addr;
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uint8_t m_font_line;
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uint16_t m_font_lr;
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uint8_t m_fdc_2dd_ctrl,m_fdc_2hd_ctrl;
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uint8_t m_nmi_ff;
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uint8_t m_vram_bank;
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uint8_t m_vram_disp;
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/* PC9801RS specific */
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uint8_t m_gate_a20; //A20 line
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uint8_t m_access_ctrl; // DMA related
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uint8_t m_fdc_ctrl;
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uint8_t m_ex_video_ff[128];
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struct {
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uint8_t pal_entry;
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uint8_t r[16],g[16],b[16];
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}m_analog16;
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struct {
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uint8_t pal_entry;
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uint8_t r[0x100],g[0x100],b[0x100];
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uint16_t read_bank;
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uint16_t write_bank;
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}m_analog256;
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struct {
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uint8_t mode;
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uint8_t tile[4], tile_index;
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}m_grcg;
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struct {
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uint16_t regs[8];
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uint16_t pat[4];
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uint16_t src[4];
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int16_t count;
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uint16_t leftover[4];
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bool first;
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bool init;
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} m_egc;
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/* PC9821 specific */
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uint8_t m_sdip[24], m_sdip_bank;
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uint8_t m_pc9821_window_bank;
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uint8_t m_ext2_ff;
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uint8_t m_sys_type;
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DECLARE_WRITE_LINE_MEMBER( write_uart_clock );
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DECLARE_WRITE8_MEMBER(rtc_w);
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DECLARE_WRITE8_MEMBER(dmapg4_w);
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DECLARE_WRITE8_MEMBER(dmapg8_w);
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DECLARE_WRITE8_MEMBER(nmi_ctrl_w);
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DECLARE_WRITE8_MEMBER(vrtc_clear_w);
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DECLARE_WRITE8_MEMBER(pc9801_video_ff_w);
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DECLARE_READ8_MEMBER(txt_scrl_r);
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DECLARE_WRITE8_MEMBER(txt_scrl_w);
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DECLARE_READ8_MEMBER(grcg_r);
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DECLARE_WRITE8_MEMBER(grcg_w);
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DECLARE_WRITE16_MEMBER(egc_w);
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DECLARE_READ8_MEMBER(pc9801_a0_r);
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DECLARE_WRITE8_MEMBER(pc9801_a0_w);
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DECLARE_READ8_MEMBER(fdc_2hd_ctrl_r);
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DECLARE_WRITE8_MEMBER(fdc_2hd_ctrl_w);
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DECLARE_READ8_MEMBER(fdc_2dd_ctrl_r);
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DECLARE_WRITE8_MEMBER(fdc_2dd_ctrl_w);
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DECLARE_READ16_MEMBER(tvram_r);
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DECLARE_WRITE16_MEMBER(tvram_w);
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DECLARE_READ8_MEMBER(gvram_r);
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DECLARE_WRITE8_MEMBER(gvram_w);
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DECLARE_WRITE8_MEMBER(pc9801rs_mouse_freq_w);
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DECLARE_CUSTOM_INPUT_MEMBER(system_type_r);
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DECLARE_READ16_MEMBER(grcg_gvram_r);
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DECLARE_WRITE16_MEMBER(grcg_gvram_w);
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DECLARE_READ16_MEMBER(grcg_gvram0_r);
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DECLARE_WRITE16_MEMBER(grcg_gvram0_w);
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DECLARE_READ16_MEMBER(pc9821_grcg_gvram_r);
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DECLARE_WRITE16_MEMBER(pc9821_grcg_gvram_w);
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DECLARE_READ16_MEMBER(pc9821_grcg_gvram0_r);
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DECLARE_WRITE16_MEMBER(pc9821_grcg_gvram0_w);
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uint16_t m_pc9821_256vram_bank;
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DECLARE_READ16_MEMBER(upd7220_grcg_r);
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DECLARE_WRITE16_MEMBER(upd7220_grcg_w);
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void egc_blit_w(uint32_t offset, uint16_t data, uint16_t mem_mask);
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uint16_t egc_blit_r(uint32_t offset, uint16_t mem_mask);
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uint32_t a20_286(bool state);
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DECLARE_READ8_MEMBER(ide_ctrl_r);
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DECLARE_WRITE8_MEMBER(ide_ctrl_w);
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DECLARE_READ16_MEMBER(ide_cs0_r);
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DECLARE_WRITE16_MEMBER(ide_cs0_w);
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DECLARE_READ16_MEMBER(ide_cs1_r);
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DECLARE_WRITE16_MEMBER(ide_cs1_w);
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DECLARE_WRITE_LINE_MEMBER(ide1_irq_w);
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DECLARE_WRITE_LINE_MEMBER(ide2_irq_w);
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uint8_t m_ide_sel;
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bool m_ide1_irq, m_ide2_irq;
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DECLARE_WRITE8_MEMBER(sasi_data_w);
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DECLARE_READ8_MEMBER(sasi_data_r);
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DECLARE_WRITE_LINE_MEMBER(write_sasi_io);
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DECLARE_WRITE_LINE_MEMBER(write_sasi_req);
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DECLARE_READ8_MEMBER(sasi_status_r);
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DECLARE_WRITE8_MEMBER(sasi_ctrl_w);
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uint8_t m_sasi_data;
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int m_sasi_data_enable;
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uint8_t m_sasi_ctrl;
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DECLARE_READ8_MEMBER(pc9801rs_knjram_r);
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DECLARE_WRITE8_MEMBER(pc9801rs_knjram_w);
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DECLARE_WRITE8_MEMBER(pc9801rs_bank_w);
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DECLARE_READ8_MEMBER(a20_ctrl_r);
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DECLARE_WRITE8_MEMBER(a20_ctrl_w);
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DECLARE_READ8_MEMBER(fdc_mode_ctrl_r);
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DECLARE_WRITE8_MEMBER(fdc_mode_ctrl_w);
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// DECLARE_READ8_MEMBER(pc9801rs_2dd_r);
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// DECLARE_WRITE8_MEMBER(pc9801rs_2dd_w);
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DECLARE_WRITE8_MEMBER(pc9801rs_video_ff_w);
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DECLARE_WRITE8_MEMBER(pc9801rs_a0_w);
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DECLARE_WRITE8_MEMBER(pc9821_video_ff_w);
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DECLARE_READ8_MEMBER(pc9821_a0_r);
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DECLARE_WRITE8_MEMBER(pc9821_a0_w);
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DECLARE_READ8_MEMBER(access_ctrl_r);
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DECLARE_WRITE8_MEMBER(access_ctrl_w);
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DECLARE_READ8_MEMBER(midi_r);
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// DECLARE_READ8_MEMBER(winram_r);
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// DECLARE_WRITE8_MEMBER(winram_w);
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DECLARE_READ8_MEMBER(pic_r);
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DECLARE_WRITE8_MEMBER(pic_w);
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DECLARE_READ8_MEMBER(sdip_0_r);
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DECLARE_READ8_MEMBER(sdip_1_r);
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DECLARE_READ8_MEMBER(sdip_2_r);
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DECLARE_READ8_MEMBER(sdip_3_r);
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DECLARE_READ8_MEMBER(sdip_4_r);
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DECLARE_READ8_MEMBER(sdip_5_r);
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DECLARE_READ8_MEMBER(sdip_6_r);
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DECLARE_READ8_MEMBER(sdip_7_r);
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DECLARE_READ8_MEMBER(sdip_8_r);
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DECLARE_READ8_MEMBER(sdip_9_r);
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DECLARE_READ8_MEMBER(sdip_a_r);
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DECLARE_READ8_MEMBER(sdip_b_r);
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DECLARE_WRITE8_MEMBER(sdip_0_w);
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DECLARE_WRITE8_MEMBER(sdip_1_w);
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DECLARE_WRITE8_MEMBER(sdip_2_w);
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DECLARE_WRITE8_MEMBER(sdip_3_w);
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DECLARE_WRITE8_MEMBER(sdip_4_w);
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DECLARE_WRITE8_MEMBER(sdip_5_w);
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DECLARE_WRITE8_MEMBER(sdip_6_w);
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DECLARE_WRITE8_MEMBER(sdip_7_w);
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DECLARE_WRITE8_MEMBER(sdip_8_w);
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DECLARE_WRITE8_MEMBER(sdip_9_w);
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DECLARE_WRITE8_MEMBER(sdip_a_w);
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DECLARE_WRITE8_MEMBER(sdip_b_w);
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DECLARE_READ8_MEMBER(window_bank_r);
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DECLARE_WRITE8_MEMBER(window_bank_w);
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DECLARE_READ16_MEMBER(timestamp_r);
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DECLARE_READ8_MEMBER(ext2_video_ff_r);
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DECLARE_WRITE8_MEMBER(ext2_video_ff_w);
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DECLARE_FLOPPY_FORMATS( floppy_formats );
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UPD7220_DISPLAY_PIXELS_MEMBER( hgdc_display_pixels );
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UPD7220_DRAW_TEXT_LINE_MEMBER( hgdc_draw_text );
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private:
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uint8_t m_sdip_read(uint16_t port, uint8_t sdip_offset);
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void m_sdip_write(uint16_t port, uint8_t sdip_offset,uint8_t data);
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uint16_t egc_do_partial_op(int plane, uint16_t src, uint16_t pat, uint16_t dst) const;
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uint16_t egc_shift(int plane, uint16_t val);
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public:
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DECLARE_MACHINE_START(pc9801_common);
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DECLARE_MACHINE_START(pc9801f);
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DECLARE_MACHINE_START(pc9801rs);
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DECLARE_MACHINE_START(pc9801bx2);
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DECLARE_MACHINE_START(pc9821);
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DECLARE_MACHINE_START(pc9821ap2);
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DECLARE_MACHINE_RESET(pc9801_common);
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DECLARE_MACHINE_RESET(pc9801f);
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DECLARE_MACHINE_RESET(pc9801rs);
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DECLARE_MACHINE_RESET(pc9821);
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DECLARE_PALETTE_INIT(pc9801);
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INTERRUPT_GEN_MEMBER(vrtc_irq);
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DECLARE_READ8_MEMBER(get_slave_ack);
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DECLARE_WRITE_LINE_MEMBER(dma_hrq_changed);
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DECLARE_WRITE_LINE_MEMBER(tc_w);
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DECLARE_READ8_MEMBER(dma_read_byte);
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DECLARE_WRITE8_MEMBER(dma_write_byte);
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DECLARE_WRITE_LINE_MEMBER(dack0_w);
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DECLARE_WRITE_LINE_MEMBER(dack1_w);
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DECLARE_WRITE_LINE_MEMBER(dack2_w);
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DECLARE_WRITE_LINE_MEMBER(dack3_w);
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DECLARE_WRITE8_MEMBER(ppi_sys_portc_w);
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DECLARE_WRITE_LINE_MEMBER(fdc_2dd_irq);
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DECLARE_WRITE_LINE_MEMBER(pc9801rs_fdc_irq);
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DECLARE_WRITE_LINE_MEMBER(pc9801rs_fdc_drq);
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DECLARE_READ8_MEMBER(ppi_mouse_porta_r);
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DECLARE_WRITE8_MEMBER(ppi_mouse_porta_w);
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DECLARE_WRITE8_MEMBER(ppi_mouse_portb_w);
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DECLARE_WRITE8_MEMBER(ppi_mouse_portc_w);
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struct{
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uint8_t control;
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uint8_t lx;
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uint8_t ly;
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uint8_t freq_reg;
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uint8_t freq_index;
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}m_mouse;
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TIMER_DEVICE_CALLBACK_MEMBER( mouse_irq_cb );
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DECLARE_READ8_MEMBER(unk_r);
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DECLARE_DRIVER_INIT(pc9801_kanji);
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inline void set_dma_channel(int channel, int state);
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virtual void device_reset_after_children() override;
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};
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#define ATTRSEL_REG 0
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#define WIDTH40_REG 2
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#define FONTSEL_REG 3
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#define INTERLACE_REG 4
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#define MEMSW_REG 6
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#define DISPLAY_REG 7
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#define ANALOG_16_MODE 0
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#define ANALOG_256_MODE (0x20 >> 1)
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#define GDC_IS_5MHz (0x84 >> 1)
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void pc9801_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
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{
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339
src/mame/includes/pc9801.h
Normal file
339
src/mame/includes/pc9801.h
Normal file
@ -0,0 +1,339 @@
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// license:BSD-3-Clause
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// copyright-holders:Angelo Salese,Carl
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#pragma once
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#ifndef __PC9801__
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#define __PC9801__
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#define UPD1990A_TAG "upd1990a"
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#define UPD8251_TAG "upd8251"
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#define SASIBUS_TAG "sasi"
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#define ATTRSEL_REG 0
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#define WIDTH40_REG 2
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#define FONTSEL_REG 3
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#define INTERLACE_REG 4
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#define MEMSW_REG 6
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#define DISPLAY_REG 7
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#define ANALOG_16_MODE 0
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#define ANALOG_256_MODE (0x20 >> 1)
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#define GDC_IS_5MHz (0x84 >> 1)
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class pc9801_state : public driver_device
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{
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public:
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pc9801_state(const machine_config &mconfig, device_type type, const char *tag) :
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driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_dmac(*this, "i8237"),
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m_pit8253(*this, "pit8253"),
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m_pic1(*this, "pic8259_master"),
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m_pic2(*this, "pic8259_slave"),
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m_fdc_2hd(*this, "upd765_2hd"),
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m_fdc_2dd(*this, "upd765_2dd"),
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m_rtc(*this, UPD1990A_TAG),
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m_keyb(*this, "keyb"),
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m_sio(*this, UPD8251_TAG),
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m_hgdc1(*this, "upd7220_chr"),
|
||||
m_hgdc2(*this, "upd7220_btm"),
|
||||
m_sasibus(*this, SASIBUS_TAG),
|
||||
m_sasi_data_out(*this, "sasi_data_out"),
|
||||
m_sasi_data_in(*this, "sasi_data_in"),
|
||||
m_sasi_ctrl_in(*this, "sasi_ctrl_in"),
|
||||
m_ide1(*this, "ide1"),
|
||||
m_ide2(*this, "ide2"),
|
||||
m_video_ram_1(*this, "video_ram_1"),
|
||||
m_video_ram_2(*this, "video_ram_2"),
|
||||
m_ext_gvram(*this, "ext_gvram"),
|
||||
m_beeper(*this, "beeper"),
|
||||
m_ram(*this, RAM_TAG),
|
||||
m_ipl(*this, "ipl_bank"),
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_palette(*this, "palette"),
|
||||
m_screen(*this, "screen")
|
||||
{
|
||||
}
|
||||
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<am9517a_device> m_dmac;
|
||||
required_device<pit8253_device> m_pit8253;
|
||||
required_device<pic8259_device> m_pic1;
|
||||
required_device<pic8259_device> m_pic2;
|
||||
required_device<upd765a_device> m_fdc_2hd;
|
||||
optional_device<upd765a_device> m_fdc_2dd;
|
||||
required_device<upd1990a_device> m_rtc;
|
||||
required_device<pc9801_kbd_device> m_keyb;
|
||||
required_device<i8251_device> m_sio;
|
||||
required_device<upd7220_device> m_hgdc1;
|
||||
required_device<upd7220_device> m_hgdc2;
|
||||
optional_device<scsi_port_device> m_sasibus;
|
||||
optional_device<output_latch_device> m_sasi_data_out;
|
||||
optional_device<input_buffer_device> m_sasi_data_in;
|
||||
optional_device<input_buffer_device> m_sasi_ctrl_in;
|
||||
optional_device<ata_interface_device> m_ide1;
|
||||
optional_device<ata_interface_device> m_ide2;
|
||||
required_shared_ptr<uint16_t> m_video_ram_1;
|
||||
required_shared_ptr<uint16_t> m_video_ram_2;
|
||||
optional_shared_ptr<uint32_t> m_ext_gvram;
|
||||
required_device<beep_device> m_beeper;
|
||||
optional_device<ram_device> m_ram;
|
||||
optional_device<address_map_bank_device> m_ipl;
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_device<palette_device> m_palette;
|
||||
required_device<screen_device> m_screen;
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER( write_uart_clock );
|
||||
DECLARE_WRITE8_MEMBER(rtc_w);
|
||||
DECLARE_WRITE8_MEMBER(dmapg4_w);
|
||||
DECLARE_WRITE8_MEMBER(dmapg8_w);
|
||||
DECLARE_WRITE8_MEMBER(nmi_ctrl_w);
|
||||
DECLARE_WRITE8_MEMBER(vrtc_clear_w);
|
||||
DECLARE_WRITE8_MEMBER(pc9801_video_ff_w);
|
||||
DECLARE_READ8_MEMBER(txt_scrl_r);
|
||||
DECLARE_WRITE8_MEMBER(txt_scrl_w);
|
||||
DECLARE_READ8_MEMBER(grcg_r);
|
||||
DECLARE_WRITE8_MEMBER(grcg_w);
|
||||
DECLARE_WRITE16_MEMBER(egc_w);
|
||||
DECLARE_READ8_MEMBER(pc9801_a0_r);
|
||||
DECLARE_WRITE8_MEMBER(pc9801_a0_w);
|
||||
DECLARE_READ8_MEMBER(fdc_2hd_ctrl_r);
|
||||
DECLARE_WRITE8_MEMBER(fdc_2hd_ctrl_w);
|
||||
DECLARE_READ8_MEMBER(fdc_2dd_ctrl_r);
|
||||
DECLARE_WRITE8_MEMBER(fdc_2dd_ctrl_w);
|
||||
DECLARE_READ16_MEMBER(tvram_r);
|
||||
DECLARE_WRITE16_MEMBER(tvram_w);
|
||||
DECLARE_READ8_MEMBER(gvram_r);
|
||||
DECLARE_WRITE8_MEMBER(gvram_w);
|
||||
DECLARE_WRITE8_MEMBER(pc9801rs_mouse_freq_w);
|
||||
DECLARE_CUSTOM_INPUT_MEMBER(system_type_r);
|
||||
DECLARE_READ16_MEMBER(grcg_gvram_r);
|
||||
DECLARE_WRITE16_MEMBER(grcg_gvram_w);
|
||||
DECLARE_READ16_MEMBER(grcg_gvram0_r);
|
||||
DECLARE_WRITE16_MEMBER(grcg_gvram0_w);
|
||||
|
||||
DECLARE_READ16_MEMBER(pc9821_grcg_gvram_r);
|
||||
DECLARE_WRITE16_MEMBER(pc9821_grcg_gvram_w);
|
||||
DECLARE_READ16_MEMBER(pc9821_grcg_gvram0_r);
|
||||
DECLARE_WRITE16_MEMBER(pc9821_grcg_gvram0_w);
|
||||
|
||||
DECLARE_READ16_MEMBER(upd7220_grcg_r);
|
||||
DECLARE_WRITE16_MEMBER(upd7220_grcg_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(ide_ctrl_r);
|
||||
DECLARE_WRITE8_MEMBER(ide_ctrl_w);
|
||||
DECLARE_READ16_MEMBER(ide_cs0_r);
|
||||
DECLARE_WRITE16_MEMBER(ide_cs0_w);
|
||||
DECLARE_READ16_MEMBER(ide_cs1_r);
|
||||
DECLARE_WRITE16_MEMBER(ide_cs1_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(ide1_irq_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(ide2_irq_w);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(sasi_data_w);
|
||||
DECLARE_READ8_MEMBER(sasi_data_r);
|
||||
DECLARE_WRITE_LINE_MEMBER(write_sasi_io);
|
||||
DECLARE_WRITE_LINE_MEMBER(write_sasi_req);
|
||||
DECLARE_READ8_MEMBER(sasi_status_r);
|
||||
DECLARE_WRITE8_MEMBER(sasi_ctrl_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(pc9801rs_knjram_r);
|
||||
DECLARE_WRITE8_MEMBER(pc9801rs_knjram_w);
|
||||
DECLARE_WRITE8_MEMBER(pc9801rs_bank_w);
|
||||
DECLARE_READ8_MEMBER(a20_ctrl_r);
|
||||
DECLARE_WRITE8_MEMBER(a20_ctrl_w);
|
||||
DECLARE_READ8_MEMBER(fdc_mode_ctrl_r);
|
||||
DECLARE_WRITE8_MEMBER(fdc_mode_ctrl_w);
|
||||
// DECLARE_READ8_MEMBER(pc9801rs_2dd_r);
|
||||
// DECLARE_WRITE8_MEMBER(pc9801rs_2dd_w);
|
||||
DECLARE_WRITE8_MEMBER(pc9801rs_video_ff_w);
|
||||
DECLARE_WRITE8_MEMBER(pc9801rs_a0_w);
|
||||
DECLARE_WRITE8_MEMBER(pc9821_video_ff_w);
|
||||
DECLARE_READ8_MEMBER(pc9821_a0_r);
|
||||
DECLARE_WRITE8_MEMBER(pc9821_a0_w);
|
||||
DECLARE_READ8_MEMBER(access_ctrl_r);
|
||||
DECLARE_WRITE8_MEMBER(access_ctrl_w);
|
||||
DECLARE_READ8_MEMBER(midi_r);
|
||||
// DECLARE_READ8_MEMBER(winram_r);
|
||||
// DECLARE_WRITE8_MEMBER(winram_w);
|
||||
DECLARE_READ8_MEMBER(pic_r);
|
||||
DECLARE_WRITE8_MEMBER(pic_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(sdip_0_r);
|
||||
DECLARE_READ8_MEMBER(sdip_1_r);
|
||||
DECLARE_READ8_MEMBER(sdip_2_r);
|
||||
DECLARE_READ8_MEMBER(sdip_3_r);
|
||||
DECLARE_READ8_MEMBER(sdip_4_r);
|
||||
DECLARE_READ8_MEMBER(sdip_5_r);
|
||||
DECLARE_READ8_MEMBER(sdip_6_r);
|
||||
DECLARE_READ8_MEMBER(sdip_7_r);
|
||||
DECLARE_READ8_MEMBER(sdip_8_r);
|
||||
DECLARE_READ8_MEMBER(sdip_9_r);
|
||||
DECLARE_READ8_MEMBER(sdip_a_r);
|
||||
DECLARE_READ8_MEMBER(sdip_b_r);
|
||||
|
||||
DECLARE_WRITE8_MEMBER(sdip_0_w);
|
||||
DECLARE_WRITE8_MEMBER(sdip_1_w);
|
||||
DECLARE_WRITE8_MEMBER(sdip_2_w);
|
||||
DECLARE_WRITE8_MEMBER(sdip_3_w);
|
||||
DECLARE_WRITE8_MEMBER(sdip_4_w);
|
||||
DECLARE_WRITE8_MEMBER(sdip_5_w);
|
||||
DECLARE_WRITE8_MEMBER(sdip_6_w);
|
||||
DECLARE_WRITE8_MEMBER(sdip_7_w);
|
||||
DECLARE_WRITE8_MEMBER(sdip_8_w);
|
||||
DECLARE_WRITE8_MEMBER(sdip_9_w);
|
||||
DECLARE_WRITE8_MEMBER(sdip_a_w);
|
||||
DECLARE_WRITE8_MEMBER(sdip_b_w);
|
||||
|
||||
DECLARE_READ8_MEMBER(window_bank_r);
|
||||
DECLARE_WRITE8_MEMBER(window_bank_w);
|
||||
DECLARE_READ16_MEMBER(timestamp_r);
|
||||
DECLARE_READ8_MEMBER(ext2_video_ff_r);
|
||||
DECLARE_WRITE8_MEMBER(ext2_video_ff_w);
|
||||
|
||||
DECLARE_FLOPPY_FORMATS( floppy_formats );
|
||||
UPD7220_DISPLAY_PIXELS_MEMBER( hgdc_display_pixels );
|
||||
UPD7220_DRAW_TEXT_LINE_MEMBER( hgdc_draw_text );
|
||||
|
||||
DECLARE_MACHINE_START(pc9801_common);
|
||||
DECLARE_MACHINE_START(pc9801f);
|
||||
DECLARE_MACHINE_START(pc9801rs);
|
||||
DECLARE_MACHINE_START(pc9801bx2);
|
||||
DECLARE_MACHINE_START(pc9821);
|
||||
DECLARE_MACHINE_START(pc9821ap2);
|
||||
DECLARE_MACHINE_RESET(pc9801_common);
|
||||
DECLARE_MACHINE_RESET(pc9801f);
|
||||
DECLARE_MACHINE_RESET(pc9801rs);
|
||||
DECLARE_MACHINE_RESET(pc9821);
|
||||
|
||||
DECLARE_PALETTE_INIT(pc9801);
|
||||
INTERRUPT_GEN_MEMBER(vrtc_irq);
|
||||
DECLARE_READ8_MEMBER(get_slave_ack);
|
||||
DECLARE_WRITE_LINE_MEMBER(dma_hrq_changed);
|
||||
DECLARE_WRITE_LINE_MEMBER(tc_w);
|
||||
DECLARE_READ8_MEMBER(dma_read_byte);
|
||||
DECLARE_WRITE8_MEMBER(dma_write_byte);
|
||||
DECLARE_WRITE_LINE_MEMBER(dack0_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(dack1_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(dack2_w);
|
||||
DECLARE_WRITE_LINE_MEMBER(dack3_w);
|
||||
DECLARE_WRITE8_MEMBER(ppi_sys_portc_w);
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(fdc_2dd_irq);
|
||||
DECLARE_WRITE_LINE_MEMBER(pc9801rs_fdc_irq);
|
||||
DECLARE_WRITE_LINE_MEMBER(pc9801rs_fdc_drq);
|
||||
|
||||
DECLARE_READ8_MEMBER(ppi_mouse_porta_r);
|
||||
DECLARE_WRITE8_MEMBER(ppi_mouse_porta_w);
|
||||
DECLARE_WRITE8_MEMBER(ppi_mouse_portb_w);
|
||||
DECLARE_WRITE8_MEMBER(ppi_mouse_portc_w);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER( mouse_irq_cb );
|
||||
DECLARE_READ8_MEMBER(unk_r);
|
||||
|
||||
DECLARE_DRIVER_INIT(pc9801_kanji);
|
||||
|
||||
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
uint32_t a20_286(bool state);
|
||||
|
||||
protected:
|
||||
virtual void video_start() override;
|
||||
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
|
||||
virtual void device_reset_after_children() override;
|
||||
|
||||
|
||||
private:
|
||||
enum
|
||||
{
|
||||
TIMER_VBIRQ
|
||||
};
|
||||
|
||||
inline void set_dma_channel(int channel, int state);
|
||||
emu_timer *m_vbirq;
|
||||
uint8_t *m_char_rom;
|
||||
uint8_t *m_kanji_rom;
|
||||
|
||||
uint8_t m_dma_offset[4];
|
||||
uint8_t m_dma_autoinc[4];
|
||||
int m_dack;
|
||||
|
||||
uint8_t m_video_ff[8],m_gfx_ff;
|
||||
uint8_t m_txt_scroll_reg[8];
|
||||
uint8_t m_pal_clut[4];
|
||||
|
||||
std::unique_ptr<uint16_t[]> m_tvram;
|
||||
|
||||
uint16_t m_font_addr;
|
||||
uint8_t m_font_line;
|
||||
uint16_t m_font_lr;
|
||||
|
||||
uint8_t m_fdc_2dd_ctrl,m_fdc_2hd_ctrl;
|
||||
uint8_t m_nmi_ff;
|
||||
|
||||
uint8_t m_vram_bank;
|
||||
uint8_t m_vram_disp;
|
||||
|
||||
uint8_t m_sasi_data;
|
||||
int m_sasi_data_enable;
|
||||
uint8_t m_sasi_ctrl;
|
||||
|
||||
struct{
|
||||
uint8_t control;
|
||||
uint8_t lx;
|
||||
uint8_t ly;
|
||||
uint8_t freq_reg;
|
||||
uint8_t freq_index;
|
||||
}m_mouse;
|
||||
|
||||
uint8_t m_ide_sel;
|
||||
bool m_ide1_irq, m_ide2_irq;
|
||||
|
||||
/* PC9801RS specific, move to specific state */
|
||||
uint8_t m_gate_a20; //A20 line
|
||||
uint8_t m_access_ctrl; // DMA related
|
||||
uint8_t m_fdc_ctrl;
|
||||
uint8_t m_ex_video_ff[128];
|
||||
struct {
|
||||
uint8_t pal_entry;
|
||||
uint8_t r[16],g[16],b[16];
|
||||
}m_analog16;
|
||||
struct {
|
||||
uint8_t pal_entry;
|
||||
uint8_t r[0x100],g[0x100],b[0x100];
|
||||
uint16_t read_bank;
|
||||
uint16_t write_bank;
|
||||
}m_analog256;
|
||||
struct {
|
||||
uint8_t mode;
|
||||
uint8_t tile[4], tile_index;
|
||||
}m_grcg;
|
||||
|
||||
void egc_blit_w(uint32_t offset, uint16_t data, uint16_t mem_mask);
|
||||
uint16_t egc_blit_r(uint32_t offset, uint16_t mem_mask);
|
||||
|
||||
|
||||
/* PC9821 specific */
|
||||
uint8_t m_sdip[24], m_sdip_bank;
|
||||
uint8_t m_pc9821_window_bank;
|
||||
uint8_t m_ext2_ff;
|
||||
uint8_t m_sys_type;
|
||||
|
||||
struct {
|
||||
uint16_t regs[8];
|
||||
uint16_t pat[4];
|
||||
uint16_t src[4];
|
||||
int16_t count;
|
||||
uint16_t leftover[4];
|
||||
bool first;
|
||||
bool init;
|
||||
} m_egc;
|
||||
|
||||
uint16_t m_pc9821_256vram_bank;
|
||||
|
||||
uint8_t m_sdip_read(uint16_t port, uint8_t sdip_offset);
|
||||
void m_sdip_write(uint16_t port, uint8_t sdip_offset,uint8_t data);
|
||||
uint16_t egc_do_partial_op(int plane, uint16_t src, uint16_t pat, uint16_t dst) const;
|
||||
uint16_t egc_shift(int plane, uint16_t val);
|
||||
};
|
||||
|
||||
|
||||
#endif
|
Loading…
Reference in New Issue
Block a user