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https://github.com/holub/mame
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(MESS) c64: Cartridge WIP. (nw)
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@ -6415,18 +6415,20 @@
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</software>
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<software name="fcc" supported="no">
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<description>The Final ChessCard</description>
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<description>The Final ChessCard (Ger)</description>
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<year>1989</year>
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<publisher>Tasc</publisher>
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<part name="cart" interface="c64_cart">
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<feature name="slot" value="fcc" />
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<feature name="exrom" value="0" />
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<feature name="game" value="1" />
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<feature name="game" value="0" />
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<dataarea name="roml" size="0x8000">
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<rom name="fcc_rom2" size="0x8000" crc="8fc0f156" sha1="c843729870e7ce59bb64b60ebec028f7200f93d1" offset="0x0000" />
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</dataarea>
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<dataarea name="nvram" size="0x2000" />
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</part>
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</software>
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@ -7,6 +7,21 @@
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**********************************************************************/
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/*
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TODO:
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629D ldx #$00
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629F stx $0e
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62A1 sta $df00
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62A4 inc $d020
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62A7 dec $d020
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62AA cpx $0e
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62AC beq $62a4 <-- eternal loop here
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62AE rts
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*/
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#include "c64_fcc.h"
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@ -50,7 +65,7 @@ const rom_entry *c64_final_chesscard_device::device_rom_region() const
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//-------------------------------------------------
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static ADDRESS_MAP_START( c64_fcc_map, AS_PROGRAM, 8, c64_final_chesscard_device )
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AM_RANGE(0x0000, 0x7fff) AM_RAM
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AM_RANGE(0x0000, 0x1fff) AM_MIRROR(0x6000) AM_READWRITE(nvram_r, nvram_w)
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AM_RANGE(0x8000, 0xffff) AM_ROM AM_REGION(G65SC02P4_TAG, 0)
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ADDRESS_MAP_END
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@ -60,7 +75,7 @@ ADDRESS_MAP_END
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//-------------------------------------------------
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static MACHINE_CONFIG_FRAGMENT( c64_fcc )
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MCFG_CPU_ADD(G65SC02P4_TAG, M65SC02, 5000000)
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MCFG_CPU_ADD(G65SC02P4_TAG, M65SC02, XTAL_5MHz)
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MCFG_CPU_PROGRAM_MAP(c64_fcc_map)
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MACHINE_CONFIG_END
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@ -117,7 +132,10 @@ ioport_constructor c64_final_chesscard_device::device_input_ports() const
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c64_final_chesscard_device::c64_final_chesscard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
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device_t(mconfig, C64_FCC, "Final ChessCard", tag, owner, clock),
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device_c64_expansion_card_interface(mconfig, *this),
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m_maincpu(*this, G65SC02P4_TAG)
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device_nvram_interface(mconfig, *this),
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m_maincpu(*this, G65SC02P4_TAG),
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m_bank(0),
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m_ramen(0)
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{
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}
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@ -137,6 +155,11 @@ void c64_final_chesscard_device::device_start()
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void c64_final_chesscard_device::device_reset()
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{
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m_maincpu->reset();
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m_bank = 0;
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m_ramen = 0;
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m_game = 0;
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}
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@ -148,7 +171,18 @@ UINT8 c64_final_chesscard_device::c64_cd_r(address_space &space, offs_t offset,
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{
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if (!roml)
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{
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data = m_roml[(m_bank << 13) | (offset & 0x1fff)];
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if (m_ramen)
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{
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data = m_nvram[offset & 0x1fff];
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}
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else
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{
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data = m_roml[(m_bank << 14) | (offset & 0x3fff)];
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}
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}
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else if (!romh)
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{
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data = m_roml[(m_bank << 14) | (offset & 0x3fff)];
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}
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return data;
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@ -161,11 +195,72 @@ UINT8 c64_final_chesscard_device::c64_cd_r(address_space &space, offs_t offset,
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void c64_final_chesscard_device::c64_cd_w(address_space &space, offs_t offset, UINT8 data, int sphi2, int ba, int roml, int romh, int io1, int io2)
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{
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if (!io1)
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if (!roml)
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{
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printf("IO1 %04x %02x\n", offset, data);
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m_bank = data;
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if (m_ramen)
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{
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m_nvram[offset & 0x1fff] = data;
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}
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}
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else if (!io1)
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{
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/*
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bit description
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0 ?
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1
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2
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3
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4
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5
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6
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7
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*/
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if (!io2) printf("IO1 %04x %02x\n", offset, data);
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printf("IO1 %04x %02x\n", offset, data);
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m_bank = BIT(data, 0);
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}
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else if (!io2)
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{
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/*
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bit description
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0 ?
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1
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2
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3
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4
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5
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6
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7 ?
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*/
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printf("IO2 %04x %02x\n", offset, data);
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m_ramen = BIT(data, 0);
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m_game = BIT(data, 7);
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}
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}
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//-------------------------------------------------
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// nvram_r - NVRAM read
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//-------------------------------------------------
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READ8_MEMBER( c64_final_chesscard_device::nvram_r )
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{
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return m_nvram[offset & m_nvram_mask];
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}
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//-------------------------------------------------
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// nvram_w - NVRAM write
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//-------------------------------------------------
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WRITE8_MEMBER( c64_final_chesscard_device::nvram_w )
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{
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m_nvram[offset & m_nvram_mask] = data;
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}
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@ -25,7 +25,8 @@
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// ======================> c64_final_chesscard_device
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class c64_final_chesscard_device : public device_t,
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public device_c64_expansion_card_interface
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public device_c64_expansion_card_interface,
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public device_nvram_interface
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{
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public:
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// construction/destruction
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@ -37,6 +38,8 @@ public:
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virtual ioport_constructor device_input_ports() const;
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DECLARE_INPUT_CHANGED_MEMBER( reset );
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DECLARE_READ8_MEMBER( nvram_r );
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DECLARE_WRITE8_MEMBER( nvram_w );
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protected:
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// device-level overrides
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@ -44,6 +47,11 @@ protected:
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virtual void device_start();
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virtual void device_reset();
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// device_nvram_interface overrides
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virtual void nvram_default() { }
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virtual void nvram_read(emu_file &file) { if (m_nvram != NULL) { file.read(m_nvram, m_nvram_size); } }
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virtual void nvram_write(emu_file &file) { if (m_nvram != NULL) { file.write(m_nvram, m_nvram_size); } }
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// device_c64_expansion_card_interface overrides
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virtual UINT8 c64_cd_r(address_space &space, offs_t offset, UINT8 data, int sphi2, int ba, int roml, int romh, int io1, int io2);
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virtual void c64_cd_w(address_space &space, offs_t offset, UINT8 data, int sphi2, int ba, int roml, int romh, int io1, int io2);
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@ -52,6 +60,7 @@ private:
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required_device<m65sc02_device> m_maincpu;
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UINT8 m_bank;
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int m_ramen;
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};
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@ -89,6 +89,13 @@ enum
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REGISTER_FAST
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};
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static int UNUSED_BITS[0x40] =
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{
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x01, 0x70, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00,
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0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xff,
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0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
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};
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// VICE palette
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static const rgb_t PALETTE[] =
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@ -2460,39 +2467,47 @@ READ8_MEMBER( mos6566_device::read )
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{
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case 0x11:
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val = (m_reg[offset] & ~0x80) | ((m_rasterline & 0x100) >> 1);
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val |= UNUSED_BITS[offset];
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break;
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case 0x12:
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val = m_rasterline & 0xff;
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val |= UNUSED_BITS[offset];
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break;
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case 0x16:
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val = m_reg[offset] | 0xc0;
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val |= UNUSED_BITS[offset];
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break;
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case 0x18:
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val = m_reg[offset] | 0x01;
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val |= UNUSED_BITS[offset];
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break;
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case 0x19: /* interrupt flag register */
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/* clear_interrupt(0xf); */
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val = m_reg[offset] | 0x70;
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val |= UNUSED_BITS[offset];
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break;
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case 0x1a:
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val = m_reg[offset] | 0xf0;
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val |= UNUSED_BITS[offset];
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break;
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case 0x1e: /* sprite to sprite collision detect */
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val = m_reg[offset];
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m_reg[offset] = 0;
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clear_interrupt(4);
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val |= UNUSED_BITS[offset];
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break;
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case 0x1f: /* sprite to background collision detect */
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val = m_reg[offset];
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m_reg[offset] = 0;
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clear_interrupt(2);
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val |= UNUSED_BITS[offset];
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break;
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case 0x20:
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@ -2501,6 +2516,7 @@ READ8_MEMBER( mos6566_device::read )
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case 0x23:
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case 0x24:
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val = m_reg[offset];
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val |= UNUSED_BITS[offset];
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break;
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case 0x00:
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@ -2535,6 +2551,7 @@ READ8_MEMBER( mos6566_device::read )
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case 0x2d:
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case 0x2e:
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val = m_reg[offset];
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val |= UNUSED_BITS[offset];
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break;
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case REGISTER_KCR:
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@ -2545,7 +2562,9 @@ READ8_MEMBER( mos6566_device::read )
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DBG_LOG(2, "vic read", ("%.2x:%.2x\n", offset, val));
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}
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else
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val = 0xff;
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{
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val |= UNUSED_BITS[offset];
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}
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break;
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case 0x31:
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@ -2563,13 +2582,13 @@ READ8_MEMBER( mos6566_device::read )
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case 0x3d:
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case 0x3e:
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case 0x3f: /* not used */
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// val = m_reg[offset]; //
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val = 0xff;
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DBG_LOG(2, "vic read", ("%.2x:%.2x\n", offset, val));
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val |= UNUSED_BITS[offset];
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break;
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default:
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val = m_reg[offset];
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val |= UNUSED_BITS[offset];
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}
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if ((offset != 0x11) && (offset != 0x12))
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