(MESS) c64: Cartridge WIP. (nw)

This commit is contained in:
Curt Coder 2013-01-29 15:11:04 +00:00
parent da423e82f4
commit e2312fd2b9
4 changed files with 139 additions and 14 deletions

View File

@ -6415,18 +6415,20 @@
</software>
<software name="fcc" supported="no">
<description>The Final ChessCard</description>
<description>The Final ChessCard (Ger)</description>
<year>1989</year>
<publisher>Tasc</publisher>
<part name="cart" interface="c64_cart">
<feature name="slot" value="fcc" />
<feature name="exrom" value="0" />
<feature name="game" value="1" />
<feature name="game" value="0" />
<dataarea name="roml" size="0x8000">
<rom name="fcc_rom2" size="0x8000" crc="8fc0f156" sha1="c843729870e7ce59bb64b60ebec028f7200f93d1" offset="0x0000" />
</dataarea>
<dataarea name="nvram" size="0x2000" />
</part>
</software>

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@ -7,6 +7,21 @@
**********************************************************************/
/*
TODO:
629D ldx #$00
629F stx $0e
62A1 sta $df00
62A4 inc $d020
62A7 dec $d020
62AA cpx $0e
62AC beq $62a4 <-- eternal loop here
62AE rts
*/
#include "c64_fcc.h"
@ -50,7 +65,7 @@ const rom_entry *c64_final_chesscard_device::device_rom_region() const
//-------------------------------------------------
static ADDRESS_MAP_START( c64_fcc_map, AS_PROGRAM, 8, c64_final_chesscard_device )
AM_RANGE(0x0000, 0x7fff) AM_RAM
AM_RANGE(0x0000, 0x1fff) AM_MIRROR(0x6000) AM_READWRITE(nvram_r, nvram_w)
AM_RANGE(0x8000, 0xffff) AM_ROM AM_REGION(G65SC02P4_TAG, 0)
ADDRESS_MAP_END
@ -60,7 +75,7 @@ ADDRESS_MAP_END
//-------------------------------------------------
static MACHINE_CONFIG_FRAGMENT( c64_fcc )
MCFG_CPU_ADD(G65SC02P4_TAG, M65SC02, 5000000)
MCFG_CPU_ADD(G65SC02P4_TAG, M65SC02, XTAL_5MHz)
MCFG_CPU_PROGRAM_MAP(c64_fcc_map)
MACHINE_CONFIG_END
@ -117,7 +132,10 @@ ioport_constructor c64_final_chesscard_device::device_input_ports() const
c64_final_chesscard_device::c64_final_chesscard_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, C64_FCC, "Final ChessCard", tag, owner, clock),
device_c64_expansion_card_interface(mconfig, *this),
m_maincpu(*this, G65SC02P4_TAG)
device_nvram_interface(mconfig, *this),
m_maincpu(*this, G65SC02P4_TAG),
m_bank(0),
m_ramen(0)
{
}
@ -137,6 +155,11 @@ void c64_final_chesscard_device::device_start()
void c64_final_chesscard_device::device_reset()
{
m_maincpu->reset();
m_bank = 0;
m_ramen = 0;
m_game = 0;
}
@ -148,7 +171,18 @@ UINT8 c64_final_chesscard_device::c64_cd_r(address_space &space, offs_t offset,
{
if (!roml)
{
data = m_roml[(m_bank << 13) | (offset & 0x1fff)];
if (m_ramen)
{
data = m_nvram[offset & 0x1fff];
}
else
{
data = m_roml[(m_bank << 14) | (offset & 0x3fff)];
}
}
else if (!romh)
{
data = m_roml[(m_bank << 14) | (offset & 0x3fff)];
}
return data;
@ -161,11 +195,72 @@ UINT8 c64_final_chesscard_device::c64_cd_r(address_space &space, offs_t offset,
void c64_final_chesscard_device::c64_cd_w(address_space &space, offs_t offset, UINT8 data, int sphi2, int ba, int roml, int romh, int io1, int io2)
{
if (!io1)
if (!roml)
{
printf("IO1 %04x %02x\n", offset, data);
m_bank = data;
if (m_ramen)
{
m_nvram[offset & 0x1fff] = data;
}
}
else if (!io1)
{
/*
bit description
0 ?
1
2
3
4
5
6
7
*/
if (!io2) printf("IO1 %04x %02x\n", offset, data);
printf("IO1 %04x %02x\n", offset, data);
m_bank = BIT(data, 0);
}
else if (!io2)
{
/*
bit description
0 ?
1
2
3
4
5
6
7 ?
*/
printf("IO2 %04x %02x\n", offset, data);
m_ramen = BIT(data, 0);
m_game = BIT(data, 7);
}
}
//-------------------------------------------------
// nvram_r - NVRAM read
//-------------------------------------------------
READ8_MEMBER( c64_final_chesscard_device::nvram_r )
{
return m_nvram[offset & m_nvram_mask];
}
//-------------------------------------------------
// nvram_w - NVRAM write
//-------------------------------------------------
WRITE8_MEMBER( c64_final_chesscard_device::nvram_w )
{
m_nvram[offset & m_nvram_mask] = data;
}

View File

@ -25,7 +25,8 @@
// ======================> c64_final_chesscard_device
class c64_final_chesscard_device : public device_t,
public device_c64_expansion_card_interface
public device_c64_expansion_card_interface,
public device_nvram_interface
{
public:
// construction/destruction
@ -37,6 +38,8 @@ public:
virtual ioport_constructor device_input_ports() const;
DECLARE_INPUT_CHANGED_MEMBER( reset );
DECLARE_READ8_MEMBER( nvram_r );
DECLARE_WRITE8_MEMBER( nvram_w );
protected:
// device-level overrides
@ -44,6 +47,11 @@ protected:
virtual void device_start();
virtual void device_reset();
// device_nvram_interface overrides
virtual void nvram_default() { }
virtual void nvram_read(emu_file &file) { if (m_nvram != NULL) { file.read(m_nvram, m_nvram_size); } }
virtual void nvram_write(emu_file &file) { if (m_nvram != NULL) { file.write(m_nvram, m_nvram_size); } }
// device_c64_expansion_card_interface overrides
virtual UINT8 c64_cd_r(address_space &space, offs_t offset, UINT8 data, int sphi2, int ba, int roml, int romh, int io1, int io2);
virtual void c64_cd_w(address_space &space, offs_t offset, UINT8 data, int sphi2, int ba, int roml, int romh, int io1, int io2);
@ -52,6 +60,7 @@ private:
required_device<m65sc02_device> m_maincpu;
UINT8 m_bank;
int m_ramen;
};

View File

@ -89,6 +89,13 @@ enum
REGISTER_FAST
};
static int UNUSED_BITS[0x40] =
{
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x01, 0x70, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00,
0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xf0, 0xff,
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
};
// VICE palette
static const rgb_t PALETTE[] =
@ -2460,39 +2467,47 @@ READ8_MEMBER( mos6566_device::read )
{
case 0x11:
val = (m_reg[offset] & ~0x80) | ((m_rasterline & 0x100) >> 1);
val |= UNUSED_BITS[offset];
break;
case 0x12:
val = m_rasterline & 0xff;
val |= UNUSED_BITS[offset];
break;
case 0x16:
val = m_reg[offset] | 0xc0;
val |= UNUSED_BITS[offset];
break;
case 0x18:
val = m_reg[offset] | 0x01;
val |= UNUSED_BITS[offset];
break;
case 0x19: /* interrupt flag register */
/* clear_interrupt(0xf); */
val = m_reg[offset] | 0x70;
val |= UNUSED_BITS[offset];
break;
case 0x1a:
val = m_reg[offset] | 0xf0;
val |= UNUSED_BITS[offset];
break;
case 0x1e: /* sprite to sprite collision detect */
val = m_reg[offset];
m_reg[offset] = 0;
clear_interrupt(4);
val |= UNUSED_BITS[offset];
break;
case 0x1f: /* sprite to background collision detect */
val = m_reg[offset];
m_reg[offset] = 0;
clear_interrupt(2);
val |= UNUSED_BITS[offset];
break;
case 0x20:
@ -2501,6 +2516,7 @@ READ8_MEMBER( mos6566_device::read )
case 0x23:
case 0x24:
val = m_reg[offset];
val |= UNUSED_BITS[offset];
break;
case 0x00:
@ -2535,6 +2551,7 @@ READ8_MEMBER( mos6566_device::read )
case 0x2d:
case 0x2e:
val = m_reg[offset];
val |= UNUSED_BITS[offset];
break;
case REGISTER_KCR:
@ -2545,7 +2562,9 @@ READ8_MEMBER( mos6566_device::read )
DBG_LOG(2, "vic read", ("%.2x:%.2x\n", offset, val));
}
else
val = 0xff;
{
val |= UNUSED_BITS[offset];
}
break;
case 0x31:
@ -2563,13 +2582,13 @@ READ8_MEMBER( mos6566_device::read )
case 0x3d:
case 0x3e:
case 0x3f: /* not used */
// val = m_reg[offset]; //
val = 0xff;
DBG_LOG(2, "vic read", ("%.2x:%.2x\n", offset, val));
val |= UNUSED_BITS[offset];
break;
default:
val = m_reg[offset];
val |= UNUSED_BITS[offset];
}
if ((offset != 0x11) && (offset != 0x12))