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https://github.com/holub/mame
synced 2025-04-22 16:31:49 +03:00
machine/mediagx_cs5530_bridge.cpp: add $92 A20 gate
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@ -11,6 +11,11 @@
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#include "speaker.h"
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#define VERBOSE (LOG_GENERAL)
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//#define LOG_OUTPUT_FUNC osd_printf_warning
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#include "logmacro.h"
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DEFINE_DEVICE_TYPE(MEDIAGX_CS5530_BRIDGE, mediagx_cs5530_bridge_device, "mediagx_cs5530_bridge", "MediaGX CS5530 Bridge")
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mediagx_cs5530_bridge_device::mediagx_cs5530_bridge_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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@ -128,7 +133,61 @@ void mediagx_cs5530_bridge_device::device_reset()
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void mediagx_cs5530_bridge_device::config_map(address_map &map)
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{
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pci_device::config_map(map);
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// ...
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// map(0x40, 0x42) PCI Function Control
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// map(0x43, 0x43) USB Shadow
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// map(0x44, 0x44) Reset Control
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// map(0x50, 0x50) PIT Control/ISA CLK divider
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// map(0x51, 0x51) ISA I/O Recovery Control
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// map(0x52, 0x52) ROM/AT Logic Control
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// map(0x53, 0x53) Alternate CPU Support
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// map(0x5a, 0x5b) Decode Control
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// map(0x5c, 0x5d) PCI Interrupt Steering
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// map(0x70, 0x71) GPCS Base Address
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// map(0x72, 0x72) GPCS Control
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// map(0x80, 0x83) Power Management Enable
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// map(0x84, 0x87) Second Level Power Management Status Mirror (r/o)
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// map(0x88, 0x89) General Purpose Timer 1 Count/Control
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// map(0x8a, 0x8b) General Purpose Timer 2 Count/Control
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// map(0x8c, 0x8c) IRQ Speedup Timer Count
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// map(0x8d, 0x8d) Video Speedup Timer Count
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// map(0x8e, 0x8e) VGA Timer COunt
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// map(0x90, 0x90) GPIO Pin Direction
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// map(0x91, 0x91) GPIO Pin Data
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// map(0x92, 0x92) GPIO Control 1
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// map(0x93, 0x93) Miscellaneous Device Control
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// map(0x94, 0x95) Suspend Modulation OFF/ON Count
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// map(0x96, 0x96) Suspend Configuration
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// map(0x97, 0x97) GPIO Control 2
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// map(0x98, 0x99) Primary HDD Idle Timer Count
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// map(0x9a, 0x9b) Floppy Disk Idle Timer Count
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// map(0x9c, 0x9d) Parallel / Serial Idle Timer Count
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// map(0x9e, 0x9f) Keyboard / Mouse Idle Timer Count
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// map(0xa0, 0xa5) User Defined Device # Idle Timer Count
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// map(0xa6, 0xa7) Video Idle Timer Count
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// map(0xa8, 0xa9) Video Overflow Count
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// map(0xac, 0xad) Secondary HDD Idle Timer Count
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// map(0xae, 0xae) CPU Suspend Command (w/o)
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// map(0xaf, 0xaf) Suspend Notebook Command (w/o)
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// map(0xb4, 0xb7) Floppy Port Shadows (r/o)
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// map(0xb8, 0xb8) DMA Shadow (r/o)
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// map(0xb9, 0xb9) PIC Shadow (r/o)
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// map(0xba, 0xba) PIT Shadow (r/o)
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// map(0xbb, 0xbb) RTC Index Shadow (r/o)
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// map(0xbc, 0xbc) Clock Stop Control
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// map(0xc0, 0xcb) User Defined Device # Base Address
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// map(0xcc, 0xce) User Defined Device # Control
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// map(0xd0, 0xd0) Software SMI (w/o)
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// map(0xec, 0xec) Timer Test
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// map(0xf4, 0xf7) Second Level Power Management Status
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}
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void mediagx_cs5530_bridge_device::internal_io_map(address_map &map)
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@ -153,8 +212,19 @@ void mediagx_cs5530_bridge_device::internal_io_map(address_map &map)
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m_rtccs_write(data);
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})
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);
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map(0x0080, 0x009f).rw(FUNC(mediagx_cs5530_bridge_device::at_page8_r), FUNC(mediagx_cs5530_bridge_device::at_page8_w));
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// TODO: $92 A20 fast reset/override
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map(0x0080, 0x008f).rw(FUNC(mediagx_cs5530_bridge_device::at_page8_r), FUNC(mediagx_cs5530_bridge_device::at_page8_w));
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// TODO: port decoding driven by PCI register $52
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map(0x0092, 0x0092).lrw8(
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NAME([this] () {
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LOG("Fast init $92 read\n");
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return m_fast_init;
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}),
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NAME([this] (u8 data) {
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LOG("Fast init $92 write %02x\n", data);
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m_host_cpu->set_input_line(INPUT_LINE_A20, BIT(data, 1));
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m_fast_init = data;
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})
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);
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map(0x00a0, 0x00a1).rw("pic8259_slave", FUNC(pic8259_device::read), FUNC(pic8259_device::write));
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map(0x00c0, 0x00df).rw(FUNC(mediagx_cs5530_bridge_device::at_dma8237_2_r), FUNC(mediagx_cs5530_bridge_device::at_dma8237_2_w));
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// map(0x04d0, 0x04d1).rw(FUNC(mediagx_cs5530_bridge_device::eisa_irq_read), FUNC(mediagx_cs5530_bridge_device::eisa_irq_write));
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@ -9,6 +9,7 @@
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#include "pci.h"
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#include "bus/isa/isa.h"
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#include "cpu/i386/i386.h"
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#include "machine/am9517a.h"
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#include "machine/pic8259.h"
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#include "machine/pit8253.h"
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@ -129,6 +130,8 @@ private:
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uint16_t m_dma_high_byte = 0;
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uint8_t m_channel_check = 0;
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bool m_nmi_enabled = false;
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u8 m_fast_init;
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};
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DECLARE_DEVICE_TYPE(MEDIAGX_CS5530_BRIDGE, mediagx_cs5530_bridge_device)
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@ -6,7 +6,7 @@
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Hardware consists of:
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Motherboard (GXM-530D): (ETA: BIOS boots as SuperTek ST-MGXm3HB -AS)
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Motherboard (GXM-530D): (ETA: BIOS boots as SuperTek ST-MGXm3HB, is 530 actually referring to SiS530? -AS)
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Cyrix MediaGX GXm-266GP 2.9V
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Cyrix GXm Cx5530 with GCT bios
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128MB RAM
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@ -29,6 +29,8 @@
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#include "machine/mediagx_cs5530_bridge.h"
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#include "machine/mediagx_host.h"
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#include "machine/pci.h"
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//#include "machine/sis7001_usb.h"
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//#include "video/rivatnt.h"
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#include "screen.h"
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@ -67,38 +69,47 @@ void matrix_state::matrix(machine_config &config)
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// basic machine hardware
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MEDIAGX(config, m_maincpu, 233'000'000); // Cyrix MediaGX GXm-266GP
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m_maincpu->set_addrmap(AS_PROGRAM, &matrix_state::main_map);
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m_maincpu->set_irq_acknowledge_callback("pci:07.0:pic8259_master", FUNC(pic8259_device::inta_cb));
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m_maincpu->set_irq_acknowledge_callback("pci:12.0:pic8259_master", FUNC(pic8259_device::inta_cb));
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// TODO: from FDC37C93x super I/O
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// NOTE: it's not initialized at $3f0 - $370 but accessed anyway, wtf
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DS1287(config, m_rtc, 32.768_kHz_XTAL);
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m_rtc->set_binary(true);
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m_rtc->set_epoch(1980);
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m_rtc->irq().set("pci:07.0", FUNC(mediagx_cs5530_bridge_device::pc_irq8n_w));
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m_rtc->irq().set("pci:12.0", FUNC(mediagx_cs5530_bridge_device::pc_irq8n_w));
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PCI_ROOT(config, "pci", 0);
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MEDIAGX_HOST(config, "pci:00.0", 0, "maincpu", 128*1024*1024);
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// TODO: no clue about the ID used for this, definitely tested
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// Tries to initialize MediaGX F4 -> ISA -> PCI/AGP, failing in all cases
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// May actually be a ZFMicro PCI Bridge (0x10780400)?
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PCI_BRIDGE(config, "pci:01.0", 0, 0x10780000, 0);
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//RIVATNT(config, "pci:01.0:00.0", 0);
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// TODO: unconfirmed PCI space
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mediagx_cs5530_bridge_device &isa(MEDIAGX_CS5530_BRIDGE(config, "pci:07.0", 0, "maincpu"));
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// "pci:12.0" or "pci:10.0" depending on pin H26 (readable in bridge thru PCI index $44)
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mediagx_cs5530_bridge_device &isa(MEDIAGX_CS5530_BRIDGE(config, "pci:12.0", 0, "maincpu"));
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isa.boot_state_hook().set([](u8 data) { /* printf("%02x\n", data); */ });
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//isa.smi().set_inputline("maincpu", INPUT_LINE_SMI);
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isa.rtcale().set([this](u8 data) { m_rtc->address_w(data); });
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isa.rtccs_read().set([this]() { return m_rtc->data_r(); });
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isa.rtccs_write().set([this](u8 data) { m_rtc->data_w(data); });
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// TODO: unknown number of ISA slots
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ISA16_SLOT(config, "isa1", 0, "pci:07.0:isabus", pc_isa16_cards, nullptr, false);
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// "pci:12.1" SMI & ACPI
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// "pci:12.2" IDE
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// "pci:12.3" XpressAUDIO
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// "pci:12.4" XpressVIDEO
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// "pci:13.0" (different) 0x0e11a0f8 ZF Micro Chipset USB (Compaq OpenHCI)
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//SIS7001_USB(config, "pci:13.0", 0, 2);
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// 2 PCI slots, 2 ISA slots
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ISA16_SLOT(config, "isa1", 0, "pci:12.0:isabus", pc_isa16_cards, nullptr, false);
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ISA16_SLOT(config, "isa2", 0, "pci:12.0:isabus", pc_isa16_cards, nullptr, false);
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}
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ROM_START( matrix )
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ROM_REGION32_LE(0x40000, "pci:07.0", 0)
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ROM_REGION32_LE(0x40000, "pci:12.0", 0)
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ROM_LOAD("d586_bios.bin", 0x00000, 0x40000, CRC(39fc093a) SHA1(3376bac4f0d6e729d5939e3078ecdf700464cba3) )
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ROM_REGION(0x300000, "unsorted", 0) // encrypted?
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@ -594,12 +594,6 @@ void xtom3d_state::romdisk_config(device_t *device)
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romdisk.set_rom_tag("game_rom");
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}
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// TODO: stub for drive options (speed/drive type etc.)
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/*void xtom3d_state::cdrom_config(device_t *device)
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{
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}
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*/
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// TODO: unverified PCI config space
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void xtom3d_state::xtom3d(machine_config &config)
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{
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@ -660,6 +654,7 @@ void xtom3d_state::xtom3d(machine_config &config)
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// "pci:0e.0" J4D1
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}
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// TODO: stub for drive options (speed/drive type etc.)
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static void cdrom_config(device_t *device)
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{
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device->subdevice<cdda_device>("cdda")->add_route(0, ":lmicrophone", 0.25);
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