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Clean-ups and version bump

Browse Source 
note: hoarded dump removed too from coco_cart.xml, this will not be tolerated
This commit is contained in:
Miodrag Milanovic 2012-09-17 06:49:13 +00:00
parent f97e8f0081
commit e25c13f253
516 changed files with 2139 additions and 2139 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
hash/coco_cart.xml
View File

@ -52,7 +52,7 @@ Compiled by K1W1 and Cowering (from GoodCoCo)
-->
<softwarelist name="coco_cart" description="Tandy Radio Shack Color Computer cartridges">
<software name="alphazoo">
<!--software name="alphazoo">
<description>Alphabet Zoo</description>
<year>1984</year>
<publisher>Tandy</publisher>
@ -64,7 +64,7 @@ Compiled by K1W1 and Cowering (from GoodCoCo)
<rom name="alphabet zoo (1984)(26-3170)(spinnaker).rom" size="32768" crc="a8a83f53" sha1="b6c8048549c60909c6a9e8e808df342d6491eae2" status="baddump" offset="0" />
</dataarea>
</part>
</software>
</software-->
<software name="amazing">
<description>A Mazing World of Malcom Mortar</description>

2
hash/fm7_disk.xml
View File

@ -1550,7 +1550,7 @@ systems, for the moment they stay here!
タイトル:メイガス
メーカー:ソフトプロ 機 種 :FM-7
ジャンル:TBL 備 考 :RUN"MAGUS"で起動
タイトル:リザード
メーカー:マイクロキャビン 機 種 :FM-7
ジャンル:RPG 備 考 :RUN"LIZARD"で起動

4
hash/mz2000_cass.xml
View File

@ -48,7 +48,7 @@
</part>
</software>
<!-- This was was obtained by removing the MTW header from the available jelda.mtw.
<!-- This was was obtained by removing the MTW header from the available jelda.mtw.
was any info lost? i.e. was the wav inside the mtw the complete content of the MZ tape? -->
<software name="jelda" supported="no">
<description>Jelda</description>
@ -61,7 +61,7 @@
</part>
</software>
<!-- This was was obtained by removing the MTW header from the available jelda.mtw.
<!-- This was was obtained by removing the MTW header from the available jelda.mtw.
was any info lost? i.e. was the wav inside the mtw the complete content of the MZ tape? -->
<software name="jelda2" supported="no">
<description>Jelda 2</description>

2
hash/neogeo.xml
View File

@ -6294,7 +6294,7 @@
<rom name="242-v3.v3" offset="0x800000" size="0x400000" crc="044ea4e1" sha1="062a2f2e52098d73bc31c9ad66f5db8080395ce8" /> <!-- TC5332204 -->
<rom name="242-v4.v4" offset="0xc00000" size="0x400000" crc="7985ea30" sha1="54ed5f0324de6164ea81943ebccb3e8d298368ec" /> <!-- TC5332204 -->
</dataarea>
<dataarea name="sprites" size="0x4000000">
<dataarea name="sprites" size="0x4000000">
<rom loadflag="load16_byte" name="242-c1.c1" offset="0x000000" size="0x800000" crc="e564ecd6" sha1="78f22787a204f26bae9b2b1c945ddbc27143352f" /> <!-- Plane 0,1 --> <!-- TC5364205 -->
<rom loadflag="load16_byte" name="242-c2.c2" offset="0x000001" size="0x800000" crc="bd959b60" sha1="2c97c59e77c9a3fe7d664e741d37944f3d56c10b" /> <!-- Plane 2,3 --> <!-- TC5364205 -->
<rom loadflag="load16_byte" name="242-c3.c3" offset="0x1000000" size="0x800000" crc="22127b4f" sha1="bd0d00f889d9da7c6ac48f287d9ed8c605ae22cf" /> <!-- Plane 0,1 --> <!-- TC5364205 -->

2
hash/snes.xml
View File

@ -24730,7 +24730,7 @@ Alternate board (XL-1)
<!-- End of verified prototypes -->
<!-- Unconfirmed prototypes
<!-- Unconfirmed prototypes
ROMs labeled as prototypes without documentation or with doubts on their legitimacy -->
<software name="arcus">

118
hash/stv.xml
View File

@ -7,7 +7,7 @@
-->
<softwarelist name="stv" description="Sega Titan Video cartridges">
<!-- Game: Astra SuperStars -->
<software name="astrass" supported="no" >
<description>Astra SuperStars (J 980514 V1.002)</description>
@ -27,7 +27,7 @@
</dataarea>
</part>
</software>
<!-- Game: Baku Baku Animal -->
<software name="bakubaku">
<description>Baku Baku Animal (J 950407 V1.000)</description>
@ -43,7 +43,7 @@
</dataarea>
</part>
</software>
<!-- Game: Batman Forever -->
<software name="batmanfr" supported="no" >
<description>Batman Forever (JUE 960507 V1.000)</description>
@ -68,7 +68,7 @@
</dataarea>
</part>
</software>
<!-- Game: Columns '97 -->
<software name="colmns97" supported="no">
<description>Columns '97 (JET 961209 V1.000)</description>
@ -82,7 +82,7 @@
</dataarea>
</part>
</software>
<!-- Game: Cotton 2 -->
<software name="cotton2">
<description>Cotton 2 (JUET 970902 V1.000)</description>
@ -101,7 +101,7 @@
</dataarea>
</part>
</software>
<!-- Game: Cotton Boomerang -->
<software name="cottonbm" supported="no">
<description>Cotton Boomerang (JUET 980709 V1.000)</description>
@ -119,7 +119,7 @@
</dataarea>
</part>
</software>
<!-- Game: Critter Crusher -->
<software name="critcrsh" supported="no" >
<description>Critter Crusher (EA 951204 V1.000)</description>
@ -134,7 +134,7 @@
</dataarea>
</part>
</software>
<!-- Game: Danchi de Hanafuda -->
<software name="danchih" supported="no">
<description>Danchi de Hanafuda (J 990607 V1.400)</description>
@ -150,7 +150,7 @@
</dataarea>
</part>
</software>
<!-- Game: Danchi de Quiz Okusan Yontaku Desuyo! -->
<software name="danchiq" supported="no">
<description>Danchi de Quiz Okusan Yontaku Desuyo! (J 001128 V1.200)</description>
@ -171,7 +171,7 @@
</dataarea>
</part>
</software>
<!-- Game: Decathlete -->
<software name="decathlt" supported="no">
<description>Decathlete (JUET 960709 V1.001)</description>
@ -188,7 +188,7 @@
</dataarea>
</part>
</software>
<!-- Game: Decathlete -->
<software name="decathlto" cloneof="decathlt" supported="no">
<description>Decathlete (JUET 960424 V1.000)</description>
@ -205,7 +205,7 @@
</dataarea>
</part>
</software>
<!-- Game: Die Hard Arcade -->
<software name="diehard">
<description>Die Hard Arcade (UET 960515 V1.000)</description>
@ -221,7 +221,7 @@
</dataarea>
</part>
</software>
<!-- Game: Dynamite Deka -->
<software name="dnmtdeka" cloneof="diehard">
<description>Dynamite Deka (J 960515 V1.000)</description>
@ -237,7 +237,7 @@
</dataarea>
</part>
</software>
<!-- Game: Ejihon Tantei Jimusyo -->
<software name="ejihon">
<description>Ejihon Tantei Jimusyo (J 950613 V1.000)</description>
@ -255,7 +255,7 @@
</dataarea>
</part>
</software>
<!-- Game: Touryuu Densetsu Elan-Doree / Elan Doree - Legend of Dragoon -->
<software name="elandore" supported="no">
<description>Touryuu Densetsu Elan-Doree / Elan Doree - Legend of Dragoon (JUET 980922 V1.006)</description>
@ -274,7 +274,7 @@
</dataarea>
</part>
</software>
<!-- Game: Final Fight Revenge -->
<software name="ffreveng" supported="no">
<description>Final Fight Revenge (JUET 990714 V1.000)</description>
@ -292,7 +292,7 @@
</dataarea>
</part>
</software>
<!-- Game: Funky Head Boxers -->
<software name="fhboxers" supported="no" >
<description>Funky Head Boxers (JUETBKAL 951218 V1.000)</description>
@ -313,7 +313,7 @@
</dataarea>
</part>
</software>
<!-- Game: Find Love -->
<software name="findlove" supported="no" >
<description>Find Love (J 971212 V1.000)</description>
@ -337,7 +337,7 @@
</dataarea>
</part>
</software>
<!-- Game: Final Arch -->
<software name="finlarch" cloneof="smleague">
<description>Final Arch (J 950714 V1.001)</description>
@ -359,7 +359,7 @@
</dataarea>
</part>
</software>
<!-- Game: Golden Axe - The Duel -->
<software name="gaxeduel">
<description>Golden Axe - The Duel (JUETL 950117 V1.000)</description>
@ -378,7 +378,7 @@
</dataarea>
</part>
</software>
<!-- Game: Guardian Force -->
<software name="grdforce" supported="no">
<description>Guardian Force (JUET 980318 V0.105)</description>
@ -395,7 +395,7 @@
</dataarea>
</part>
</software>
<!-- Game: Groove on Fight - Gouketsuji Ichizoku 3 -->
<software name="groovef" supported="no">
<description>Groove on Fight - Gouketsuji Ichizoku 3 (J 970416 V1.001)</description>
@ -415,7 +415,7 @@
</dataarea>
</part>
</software>
<!-- Game: Hanagumi Taisen Columns - Sakura Wars -->
<software name="hanagumi" supported="no">
<description>Hanagumi Taisen Columns - Sakura Wars (J 971007 V1.010)</description>
@ -438,7 +438,7 @@
</dataarea>
</part>
</software>
<!-- Game: Karaoke Quiz Intro Don Don! -->
<software name="introdon" supported="no">
<description>Karaoke Quiz Intro Don Don! (J 960213 V1.000)</description>
@ -458,7 +458,7 @@
</dataarea>
</part>
</software>
<!-- Game: Pro Mahjong Kiwame S -->
<!-- Note: you have to init it manually via test mode -->
<software name="kiwames">
@ -475,7 +475,7 @@
</dataarea>
</part>
</software>
<!-- Game: Magical Zunou Power -->
<software name="magzun" supported="no" >
<description>Magical Zunou Power (J 961031 V1.000)</description>
@ -493,7 +493,7 @@
</dataarea>
</part>
</software>
<!-- Game: Maru-Chan de Goo! -->
<software name="maruchan">
<description>Maru-Chan de Goo! (J 971216 V1.000)</description>
@ -513,7 +513,7 @@
</dataarea>
</part>
</software>
<!-- Game: Mausuke no Ojama the World -->
<software name="mausuke">
<description>Mausuke no Ojama the World (J 960314 V1.000)</description>
@ -534,7 +534,7 @@
</dataarea>
</part>
</software>
<!-- Game: Microman Battle Charge -->
<software name="micrombc" supported="no" >
<description>Microman Battle Charge (J 990326 V1.000)</description>
@ -553,7 +553,7 @@
</dataarea>
</part>
</software>
<!-- Game: Virtual Mahjong 2 - My Fair Lady -->
<software name="myfairld" supported="no" >
<description>Virtual Mahjong 2 - My Fair Lady (J 980608 V1.000)</description>
@ -572,7 +572,7 @@
</dataarea>
</part>
</software>
<!-- Game: Name Club Ver.3 -->
<software name="nclubv3" supported="no" >
<description>Name Club Ver.3 (J 970723 V1.000)</description>
@ -593,7 +593,7 @@
</dataarea>
</part>
</software>
<!-- Game: Othello Shiyouyo -->
<software name="othellos" supported="no">
<description>Othello Shiyouyo (J 980423 V1.002)</description>
@ -609,7 +609,7 @@
</dataarea>
</part>
</software>
<!-- Game: Pebble Beach - The Great Shot -->
<software name="pblbeach">
<description>Pebble Beach - The Great Shot (JUE 950913 V0.990)</description>
@ -626,7 +626,7 @@
</dataarea>
</part>
</software>
<!-- Game: Print Club 2 -->
<software name="pclub2" supported="no">
<description>Print Club 2 (U 970921 V1.000)</description>
@ -642,7 +642,7 @@
</dataarea>
</part>
</software>
<!-- Game: Print Club 2 Vol. 3 -->
<software name="pclub2v3" cloneof="pclub2" supported="no">
<description>Print Club 2 Vol. 3 (U 990310 V1.000)</description>
@ -658,7 +658,7 @@
</dataarea>
</part>
</software>
<!-- Game: Print Club Pokemon B -->
<software name="pclubpok" supported="no">
<description>Print Club Pokemon B (U 991126 V1.000)</description>
@ -674,7 +674,7 @@
</dataarea>
</part>
</software>
<!-- Game: Princess Clara Daisakusen -->
<software name="prikura">
<description>Princess Clara Daisakusen (J 960910 V1.000)</description>
@ -690,7 +690,7 @@
</dataarea>
</part>
</software>
<!-- Game: Puyo Puyo Sun -->
<software name="puyosun" supported="no">
<description>Puyo Puyo Sun (J 961115 V0.001)</description>
@ -711,7 +711,7 @@
</dataarea>
</part>
</software>
<!-- Game: Radiant Silvergun -->
<software name="rsgun" supported="no">
<description>Radiant Silvergun (JUET 980523 V1.000)</description>
@ -727,7 +727,7 @@
</dataarea>
</part>
</software>
<!-- Game: Puzzle &amp; Action: Sando-R -->
<software name="sandor">
<description>Puzzle &amp; Action: Sando-R (J 951114 V1.000)</description>
@ -747,7 +747,7 @@
</dataarea>
</part>
</software>
<!-- Game: DaeJeon! SanJeon SuJeon -->
<software name="sanjeon" cloneof="sasissu" supported="no" >
<description>DaeJeon! SanJeon SuJeon (AJTUE 990412 V1.000)</description>
@ -770,7 +770,7 @@
</dataarea>
</part>
</software>
<!-- Game: Taisen Tanto-R Sashissu!! -->
<software name="sasissu" supported="no">
<description>Taisen Tanto-R Sashissu!! (J 980216 V1.000)</description>
@ -788,7 +788,7 @@
</dataarea>
</part>
</software>
<!-- Game: Sea Bass Fishing -->
<software name="seabass" supported="no" >
<description>Sea Bass Fishing (JUET 971110 V0.001)</description>
@ -808,7 +808,7 @@
</dataarea>
</part>
</software>
<!-- Game: Shanghai - The Great Wall / Shanghai Triple Threat -->
<software name="shanhigw">
<description>Shanghai - The Great Wall / Shanghai Triple Threat (JUE 950623 V1.005)</description>
@ -821,7 +821,7 @@
</dataarea>
</part>
</software>
<!-- Game: Shienryu -->
<software name="shienryu" supported="no" >
<description>Shienryu (JUET 961226 V1.000)</description>
@ -836,7 +836,7 @@
</dataarea>
</part>
</software>
<!-- Game: Super Major League -->
<software name="smleague">
<description>Super Major League (U 960108 V1.000)</description>
@ -854,7 +854,7 @@
</dataarea>
</part>
</software>
<!-- Game: Soukyugurentai / Terra Diver -->
<software name="sokyugrt" supported="no" >
<description>Soukyugurentai / Terra Diver (JUET 960821 V1.000)</description>
@ -870,7 +870,7 @@
</dataarea>
</part>
</software>
<!-- Game: Steep Slope Sliders -->
<software name="sss" supported="no" >
<description>Steep Slope Sliders (JUET 981110 V1.000)</description>
@ -888,7 +888,7 @@
</dataarea>
</part>
</software>
<!-- Game: Stress Busters -->
<software name="stress" supported="no" >
<description>Stress Busters (J 981020 V1.000)</description>
@ -910,7 +910,7 @@
</dataarea>
</part>
</software>
<!-- Game: Suikoenbu / Outlaws of the Lost Dynasty -->
<software name="suikoenb">
<description>Suikoenbu / Outlaws of the Lost Dynasty (JUETL 950314 V2.001)</description>
@ -930,7 +930,7 @@
</dataarea>
</part>
</software>
<!-- Game: Technical Bowling -->
<software name="techbowl" supported="no" >
<description>Technical Bowling (J 971212 V1.000)</description>
@ -946,7 +946,7 @@
</dataarea>
</part>
</software>
<!-- Game: Puzzle &amp; Action: Treasure Hunt -->
<software name="thunt" supported="no" cloneof="sandor">
<description>Puzzle &amp; Action: Treasure Hunt (JUET 970901 V2.00E)</description>
@ -963,7 +963,7 @@
</dataarea>
</part>
</software>
<!-- Game: Puzzle &amp; Action: BoMulEul Chajara -->
<software name="thuntk" supported="no" cloneof="sandor">
<description>Puzzle &amp; Action: BoMulEul Chajara (JUET 970125 V2.00K)</description>
@ -984,7 +984,7 @@
</dataarea>
</part>
</software>
<!-- Game: Tecmo World Cup '98 -->
<software name="twcup98" supported="no" >
<description>Tecmo World Cup '98 (JUET 980410 V1.000)</description>
@ -1000,7 +1000,7 @@
</dataarea>
</part>
</software>
<!-- Game: Virtua Fighter Kids -->
<software name="vfkids" supported="no" >
<description>Virtua Fighter Kids (JUET 960319 V0.000)</description>
@ -1021,7 +1021,7 @@
</dataarea>
</part>
</software>
<!-- Game: Virtua Fighter Remix -->
<software name="vfremix">
<description>Virtua Fighter Remix (JUETBKAL 950428 V1.000)</description>
@ -1039,7 +1039,7 @@
</dataarea>
</part>
</software>
<!-- Game: Virtual Mahjong -->
<software name="vmahjong" supported="no" >
<description>Virtual Mahjong (J 961214 V1.000)</description>
@ -1058,7 +1058,7 @@
</dataarea>
</part>
</software>
<!-- Game: Winter Heat -->
<software name="winterht" supported="no" >
<description>Winter Heat (JUET 971012 V1.000)</description>
@ -1077,7 +1077,7 @@
</dataarea>
</part>
</software>
<!-- Game: Zen Nippon Pro-Wrestling Featuring Virtua -->
<software name="znpwfv" supported="no" >
<description>Zen Nippon Pro-Wrestling Featuring Virtua (J 971123 V1.000)</description>

2
src/emu/cpu/am29000/am29000.c
View File

@ -75,7 +75,7 @@
STRUCTURES & TYPEDEFS
***************************************************************************/
struct am29000_state
struct am29000_state
{
INT32 icount;
UINT32 pc;

2
src/emu/cpu/am29000/am29ops.h
View File

@ -61,7 +61,7 @@
STRUCTS
***************************************************************************/
struct op_info
struct op_info
{
void (*opcode)(am29000_state *);
UINT32 flags;

2
src/emu/cpu/apexc/apexcdsm.c
View File

@ -63,7 +63,7 @@
*/
enum format_type {branch, shiftl, shiftr, multiply, store, swap, one_address, two_address};
struct instr_desc
struct instr_desc
{
const char *mnemonic;
format_type format; /* -> X and Y are format */

2
src/emu/cpu/arm/arm.c
View File

@ -227,7 +227,7 @@ enum
/* Private Data */
/* sArmRegister defines the CPU state */
struct ARM_REGS
struct ARM_REGS
{
int icount;
UINT32 sArmRegister[kNumRegisters];

2
src/emu/cpu/arm7/arm7core.h
View File

@ -185,7 +185,7 @@ enum
/* CPU state struct */
struct arm_state
struct arm_state
{
ARM7CORE_REGS // these must be included in your cpu specific register implementation
ARM7COPRO_REGS

2
src/emu/cpu/cosmac/cosdasm.c
View File

@ -24,7 +24,7 @@
#include "cosmac.h"
enum Adr
enum Adr
{
Ill,
Imm,

6
src/emu/cpu/cubeqcpu/cubeqcpu.c
View File

@ -71,7 +71,7 @@ enum alu_dst
STRUCTURES & TYPEDEFS
***************************************************************************/
struct cquestsnd_state
struct cquestsnd_state
{
/* AM2901 internals */
UINT16 ram[16];
@ -104,7 +104,7 @@ struct cquestsnd_state
};
struct cquestrot_state
struct cquestrot_state
{
/* AM2901 internals */
UINT16 ram[16];
@ -146,7 +146,7 @@ struct cquestrot_state
};
struct cquestlin_state
struct cquestlin_state
{
/* 12-bit AM2901 internals */
UINT16 ram[16];

6
src/emu/cpu/drcbec.c
View File

@ -1121,7 +1121,7 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_SHL, 4, 1):
shift = PARAM2 & 31;
temp32 = PARAM1 << shift;
if (shift != 0)
if (shift != 0)
{
flags = FLAGS32_NZ(temp32);
flags |= ((PARAM1 << (shift - 1)) >> 31) & FLAG_C;
@ -1136,7 +1136,7 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_SHR, 4, 1):
shift = PARAM2 & 31;
temp32 = PARAM1 >> shift;
if (shift != 0)
if (shift != 0)
{
flags = FLAGS32_NZ(temp32);
flags |= (PARAM1 >> (shift - 1)) & FLAG_C;
@ -1167,7 +1167,7 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_ROL, 4, 1):
shift = PARAM2 & 31;
temp32 = (PARAM1 << shift) | (PARAM1 >> ((32 - shift) & 31));
if (shift != 0)
if (shift != 0)
{
flags = FLAGS32_NZ(temp32);
flags |= ((PARAM1 << (shift - 1)) >> 31) & FLAG_C;

10
src/emu/cpu/dsp56k/dsp56k.h
View File

@ -30,7 +30,7 @@ DECLARE_LEGACY_CPU_DEVICE(DSP56156, dsp56k);
STRUCTURES & TYPEDEFS
***************************************************************************/
// 5-4 Host Interface
struct dsp56k_host_interface
struct dsp56k_host_interface
{
// **** Dsp56k side **** //
// Host Control Register
@ -65,7 +65,7 @@ struct dsp56k_host_interface
};
// 1-9 ALU
struct dsp56k_data_alu
struct dsp56k_data_alu
{
// Four 16-bit input registers (can be accessed as 2 32-bit registers)
PAIR x;
@ -82,7 +82,7 @@ struct dsp56k_data_alu
};
// 1-10 Address Generation Unit (AGU)
struct dsp56k_agu
struct dsp56k_agu
{
// Four address registers
UINT16 r0;
@ -112,7 +112,7 @@ struct dsp56k_agu
};
// 1-11 Program Control Unit (PCU)
struct dsp56k_pcu
struct dsp56k_pcu
{
// Program Counter
UINT16 pc;
@ -149,7 +149,7 @@ struct dsp56k_pcu
};
// 1-8 The dsp56156 CORE
struct dsp56k_core
struct dsp56k_core
{
// PROGRAM CONTROLLER
dsp56k_pcu PCU;

2
src/emu/cpu/dsp56k/dsp56pcu.c
View File

@ -236,7 +236,7 @@ void pcu_reset(dsp56k_core* cpustate)
/***************************************************************************
INTERRUPT HANDLING
***************************************************************************/
struct dsp56k_irq_data
struct dsp56k_irq_data
{
UINT16 irq_vector;
char irq_source[128];

2
src/emu/cpu/esrip/esrip.c
View File

@ -61,7 +61,7 @@ CPU_DISASSEMBLE( esrip );
STRUCTURES & TYPEDEFS
***************************************************************************/
struct esrip_state
struct esrip_state
{
UINT16 ram[32];
UINT16 acc;

2
src/emu/cpu/g65816/g65816ds.c
View File

@ -26,7 +26,7 @@ author (Karl Stenerud) at karl@higashiyama-unet.ocn.ne.jp.
#define ADDRESS_65816(A) ((A)&0xffffff)
struct opcode_struct
struct opcode_struct
{
unsigned char name;
unsigned char flag;

2
src/emu/cpu/h6280/h6280.h
View File

@ -37,7 +37,7 @@ enum
/****************************************************************************
* The 6280 registers.
****************************************************************************/
struct h6280_Regs
struct h6280_Regs
{
int ICount;

8
src/emu/cpu/h83002/h8priv.h
View File

@ -11,25 +11,25 @@
#define H8_MAX_PORTS (16) // number of I/O ports defined architecturally (1-9 and A-G = 16)
struct H8S2XXX_TPU_ITEM
struct H8S2XXX_TPU_ITEM
{
UINT32 tgr, irq, out;
};
struct H8S2XXX_TPU
struct H8S2XXX_TPU
{
emu_timer *timer;
int cycles_per_tick;
UINT64 timer_cycles;
};
struct H8S2XXX_SCI
struct H8S2XXX_SCI
{
emu_timer *timer;
UINT32 bitrate;
};
struct H8S2XXX_TMR
struct H8S2XXX_TMR
{
emu_timer *timer;
int cycles_per_tick;

2
src/emu/cpu/h83002/h8speriph.c
View File

@ -1158,7 +1158,7 @@ static TIMER_CALLBACK( h8s_tpu_callback)
// SERIAL CONTROLLER INTERFACE //
/////////////////////////////////
struct H8S_SCI_ENTRY
struct H8S_SCI_ENTRY
{
UINT32 reg_smr, reg_brr, reg_scr, reg_tdr, reg_ssr, reg_rdr;
UINT32 reg_pdr, reg_port;

2
src/emu/cpu/hcd62121/hcd62121d.c
View File

@ -32,7 +32,7 @@ enum
_4, /* for nibble shifts */
};
struct hcd62121_dasm
struct hcd62121_dasm
{
const char *str;
UINT8 arg1;

2
src/emu/cpu/hd61700/hd61700d.c
View File

@ -39,7 +39,7 @@ enum
OP_RSIR,
};
struct hd61700_dasm
struct hd61700_dasm
{
const char *str;
UINT8 arg1;

2
src/emu/cpu/hd6309/6309dasm.c
View File

@ -25,7 +25,7 @@
#include "hd6309.h"
// Opcode structure
struct opcodeinfo
struct opcodeinfo
{
UINT8 opcode; // 8-bit opcode value
UINT8 length; // Opcode length in bytes

4
src/emu/cpu/i386/cycles.h
View File

@ -3,7 +3,7 @@
#ifndef __CYCLES_H__
#define __CYCLES_H__
enum X86_CYCLES
enum X86_CYCLES
{
CYCLES_MOV_REG_REG,
CYCLES_MOV_REG_MEM,
@ -337,7 +337,7 @@ enum X86_CYCLES
#define CPU_CYCLES_MEDIAGX 3
struct X86_CYCLE_TABLE
struct X86_CYCLE_TABLE
{
X86_CYCLES op;
UINT8 cpu_cycles[X86_NUM_CPUS][2];

6
src/emu/cpu/i386/i386priv.h
View File

@ -19,7 +19,7 @@ extern int i386_dasm_one(char *buffer, UINT32 pc, const UINT8 *oprom, int mode);
enum SREGS { ES, CS, SS, DS, FS, GS };
enum BREGS
enum BREGS
{
AL = NATIVE_ENDIAN_VALUE_LE_BE(0,3),
AH = NATIVE_ENDIAN_VALUE_LE_BE(1,2),
@ -31,7 +31,7 @@ enum BREGS
BH = NATIVE_ENDIAN_VALUE_LE_BE(13,14)
};
enum WREGS
enum WREGS
{
AX = NATIVE_ENDIAN_VALUE_LE_BE(0,1),
CX = NATIVE_ENDIAN_VALUE_LE_BE(2,3),
@ -206,7 +206,7 @@ struct I386_SREG {
bool valid;
};
struct I386_CALL_GATE
struct I386_CALL_GATE
{
UINT16 segment;
UINT16 selector;

2
src/emu/cpu/i86/i286.c
View File

@ -26,7 +26,7 @@
/* cpu state */
/***************************************************************************/
/* I86 registers */
union i80286basicregs
union i80286basicregs
{ /* eight general registers */
UINT16 w[8]; /* viewed as 16 bits registers */
UINT8 b[16]; /* or as 8 bit registers */

2
src/emu/cpu/i860/i860dis.c
View File

@ -374,7 +374,7 @@ enum
};
struct decode_tbl_t
struct decode_tbl_t
{
/* Disassembly function for this opcode.
Call with buffer, mnemonic, pc, insn. */

2
src/emu/cpu/i960/i960dis.c
View File

@ -8,7 +8,7 @@
#include "i960.h"
#include "i960dis.h"
struct mnemonic_t
struct mnemonic_t
{
const char *mnem;
unsigned short type;

6
src/emu/cpu/lh5801/5801dasm.c
View File

@ -24,7 +24,7 @@
#include "lh5801.h"
enum Adr
enum Adr
{
Imp,
Reg,
@ -46,7 +46,7 @@ enum Adr
RelM
};
enum Regs
enum Regs
{
RegNone,
A,
@ -64,7 +64,7 @@ static const char *const RegNames[]= {
#undef SEC
#endif
enum Ins
enum Ins
{
ILL, ILL2, PREFD, NOP,

2
src/emu/cpu/m37710/m7700ds.c
View File

@ -16,7 +16,7 @@ Based on G65C816 CPU Emulator by Karl Stenerud
#define ADDRESS_24BIT(A) ((A)&0xffffff)
struct opcode_struct
struct opcode_struct
{
unsigned char name;
unsigned char flag;

2
src/emu/cpu/m6502/m6502.c
View File

@ -147,7 +147,7 @@ static void m6502_common_init(legacy_cpu_device *device, device_irq_acknowledge_
cpustate->wrmem_id.resolve(intf->write_indexed_func, *device);
cpustate->in_port_func.resolve(intf->in_port_func, *device);
cpustate->out_port_func.resolve(intf->out_port_func, *device);
cpustate->pullup = intf->external_port_pullup;
cpustate->pulldown = intf->external_port_pulldown;
}

2
src/emu/cpu/m6502/m6502.h
View File

@ -54,7 +54,7 @@ enum
/* Optional interface to set callbacks */
#define M6510_INTERFACE(name) \
const m6502_interface (name) =
const m6502_interface (name) =
struct m6502_interface
{

2
src/emu/cpu/m6502/m6509.c
View File

@ -155,7 +155,7 @@ static CPU_INIT( m6509 )
devcb_write8 nullwcb = DEVCB_NULL;
cpustate->rdmem_id.resolve(nullrcb, *device);
cpustate->wrmem_id.resolve(nullwcb, *device);
cpustate->wrmem_id.resolve(nullwcb, *device);
}
}

2
src/emu/cpu/m68000/m68k_in.c
View File

@ -128,7 +128,7 @@ void (*m68ki_instruction_jump_table[NUM_CPU_TYPES][0x10000])(m68ki_cpu_core *m68
unsigned char m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */
/* This is used to generate the opcode handler jump table */
struct opcode_handler_struct
struct opcode_handler_struct
{
void (*opcode_handler)(m68ki_cpu_core *m68k); /* handler function */
unsigned int mask; /* mask on opcode */

2
src/emu/cpu/m68000/m68kdasm.c
View File

@ -174,7 +174,7 @@ static int valid_ea(UINT32 opcode, UINT32 mask);
static int DECL_SPEC compare_nof_true_bits(const void *aptr, const void *bptr);
/* used to build opcode handler jump table */
struct opcode_struct
struct opcode_struct
{
void (*opcode_handler)(void); /* handler function */
UINT32 mask; /* mask on opcode */

8
src/emu/cpu/m68000/m68kmake.c
View File

@ -175,7 +175,7 @@ enum
/* Everything we need to know about an opcode */
struct opcode_struct
struct opcode_struct
{
char name[MAX_NAME_LENGTH]; /* opcode handler name */
unsigned char size; /* Size of operation */
@ -192,7 +192,7 @@ struct opcode_struct
/* All modifications necessary for a specific EA mode of an instruction */
struct ea_info_struct
struct ea_info_struct
{
const char* fname_add;
const char* ea_add;
@ -202,7 +202,7 @@ struct ea_info_struct
/* Holds the body of a function */
struct body_struct
struct body_struct
{
char body[MAX_BODY_LENGTH][MAX_LINE_LENGTH+1];
int length;
@ -210,7 +210,7 @@ struct body_struct
/* Holds a sequence of search / replace strings */
struct replace_struct
struct replace_struct
{
char replace[MAX_REPLACE_LENGTH][2][MAX_LINE_LENGTH+1];
int length;

2
src/emu/cpu/m6805/m6805.c
View File

@ -45,7 +45,7 @@ enum
};
/* 6805 Registers */
struct m6805_Regs
struct m6805_Regs
{
/* Pre-pointerafied public globals */
int iCount;

2
src/emu/cpu/m6809/6809dasm.c
View File

@ -20,7 +20,7 @@
#include "m6809.h"
// Opcode structure
struct opcodeinfo
struct opcodeinfo
{
UINT8 opcode; // 8-bit opcode value
UINT8 length; // Opcode length in bytes

2
src/emu/cpu/mb86233/mb86233.c
View File

@ -23,7 +23,7 @@ CPU_DISASSEMBLE( mb86233 );
STRUCTURES & TYPEDEFS
***************************************************************************/
union MB86233_REG
union MB86233_REG
{
INT32 i;
UINT32 u;

2
src/emu/cpu/mips/mips3.c
View File

@ -86,7 +86,7 @@
***************************************************************************/
/* MIPS3 Registers */
struct mips3_regs
struct mips3_regs
{
/* core state */
mips3_state core;

4
src/emu/cpu/nec/necpriv.h
View File

@ -19,7 +19,7 @@ enum
};
/* interrupt sources */
enum INTSOURCES
enum INTSOURCES
{
BRK = 0,
INT_IRQ = 1,
@ -27,7 +27,7 @@ enum INTSOURCES
};
/* NEC registers */
union necbasicregs
union necbasicregs
{ /* eight general registers */
UINT16 w[8]; /* viewed as 16 bits registers */
UINT8 b[16]; /* or as 8 bit registers */

4
src/emu/cpu/nec/v25priv.h
View File

@ -35,7 +35,7 @@ enum
};
/* interrupt sources */
enum INTSOURCES
enum INTSOURCES
{
BRK = 0,
INT_IRQ = 1,
@ -60,7 +60,7 @@ enum INTSOURCES
};
/* internal RAM and register banks */
union internalram
union internalram
{
UINT16 w[128];
UINT8 b[256];

2
src/emu/cpu/powerpc/ppc_dasm.c
View File

@ -102,7 +102,7 @@ enum
* Describes the layout of an instruction.
*/
struct IDESCR
struct IDESCR
{
char mnem[32]; // mnemonic
UINT32 match; // bit pattern of instruction after it has been masked

4
src/emu/cpu/powerpc/ppccom.c
View File

@ -1828,7 +1828,7 @@ static int ppc4xx_dma_decrement_count(powerpc_state *ppc, int dmachan)
ppc->dcr[DCR4XX_DMASR] |= 1 << (7 - dmachan);
break;
}
ppc4xx_dma_update_irq_states(ppc);
INT64 numdata = dmaregs[DCR4XX_DMACT0];
@ -1952,7 +1952,7 @@ static TIMER_CALLBACK( ppc4xx_buffered_dma_callback )
dmaregs[DCR4XX_DMADA0] += destinc;
} while (!ppc4xx_dma_decrement_count(ppc, dmachan));
break;
}
}
}
}

4
src/emu/cpu/rsp/rsp.h
View File

@ -138,7 +138,7 @@ void rspdrc_add_imem(device_t *device, UINT32 *base);
#define RSPDRC_STRICT_VERIFY 0x0001 /* verify all instructions */
union VECTOR_REG
union VECTOR_REG
{
UINT64 d[2];
UINT32 l[4];
@ -146,7 +146,7 @@ union VECTOR_REG
UINT8 b[16];
};
union ACCUMULATOR_REG
union ACCUMULATOR_REG
{
INT64 q;
INT32 l[2];

4
src/emu/cpu/saturn/saturnds.c
View File

@ -71,7 +71,7 @@ static const char number_2_hex[]=
// don't split branch and return, source relies on this ordering
enum MNEMONICS
enum MNEMONICS
{
Return, ReturnSetXM, ReturnSetCarry, ReturnClearCarry, ReturnFromInterrupt,
jump3,jump4,jump,
@ -584,7 +584,7 @@ enum opcode_adr
AdrImmCount
};
struct OPCODE
struct OPCODE
{
opcode_sel sel;
opcode_adr adr;

2
src/emu/cpu/sc61860/scdasm.c
View File

@ -79,7 +79,7 @@
*/
enum Adr
enum Adr
{
Ill,
Imp,

2
src/emu/cpu/sh2/sh2comn.h
View File

@ -90,7 +90,7 @@ do { \
sh2_exception(sh2,message,irq); \
} while(0)
struct sh2_state
struct sh2_state
{
UINT32 ppc;
UINT32 pc;

2
src/emu/cpu/sh4/sh4comn.h
View File

@ -49,7 +49,7 @@ class sh4_frontend;
#endif
struct sh4_state
struct sh4_state
{
UINT32 ppc;
UINT32 pc, spc;

14
src/emu/cpu/sharc/sharc.c
View File

@ -39,7 +39,7 @@ enum
SHARC_B12, SHARC_B13, SHARC_B14, SHARC_B15,
};
struct SHARC_DAG
struct SHARC_DAG
{
UINT32 i[8];
UINT32 m[8];
@ -47,13 +47,13 @@ struct SHARC_DAG
UINT32 l[8];
};
union SHARC_REG
union SHARC_REG
{
INT32 r;
float f;
};
struct DMA_REGS
struct DMA_REGS
{
UINT32 control;
UINT32 int_index;
@ -66,14 +66,14 @@ struct DMA_REGS
UINT32 ext_count;
};
struct LADDR
struct LADDR
{
UINT32 addr;
UINT32 code;
UINT32 loop_type;
};
struct DMA_OP
struct DMA_OP
{
UINT32 src;
UINT32 dst;
@ -580,7 +580,7 @@ static CPU_RESET( sharc )
sharc_dma_exec(cpustate, 6);
dma_op(cpustate, 6);
cpustate->dma_op[6].timer->adjust(attotime::never, 0);
break;
}
@ -766,7 +766,7 @@ static CPU_EXECUTE( sharc )
}
}
}
sharc_op[(cpustate->opcode >> 39) & 0x1ff](cpustate);

2
src/emu/cpu/sharc/sharc.h
View File

@ -9,7 +9,7 @@
#define SHARC_INPUT_FLAG2 5
#define SHARC_INPUT_FLAG3 6
enum SHARC_BOOT_MODE
enum SHARC_BOOT_MODE
{
BOOT_MODE_EPROM,
BOOT_MODE_HOST,

4
src/emu/cpu/sharc/sharcdma.c
View File

@ -35,7 +35,7 @@ static void schedule_chained_dma_op(SHARC_REGS *cpustate, int channel, UINT32 dm
}
else // Receive from external
{
cpustate->dma_op[channel].src = ext_index;
cpustate->dma_op[channel].src = ext_index;
cpustate->dma_op[channel].src_modifier = ext_modifier;
cpustate->dma_op[channel].src_count = ext_count;
cpustate->dma_op[channel].dst = int_index;
@ -89,7 +89,7 @@ static void dma_op(SHARC_REGS *cpustate, int channel)
int src_modifier = cpustate->dma_op[channel].src_modifier;
int dst_modifier = cpustate->dma_op[channel].dst_modifier;
int src_count = cpustate->dma_op[channel].src_count;
//int dst_count = cpustate->dma_op[channel].dst_count;
//int dst_count = cpustate->dma_op[channel].dst_count;
int pmode = cpustate->dma_op[channel].pmode;
//printf("dma_op: %08X, %08X, %08X, %08X, %08X, %08X, %d\n", src, dst, src_modifier, dst_modifier, src_count, dst_count, pmode);

2
src/emu/cpu/sharc/sharcdsm.h
View File

@ -69,7 +69,7 @@ static const char mr_regnames[16][8] =
"???", "???", "???", "???", "???", "???", "???", "???"
};
struct SHARC_DASM_OP
struct SHARC_DASM_OP
{
UINT32 op_mask;
UINT32 op_bits;

2
src/emu/cpu/sharc/sharcops.h
View File

@ -1,4 +1,4 @@
struct SHARC_OP
struct SHARC_OP
{
UINT32 op_mask;
UINT32 op_bits;

2
src/emu/cpu/spc700/spc700.c
View File

@ -66,7 +66,7 @@ Address Function Register R/W When Reset Remarks
#include "spc700.h"
/* CPU Structure */
struct spc700i_cpu
struct spc700i_cpu
{
uint a; /* Accumulator */
uint x; /* Index Register X */

2
src/emu/cpu/spc700/spc700ds.c
View File

@ -20,7 +20,7 @@ author (Karl Stenerud) at karl@higashiyama-unet.ocn.ne.jp.
struct opcode_struct
struct opcode_struct
{
unsigned char name;
unsigned char args[2];

4
src/emu/cpu/superfx/superfx.c
View File

@ -2,14 +2,14 @@
#include "debugger.h"
#include "superfx.h"
struct pixelcache_t
struct pixelcache_t
{
UINT16 offset;
UINT8 bitpend;
UINT8 data[8];
};
struct cache_t
struct cache_t
{
UINT8 buffer[0x200];
UINT8 valid[0x20];

2
src/emu/cpu/tlcs900/900tbl.c
View File

@ -3852,7 +3852,7 @@ static void _ZCF(tlcs900_state *cpustate)
}
struct tlcs900inst
struct tlcs900inst
{
void (*opfunc)(tlcs900_state *cpustate);
int operand1;

2
src/emu/cpu/tlcs900/dasm900.c
View File

@ -88,7 +88,7 @@ enum e_operand
};
struct tlcs900inst
struct tlcs900inst
{
e_mnemonics mnemonic;
e_operand operand1;

6
src/emu/cpu/tms32051/tms32051.c
View File

@ -46,7 +46,7 @@ enum
TMS32051_AR7,
};
struct PMST
struct PMST
{
UINT16 iptr;
UINT16 avis;
@ -58,7 +58,7 @@ struct PMST
UINT16 braf;
};
struct ST0
struct ST0
{
UINT16 dp;
UINT16 intm;
@ -67,7 +67,7 @@ struct ST0
UINT16 arp;
};
struct ST1
struct ST1
{
UINT16 arb;
UINT16 cnf;

4
src/emu/cpu/tms9900/9900dasm.c
View File

@ -27,7 +27,7 @@
#define MASK 0x0000ffff
#define BITS(val,n1,n2) ((val>>(15-(n2))) & (MASK>>(15-((n2)-(n1)))))
enum format_t
enum format_t
{
format_1, /* 2 address instructions */
format_2a, /* jump instructions */
@ -73,7 +73,7 @@ enum
sd_11_15 = 0x200 /* bits 11-15 should be cleared in lwpi, limi, idle, rset, rtwp, ckon, ckof, lrex */
};
struct description_t
struct description_t
{
const char *mnemonic;
format_t format;

4
src/emu/cpu/tms9900/99xxcore.h
View File

@ -394,7 +394,7 @@ a ST_MASK */
#define R14 28
#define R15 30
struct map_file_t
struct map_file_t
{
UINT16 L[3], B[3]; /* actual registers */
UINT32 limit[3], bias[3]; /* equivalent in a more convenient form */
@ -1993,7 +1993,7 @@ static void set_flag1(tms99xx_state *cpustate, int val)
#endif
enum cru_error_code
enum cru_error_code
{
CRU_OK = 0,
CRU_PRIVILEGE_VIOLATION = -1

2
src/emu/cpu/tms9900/tms9900.h
View File

@ -109,7 +109,7 @@ static const char opname[][5] =
"*int"
};
struct tms99xx_config
struct tms99xx_config
{
devcb_write8 external_callback;
devcb_read8 irq_level;

20
src/emu/cpu/tms9900/tms9900l.h
View File

@ -61,7 +61,7 @@ DECLARE_LEGACY_CPU_DEVICE(TI990_10L, ti990_10l);
structure with the parameters ti990_10_reset wants.
*/
struct ti990_10reset_param
struct ti990_10reset_param
{
ti99xx_idle_func idle_callback;
ti99xx_rset_func rset_callback;
@ -87,7 +87,7 @@ DECLARE_LEGACY_CPU_DEVICE(TMS9900L, tms9900l);
/*
structure with optional parameters for tms9900_reset.
*/
struct tms9900reset_param
struct tms9900reset_param
{
ti99xx_idle_func idle_callback;
};
@ -99,7 +99,7 @@ struct tms9900reset_param
/*
structure with optional parameters for tms9940_reset.
*/
struct tms9940reset_param
struct tms9940reset_param
{
ti99xx_idle_func idle_callback;
};
@ -111,7 +111,7 @@ DECLARE_LEGACY_CPU_DEVICE(TMS9980L, tms9980al);
/*
structure with optional parameters for tms9980a_reset.
*/
struct tms9980areset_param
struct tms9980areset_param
{
ti99xx_idle_func idle_callback;
};
@ -123,7 +123,7 @@ struct tms9980areset_param
/*//
structure with optional parameters for tms9985_reset.
*/
struct tms9985reset_param
struct tms9985reset_param
{
ti99xx_idle_func idle_callback;
};
@ -135,7 +135,7 @@ struct tms9985reset_param
/*
structure with optional parameters for tms9989_reset.
*/
struct tms9989reset_param
struct tms9989reset_param
{
ti99xx_idle_func idle_callback;
};
@ -147,7 +147,7 @@ DECLARE_LEGACY_CPU_DEVICE(TMS9995L, tms9995l);
/*
structure with the parameters tms9995_reset wants.
*/
struct tms9995reset_param
struct tms9995reset_param
{
/* auto_wait_state : a non-zero value makes tms9995 generate a wait state automatically on each
memory access */
@ -175,7 +175,7 @@ extern WRITE8_HANDLER(tms9995_internal2_w);
/*
structure with optional parameters for tms99000_reset.
*/
struct tms99000reset_param
struct tms99000reset_param
{
ti99xx_idle_func idle_callback;
};
@ -187,7 +187,7 @@ struct tms99000reset_param
/*
structure with optional parameters for tms99105a_reset.
*/
struct tms99105areset_param
struct tms99105areset_param
{
ti99xx_idle_func idle_callback;
};
@ -199,7 +199,7 @@ struct tms99105areset_param
/*
structure with optional parameters for tms99110a_reset.
*/
struct tms99110areset_param
struct tms99110areset_param
{
ti99xx_idle_func idle_callback;
};

2
src/emu/cpu/tms9900/tms9995.h
View File

@ -60,7 +60,7 @@ enum
Configuration for the TMS9995. The connections are provided by the
main board which contains the processor.
*/
struct tms9995_config
struct tms9995_config
{
devcb_write8 external_callback;
devcb_write_line iaq_line;

2
src/emu/cpu/upd7810/upd7810.h
View File

@ -11,7 +11,7 @@
*/
// unfortunatly memory configuration differs with internal rom size
enum UPD7810_TYPE
enum UPD7810_TYPE
{
TYPE_7801,
TYPE_78C05,

4
src/emu/devcpu.h
View File

@ -78,7 +78,7 @@ enum
CPUINFO_INT_ADDRBUS_SHIFT_2 = CPUINFO_INT_ADDRBUS_SHIFT + 2,
CPUINFO_INT_ADDRBUS_SHIFT_3 = CPUINFO_INT_ADDRBUS_SHIFT + 3,
CPUINFO_INT_ADDRBUS_SHIFT_LAST = CPUINFO_INT_ADDRBUS_SHIFT + ADDRESS_SPACES - 1,
// CPU-specific additionsg
CPUINFO_INT_CONTEXT_SIZE = 0x04000, // R/O: size of CPU context in bytes
CPUINFO_INT_INPUT_LINES, // R/O: number of input lines
@ -129,7 +129,7 @@ enum
CPUINFO_PTR_DEFAULT_MEMORY_MAP_2 = CPUINFO_PTR_DEFAULT_MEMORY_MAP + 2,
CPUINFO_PTR_DEFAULT_MEMORY_MAP_3 = CPUINFO_PTR_DEFAULT_MEMORY_MAP + 3,
CPUINFO_PTR_DEFAULT_MEMORY_MAP_LAST = CPUINFO_PTR_DEFAULT_MEMORY_MAP + ADDRESS_SPACES - 1,
// CPU-specific additions
CPUINFO_PTR_INSTRUCTION_COUNTER = 0x14000,
// R/O: int *icount

4
src/emu/distate.c
View File

@ -464,8 +464,8 @@ int device_state_interface::state_string_max_length(int index)
//-------------------------------------------------
// set_state_int - set the value of the given
// piece of indexed state from a UINT64
// set_state_int - set the value of the given
// piece of indexed state from a UINT64
//-------------------------------------------------
void device_state_interface::set_state_int(int index, UINT64 value)

8
src/emu/distate.h
View File

@ -163,7 +163,7 @@ public:
void set_state_int(int index, UINT64 value);
void set_state_string(int index, const char *string);
void set_pc(offs_t pc) { set_state_int(STATE_GENPC, pc); }
// deliberately ambiguous functions; if you have the state interface
// just use it or pc() and pcbase() directly
device_state_interface &state() { return *this; }
@ -213,7 +213,7 @@ typedef device_interface_iterator<device_state_interface> state_interface_iterat
//-------------------------------------------------
// device_t::safe_pc - return the current PC
// or 0 if no state object exists
// or 0 if no state object exists
//-------------------------------------------------
inline offs_t device_t::safe_pc()
@ -223,8 +223,8 @@ inline offs_t device_t::safe_pc()
//-------------------------------------------------
// device_t::safe_pcbase - return the current PC
// base or 0 if no state object exists
// device_t::safe_pcbase - return the current PC
// base or 0 if no state object exists
//-------------------------------------------------
inline offs_t device_t::safe_pcbase()

6
src/emu/drawgfx.c
View File

@ -348,7 +348,7 @@ void gfx_element::set_layout(const gfx_layout &gl, const UINT8 *srcdata)
m_pen_usage.resize(m_total_elements);
else
m_pen_usage.reset();
// set the source
set_source(srcdata);
}
@ -402,7 +402,7 @@ void gfx_element::decode(UINT32 code)
// zap the data to 0
UINT8 *decode_base = m_gfxdata + code * m_char_modulo;
memset(decode_base, 0, m_char_modulo);
// iterate over planes
for (int plane = 0; plane < m_layout_planes; plane++)
{
@ -414,7 +414,7 @@ void gfx_element::decode(UINT32 code)
{
int yoffs = planeoffs + m_layout_yoffset[y];
UINT8 *dp = decode_base + y * rowbytes();
// iterate over columns
for (int x = 0; x < m_origwidth; x++)
if (readbit(m_srcdata, yoffs + m_layout_xoffset[x]))

10
src/emu/drawgfx.h
View File

@ -133,7 +133,7 @@ public:
UINT32 colors() const { return m_total_colors; }
UINT32 rowbytes() const { return m_line_modulo; }
bool has_pen_usage() const { return (m_pen_usage.count() > 0); }
// a bit gross that people muck with this stuff...
const UINT8 *srcdata() const { return m_srcdata; }
UINT32 dirtyseq() const { return m_dirtyseq; }
@ -156,17 +156,17 @@ public:
const UINT8 *get_data(UINT32 code)
{
assert(code < elements());
if (code < m_dirty.count() && m_dirty[code]) decode(code);
if (code < m_dirty.count() && m_dirty[code]) decode(code);
return m_gfxdata + code * m_char_modulo + m_starty * m_line_modulo + m_startx;
}
UINT32 pen_usage(UINT32 code)
{
assert(code < m_pen_usage.count());
if (m_dirty[code]) decode(code);
if (m_dirty[code]) decode(code);
return m_pen_usage[code];
}
private:
// internal state
UINT16 m_width; // current pixel width of each element (changeble with source clipping)

6
src/emu/emuopts.c
View File

@ -518,7 +518,7 @@ void emu_options::set_system_name(const char *name)
add_device_options(true);
int num = 0;
do {
num = options_count();
num = options_count();
update_slot_options();
while (add_slot_options(false));
add_device_options(false);
@ -568,7 +568,7 @@ bool emu_options::parse_one_ini(const char *basename, int priority, astring *err
const char *emu_options::main_value(astring &buffer, const char *name) const
{
{
buffer = value(name);
int pos = buffer.chr(0,',');
if (pos!=-1) {
@ -578,7 +578,7 @@ const char *emu_options::main_value(astring &buffer, const char *name) const
}
const char *emu_options::sub_value(astring &buffer, const char *name, const char *subname) const
{
{
astring tmp = ",";
tmp.cat(subname);
tmp.cat("=");

2
src/emu/imagedev/floppy.c
View File

@ -444,7 +444,7 @@ attotime floppy_image_device::get_next_transition(attotime from_when)
else
next_position = 200000000 + (buf[1] & floppy_image::TIME_MASK);
// logerror("Floppy: cuspos=%d nextpos=%d\n", position, next_position);
// logerror("Floppy: cuspos=%d nextpos=%d\n", position, next_position);
return base + attotime::from_nsec(UINT64(next_position)*300/rpm);
}

4
src/emu/machine/53c810.c
View File

@ -393,7 +393,7 @@ void lsi53c810_device::dma_exec()
UINT8 lsi53c810_device::lsi53c810_reg_r( int offset )
{
// logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, space->device().safe_pc());
// logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, space->device().safe_pc());
switch(offset)
{
case 0x00: /* SCNTL0 */
@ -476,7 +476,7 @@ UINT8 lsi53c810_device::lsi53c810_reg_r( int offset )
void lsi53c810_device::lsi53c810_reg_w(int offset, UINT8 data)
{
// logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, space->device().safe_pc());
// logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, space->device().safe_pc());
switch(offset)
{
case 0x00: /* SCNTL0 */

2
src/emu/machine/6526cia.h
View File

@ -113,7 +113,7 @@ public:
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
UINT8 reg_r(UINT8 offset);
void reg_w(UINT8 offset, UINT8 data);

4
src/emu/machine/68681.c
View File

@ -44,7 +44,7 @@ static const char *const duart68681_reg_write_names[0x10] =
#define RX_FIFO_SIZE 3
struct DUART68681_CHANNEL
struct DUART68681_CHANNEL
{
/* Registers */
UINT8 CR; /* Command register */
@ -72,7 +72,7 @@ struct DUART68681_CHANNEL
};
struct duart68681_state
struct duart68681_state
{
/* device */
device_t *device;

2
src/emu/machine/8042kbdc.h
View File

@ -10,7 +10,7 @@
#ifndef KBDC8042_H
#define KBDC8042_H
enum kbdc8042_type_t
enum kbdc8042_type_t
{
KBDC8042_STANDARD,
KBDC8042_PS2, /* another timing of integrated controller */

32
src/emu/machine/latch8.h
View File

@ -46,27 +46,27 @@ class latch8_device : public device_t
public:
latch8_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~latch8_device() { global_free(m_token); }
// access to legacy token
void *token() const { assert(m_token != NULL); return m_token; }
latch8_config m_inline_config;
void set_maskout(UINT32 maskout) { m_inline_config.maskout = maskout; }
void set_xorvalue(UINT32 xorvalue) { m_inline_config.xorvalue = xorvalue; }
void set_nosync(UINT32 nosync) { m_inline_config.nosync = nosync; }
void set_discrete_node(const char *dev_tag, int bit, UINT32 node) { m_inline_config.node_device[bit] = dev_tag; m_inline_config.node_map[bit] = node; }
void set_devread(int bit, const char *tag, read8_device_func handler, int from_bit)
void set_maskout(UINT32 maskout) { m_inline_config.maskout = maskout; }
void set_xorvalue(UINT32 xorvalue) { m_inline_config.xorvalue = xorvalue; }
void set_nosync(UINT32 nosync) { m_inline_config.nosync = nosync; }
void set_discrete_node(const char *dev_tag, int bit, UINT32 node) { m_inline_config.node_device[bit] = dev_tag; m_inline_config.node_map[bit] = node; }
void set_devread(int bit, const char *tag, read8_device_func handler, int from_bit)
{
m_inline_config.devread[bit].from_bit = from_bit;
m_inline_config.devread[bit].tag = tag;
m_inline_config.devread[bit].devread_handler = handler;
m_inline_config.devread[bit].from_bit = from_bit;
m_inline_config.devread[bit].tag = tag;
m_inline_config.devread[bit].devread_handler = handler;
}
void set_read(int bit, read8_space_func handler, int from_bit)
void set_read(int bit, read8_space_func handler, int from_bit)
{
m_inline_config.devread[bit].from_bit = from_bit;
m_inline_config.devread[bit].read_handler = handler;
}
m_inline_config.devread[bit].from_bit = from_bit;
m_inline_config.devread[bit].read_handler = handler;
}
protected:
// device-level overrides
virtual void device_config_complete();
@ -88,7 +88,7 @@ extern const device_type LATCH8;
/* Bit mask specifying bits to be masked *out* */
#define MCFG_LATCH8_MASKOUT(_maskout) \
static_cast<latch8_device *>(device)->set_maskout(_maskout);
static_cast<latch8_device *>(device)->set_maskout(_maskout);
/* Bit mask specifying bits to be inverted */
#define MCFG_LATCH8_INVERT(_xor) \

2
src/emu/machine/m6m80011ap.h
View File

@ -24,7 +24,7 @@ Template for skeleton device
// TYPE DEFINITIONS
//**************************************************************************
enum eeprom_cmd_t
enum eeprom_cmd_t
{
EEPROM_GET_CMD = 0,
EEPROM_READ,

2
src/emu/machine/matsucd.c
View File

@ -27,7 +27,7 @@ can be expanded with support for the other drives as needed.
#define MATSU_STATUS_MEDIA ( 1 << 6 ) /* media present (in caddy or tray) */
#define MATSU_STATUS_DOORCLOSED ( 1 << 7 ) /* tray status */
struct matsucd
struct matsucd
{
UINT8 enabled; /* /ENABLE - Unit enabled */
UINT8 cmd_signal; /* /CMD - Command mode */

2
src/emu/machine/msm6242.h
View File

@ -30,7 +30,7 @@ struct msm6242_interface
devcb_write_line m_out_int_cb;
};
struct rtc_regs_t
struct rtc_regs_t
{
UINT8 sec, min, hour, day, wday, month;
UINT16 year;

6
src/emu/machine/net_lib.c
View File

@ -910,11 +910,11 @@ static net_device_t_base_factory *netregistry[] =
{
ENTRY(netdev_ttl_const, NETDEV_TTL_CONST)
ENTRY(netdev_analog_const, NETDEV_ANALOG_CONST)
ENTRY(netdev_logic_input, NETDEV_LOGIC_INPUT)
ENTRY(netdev_logic_input, NETDEV_LOGIC_INPUT)
ENTRY(netdev_analog_input, NETDEV_ANALOG_INPUT)
ENTRY(netdev_clock, NETDEV_CLOCK)
ENTRY(netdev_callback, NETDEV_CALLBACK)
ENTRY(nicMultiSwitch, NETDEV_SWITCH2)
ENTRY(netdev_callback, NETDEV_CALLBACK)
ENTRY(nicMultiSwitch, NETDEV_SWITCH2)
ENTRY(nicRSFF, NETDEV_RSFF)
ENTRY(nicMixer8, NETDEV_MIXER)
ENTRY(nic7400, TTL_7400_NAND)

8
src/emu/machine/net_lib.h
View File

@ -94,7 +94,7 @@
#define TTL_7402_NOR(_name, _I1, _I2) \
NET_REGISTER_DEV(nic7402, _name) \
NET_CONNECT(_name, I1, _I1) \
NET_CONNECT(_name, I1, _I1) \
NET_CONNECT(_name, I2, _I2) \
#define TTL_7404_INVERT(_name, _I1) \
@ -147,7 +147,7 @@
#define TTL_7486_XOR(_name, _I1, _I2) \
NET_REGISTER_DEV(nic7486, _name) \
NET_CONNECT(_name, I1, _I1) \
NET_CONNECT(_name, I1, _I1) \
NET_CONNECT(_name, I2, _I2) \
#define TTL_7448(_name, _A0, _A1, _A2, _A3, _LTQ, _BIQ, _RBIQ) \
@ -201,7 +201,7 @@
NET_CONNECT(_name, K, _K) \
NET_CONNECT(_name, CLRQ, _CLRQ) \
#define TTL_74107(_name, _CLK, _J, _K, _CLRQ) \
#define TTL_74107(_name, _CLK, _J, _K, _CLRQ) \
TTL_74107A(_name, _CLK, _J, _K, _CLRQ)
#define TTL_74153(_name, _A1, _A2, _A3, _A4, _A, _B, _GA) \
@ -408,7 +408,7 @@ class nic74107 : public nic74107A
{
public:
nic74107()
: nic74107A() {}
: nic74107A() {}
};

14
src/emu/machine/netlist.c
View File

@ -68,7 +68,7 @@
#if KEEP_STATISTICS
#define add_to_stat(v,x) do { v += (x); } while (0)
#define inc_stat(v) add_to_stat(v, 1)
#define begin_timing(v) do { (v) -= get_profile_ticks(); } while (0)
#define begin_timing(v) do { (v) -= get_profile_ticks(); } while (0)
#define end_timing(v) do { (v) += get_profile_ticks(); } while (0)
#else
#define add_to_stat(v,x) do { } while (0)
@ -386,7 +386,7 @@ ATTR_HOT ATTR_ALIGN void netlist_base_t::process_list(INT32 &atime)
while ( (atime > 0) && (m_queue.is_not_empty()))
{
queue_t::entry_t e = m_queue.pop();
netlist_time delta = e.time() - m_time_ps + netlist_time::from_raw(m_rem);
netlist_time delta = e.time() - m_time_ps + netlist_time::from_raw(m_rem);
atime -= divu_64x32_rem(delta.as_raw(), m_div, &m_rem);
m_time_ps = e.time();
@ -583,8 +583,8 @@ void netlist_setup_t::resolve_inputs(void)
if (out.object_type(net_output_t::SIGNAL_MASK) == net_output_t::SIGNAL_ANALOG
&& in->object_type(net_output_t::SIGNAL_MASK) == net_output_t::SIGNAL_DIGITAL)
{
// fatalerror("connecting analog output %s with %s\n", out.netdev()->name(), in->netdev()->name());
// fatalerror("connecting analog output %s with %s\n", out.netdev()->name(), in->netdev()->name());
// fatalerror("connecting analog output %s with %s\n", out.netdev()->name(), in->netdev()->name());
// fatalerror("connecting analog output %s with %s\n", out.netdev()->name(), in->netdev()->name());
netdev_a_to_d_proxy *proxy = new netdev_a_to_d_proxy(*in);
proxy->init(this, "abc");
proxy->start();
@ -933,7 +933,7 @@ void netlist_mame_device::device_reset()
void netlist_mame_device::device_stop()
{
m_setup->print_stats();
global_free(m_setup);
global_free(m_netlist);
}
@ -972,9 +972,9 @@ ATTR_HOT void netlist_mame_device::execute_run()
//bool check_debugger = ((device_t::machine().debug_flags & DEBUG_FLAG_ENABLED) != 0);
// debugging
//m_ppc = m_pc; // copy PC to previous PC
//m_ppc = m_pc; // copy PC to previous PC
//if (check_debugger)
// debugger_instruction_hook(this, 0); //m_pc);
// debugger_instruction_hook(this, 0); //m_pc);
m_netlist->process_list(m_icount);

44
src/emu/machine/netlist.h
View File

@ -58,7 +58,7 @@
#define USE_DELEGATES (1)
#define USE_DELEGATES_A (0)
#define NETLIST_CLOCK (U64(1000000000))
#define NETLIST_CLOCK (U64(1000000000))
#define NLTIME_FROM_NS(_t) netlist_time::from_ns(_t)
#define NLTIME_FROM_US(_t) netlist_time::from_us(_t)
@ -100,11 +100,11 @@ ATTR_COLD void NETLIST_NAME(_name)(netlist_setup_t &netlist) \
#define NETLIST_END }
#define NETLIST_INCLUDE(_name) \
#define NETLIST_INCLUDE(_name) \
NETLIST_NAME(_name)(netlist); \
#define NETLIST_MEMREGION(_name) \
#define NETLIST_MEMREGION(_name) \
netlist.parse((char *)downcast<netlist_t &>(netlist.netlist()).machine().root_device().memregion(_name)->base()); \
#if defined(__GNUC__) && (__GNUC__ >= 3)
@ -129,7 +129,7 @@ ATTR_COLD void NETLIST_NAME(_name)(netlist_setup_t &netlist) \
#define NETLIB_SIGNAL(_name, _num_input, _check) \
class _name : public net_signal_t<_num_input, _check> \
{ \
public: \
public: \
_name () : net_signal_t<_num_input, _check>() { } \
}; \
@ -168,15 +168,15 @@ ATTR_COLD void NETLIST_NAME(_name)(netlist_setup_t &netlist) \
// MAME specific
#define MCFG_NETLIST_ADD(_tag, _setup ) \
MCFG_DEVICE_ADD(_tag, NETLIST, NETLIST_CLOCK) \
MCFG_NETLIST_SETUP(_setup) \
#define MCFG_NETLIST_ADD(_tag, _setup ) \
MCFG_DEVICE_ADD(_tag, NETLIST, NETLIST_CLOCK) \
MCFG_NETLIST_SETUP(_setup) \
#define MCFG_NETLIST_REPLACE(_tag, _setup) \
#define MCFG_NETLIST_REPLACE(_tag, _setup) \
MCFG_DEVICE_REPLACE(_tag, NETLIST, NETLIST_CLOCK) \
MCFG_NETLIST_SETUP(_setup) \
MCFG_NETLIST_SETUP(_setup) \
#define MCFG_NETLIST_SETUP(_setup) \
#define MCFG_NETLIST_SETUP(_setup) \
netlist_mame_device::static_set_constructor(*device, NETLIST_NAME(_setup)); \
@ -402,7 +402,7 @@ public:
TYPE_MASK = 0x03,
SIGNAL_DIGITAL = 0x00,
SIGNAL_ANALOG = 0x10,
SIGNAL_MASK = 0x10,
SIGNAL_MASK = 0x10,
};
net_object_t(int atype)
@ -510,8 +510,8 @@ public:
friend net_sig_t logic_input_t::Q() const;
ATTR_HOT inline const net_sig_t last_Q() const { return m_last_Q; }
ATTR_HOT inline const net_sig_t new_Q() const { return m_new_Q; }
ATTR_HOT inline const net_sig_t last_Q() const { return m_last_Q; }
ATTR_HOT inline const net_sig_t new_Q() const { return m_new_Q; }
ATTR_HOT inline const double Q_Analog() const
{
@ -519,14 +519,14 @@ public:
{
case SIGNAL_DIGITAL: return m_Q ? m_high_V : m_low_V;
case SIGNAL_ANALOG: return m_Q_analog;
default: assert(true);
default: assert(true);
}
return 0;
}
inline net_sig_t *Q_ptr() { return &m_Q; }
inline net_sig_t *new_Q_ptr() { return &m_new_Q; }
inline net_sig_t *new_Q_ptr() { return &m_new_Q; }
ATTR_COLD void register_con(net_input_t &inp);
@ -544,9 +544,9 @@ public:
protected:
/* prohibit use in device functions
* current (pending) state can be inquired using new_Q()
*/
ATTR_HOT inline const net_sig_t Q() const { return m_Q; }
* current (pending) state can be inquired using new_Q()
*/
ATTR_HOT inline const net_sig_t Q() const { return m_Q; }
ATTR_HOT inline void register_in_listPS(const netlist_time &delay_ps);
@ -612,8 +612,8 @@ public:
}
ATTR_COLD void initial(const net_sig_t val) { m_Q = val; m_new_Q = val; m_last_Q = !val; }
ATTR_HOT inline void clear() { set_Q_PS(0, netlist_time::zero); }
ATTR_HOT inline void set() { set_Q_PS(1, netlist_time::zero); }
ATTR_HOT inline void clear() { set_Q_PS(0, netlist_time::zero); }
ATTR_HOT inline void set() { set_Q_PS(1, netlist_time::zero); }
ATTR_HOT inline void setToPS(const UINT8 val, const netlist_time &delay_ps) { set_Q_PS(val, delay_ps); }
ATTR_HOT inline void setToNoCheckPS(const UINT8 val, const netlist_time &delay_ps) { set_Q_NoCheckPS(val, delay_ps); }
ATTR_COLD inline void set_levels(const double low, const double high)
@ -768,7 +768,7 @@ public:
inline void initial(const double val) { m_param = val; }
inline void initial(const int val) { m_param = val; }
ATTR_HOT inline double Value() const { return m_param; }
ATTR_HOT inline double Value() const { return m_param; }
ATTR_HOT inline int ValueInt() const { return (int) m_param; }
ATTR_HOT inline net_core_device_t &netdev() const { return *m_netdev; }
@ -922,7 +922,7 @@ public:
protected:
netlist_time m_time_ps;
UINT32 m_rem;
UINT32 m_div;
UINT32 m_div;
queue_t m_queue;

4
src/emu/machine/pc16552d.c
View File

@ -34,7 +34,7 @@
#define INT_ENABLE_RX_LINE_STATUS 0x04
#define INT_ENABLE_MODEM_STATUS 0x08
struct PC16552D_CHANNEL
struct PC16552D_CHANNEL
{
UINT16 divisor;
UINT8 reg[8];
@ -50,7 +50,7 @@ struct PC16552D_CHANNEL
emu_timer *tx_fifo_timer;
};
struct PC16552D_REGS
struct PC16552D_REGS
{
PC16552D_CHANNEL ch[2];
int frequency;

2
src/emu/machine/pckeybrd.h
View File

@ -12,7 +12,7 @@
#ifndef PCKEYBRD_H
#define PCKEYBRD_H
enum AT_KEYBOARD_TYPE
enum AT_KEYBOARD_TYPE
{
AT_KEYBOARD_TYPE_PC,
AT_KEYBOARD_TYPE_AT,

2
src/emu/machine/pic8259.c
View File

@ -20,7 +20,7 @@
#define LOG_OCW 0
#define LOG_GENERAL 0
enum pic8259_state_t
enum pic8259_state_t
{
STATE_ICW1,
STATE_ICW2,

2
src/emu/machine/pit8253.c
View File

@ -82,7 +82,7 @@ struct pit8253_timer
UINT32 cycles_to_output; /* cycles until output callback called */
};
struct pit8253_t
struct pit8253_t
{
const pit8253_config *config;
int device_type;

6
src/emu/machine/rp5h01.c
View File

@ -2,9 +2,9 @@
RP5H01
TODO:
- convert to modern and follow the datasheet better (all dumps
presumably needs to be redone from scratch?)
TODO:
- convert to modern and follow the datasheet better (all dumps
presumably needs to be redone from scratch?)
2009-06 Converted to be a device

4
src/emu/machine/rtc9701.h
View File

@ -26,7 +26,7 @@
//**************************************************************************
enum rtc9701_state_t
enum rtc9701_state_t
{
RTC9701_CMD_WAIT = 0,
RTC9701_RTC_READ,
@ -37,7 +37,7 @@ enum rtc9701_state_t
};
struct rtc_regs_t
struct rtc_regs_t
{
UINT8 sec, min, hour, day, wday, month, year;
};

2
src/emu/machine/s3520cf.c
View File

@ -210,7 +210,7 @@ WRITE_LINE_MEMBER( s3520cf_device::set_cs_line )
WRITE_LINE_MEMBER( s3520cf_device::write_bit )
{
m_latch = state;
// printf("%d LATCH LINE\n",state);
// printf("%d LATCH LINE\n",state);
}
WRITE_LINE_MEMBER( s3520cf_device::set_clock_line )

4
src/emu/machine/s3520cf.h
View File

@ -23,13 +23,13 @@ Template for skeleton device
// TYPE DEFINITIONS
//**************************************************************************
enum s3520cf_state_t
enum s3520cf_state_t
{
RTC_SET_ADDRESS = 0,
RTC_SET_DATA
};
struct rtc_regs_t
struct rtc_regs_t
{
UINT8 sec, min, hour, day, wday, month, year;
};

2
src/emu/machine/s3c2400.c
View File

@ -62,7 +62,7 @@ DEVICE_START( s3c2400 )
space->install_legacy_readwrite_handler( *device, 0x15800000, 0x15800007, FUNC(s3c24xx_adc_r), FUNC(s3c24xx_adc_w));
space->install_legacy_readwrite_handler( *device, 0x15900000, 0x15900017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
space->install_legacy_readwrite_handler( *device, 0x15a00000, 0x15a0003f, FUNC(s3c24xx_mmc_r), FUNC(s3c24xx_mmc_w));
s3c24xx_video_start( device, device->machine());
}

80
src/emu/machine/s3c2400.h
View File

@ -38,10 +38,10 @@ class s3c2400_device : public device_t
public:
s3c2400_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~s3c2400_device() { global_free(m_token); }
// access to legacy token
void *token() const { assert(m_token != NULL); return m_token; }
// device-level overrides
virtual void device_config_complete();
virtual void device_start();
@ -49,7 +49,7 @@ public:
private:
// internal state
void *m_token;
public:
public:
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
};
@ -407,17 +407,17 @@ void s3c2400_uart_fifo_w( device_t *device, int uart, UINT8 data);
TYPE DEFINITIONS
*******************************************************************************/
struct s3c24xx_memcon_regs_t
struct s3c24xx_memcon_regs_t
{
UINT32 data[0x34/4];
};
struct s3c24xx_usbhost_regs_t
struct s3c24xx_usbhost_regs_t
{
UINT32 data[0x5C/4];
};
struct s3c24xx_irq_regs_t
struct s3c24xx_irq_regs_t
{
UINT32 srcpnd;
UINT32 intmod;
@ -427,7 +427,7 @@ struct s3c24xx_irq_regs_t
UINT32 intoffset;
};
struct s3c24xx_dma_regs_t
struct s3c24xx_dma_regs_t
{
UINT32 disrc;
UINT32 didst;
@ -438,7 +438,7 @@ struct s3c24xx_dma_regs_t
UINT32 dmasktrig;
};
struct s3c24xx_clkpow_regs_t
struct s3c24xx_clkpow_regs_t
{
UINT32 locktime;
UINT32 mpllcon;
@ -448,7 +448,7 @@ struct s3c24xx_clkpow_regs_t
UINT32 clkdivn;
};
struct s3c24xx_lcd_regs_t
struct s3c24xx_lcd_regs_t
{
UINT32 lcdcon1;
UINT32 lcdcon2;
@ -466,12 +466,12 @@ struct s3c24xx_lcd_regs_t
UINT32 tpal;
};
struct s3c24xx_lcdpal_regs_t
struct s3c24xx_lcdpal_regs_t
{
UINT32 data[0x400/4];
};
struct s3c24xx_uart_regs_t
struct s3c24xx_uart_regs_t
{
UINT32 ulcon;
UINT32 ucon;
@ -486,7 +486,7 @@ struct s3c24xx_uart_regs_t
UINT32 ubrdiv;
};
struct s3c24xx_pwm_regs_t
struct s3c24xx_pwm_regs_t
{
UINT32 tcfg0;
UINT32 tcfg1;
@ -507,19 +507,19 @@ struct s3c24xx_pwm_regs_t
UINT32 tcnto4;
};
struct s3c24xx_usbdev_regs_t
struct s3c24xx_usbdev_regs_t
{
UINT32 data[0xBC/4];
};
struct s3c24xx_wdt_regs_t
struct s3c24xx_wdt_regs_t
{
UINT32 wtcon;
UINT32 wtdat;
UINT32 wtcnt;
};
struct s3c24xx_iic_regs_t
struct s3c24xx_iic_regs_t
{
UINT32 iiccon;
UINT32 iicstat;
@ -527,7 +527,7 @@ struct s3c24xx_iic_regs_t
UINT32 iicds;
};
struct s3c24xx_iis_regs_t
struct s3c24xx_iis_regs_t
{
UINT32 iiscon;
UINT32 iismod;
@ -536,7 +536,7 @@ struct s3c24xx_iis_regs_t
UINT32 iisfifo;
};
struct s3c24xx_gpio_regs_t
struct s3c24xx_gpio_regs_t
{
UINT32 gpacon;
UINT32 gpadat;
@ -563,7 +563,7 @@ struct s3c24xx_gpio_regs_t
UINT32 extint;
};
struct s3c24xx_rtc_regs_t
struct s3c24xx_rtc_regs_t
{
UINT32 rtccon;
UINT32 ticnt;
@ -585,13 +585,13 @@ struct s3c24xx_rtc_regs_t
UINT32 bcdyear;
};
struct s3c24xx_adc_regs_t
struct s3c24xx_adc_regs_t
{
UINT32 adccon;
UINT32 adcdat;
};
struct s3c24xx_spi_regs_t
struct s3c24xx_spi_regs_t
{
UINT32 spcon;
UINT32 spsta;
@ -601,39 +601,39 @@ struct s3c24xx_spi_regs_t
UINT32 sprdat;
};
struct s3c24xx_mmc_regs_t
struct s3c24xx_mmc_regs_t
{
UINT32 data[0x40/4];
};
struct s3c24xx_memcon_t
struct s3c24xx_memcon_t
{
s3c24xx_memcon_regs_t regs;
};
struct s3c24xx_usbhost_t
struct s3c24xx_usbhost_t
{
s3c24xx_usbhost_regs_t regs;
};
struct s3c24xx_irq_t
struct s3c24xx_irq_t
{
s3c24xx_irq_regs_t regs;
int line_irq, line_fiq;
};
struct s3c24xx_dma_t
struct s3c24xx_dma_t
{
s3c24xx_dma_regs_t regs;
emu_timer *timer;
};
struct s3c24xx_clkpow_t
struct s3c24xx_clkpow_t
{
s3c24xx_clkpow_regs_t regs;
};
struct s3c24xx_lcd_t
struct s3c24xx_lcd_t
{
s3c24xx_lcd_regs_t regs;
emu_timer *timer;
@ -652,17 +652,17 @@ struct s3c24xx_lcd_t
UINT32 dma_data, dma_bits;
};
struct s3c24xx_lcdpal_t
struct s3c24xx_lcdpal_t
{
s3c24xx_lcdpal_regs_t regs;
};
struct s3c24xx_uart_t
struct s3c24xx_uart_t
{
s3c24xx_uart_regs_t regs;
};
struct s3c24xx_pwm_t
struct s3c24xx_pwm_t
{
s3c24xx_pwm_regs_t regs;
emu_timer *timer[5];
@ -671,25 +671,25 @@ struct s3c24xx_pwm_t
UINT32 freq[5];
};
struct s3c24xx_usbdev_t
struct s3c24xx_usbdev_t
{
s3c24xx_usbdev_regs_t regs;
};
struct s3c24xx_wdt_t
struct s3c24xx_wdt_t
{
s3c24xx_wdt_regs_t regs;
emu_timer *timer;
};
struct s3c24xx_iic_t
struct s3c24xx_iic_t
{
s3c24xx_iic_regs_t regs;
emu_timer *timer;
int count;
};
struct s3c24xx_iis_t
struct s3c24xx_iis_t
{
s3c24xx_iis_regs_t regs;
emu_timer *timer;
@ -697,34 +697,34 @@ struct s3c24xx_iis_t
int fifo_index;
};
struct s3c24xx_gpio_t
struct s3c24xx_gpio_t
{
s3c24xx_gpio_regs_t regs;
};
struct s3c24xx_rtc_t
struct s3c24xx_rtc_t
{
s3c24xx_rtc_regs_t regs;
emu_timer *timer_tick_count;
emu_timer *timer_update;
};
struct s3c24xx_adc_t
struct s3c24xx_adc_t
{
s3c24xx_adc_regs_t regs;
};
struct s3c24xx_spi_t
struct s3c24xx_spi_t
{
s3c24xx_spi_regs_t regs;
};
struct s3c24xx_mmc_t
struct s3c24xx_mmc_t
{
s3c24xx_mmc_regs_t regs;
};
struct s3c24xx_t
struct s3c24xx_t
{
const s3c2400_interface *iface;
s3c24xx_memcon_t memcon;

2
src/emu/machine/s3c2410.c
View File

@ -65,7 +65,7 @@ DEVICE_START( s3c2410 )
space->install_legacy_readwrite_handler( *device, 0x59000000, 0x59000017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
space->install_legacy_readwrite_handler( *device, 0x59000020, 0x59000037, FUNC(s3c24xx_spi_1_r), FUNC(s3c24xx_spi_1_w));
space->install_legacy_readwrite_handler( *device, 0x5a000000, 0x5a000043, FUNC(s3c24xx_sdi_r), FUNC(s3c24xx_sdi_w));
s3c24xx_video_start( device, device->machine());
}

82
src/emu/machine/s3c2410.h
View File

@ -46,7 +46,7 @@ class s3c2410_device : public device_t
public:
s3c2410_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~s3c2410_device() { global_free(m_token); }
// access to legacy token
void *token() const { assert(m_token != NULL); return m_token; }
// device-level overrides
@ -56,7 +56,7 @@ public:
private:
// internal state
void *m_token;
public:
public:
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
};
@ -498,17 +498,17 @@ static const UINT32 MAP_SUBINT_TO_INT[11] =
TYPE DEFINITIONS
*******************************************************************************/
struct s3c24xx_memcon_regs_t
struct s3c24xx_memcon_regs_t
{
UINT32 data[0x34/4];
};
struct s3c24xx_usbhost_regs_t
struct s3c24xx_usbhost_regs_t
{
UINT32 data[0x5C/4];
};
struct s3c24xx_irq_regs_t
struct s3c24xx_irq_regs_t
{
UINT32 srcpnd;
UINT32 intmod;
@ -520,7 +520,7 @@ struct s3c24xx_irq_regs_t
UINT32 intsubmsk;
};
struct s3c24xx_dma_regs_t
struct s3c24xx_dma_regs_t
{
UINT32 disrc;
UINT32 disrcc;
@ -533,7 +533,7 @@ struct s3c24xx_dma_regs_t
UINT32 dmasktrig;
};
struct s3c24xx_clkpow_regs_t
struct s3c24xx_clkpow_regs_t
{
UINT32 locktime;
UINT32 mpllcon;
@ -543,7 +543,7 @@ struct s3c24xx_clkpow_regs_t
UINT32 clkdivn;
};
struct s3c24xx_lcd_regs_t
struct s3c24xx_lcd_regs_t
{
UINT32 lcdcon1;
UINT32 lcdcon2;
@ -565,12 +565,12 @@ struct s3c24xx_lcd_regs_t
UINT32 lpcsel;
};
struct s3c24xx_lcdpal_regs_t
struct s3c24xx_lcdpal_regs_t
{
UINT32 data[0x400/4];
};
struct s3c24xx_nand_regs_t
struct s3c24xx_nand_regs_t
{
UINT32 nfconf;
UINT32 nfcmd;
@ -580,7 +580,7 @@ struct s3c24xx_nand_regs_t
UINT32 nfecc;
};
struct s3c24xx_uart_regs_t
struct s3c24xx_uart_regs_t
{
UINT32 ulcon;
UINT32 ucon;
@ -595,7 +595,7 @@ struct s3c24xx_uart_regs_t
UINT32 ubrdiv;
};
struct s3c24xx_pwm_regs_t
struct s3c24xx_pwm_regs_t
{
UINT32 tcfg0;
UINT32 tcfg1;
@ -616,19 +616,19 @@ struct s3c24xx_pwm_regs_t
UINT32 tcnto4;
};
struct s3c24xx_usbdev_regs_t
struct s3c24xx_usbdev_regs_t
{
UINT32 data[0x130/4];
};
struct s3c24xx_wdt_regs_t
struct s3c24xx_wdt_regs_t
{
UINT32 wtcon;
UINT32 wtdat;
UINT32 wtcnt;
};
struct s3c24xx_iic_regs_t
struct s3c24xx_iic_regs_t
{
UINT32 iiccon;
UINT32 iicstat;
@ -636,7 +636,7 @@ struct s3c24xx_iic_regs_t
UINT32 iicds;
};
struct s3c24xx_iis_regs_t
struct s3c24xx_iis_regs_t
{
UINT32 iiscon;
UINT32 iismod;
@ -645,7 +645,7 @@ struct s3c24xx_iis_regs_t
UINT32 iisfifo;
};
struct s3c24xx_gpio_regs_t
struct s3c24xx_gpio_regs_t
{
UINT32 gpacon;
UINT32 gpadat;
@ -697,7 +697,7 @@ struct s3c24xx_gpio_regs_t
UINT32 gstatus4;
};
struct s3c24xx_rtc_regs_t
struct s3c24xx_rtc_regs_t
{
UINT32 rtccon;
UINT32 ticnt;
@ -719,7 +719,7 @@ struct s3c24xx_rtc_regs_t
UINT32 bcdyear;
};
struct s3c24xx_adc_regs_t
struct s3c24xx_adc_regs_t
{
UINT32 adccon;
UINT32 adctsc;
@ -728,7 +728,7 @@ struct s3c24xx_adc_regs_t
UINT32 adcdat1;
};
struct s3c24xx_spi_regs_t
struct s3c24xx_spi_regs_t
{
UINT32 spcon;
UINT32 spsta;
@ -738,39 +738,39 @@ struct s3c24xx_spi_regs_t
UINT32 sprdat;
};
struct s3c24xx_sdi_regs_t
struct s3c24xx_sdi_regs_t
{
UINT32 data[0x44/4];
};
struct s3c24xx_memcon_t
struct s3c24xx_memcon_t
{
s3c24xx_memcon_regs_t regs;
};
struct s3c24xx_usbhost_t
struct s3c24xx_usbhost_t
{
s3c24xx_usbhost_regs_t regs;
};
struct s3c24xx_irq_t
struct s3c24xx_irq_t
{
s3c24xx_irq_regs_t regs;
int line_irq, line_fiq;
};
struct s3c24xx_dma_t
struct s3c24xx_dma_t
{
s3c24xx_dma_regs_t regs;
emu_timer *timer;
};
struct s3c24xx_clkpow_t
struct s3c24xx_clkpow_t
{
s3c24xx_clkpow_regs_t regs;
};
struct s3c24xx_lcd_t
struct s3c24xx_lcd_t
{
s3c24xx_lcd_regs_t regs;
emu_timer *timer;
@ -789,24 +789,24 @@ struct s3c24xx_lcd_t
UINT32 dma_data, dma_bits;
};
struct s3c24xx_lcdpal_t
struct s3c24xx_lcdpal_t
{
s3c24xx_lcdpal_regs_t regs;
};
struct s3c24xx_nand_t
struct s3c24xx_nand_t
{
s3c24xx_nand_regs_t regs;
UINT8 mecc[3];
int ecc_pos, data_count;
};
struct s3c24xx_uart_t
struct s3c24xx_uart_t
{
s3c24xx_uart_regs_t regs;
};
struct s3c24xx_pwm_t
struct s3c24xx_pwm_t
{
s3c24xx_pwm_regs_t regs;
emu_timer *timer[5];
@ -815,26 +815,26 @@ struct s3c24xx_pwm_t
UINT32 freq[5];
};
struct s3c24xx_usbdev_t
struct s3c24xx_usbdev_t
{
s3c24xx_usbdev_regs_t regs;
};
struct s3c24xx_wdt_t
struct s3c24xx_wdt_t
{
s3c24xx_wdt_regs_t regs;
emu_timer *timer;
UINT32 freq, cnt;
};
struct s3c24xx_iic_t
struct s3c24xx_iic_t
{
s3c24xx_iic_regs_t regs;
emu_timer *timer;
int count;
};
struct s3c24xx_iis_t
struct s3c24xx_iis_t
{
s3c24xx_iis_regs_t regs;
emu_timer *timer;
@ -842,34 +842,34 @@ struct s3c24xx_iis_t
int fifo_index;
};
struct s3c24xx_gpio_t
struct s3c24xx_gpio_t
{
s3c24xx_gpio_regs_t regs;
};
struct s3c24xx_rtc_t
struct s3c24xx_rtc_t
{
s3c24xx_rtc_regs_t regs;
emu_timer *timer_tick_count;
emu_timer *timer_update;
};
struct s3c24xx_adc_t
struct s3c24xx_adc_t
{
s3c24xx_adc_regs_t regs;
};
struct s3c24xx_spi_t
struct s3c24xx_spi_t
{
s3c24xx_spi_regs_t regs;
};
struct s3c24xx_sdi_t
struct s3c24xx_sdi_t
{
s3c24xx_sdi_regs_t regs;
};
struct s3c24xx_t
struct s3c24xx_t
{
const s3c2410_interface *iface;
UINT8 steppingstone[4*1024];

2
src/emu/machine/s3c2440.c
View File

@ -67,7 +67,7 @@ DEVICE_START( s3c2440 )
space->install_legacy_readwrite_handler( *device, 0x5a000000, 0x5a000043, FUNC(s3c24xx_sdi_r), FUNC(s3c24xx_sdi_w));
space->install_legacy_readwrite_handler( *device, 0x5b000000, 0x5b00001f, FUNC(s3c24xx_ac97_r), FUNC(s3c24xx_ac97_w));
DEVICE_START_CALL(s3c24xx);
s3c24xx_video_start( device, device->machine());
}

90
src/emu/machine/s3c2440.h
View File

@ -45,7 +45,7 @@ class s3c2440_device : public device_t
public:
s3c2440_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~s3c2440_device() { global_free(m_token); }
// access to legacy token
void *token() const { assert(m_token != NULL); return m_token; }
protected:
@ -56,7 +56,7 @@ protected:
private:
// internal state
void *m_token;
public:
public:
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
};
@ -527,17 +527,17 @@ static const UINT32 MAP_SUBINT_TO_INT[15] =
TYPE DEFINITIONS
*******************************************************************************/
struct s3c24xx_memcon_regs_t
struct s3c24xx_memcon_regs_t
{
UINT32 data[0x34/4];
};
struct s3c24xx_usbhost_regs_t
struct s3c24xx_usbhost_regs_t
{
UINT32 data[0x5C/4];
};
struct s3c24xx_irq_regs_t
struct s3c24xx_irq_regs_t
{
UINT32 srcpnd;
UINT32 intmod;
@ -549,7 +549,7 @@ struct s3c24xx_irq_regs_t
UINT32 intsubmsk;
};
struct s3c24xx_dma_regs_t
struct s3c24xx_dma_regs_t
{
UINT32 disrc;
UINT32 disrcc;
@ -562,7 +562,7 @@ struct s3c24xx_dma_regs_t
UINT32 dmasktrig;
};
struct s3c24xx_clkpow_regs_t
struct s3c24xx_clkpow_regs_t
{
UINT32 locktime;
UINT32 mpllcon;
@ -573,7 +573,7 @@ struct s3c24xx_clkpow_regs_t
UINT32 camdivn;
};
struct s3c24xx_lcd_regs_t
struct s3c24xx_lcd_regs_t
{
UINT32 lcdcon1;
UINT32 lcdcon2;
@ -595,12 +595,12 @@ struct s3c24xx_lcd_regs_t
UINT32 tconsel;
};
struct s3c24xx_lcdpal_regs_t
struct s3c24xx_lcdpal_regs_t
{
UINT32 data[0x400/4];
};
struct s3c24xx_nand_regs_t
struct s3c24xx_nand_regs_t
{
UINT32 nfconf;
UINT32 nfcont;
@ -620,12 +620,12 @@ struct s3c24xx_nand_regs_t
UINT32 nfeblk;
};
struct s3c24xx_cam_regs_t
struct s3c24xx_cam_regs_t
{
UINT32 data[0xA4/4];
};
struct s3c24xx_uart_regs_t
struct s3c24xx_uart_regs_t
{
UINT32 ulcon;
UINT32 ucon;
@ -640,7 +640,7 @@ struct s3c24xx_uart_regs_t
UINT32 ubrdiv;
};
struct s3c24xx_pwm_regs_t
struct s3c24xx_pwm_regs_t
{
UINT32 tcfg0;
UINT32 tcfg1;
@ -661,19 +661,19 @@ struct s3c24xx_pwm_regs_t
UINT32 tcnto4;
};
struct s3c24xx_usbdev_regs_t
struct s3c24xx_usbdev_regs_t
{
UINT32 data[0x130/4];
};
struct s3c24xx_wdt_regs_t
struct s3c24xx_wdt_regs_t
{
UINT32 wtcon;
UINT32 wtdat;
UINT32 wtcnt;
};
struct s3c24xx_iic_regs_t
struct s3c24xx_iic_regs_t
{
UINT32 iiccon;
UINT32 iicstat;
@ -682,7 +682,7 @@ struct s3c24xx_iic_regs_t
UINT32 iiclc;
};
struct s3c24xx_iis_regs_t
struct s3c24xx_iis_regs_t
{
UINT32 iiscon;
UINT32 iismod;
@ -691,7 +691,7 @@ struct s3c24xx_iis_regs_t
UINT32 iisfifo;
};
struct s3c24xx_gpio_regs_t
struct s3c24xx_gpio_regs_t
{
UINT32 gpacon;
UINT32 gpadat;
@ -750,7 +750,7 @@ struct s3c24xx_gpio_regs_t
UINT32 gpjup;
};
struct s3c24xx_rtc_regs_t
struct s3c24xx_rtc_regs_t
{
UINT32 rtccon;
UINT32 ticnt;
@ -772,7 +772,7 @@ struct s3c24xx_rtc_regs_t
UINT32 bcdyear;
};
struct s3c24xx_adc_regs_t
struct s3c24xx_adc_regs_t
{
UINT32 adccon;
UINT32 adctsc;
@ -782,7 +782,7 @@ struct s3c24xx_adc_regs_t
UINT32 adcupdn;
};
struct s3c24xx_spi_regs_t
struct s3c24xx_spi_regs_t
{
UINT32 spcon;
UINT32 spsta;
@ -792,44 +792,44 @@ struct s3c24xx_spi_regs_t
UINT32 sprdat;
};
struct s3c24xx_sdi_regs_t
struct s3c24xx_sdi_regs_t
{
UINT32 data[0x44/4];
};
struct s3c24xx_ac97_regs_t
struct s3c24xx_ac97_regs_t
{
UINT32 data[0x20/4];
};
struct s3c24xx_memcon_t
struct s3c24xx_memcon_t
{
s3c24xx_memcon_regs_t regs;
};
struct s3c24xx_usbhost_t
struct s3c24xx_usbhost_t
{
s3c24xx_usbhost_regs_t regs;
};
struct s3c24xx_irq_t
struct s3c24xx_irq_t
{
s3c24xx_irq_regs_t regs;
int line_irq, line_fiq;
};
struct s3c24xx_dma_t
struct s3c24xx_dma_t
{
s3c24xx_dma_regs_t regs;
emu_timer *timer;
};
struct s3c24xx_clkpow_t
struct s3c24xx_clkpow_t
{
s3c24xx_clkpow_regs_t regs;
};
struct s3c24xx_lcd_t
struct s3c24xx_lcd_t
{
s3c24xx_lcd_regs_t regs;
emu_timer *timer;
@ -848,12 +848,12 @@ struct s3c24xx_lcd_t
UINT32 dma_data, dma_bits;
};
struct s3c24xx_lcdpal_t
struct s3c24xx_lcdpal_t
{
s3c24xx_lcdpal_regs_t regs;
};
struct s3c24xx_nand_t
struct s3c24xx_nand_t
{
s3c24xx_nand_regs_t regs;
UINT8 mecc[4];
@ -861,17 +861,17 @@ struct s3c24xx_nand_t
int ecc_pos, data_count;
};
struct s3c24xx_cam_t
struct s3c24xx_cam_t
{
s3c24xx_cam_regs_t regs;
};
struct s3c24xx_uart_t
struct s3c24xx_uart_t
{
s3c24xx_uart_regs_t regs;
};
struct s3c24xx_pwm_t
struct s3c24xx_pwm_t
{
s3c24xx_pwm_regs_t regs;
emu_timer *timer[5];
@ -880,25 +880,25 @@ struct s3c24xx_pwm_t
UINT32 freq[5];
};
struct s3c24xx_usbdev_t
struct s3c24xx_usbdev_t
{
s3c24xx_usbdev_regs_t regs;
};
struct s3c24xx_wdt_t
struct s3c24xx_wdt_t
{
s3c24xx_wdt_regs_t regs;
emu_timer *timer;
};
struct s3c24xx_iic_t
struct s3c24xx_iic_t
{
s3c24xx_iic_regs_t regs;
emu_timer *timer;
int count;
};
struct s3c24xx_iis_t
struct s3c24xx_iis_t
{
s3c24xx_iis_regs_t regs;
emu_timer *timer;
@ -906,39 +906,39 @@ struct s3c24xx_iis_t
int fifo_index;
};
struct s3c24xx_gpio_t
struct s3c24xx_gpio_t
{
s3c24xx_gpio_regs_t regs;
};
struct s3c24xx_rtc_t
struct s3c24xx_rtc_t
{
s3c24xx_rtc_regs_t regs;
emu_timer *timer_tick_count;
emu_timer *timer_update;
};
struct s3c24xx_adc_t
struct s3c24xx_adc_t
{
s3c24xx_adc_regs_t regs;
};
struct s3c24xx_spi_t
struct s3c24xx_spi_t
{
s3c24xx_spi_regs_t regs;
};
struct s3c24xx_sdi_t
struct s3c24xx_sdi_t
{
s3c24xx_sdi_regs_t regs;
};
struct s3c24xx_ac97_t
struct s3c24xx_ac97_t
{
s3c24xx_ac97_regs_t regs;
};
struct s3c24xx_t
struct s3c24xx_t
{
const s3c2440_interface *iface;
UINT8 steppingstone[4*1024];

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