Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-06-16 17:29:27 +03:00
Code Issues Actions 3 Packages Projects Releases Wiki Activity

Move MC14584B to nlm_other.[ch] (nw)

Browse Source
This commit is contained in:
couriersud 2015-07-27 23:50:59 +02:00
parent cf78c69505
commit e266587640
6 changed files with 91 additions and 42 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
scripts/src/netlist.lua
View File

@ -158,4 +158,6 @@ project "netlist"
MAME_DIR .. "src/emu/netlist/macro/nlm_cd4xxx.h",
MAME_DIR .. "src/emu/netlist/macro/nlm_opamp.c",
MAME_DIR .. "src/emu/netlist/macro/nlm_opamp.h",
MAME_DIR .. "src/emu/netlist/macro/nlm_other.c",
MAME_DIR .. "src/emu/netlist/macro/nlm_other.h",
}

1
src/emu/netlist/devices/net_lib.h
View File

@ -59,6 +59,7 @@
#include "../macro/nlm_cd4xxx.h"
#include "../macro/nlm_ttl74xx.h"
#include "../macro/nlm_opamp.h"
#include "../macro/nlm_other.h"
#include "../analog/nld_bjt.h"
#include "../analog/nld_fourterm.h"

55
src/emu/netlist/macro/nlm_other.c Normal file
View File

@ -0,0 +1,55 @@
#include "nlm_other.h"
#include "devices/nld_truthtable.h"
#include "devices/nld_system.h"
/*
* MC14584B: Hex Schmitt Trigger
* ON Semiconductor
*
* +--------------+
* A1 |1 ++ 14| VCC
* Y1 |2 13| A6
* A2 |3 12| Y6
* Y2 |4 MC14584B 11| A5
* A3 |5 10| Y5
* Y3 |6 9| A4
* GND |7 8| Y4
* +--------------+
*
*/
NETLIST_START(MC14584B_DIP)
MC14584B_GATE(s1)
MC14584B_GATE(s2)
MC14584B_GATE(s3)
MC14584B_GATE(s4)
MC14584B_GATE(s5)
MC14584B_GATE(s6)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
DIPPINS( /* +--------------+ */
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.Q, /* Y1 |2 13| A6 */ s6.A,
s2.A, /* A2 |3 12| Y6 */ s6.Q,
s2.Q, /* Y2 |4 7416 11| A5 */ s5.A,
s3.A, /* A3 |5 10| Y5 */ s5.Q,
s3.Q, /* Y3 |6 9| A4 */ s4.A,
GND.I, /* GND |7 8| Y4 */ s4.Q
/* +--------------+ */
)
NETLIST_END()
NETLIST_START(otheric_lib)
TRUTHTABLE_START(MC14584B_GATE, 1, 1, 0, "")
TT_HEAD(" A | Q ")
TT_LINE(" 0 | 1 |100")
TT_LINE(" 1 | 0 |100")
TT_FAMILY("FAMILY(IVL=2.1 IVH=2.7 OVL=0.05 OVH=4.95 ORL=10.0 ORH=10.0)")
TRUTHTABLE_END()
LOCAL_LIB_ENTRY(MC14584B_DIP)
NETLIST_END()

27
src/emu/netlist/macro/nlm_other.h Normal file
View File

@ -0,0 +1,27 @@
#ifndef NLM_OTHER_H_
#define NLM_OTHER_H_
#include "../nl_setup.h"
#ifndef __PLIB_PREPROCESSOR__
/* ----------------------------------------------------------------------------
* Netlist Macros
* ---------------------------------------------------------------------------*/
#define MC14584B_GATE(_name) \
NET_REGISTER_DEV(MC14584B_GATE, _name)
#define MC14584B_DIP(_name) \
NET_REGISTER_DEV(MC14584B_DIP, _name)
/* ----------------------------------------------------------------------------
* External declarations
* ---------------------------------------------------------------------------*/
NETLIST_EXTERNAL(otheric_lib)
#endif
#endif

2
src/emu/netlist/nl_setup.c
View File

@ -30,6 +30,7 @@ static NETLIST_START(base)
LOCAL_SOURCE(TTL74XX_lib)
LOCAL_SOURCE(CD4XXX_lib)
LOCAL_SOURCE(OPAMP_lib)
LOCAL_SOURCE(otheric_lib)
INCLUDE(diode_models);
INCLUDE(bjt_models);
@ -37,6 +38,7 @@ static NETLIST_START(base)
INCLUDE(TTL74XX_lib);
INCLUDE(CD4XXX_lib);
INCLUDE(OPAMP_lib);
INCLUDE(otheric_lib);
NETLIST_END()

46
src/mame/audio/nl_kidniki.c
View File

@ -15,12 +15,6 @@
#ifndef __PLIB_PREPROCESSOR__
#define MC14584B_GATE(_name) \
NET_REGISTER_DEV(MC14584B_GATE, _name)
#define MC14584B_DIP(_name) \
NET_REGISTER_DEV(MC14584B_DIP, _name)
#define LM324_DIP(_name) \
NET_REGISTER_DEV(LM324_DIP, _name)
@ -119,8 +113,6 @@ NETLIST_START(kidniki_schematics)
LM324_DIP(XU1)
LM358_DIP(XU2)
//SUBMODEL(LM324_DIP,XU1)
//SUBMODEL(LM358_DIP,XU2)
MC14584B_DIP(XU3)
@ -219,9 +211,9 @@ NETLIST_START(kidniki_schematics)
NET_C(XU3.6, R105.1, R106.2)
#if USE_FIXED_STV
//FIXME: We should have a NET_C_REMOVE
NET_C(/*XU3.7,*/ C69.2, C73.2, C72.2, C77.2, C67.2, C68.2, R65.2, R38.2, XU1.11, R54.2, Q4.E, R63.2, C47.2, R72.2, R67.2, R71.2, R68.2, C48.2, R46.2, C28.1, C32.1, R43.2, XU2.4, C56.1, C52.1,/* R77.2, C58.1, */ R48.2, R93.2, R94.2, R119.2, R104.2, R53.2, R34.2, R81.2, R92.2, R89.2, C33.1, R37.2, R36.1, R91.1, I_V0.Q, RV1.3)
NET_C(XU3.7, C69.2, C73.2, C72.2, C77.2, C67.2, C68.2, R65.2, R38.2, XU1.11, R54.2, Q4.E, R63.2, C47.2, R72.2, R67.2, R71.2, R68.2, C48.2, R46.2, C28.1, C32.1, R43.2, XU2.4, C56.1, C52.1,/* R77.2, C58.1, */ R48.2, R93.2, R94.2, R119.2, R104.2, R53.2, R34.2, R81.2, R92.2, R89.2, C33.1, R37.2, R36.1, R91.1, I_V0.Q, RV1.3)
#else
NET_C(/*XU3.7,*/ C69.2, C73.2, C72.2, C77.2, C67.2, C68.2, R65.2, R38.2, XU1.11, R54.2, Q4.E, R63.2, C47.2, R72.2, R67.2, R71.2, R68.2, C48.2, R46.2, C28.1, C32.1, R43.2, XU2.4, C56.1, C52.1, R77.2, C58.1, R48.2, R93.2, R94.2, R119.2, R104.2, R53.2, R34.2, R81.2, R92.2, R89.2, C33.1, R37.2, R36.1, R91.1, I_V0.Q, RV1.3)
NET_C(XU3.7, C69.2, C73.2, C72.2, C77.2, C67.2, C68.2, R65.2, R38.2, XU1.11, R54.2, Q4.E, R63.2, C47.2, R72.2, R67.2, R71.2, R68.2, C48.2, R46.2, C28.1, C32.1, R43.2, XU2.4, C56.1, C52.1, R77.2, C58.1, R48.2, R93.2, R94.2, R119.2, R104.2, R53.2, R34.2, R81.2, R92.2, R89.2, C33.1, R37.2, R36.1, R91.1, I_V0.Q, RV1.3)
#endif
NET_C(XU3.8, R108.1, R107.2)
NET_C(XU3.9, R108.2, C77.1)
@ -230,9 +222,9 @@ NETLIST_START(kidniki_schematics)
NET_C(XU3.12, R98.1, R97.2)
NET_C(XU3.13, R98.2, C68.1)
#if USE_FIXED_STV
NET_C(/*XU3.14,*/ XU1.4, R66.1, R70.1, Q6.C, Q5.C, XU2.8, /* R78.1, */ R86.1, R83.1, Q3.C, I_V5.Q)
NET_C(XU3.14, XU1.4, R66.1, R70.1, Q6.C, Q5.C, XU2.8, /* R78.1, */ R86.1, R83.1, Q3.C, I_V5.Q)
#else
NET_C(/*XU3.14,*/ XU1.4, R66.1, R70.1, Q6.C, Q5.C, XU2.8, R78.1, R86.1, R83.1, Q3.C, I_V5.Q)
NET_C(XU3.14, XU1.4, R66.1, R70.1, Q6.C, Q5.C, XU2.8, R78.1, R86.1, R83.1, Q3.C, I_V5.Q)
#endif
NET_C(R96.1, R102.1, R106.1, R107.1, R101.1, R97.1, R65.1, C63.2)
NET_C(C63.1, R65_1.2)
@ -445,40 +437,10 @@ NETLIST_START(LM358_DIP)
ALIAS( 8, op1.VCC)
NETLIST_END()
NETLIST_START(MC14584B_DIP)
MC14584B_GATE(s1)
MC14584B_GATE(s2)
MC14584B_GATE(s3)
MC14584B_GATE(s4)
MC14584B_GATE(s5)
MC14584B_GATE(s6)
ALIAS( 1, s1.A)
ALIAS( 2, s1.Q)
ALIAS( 3, s2.A)
ALIAS( 4, s2.Q)
ALIAS( 5, s3.A)
ALIAS( 6, s3.Q)
ALIAS( 8, s4.Q)
ALIAS( 9, s4.A)
ALIAS(10, s5.Q)
ALIAS(11, s5.A)
ALIAS(12, s6.Q)
ALIAS(13, s6.A)
NETLIST_END()
NETLIST_START(kidniki_lib)
TRUTHTABLE_START(MC14584B_GATE, 1, 1, 0, "")
TT_HEAD(" A | Q ")
TT_LINE(" 0 | 1 |100")
TT_LINE(" 1 | 0 |100")
TT_FAMILY("FAMILY(IVL=2.1 IVH=2.7 OVL=0.05 OVH=4.95 ORL=10.0 ORH=10.0)")
TRUTHTABLE_END()
LOCAL_LIB_ENTRY(LM324_DIP)
LOCAL_LIB_ENTRY(LM358_DIP)
LOCAL_LIB_ENTRY(MC14584B_DIP)
NETLIST_END()