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Preliminary save state support to Naomi / DC driver [Angelo Salese]

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This commit is contained in:
Angelo Salese 2011-12-16 23:59:21 +00:00
parent dc26a9eb91
commit e26c61a459
5 changed files with 340 additions and 294 deletions
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16
src/emu/sound/aica.c
View File

@ -1285,6 +1285,22 @@ static DEVICE_START( aica )
AICA->stream = device->machine().sound().stream_alloc(*device, 0, 2, 44100, AICA, AICA_Update);
}
// save state
{
device->save_item(NAME(AICA->IrqTimA));
device->save_item(NAME(AICA->IrqTimBC));
device->save_item(NAME(AICA->IrqMidi));
device->save_item(NAME(AICA->MidiOutW));
device->save_item(NAME(AICA->MidiOutR));
device->save_item(NAME(AICA->MidiStack),16);
device->save_item(NAME(AICA->MidiW));
device->save_item(NAME(AICA->MidiR));
device->save_item(NAME(AICA->LPANTABLE),0x20000);
device->save_item(NAME(AICA->RPANTABLE),0x20000);
device->save_item(NAME(AICA->TimPris),3);
device->save_item(NAME(AICA->TimCnt),3);
}
}
static DEVICE_STOP( aica )

36
src/mame/drivers/naomi.c
View File

@ -1515,30 +1515,34 @@ static WRITE64_DEVICE_HANDLER( eeprom_93c46a_w )
// SB_LMMODE0
static WRITE64_HANDLER( ta_texture_directpath0_w )
{
int mode = pvrctrl_regs[SB_LMMODE0]&1;
dc_state *state = space->machine().driver_data<dc_state>();
int mode = state->pvrctrl_regs[SB_LMMODE0]&1;
if (mode&1)
{
printf("ta_texture_directpath0_w 32-bit access!\n");
COMBINE_DATA(&dc_framebuffer_ram[offset]);
COMBINE_DATA(&state->dc_framebuffer_ram[offset]);
}
else
{
COMBINE_DATA(&dc_texture_ram[offset]);
COMBINE_DATA(&state->dc_texture_ram[offset]);
}
}
// SB_LMMODE1
static WRITE64_HANDLER( ta_texture_directpath1_w )
{
int mode = pvrctrl_regs[SB_LMMODE1]&1;
dc_state *state = space->machine().driver_data<dc_state>();
int mode = state->pvrctrl_regs[SB_LMMODE1]&1;
if (mode&1)
{
printf("ta_texture_directpath0_w 32-bit access!\n");
COMBINE_DATA(&dc_framebuffer_ram[offset]);
printf("ta_texture_directpath1_w 32-bit access!\n");
COMBINE_DATA(&state->dc_framebuffer_ram[offset]);
}
else
{
COMBINE_DATA(&dc_texture_ram[offset]);
COMBINE_DATA(&state->dc_texture_ram[offset]);
}
}
@ -1569,8 +1573,8 @@ static ADDRESS_MAP_START( naomi_map, AS_PROGRAM, 64 )
AM_RANGE(0x0103ff00, 0x0103ffff) AM_MIRROR(0x02000000) AM_READWRITE( naomi_unknown1_r, naomi_unknown1_w ) // bios uses it, actual start and end addresses not known
/* Area 1 */
AM_RANGE(0x04000000, 0x04ffffff) AM_MIRROR(0x02000000) AM_RAM AM_BASE( &dc_texture_ram ) // texture memory 64 bit access
AM_RANGE(0x05000000, 0x05ffffff) AM_MIRROR(0x02000000) AM_RAM AM_BASE( &dc_framebuffer_ram ) // apparently this actually accesses the same memory as the 64-bit texture memory access, but in a different format, keep it apart for now
AM_RANGE(0x04000000, 0x04ffffff) AM_MIRROR(0x02000000) AM_RAM AM_BASE_MEMBER( dc_state,dc_texture_ram ) // texture memory 64 bit access
AM_RANGE(0x05000000, 0x05ffffff) AM_MIRROR(0x02000000) AM_RAM AM_BASE_MEMBER( dc_state,dc_framebuffer_ram ) // apparently this actually accesses the same memory as the 64-bit texture memory access, but in a different format, keep it apart for now
/* Area 2*/
AM_RANGE(0x08000000, 0x09ffffff) AM_MIRROR(0x02000000) AM_NOP // 'Unassigned'
@ -1625,17 +1629,17 @@ static ADDRESS_MAP_START( naomi2_map, AS_PROGRAM, 64 )
AM_RANGE(0x025f8000, 0x025f9fff) AM_READWRITE( pvr2_ta_r, pvr2_ta_w )
/* Area 1 */
AM_RANGE(0x04000000, 0x04ffffff) AM_RAM AM_BASE( &dc_texture_ram ) // texture memory 64 bit access
AM_RANGE(0x05000000, 0x05ffffff) AM_RAM AM_BASE( &dc_framebuffer_ram ) // apparently this actually accesses the same memory as the 64-bit texture memory access, but in a different format, keep it apart for now
AM_RANGE(0x06000000, 0x06ffffff) AM_RAM AM_BASE( &pvr2_texture_ram ) // 32 bit access 2nd PVR RAM
AM_RANGE(0x07000000, 0x07ffffff) AM_RAM AM_BASE( &pvr2_framebuffer_ram )// 64 bit access 2nd PVR RAM
AM_RANGE(0x04000000, 0x04ffffff) AM_RAM AM_BASE_MEMBER( dc_state, dc_texture_ram ) // texture memory 64 bit access
AM_RANGE(0x05000000, 0x05ffffff) AM_RAM AM_BASE_MEMBER( dc_state, dc_framebuffer_ram ) // apparently this actually accesses the same memory as the 64-bit texture memory access, but in a different format, keep it apart for now
AM_RANGE(0x06000000, 0x06ffffff) AM_RAM AM_BASE_MEMBER( dc_state, pvr2_texture_ram ) // 64 bit access 2nd PVR RAM
AM_RANGE(0x07000000, 0x07ffffff) AM_RAM AM_BASE_MEMBER( dc_state, pvr2_framebuffer_ram )// 32 bit access 2nd PVR RAM
/* Area 2*/
AM_RANGE(0x085f6800, 0x085f69ff) AM_WRITE( dc_sysctrl_w ) // writes to BOTH PVRs
AM_RANGE(0x085f8000, 0x085f9fff) AM_WRITE( pvrs_ta_w ) // writes to BOTH PVRs
AM_RANGE(0x08800000, 0x088000ff) AM_READWRITE32( elan_regs_r, elan_regs_w, U64(0xffffffffffffffff) ) // T&L chip registers
// AM_RANGE(0x09000000, 0x09??????) T&L command processing
AM_RANGE(0x0a000000, 0x0bffffff) AM_RAM AM_BASE( &elan_ram ) // T&L chip RAM
AM_RANGE(0x0a000000, 0x0bffffff) AM_RAM AM_BASE_MEMBER( dc_state, elan_ram ) // T&L chip RAM
/* Area 3 */
AM_RANGE(0x0c000000, 0x0dffffff) AM_MIRROR(0xa2000000) AM_RAM AM_BASE(&naomi_ram64)
@ -1773,8 +1777,8 @@ static ADDRESS_MAP_START( aw_map, AS_PROGRAM, 64 )
AM_RANGE(0x0103ff00, 0x0103ffff) AM_READWRITE( naomi_unknown1_r, naomi_unknown1_w ) // bios uses it, actual start and end addresses not known
/* Area 1 - half the texture memory, like dreamcast, not naomi */
AM_RANGE(0x04000000, 0x047fffff) AM_RAM AM_MIRROR(0x00800000) AM_BASE( &dc_texture_ram ) // texture memory 64 bit access
AM_RANGE(0x05000000, 0x057fffff) AM_RAM AM_MIRROR(0x00800000) AM_BASE( &dc_framebuffer_ram ) // apparently this actually accesses the same memory as the 64-bit texture memory access, but in a different format, keep it apart for now
AM_RANGE(0x04000000, 0x047fffff) AM_RAM AM_MIRROR(0x00800000) AM_BASE_MEMBER( dc_state, dc_texture_ram ) // texture memory 64 bit access
AM_RANGE(0x05000000, 0x057fffff) AM_RAM AM_MIRROR(0x00800000) AM_BASE_MEMBER( dc_state, dc_framebuffer_ram ) // apparently this actually accesses the same memory as the 64-bit texture memory access, but in a different format, keep it apart for now
/* Area 2*/
AM_RANGE(0x08000000, 0x0bffffff) AM_NOP // 'Unassigned'

30
src/mame/includes/dc.h
View File

@ -13,14 +13,18 @@ class dc_state : public driver_device
dc_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag) { }
UINT64 *dc_framebuffer_ram; // '32-bit access area'
UINT64 *dc_texture_ram; // '64-bit access area'
UINT32 *dc_sound_ram;
/* machine related */
UINT32 dc_rtcregister[4];
UINT32 dc_sysctrl_regs[0x200/4];
// UINT32 g1bus_regs[0x100/4];
UINT32 g2bus_regs[0x100/4];
/* video related */
UINT32 pvrta_regs[0x2000/4];
emu_timer *dc_rtc_timer;
struct {
UINT32 aica_addr;
@ -43,7 +47,24 @@ class dc_state : public driver_device
UINT8 start;
}m_pvr_dma;
emu_timer *dc_rtc_timer;
/* video related */
UINT32 pvrta_regs[0x2000/4];
UINT32 pvrctrl_regs[0x100/4];
UINT32 debug_dip_status;
emu_timer *vbout_timer;
emu_timer *vbin_timer;
emu_timer *hbin_timer;
emu_timer *endofrender_timer_isp;
emu_timer *endofrender_timer_tsp;
emu_timer *endofrender_timer_video;
UINT32 tafifo_buff[32];
int scanline;
int next_y;
/* Naomi 2 specific (To be moved) */
UINT64 *pvr2_texture_ram;
UINT64 *pvr2_framebuffer_ram;
UINT64 *elan_ram;
};
/*----------- defined in machine/dc.c -----------*/
@ -75,9 +96,6 @@ MACHINE_RESET( dc );
int dc_compute_interrupt_level(running_machine &machine);
void dc_update_interrupt_status(running_machine &machine);
extern UINT32 dc_sysctrl_regs[0x200/4];
extern UINT32 g1bus_regs[0x100/4];
/*--------- Ch2-DMA Control Registers ----------*/
#define SB_C2DSTAT ((0x005f6800-0x005f6800)/4)
#define SB_C2DLEN ((0x005f6804-0x005f6800)/4)

158
src/mame/machine/dc.c
View File

@ -76,15 +76,12 @@ static const char *const sysctrl_names[] =
#endif
UINT32 dc_sysctrl_regs[0x200/4];
UINT32 g1bus_regs[0x100/4];
static TIMER_CALLBACK( aica_dma_irq )
{
dc_state *state = machine.driver_data<dc_state>();
state->m_wave_dma.start = state->g2bus_regs[SB_ADST] = 0;
dc_sysctrl_regs[SB_ISTNRM] |= IST_DMA_AICA;
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_DMA_AICA;
dc_update_interrupt_status(machine);
}
@ -92,34 +89,34 @@ static TIMER_CALLBACK( pvr_dma_irq )
{
dc_state *state = machine.driver_data<dc_state>();
state->m_pvr_dma.start = pvrctrl_regs[SB_PDST] = 0;
dc_sysctrl_regs[SB_ISTNRM] |= IST_DMA_PVR;
state->m_pvr_dma.start = state->pvrctrl_regs[SB_PDST] = 0;
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_DMA_PVR;
dc_update_interrupt_status(machine);
}
void naomi_g1_irq(running_machine &machine)
{
// dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
dc_sysctrl_regs[SB_ISTNRM] |= IST_DMA_GDROM;
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_DMA_GDROM;
dc_update_interrupt_status(machine);
}
static TIMER_CALLBACK( ch2_dma_irq )
{
// dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
dc_sysctrl_regs[SB_C2DLEN]=0;
dc_sysctrl_regs[SB_C2DST]=0;
dc_sysctrl_regs[SB_ISTNRM] |= IST_DMA_CH2;
state->dc_sysctrl_regs[SB_C2DLEN]=0;
state->dc_sysctrl_regs[SB_C2DST]=0;
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_DMA_CH2;
dc_update_interrupt_status(machine);
}
static TIMER_CALLBACK( yuv_fifo_irq )
{
// dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
dc_sysctrl_regs[SB_ISTNRM] |= IST_EOXFER_YUV;
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_EOXFER_YUV;
dc_update_interrupt_status(machine);
}
@ -255,28 +252,28 @@ INLINE int decode_reg3216_64(running_machine &machine, UINT32 offset, UINT64 mem
int dc_compute_interrupt_level(running_machine &machine)
{
//dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
UINT32 ln,lx,le;
ln=dc_sysctrl_regs[SB_ISTNRM] & dc_sysctrl_regs[SB_IML6NRM];
lx=dc_sysctrl_regs[SB_ISTEXT] & dc_sysctrl_regs[SB_IML6EXT];
le=dc_sysctrl_regs[SB_ISTERR] & dc_sysctrl_regs[SB_IML6ERR];
ln=state->dc_sysctrl_regs[SB_ISTNRM] & state->dc_sysctrl_regs[SB_IML6NRM];
lx=state->dc_sysctrl_regs[SB_ISTEXT] & state->dc_sysctrl_regs[SB_IML6EXT];
le=state->dc_sysctrl_regs[SB_ISTERR] & state->dc_sysctrl_regs[SB_IML6ERR];
if (ln | lx | le)
{
return 6;
}
ln=dc_sysctrl_regs[SB_ISTNRM] & dc_sysctrl_regs[SB_IML4NRM];
lx=dc_sysctrl_regs[SB_ISTEXT] & dc_sysctrl_regs[SB_IML4EXT];
le=dc_sysctrl_regs[SB_ISTERR] & dc_sysctrl_regs[SB_IML4ERR];
ln=state->dc_sysctrl_regs[SB_ISTNRM] & state->dc_sysctrl_regs[SB_IML4NRM];
lx=state->dc_sysctrl_regs[SB_ISTEXT] & state->dc_sysctrl_regs[SB_IML4EXT];
le=state->dc_sysctrl_regs[SB_ISTERR] & state->dc_sysctrl_regs[SB_IML4ERR];
if (ln | lx | le)
{
return 4;
}
ln=dc_sysctrl_regs[SB_ISTNRM] & dc_sysctrl_regs[SB_IML2NRM];
lx=dc_sysctrl_regs[SB_ISTEXT] & dc_sysctrl_regs[SB_IML2EXT];
le=dc_sysctrl_regs[SB_ISTERR] & dc_sysctrl_regs[SB_IML2ERR];
ln=state->dc_sysctrl_regs[SB_ISTNRM] & state->dc_sysctrl_regs[SB_IML2NRM];
lx=state->dc_sysctrl_regs[SB_ISTEXT] & state->dc_sysctrl_regs[SB_IML2EXT];
le=state->dc_sysctrl_regs[SB_ISTERR] & state->dc_sysctrl_regs[SB_IML2ERR];
if (ln | lx | le)
{
return 2;
@ -290,22 +287,22 @@ void dc_update_interrupt_status(running_machine &machine)
dc_state *state = machine.driver_data<dc_state>();
int level;
if (dc_sysctrl_regs[SB_ISTERR])
if (state->dc_sysctrl_regs[SB_ISTERR])
{
dc_sysctrl_regs[SB_ISTNRM] |= IST_ERROR;
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_ERROR;
}
else
{
dc_sysctrl_regs[SB_ISTNRM] &= ~IST_ERROR;
state->dc_sysctrl_regs[SB_ISTNRM] &= ~IST_ERROR;
}
if (dc_sysctrl_regs[SB_ISTEXT])
if (state->dc_sysctrl_regs[SB_ISTEXT])
{
dc_sysctrl_regs[SB_ISTNRM] |= IST_G1G2EXTSTAT;
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_G1G2EXTSTAT;
}
else
{
dc_sysctrl_regs[SB_ISTNRM] &= ~IST_G1G2EXTSTAT;
state->dc_sysctrl_regs[SB_ISTNRM] &= ~IST_G1G2EXTSTAT;
}
level=dc_compute_interrupt_level(machine);
@ -314,7 +311,7 @@ void dc_update_interrupt_status(running_machine &machine)
/* Wave DMA HW trigger */
if(state->m_wave_dma.flag && ((state->m_wave_dma.sel & 2) == 2))
{
if((dc_sysctrl_regs[SB_G2DTNRM] & dc_sysctrl_regs[SB_ISTNRM]) || (dc_sysctrl_regs[SB_G2DTEXT] & dc_sysctrl_regs[SB_ISTEXT]))
if((state->dc_sysctrl_regs[SB_G2DTNRM] & state->dc_sysctrl_regs[SB_ISTNRM]) || (state->dc_sysctrl_regs[SB_G2DTEXT] & state->dc_sysctrl_regs[SB_ISTEXT]))
{
address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
@ -326,7 +323,7 @@ void dc_update_interrupt_status(running_machine &machine)
/* PVR-DMA HW trigger */
if(state->m_pvr_dma.flag && ((state->m_pvr_dma.sel & 1) == 1))
{
if((dc_sysctrl_regs[SB_PDTNRM] & dc_sysctrl_regs[SB_ISTNRM]) || (dc_sysctrl_regs[SB_PDTEXT] & dc_sysctrl_regs[SB_ISTEXT]))
if((state->dc_sysctrl_regs[SB_PDTNRM] & state->dc_sysctrl_regs[SB_ISTNRM]) || (state->dc_sysctrl_regs[SB_PDTEXT] & state->dc_sysctrl_regs[SB_ISTEXT]))
{
address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
@ -338,7 +335,7 @@ void dc_update_interrupt_status(running_machine &machine)
READ64_HANDLER( dc_sysctrl_r )
{
// dc_state *state = space->machine().driver_data<dc_state>();
dc_state *state = space->machine().driver_data<dc_state>();
int reg;
UINT64 shift;
@ -348,16 +345,16 @@ READ64_HANDLER( dc_sysctrl_r )
#if DEBUG_SYSCTRL
if ((reg != 0x40) && (reg != 0x41) && (reg != 0x42) && (reg != 0x23) && (reg > 2)) // filter out IRQ status reads
{
mame_printf_verbose("SYSCTRL: [%08x] read %x @ %x (reg %x: %s), mask %" I64FMT "x (PC=%x)\n", 0x5f6800+reg*4, dc_sysctrl_regs[reg], offset, reg, sysctrl_names[reg], mem_mask, cpu_get_pc(&space->device()));
mame_printf_verbose("SYSCTRL: [%08x] read %x @ %x (reg %x: %s), mask %" I64FMT "x (PC=%x)\n", 0x5f6800+reg*4, state->dc_sysctrl_regs[reg], offset, reg, sysctrl_names[reg], mem_mask, cpu_get_pc(&space->device()));
}
#endif
return (UINT64)dc_sysctrl_regs[reg] << shift;
return (UINT64)state->dc_sysctrl_regs[reg] << shift;
}
WRITE64_HANDLER( dc_sysctrl_w )
{
// dc_state *state = space->machine().driver_data<dc_state>();
dc_state *state = space->machine().driver_data<dc_state>();
int reg;
UINT64 shift;
@ -367,23 +364,23 @@ WRITE64_HANDLER( dc_sysctrl_w )
reg = decode_reg32_64(space->machine(), offset, mem_mask, &shift);
dat = (UINT32)(data >> shift);
old = dc_sysctrl_regs[reg];
dc_sysctrl_regs[reg] = dat; // 5f6800+off*4=dat
old = state->dc_sysctrl_regs[reg];
state->dc_sysctrl_regs[reg] = dat; // 5f6800+off*4=dat
switch (reg)
{
case SB_C2DST:
if(((old & 1) == 0) && (dat & 1)) // 0 -> 1
{
address=(dc_sysctrl_regs[SB_C2DSTAT] & 0x03ffffe0) | 0x10000000;
if(dc_sysctrl_regs[SB_C2DSTAT] & 0x1f)
printf("C2DSTAT just used to reserved bits %02x\n",dc_sysctrl_regs[SB_C2DSTAT] & 0x1f);
address=(state->dc_sysctrl_regs[SB_C2DSTAT] & 0x03ffffe0) | 0x10000000;
if(state->dc_sysctrl_regs[SB_C2DSTAT] & 0x1f)
printf("C2DSTAT just used to reserved bits %02x\n",state->dc_sysctrl_regs[SB_C2DSTAT] & 0x1f);
ddtdata.destination=address;
/* 0 rounding size = 16 Mbytes */
if(dc_sysctrl_regs[SB_C2DLEN] == 0)
if(state->dc_sysctrl_regs[SB_C2DLEN] == 0)
ddtdata.length = 0x1000000;
else
ddtdata.length = dc_sysctrl_regs[SB_C2DLEN];
ddtdata.length = state->dc_sysctrl_regs[SB_C2DLEN];
ddtdata.size=1;
ddtdata.direction=0;
ddtdata.channel=2;
@ -391,27 +388,27 @@ WRITE64_HANDLER( dc_sysctrl_w )
sh4_dma_ddt(space->machine().device("maincpu"),&ddtdata);
#if DEBUG_SYSCTRL
if ((address >= 0x11000000) && (address <= 0x11FFFFFF))
if (dc_sysctrl_regs[SB_LMMODE0])
printf("SYSCTRL: Ch2 direct display lists dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, dc_sysctrl_regs[SB_C2DSTAT],dc_sysctrl_regs[SB_LMMODE0],dc_sysctrl_regs[SB_LMMODE1]); // 1
if (state->dc_sysctrl_regs[SB_LMMODE0])
printf("SYSCTRL: Ch2 direct display lists dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", state->dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, state->dc_sysctrl_regs[SB_C2DSTAT],state->dc_sysctrl_regs[SB_LMMODE0],state->dc_sysctrl_regs[SB_LMMODE1]); // 1
else
mame_printf_verbose("SYSCTRL: Ch2 direct textures dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, dc_sysctrl_regs[SB_C2DSTAT],dc_sysctrl_regs[SB_LMMODE0],dc_sysctrl_regs[SB_LMMODE1]); // 0
mame_printf_verbose("SYSCTRL: Ch2 direct textures dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", state->dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, state->dc_sysctrl_regs[SB_C2DSTAT],state->dc_sysctrl_regs[SB_LMMODE0],state->dc_sysctrl_regs[SB_LMMODE1]); // 0
else if ((address >= 0x13000000) && (address <= 0x13FFFFFF))
if (dc_sysctrl_regs[SB_LMMODE1])
printf("SYSCTRL: Ch2 direct display lists dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, dc_sysctrl_regs[SB_C2DSTAT],dc_sysctrl_regs[SB_LMMODE0],dc_sysctrl_regs[SB_LMMODE1]); // 1
if (state->dc_sysctrl_regs[SB_LMMODE1])
printf("SYSCTRL: Ch2 direct display lists dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", state->dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, state->dc_sysctrl_regs[SB_C2DSTAT],state->dc_sysctrl_regs[SB_LMMODE0],state->dc_sysctrl_regs[SB_LMMODE1]); // 1
else
mame_printf_verbose("SYSCTRL: Ch2 direct textures dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, dc_sysctrl_regs[SB_C2DSTAT],dc_sysctrl_regs[SB_LMMODE0],dc_sysctrl_regs[SB_LMMODE1]); // 0
mame_printf_verbose("SYSCTRL: Ch2 direct textures dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", state->dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, state->dc_sysctrl_regs[SB_C2DSTAT],state->dc_sysctrl_regs[SB_LMMODE0],state->dc_sysctrl_regs[SB_LMMODE1]); // 0
else if ((address >= 0x10800000) && (address <= 0x10ffffff))
printf("SYSCTRL: Ch2 YUV dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, dc_sysctrl_regs[SB_C2DSTAT],dc_sysctrl_regs[SB_LMMODE0],dc_sysctrl_regs[SB_LMMODE1]);
printf("SYSCTRL: Ch2 YUV dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", state->dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, state->dc_sysctrl_regs[SB_C2DSTAT],state->dc_sysctrl_regs[SB_LMMODE0],state->dc_sysctrl_regs[SB_LMMODE1]);
else if ((address >= 0x10000000) && (address <= 0x107fffff))
mame_printf_verbose("SYSCTRL: Ch2 TA Display List dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, dc_sysctrl_regs[SB_C2DSTAT],dc_sysctrl_regs[SB_LMMODE0],dc_sysctrl_regs[SB_LMMODE1]);
mame_printf_verbose("SYSCTRL: Ch2 TA Display List dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", state->dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, state->dc_sysctrl_regs[SB_C2DSTAT],state->dc_sysctrl_regs[SB_LMMODE0],state->dc_sysctrl_regs[SB_LMMODE1]);
else
mame_printf_verbose("SYSCTRL: Ch2 unknown dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, dc_sysctrl_regs[SB_C2DSTAT],dc_sysctrl_regs[SB_LMMODE0],dc_sysctrl_regs[SB_LMMODE1]);
mame_printf_verbose("SYSCTRL: Ch2 unknown dma %x from %08x to %08x (lmmode0=%d lmmode1=%d)\n", state->dc_sysctrl_regs[SB_C2DLEN], ddtdata.source-ddtdata.length, state->dc_sysctrl_regs[SB_C2DSTAT],state->dc_sysctrl_regs[SB_LMMODE0],state->dc_sysctrl_regs[SB_LMMODE1]);
#endif
if ((!(address & 0x01000000)))
dc_sysctrl_regs[SB_C2DSTAT]=address;
state->dc_sysctrl_regs[SB_C2DSTAT]=address;
else //direct texture path
dc_sysctrl_regs[SB_C2DSTAT]=address+ddtdata.length;
state->dc_sysctrl_regs[SB_C2DSTAT]=address+ddtdata.length;
/* 200 usecs breaks sfz3upper */
space->machine().scheduler().timer_set(attotime::from_usec(50), FUNC(ch2_dma_irq));
@ -422,17 +419,17 @@ WRITE64_HANDLER( dc_sysctrl_w )
break;
case SB_ISTNRM:
dc_sysctrl_regs[SB_ISTNRM] = old & ~(dat | 0xC0000000); // bits 31,30 ro
state->dc_sysctrl_regs[SB_ISTNRM] = old & ~(dat | 0xC0000000); // bits 31,30 ro
dc_update_interrupt_status(space->machine());
break;
case SB_ISTEXT:
dc_sysctrl_regs[SB_ISTEXT] = old;
state->dc_sysctrl_regs[SB_ISTEXT] = old;
dc_update_interrupt_status(space->machine());
break;
case SB_ISTERR:
dc_sysctrl_regs[SB_ISTERR] = old & ~dat;
state->dc_sysctrl_regs[SB_ISTERR] = old & ~dat;
dc_update_interrupt_status(space->machine());
break;
case SB_SDST:
@ -441,8 +438,8 @@ WRITE64_HANDLER( dc_sysctrl_w )
// TODO: Sort-DMA routine goes here
printf("Sort-DMA irq\n");
dc_sysctrl_regs[SB_SDST] = 0;
dc_sysctrl_regs[SB_ISTNRM] |= IST_DMA_SORT;
state->dc_sysctrl_regs[SB_SDST] = 0;
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_DMA_SORT;
dc_update_interrupt_status(space->machine());
}
break;
@ -603,17 +600,17 @@ INLINE int decode_reg_64(UINT32 offset, UINT64 mem_mask, UINT64 *shift)
READ64_HANDLER( pvr_ctrl_r )
{
// dc_state *state = space->machine().driver_data<dc_state>();
dc_state *state = space->machine().driver_data<dc_state>();
int reg;
UINT64 shift;
reg = decode_reg_64(offset, mem_mask, &shift);
#if DEBUG_PVRCTRL
mame_printf_verbose("PVRCTRL: [%08x] read %x @ %x (reg %x), mask %" I64FMT "x (PC=%x)\n", 0x5f7c00+reg*4, pvrctrl_regs[reg], offset, reg, mem_mask, cpu_get_pc(&space->device()));
mame_printf_verbose("PVRCTRL: [%08x] read %x @ %x (reg %x), mask %" I64FMT "x (PC=%x)\n", 0x5f7c00+reg*4, state->pvrctrl_regs[reg], offset, reg, mem_mask, cpu_get_pc(&space->device()));
#endif
return (UINT64)pvrctrl_regs[reg] << shift;
return (UINT64)state->pvrctrl_regs[reg] << shift;
}
WRITE64_HANDLER( pvr_ctrl_w )
@ -652,8 +649,8 @@ WRITE64_HANDLER( pvr_ctrl_w )
mame_printf_verbose("PVRCTRL: [%08x=%x] write %" I64FMT "x to %x (reg %x), mask %" I64FMT "x\n", 0x5f7c00+reg*4, dat, data>>shift, offset, reg, mem_mask);
#endif
// pvrctrl_regs[reg] |= dat;
pvrctrl_regs[reg] = dat;
// state->pvrctrl_regs[reg] |= dat;
state->pvrctrl_regs[reg] = dat;
}
@ -784,9 +781,36 @@ static void rtc_initial_setup(running_machine &machine)
MACHINE_START( dc )
{
// dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
rtc_initial_setup(machine);
// save states
state_save_register_global_pointer(machine, state->dc_rtcregister, 4);
state_save_register_global_pointer(machine, state->dc_sysctrl_regs, 0x200/4);
state_save_register_global_pointer(machine, state->g2bus_regs, 0x100/4);
state_save_register_global(machine, state->m_wave_dma.aica_addr);
state_save_register_global(machine, state->m_wave_dma.root_addr);
state_save_register_global(machine, state->m_wave_dma.size);
state_save_register_global(machine, state->m_wave_dma.dir);
state_save_register_global(machine, state->m_wave_dma.flag);
state_save_register_global(machine, state->m_wave_dma.indirect);
state_save_register_global(machine, state->m_wave_dma.start);
state_save_register_global(machine, state->m_wave_dma.sel);
state_save_register_global(machine, state->m_pvr_dma.pvr_addr);
state_save_register_global(machine, state->m_pvr_dma.sys_addr);
state_save_register_global(machine, state->m_pvr_dma.size);
state_save_register_global(machine, state->m_pvr_dma.sel);
state_save_register_global(machine, state->m_pvr_dma.dir);
state_save_register_global(machine, state->m_pvr_dma.flag);
state_save_register_global(machine, state->m_pvr_dma.start);
state_save_register_global_pointer(machine,state->pvrta_regs,0x2000/4);
state_save_register_global_pointer(machine,state->pvrctrl_regs,0x100/4);
state_save_register_global(machine, state->debug_dip_status);
state_save_register_global_pointer(machine,state->tafifo_buff,32);
state_save_register_global(machine, state->scanline);
state_save_register_global(machine, state->next_y);
state_save_register_global_pointer(machine,state->dc_sound_ram,sizeof(state->dc_sound_ram));
}
MACHINE_RESET( dc )
@ -796,11 +820,11 @@ MACHINE_RESET( dc )
/* halt the ARM7 */
cputag_set_input_line(machine, "soundcpu", INPUT_LINE_RESET, ASSERT_LINE);
memset(dc_sysctrl_regs, 0, sizeof(dc_sysctrl_regs));
memset(state->dc_sysctrl_regs, 0, sizeof(state->dc_sysctrl_regs));
state->dc_rtc_timer->adjust(attotime::zero, 0, attotime::from_seconds(1));
dc_sysctrl_regs[SB_SBREV] = 0x0b;
state->dc_sysctrl_regs[SB_SBREV] = 0x0b;
}
READ64_DEVICE_HANDLER( dc_aica_reg_r )

394
src/mame/video/dc.c
View File

@ -116,10 +116,9 @@ SPG_STATUS
---- ---- ---- ---- ---x ---- ---- ---- hsync
---- ---- ---- ---- ---- x--- ---- ---- blank
---- ---- ---- ---- ---- -x-- ---- ---- field number
---- ---- ---- ---- ---- --xx xxxx xxxx scanline
---- ---- ---- ---- ---- --xx xxxx xxxx state->scanline
*/
UINT32 pvrctrl_regs[0x100/4];
static const int pvr_parconfseq[] = {1,2,3,2,3,4,5,6,5,6,7,8,9,10,11,12,13,14,13,14,15,16,17,16,17,0,0,0,0,0,18,19,20,19,20,21,22,23,22,23};
static const int pvr_wordsvertex[24] = {8,8,8,8,8,16,16,8,8,8, 8, 8,8,8,8,8,16,16, 8,16,16,8,16,16};
static const int pvr_wordspolygon[24] = {8,8,8,8,8, 8, 8,8,8,8,16,16,8,8,8,8, 8, 8,16,16,16,8, 8, 8};
@ -128,27 +127,8 @@ static UINT32 dilated0[15][1024];
static UINT32 dilated1[15][1024];
static int dilatechose[64];
static float wbuffer[480][640];
static UINT32 debug_dip_status;
static void pvr_accumulationbuffer_to_framebuffer(address_space *space, int x,int y);
UINT64 *dc_framebuffer_ram; // '32-bit access area'
UINT64 *dc_texture_ram; // '64-bit access area'
UINT64 *pvr2_texture_ram;
UINT64 *pvr2_framebuffer_ram;
UINT64 *elan_ram;
static UINT32 tafifo_buff[32];
static emu_timer *vbout_timer;
static emu_timer *vbin_timer;
static emu_timer *hbin_timer;
static emu_timer *endofrender_timer_isp;
static emu_timer *endofrender_timer_tsp;
static emu_timer *endofrender_timer_video;
static int scanline,next_y;
// the real accumulation buffer is a 32x32x8bpp buffer into which tiles get rendered before they get copied to the framebuffer
// our implementation is not currently tile based, and thus the accumulation buffer is screen sized
static bitmap_t *fake_accumulationbuffer_bitmap;
@ -437,97 +417,97 @@ INLINE UINT32 cv_yuv(UINT16 c1, UINT16 c2, int x)
INLINE UINT32 tex_r_yuv_n(running_machine &machine, texinfo *t, float x, float y)
{
//dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int addrp = t->address + (t->stride*yt + (xt & ~1))*2;
UINT16 c1 = *(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp));
UINT16 c2 = *(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp+2));
UINT16 c1 = *(UINT16 *)(((UINT8 *)state->dc_texture_ram) + WORD_XOR_LE(addrp));
UINT16 c2 = *(UINT16 *)(((UINT8 *)state->dc_texture_ram) + WORD_XOR_LE(addrp+2));
return cv_yuv(c1, c2, xt);
}
INLINE UINT32 tex_r_1555_n(running_machine &machine, texinfo *t, float x, float y)
{
//dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int addrp = t->address + (t->stride*yt + xt)*2;
return cv_1555z(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
return cv_1555z(*(UINT16 *)(((UINT8 *)state->dc_texture_ram) + WORD_XOR_LE(addrp)));
}
INLINE UINT32 tex_r_1555_tw(running_machine &machine, texinfo *t, float x, float y)
{
//dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int addrp = t->address + (dilated1[t->cd][xt] + dilated0[t->cd][yt])*2;
return cv_1555(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
return cv_1555(*(UINT16 *)(((UINT8 *)state->dc_texture_ram) + WORD_XOR_LE(addrp)));
}
INLINE UINT32 tex_r_1555_vq(running_machine &machine, texinfo *t, float x, float y)
{
//dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int idx = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int addrp = t->vqbase + 8*idx + (dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 1])*2;
return cv_1555(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
return cv_1555(*(UINT16 *)(((UINT8 *)state->dc_texture_ram) + WORD_XOR_LE(addrp)));
}
INLINE UINT32 tex_r_565_n(running_machine &machine, texinfo *t, float x, float y)
{
//dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int addrp = t->address + (t->stride*yt + xt)*2;
return cv_565z(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
return cv_565z(*(UINT16 *)(((UINT8 *)state->dc_texture_ram) + WORD_XOR_LE(addrp)));
}
INLINE UINT32 tex_r_565_tw(running_machine &machine, texinfo *t, float x, float y)
{
//dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int addrp = t->address + (dilated1[t->cd][xt] + dilated0[t->cd][yt])*2;
return cv_565(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
return cv_565(*(UINT16 *)(((UINT8 *)state->dc_texture_ram) + WORD_XOR_LE(addrp)));
}
INLINE UINT32 tex_r_565_vq(running_machine &machine, texinfo *t, float x, float y)
{
//dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int idx = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int addrp = t->vqbase + 8*idx + (dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 1])*2;
return cv_565(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
return cv_565(*(UINT16 *)(((UINT8 *)state->dc_texture_ram) + WORD_XOR_LE(addrp)));
}
INLINE UINT32 tex_r_4444_n(running_machine &machine, texinfo *t, float x, float y)
{
//dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int addrp = t->address + (t->stride*yt + xt)*2;
return cv_4444z(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
return cv_4444z(*(UINT16 *)(((UINT8 *)state->dc_texture_ram) + WORD_XOR_LE(addrp)));
}
INLINE UINT32 tex_r_4444_tw(running_machine &machine, texinfo *t, float x, float y)
{
//dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int addrp = t->address + (dilated1[t->cd][xt] + dilated0[t->cd][yt])*2;
return cv_4444(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
return cv_4444(*(UINT16 *)(((UINT8 *)state->dc_texture_ram) + WORD_XOR_LE(addrp)));
}
INLINE UINT32 tex_r_4444_vq(running_machine &machine, texinfo *t, float x, float y)
{
//dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int idx = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int addrp = t->vqbase + 8*idx + (dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 1])*2;
return cv_4444(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
return cv_4444(*(UINT16 *)(((UINT8 *)state->dc_texture_ram) + WORD_XOR_LE(addrp)));
}
INLINE UINT32 tex_r_p4_1555_tw(running_machine &machine, texinfo *t, float x, float y)
@ -537,7 +517,7 @@ INLINE UINT32 tex_r_p4_1555_tw(running_machine &machine, texinfo *t, float x, fl
int yt = ((int)y) & (t->sizey-1);
int off = dilated1[t->cd][xt] + dilated0[t->cd][yt];
int addrp = t->address + (off >> 1);
int c = (((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)] >> ((off & 1) << 2)) & 0xf;
int c = (((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(addrp)] >> ((off & 1) << 2)) & 0xf;
return cv_1555(state->pvrta_regs[t->palbase + c]);
}
@ -546,9 +526,9 @@ INLINE UINT32 tex_r_p4_1555_vq(running_machine &machine, texinfo *t, float x, fl
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int idx = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3];
int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)] & 0xf;
int c = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(addrp)] & 0xf;
return cv_1555(state->pvrta_regs[t->palbase + c]);
}
@ -559,7 +539,7 @@ INLINE UINT32 tex_r_p4_565_tw(running_machine &machine, texinfo *t, float x, flo
int yt = ((int)y) & (t->sizey-1);
int off = dilated1[t->cd][xt] + dilated0[t->cd][yt];
int addrp = t->address + (off >> 1);
int c = (((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)] >> ((off & 1) << 2)) & 0xf;
int c = (((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(addrp)] >> ((off & 1) << 2)) & 0xf;
return cv_565(state->pvrta_regs[t->palbase + c]);
}
@ -568,9 +548,9 @@ INLINE UINT32 tex_r_p4_565_vq(running_machine &machine, texinfo *t, float x, flo
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int idx = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3];
int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)] & 0xf;
int c = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(addrp)] & 0xf;
return cv_565(state->pvrta_regs[t->palbase + c]);
}
@ -581,7 +561,7 @@ INLINE UINT32 tex_r_p4_4444_tw(running_machine &machine, texinfo *t, float x, fl
int yt = ((int)y) & (t->sizey-1);
int off = dilated1[t->cd][xt] + dilated0[t->cd][yt];
int addrp = t->address + (off >> 1);
int c = (((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)] >> ((off & 1) << 2)) & 0xf;
int c = (((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(addrp)] >> ((off & 1) << 2)) & 0xf;
return cv_4444(state->pvrta_regs[t->palbase + c]);
}
@ -590,9 +570,9 @@ INLINE UINT32 tex_r_p4_4444_vq(running_machine &machine, texinfo *t, float x, fl
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int idx = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3];
int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)] & 0xf;
int c = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(addrp)] & 0xf;
return cv_4444(state->pvrta_regs[t->palbase + c]);
}
@ -603,7 +583,7 @@ INLINE UINT32 tex_r_p4_8888_tw(running_machine &machine, texinfo *t, float x, fl
int yt = ((int)y) & (t->sizey-1);
int off = dilated1[t->cd][xt] + dilated0[t->cd][yt];
int addrp = t->address + (off >> 1);
int c = (((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)] >> ((off & 1) << 2)) & 0xf;
int c = (((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(addrp)] >> ((off & 1) << 2)) & 0xf;
return state->pvrta_regs[t->palbase + c];
}
@ -612,9 +592,9 @@ INLINE UINT32 tex_r_p4_8888_vq(running_machine &machine, texinfo *t, float x, fl
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int idx = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3];
int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)] & 0xf;
int c = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(addrp)] & 0xf;
return state->pvrta_regs[t->palbase + c];
}
@ -624,7 +604,7 @@ INLINE UINT32 tex_r_p8_1555_tw(running_machine &machine, texinfo *t, float x, fl
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int addrp = t->address + dilated1[t->cd][xt] + dilated0[t->cd][yt];
int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)];
int c = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(addrp)];
return cv_1555(state->pvrta_regs[t->palbase + c]);
}
@ -633,9 +613,9 @@ INLINE UINT32 tex_r_p8_1555_vq(running_machine &machine, texinfo *t, float x, fl
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int idx = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3];
int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)];
int c = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(addrp)];
return cv_1555(state->pvrta_regs[t->palbase + c]);
}
@ -645,7 +625,7 @@ INLINE UINT32 tex_r_p8_565_tw(running_machine &machine, texinfo *t, float x, flo
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int addrp = t->address + dilated1[t->cd][xt] + dilated0[t->cd][yt];
int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)];
int c = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(addrp)];
return cv_565(state->pvrta_regs[t->palbase + c]);
}
@ -654,9 +634,9 @@ INLINE UINT32 tex_r_p8_565_vq(running_machine &machine, texinfo *t, float x, flo
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int idx = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3];
int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)];
int c = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(addrp)];
return cv_565(state->pvrta_regs[t->palbase + c]);
}
@ -666,7 +646,7 @@ INLINE UINT32 tex_r_p8_4444_tw(running_machine &machine, texinfo *t, float x, fl
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int addrp = t->address + dilated1[t->cd][xt] + dilated0[t->cd][yt];
int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)];
int c = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(addrp)];
return cv_4444(state->pvrta_regs[t->palbase + c]);
}
@ -675,9 +655,9 @@ INLINE UINT32 tex_r_p8_4444_vq(running_machine &machine, texinfo *t, float x, fl
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int idx = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3];
int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)];
int c = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(addrp)];
return cv_4444(state->pvrta_regs[t->palbase + c]);
}
@ -687,7 +667,7 @@ INLINE UINT32 tex_r_p8_8888_tw(running_machine &machine, texinfo *t, float x, fl
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int addrp = t->address + dilated1[t->cd][xt] + dilated0[t->cd][yt];
int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)];
int c = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(addrp)];
return state->pvrta_regs[t->palbase + c];
}
@ -696,9 +676,9 @@ INLINE UINT32 tex_r_p8_8888_vq(running_machine &machine, texinfo *t, float x, fl
dc_state *state = machine.driver_data<dc_state>();
int xt = ((int)x) & (t->sizex-1);
int yt = ((int)y) & (t->sizey-1);
int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int idx = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3];
int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)];
int c = ((UINT8 *)state->dc_texture_ram)[BYTE_XOR_LE(addrp)];
return state->pvrta_regs[t->palbase + c];
}
@ -1124,7 +1104,7 @@ WRITE64_HANDLER( pvr_ta_w )
// this should really be done for each tile!
render_to_accumulation_buffer(space->machine(),fake_accumulationbuffer_bitmap,&clip);
endofrender_timer_isp->adjust(attotime::from_usec(4000) ); // hack, make sure render takes some amount of time
state->endofrender_timer_isp->adjust(attotime::from_usec(4000) ); // hack, make sure render takes some amount of time
/* copy the tiles to the framebuffer (really the rendering should be in this loop too) */
if (state->pvrta_regs[FPU_PARAM_CFG] & 0x200000)
@ -1263,7 +1243,7 @@ WRITE64_HANDLER( pvr_ta_w )
printf("TA_YUV_TEX_BASE initialized to %08x\n", dat);
// hack, this interrupt is generated after transfering a set amount of data
//dc_sysctrl_regs[SB_ISTNRM] |= IST_EOXFER_YUV;
//state->dc_sysctrl_regs[SB_ISTNRM] |= IST_EOXFER_YUV;
//dc_update_interrupt_status(space->machine());
break;
@ -1273,11 +1253,11 @@ WRITE64_HANDLER( pvr_ta_w )
case SPG_VBLANK_INT:
/* clear pending irqs and modify them with the updated ones */
vbin_timer->adjust(attotime::never);
vbout_timer->adjust(attotime::never);
state->vbin_timer->adjust(attotime::never);
state->vbout_timer->adjust(attotime::never);
vbin_timer->adjust(space->machine().primary_screen->time_until_pos(spg_vblank_in_irq_line_num));
vbout_timer->adjust(space->machine().primary_screen->time_until_pos(spg_vblank_out_irq_line_num));
state->vbin_timer->adjust(space->machine().primary_screen->time_until_pos(spg_vblank_in_irq_line_num));
state->vbout_timer->adjust(space->machine().primary_screen->time_until_pos(spg_vblank_out_irq_line_num));
break;
/* TODO: timer adjust for SPG_HBLANK_INT too */
case TA_LIST_CONT:
@ -1317,47 +1297,47 @@ WRITE64_HANDLER( pvr_ta_w )
static TIMER_CALLBACK( transfer_opaque_list_irq )
{
//dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
dc_sysctrl_regs[SB_ISTNRM] |= IST_EOXFER_OPLST;
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_EOXFER_OPLST;
dc_update_interrupt_status(machine);
}
static TIMER_CALLBACK( transfer_opaque_modifier_volume_list_irq )
{
//dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
dc_sysctrl_regs[SB_ISTNRM] |= IST_EOXFER_OPMV;
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_EOXFER_OPMV;
dc_update_interrupt_status(machine);
}
static TIMER_CALLBACK( transfer_translucent_list_irq )
{
//dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
dc_sysctrl_regs[SB_ISTNRM] |= IST_EOXFER_TRLST;
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_EOXFER_TRLST;
dc_update_interrupt_status(machine);
}
static TIMER_CALLBACK( transfer_translucent_modifier_volume_list_irq )
{
//dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
dc_sysctrl_regs[SB_ISTNRM] |= IST_EOXFER_TRMV;
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_EOXFER_TRMV;
dc_update_interrupt_status(machine);
}
static TIMER_CALLBACK( transfer_punch_through_list_irq )
{
//dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
dc_sysctrl_regs[SB_ISTNRM] |= (1 << 21);
state->dc_sysctrl_regs[SB_ISTNRM] |= (1 << 21);
dc_update_interrupt_status(machine);
}
static void process_ta_fifo(running_machine& machine)
{
//dc_state *state = machine.driver_data<dc_state>();
dc_state *state = machine.driver_data<dc_state>();
/* first byte in the buffer is the Parameter Control Word
@ -1372,7 +1352,7 @@ static void process_ta_fifo(running_machine& machine)
receiveddata *rd = &state_ta.grab[state_ta.grabsel];
// Para Control
state_ta.paracontrol=(tafifo_buff[0] >> 24) & 0xff;
state_ta.paracontrol=(state->tafifo_buff[0] >> 24) & 0xff;
// 0 end of list
// 1 user tile clip
// 2 object list set
@ -1388,12 +1368,12 @@ static void process_ta_fifo(running_machine& machine)
{
state_ta.global_paratype = state_ta.paratype;
// Group Control
state_ta.groupcontrol=(tafifo_buff[0] >> 16) & 0xff;
state_ta.groupcontrol=(state->tafifo_buff[0] >> 16) & 0xff;
state_ta.groupen=(state_ta.groupcontrol >> 7) & 1;
state_ta.striplen=(state_ta.groupcontrol >> 2) & 3;
state_ta.userclip=(state_ta.groupcontrol >> 0) & 3;
// Obj Control
state_ta.objcontrol=(tafifo_buff[0] >> 0) & 0xffff;
state_ta.objcontrol=(state->tafifo_buff[0] >> 0) & 0xffff;
state_ta.shadow=(state_ta.objcontrol >> 7) & 1;
state_ta.volume=(state_ta.objcontrol >> 6) & 1;
state_ta.coltype=(state_ta.objcontrol >> 4) & 3;
@ -1456,20 +1436,20 @@ static void process_ta_fifo(running_machine& machine)
{ // user tile clip
#if DEBUG_PVRDLIST
mame_printf_verbose("Para Type 1 User Tile Clip\n");
mame_printf_verbose(" (%d , %d)-(%d , %d)\n", tafifo_buff[4], tafifo_buff[5], tafifo_buff[6], tafifo_buff[7]);
mame_printf_verbose(" (%d , %d)-(%d , %d)\n", state->tafifo_buff[4], state->tafifo_buff[5], state->tafifo_buff[6], state->tafifo_buff[7]);
#endif
}
else if (state_ta.paratype == 2)
{ // object list set
#if DEBUG_PVRDLIST
mame_printf_verbose("Para Type 2 Object List Set at %08x\n", tafifo_buff[1]);
mame_printf_verbose(" (%d , %d)-(%d , %d)\n", tafifo_buff[4], tafifo_buff[5], tafifo_buff[6], tafifo_buff[7]);
mame_printf_verbose("Para Type 2 Object List Set at %08x\n", state->tafifo_buff[1]);
mame_printf_verbose(" (%d , %d)-(%d , %d)\n", state->tafifo_buff[4], state->tafifo_buff[5], state->tafifo_buff[6], state->tafifo_buff[7]);
#endif
}
else if (state_ta.paratype == 3)
{
#if DEBUG_PVRDLIST
mame_printf_verbose("Para Type %x Unknown!\n", tafifo_buff[0]);
mame_printf_verbose("Para Type %x Unknown!\n", state->tafifo_buff[0]);
#endif
}
else
@ -1495,40 +1475,40 @@ static void process_ta_fifo(running_machine& machine)
if ((state_ta.paratype == 4) || (state_ta.paratype == 5))
{ // quad or polygon
state_ta.depthcomparemode=(tafifo_buff[1] >> 29) & 7;
state_ta.cullingmode=(tafifo_buff[1] >> 27) & 3;
state_ta.zwritedisable=(tafifo_buff[1] >> 26) & 1;
state_ta.cachebypass=(tafifo_buff[1] >> 21) & 1;
state_ta.dcalcctrl=(tafifo_buff[1] >> 20) & 1;
state_ta.volumeinstruction=(tafifo_buff[1] >> 29) & 7;
state_ta.depthcomparemode=(state->tafifo_buff[1] >> 29) & 7;
state_ta.cullingmode=(state->tafifo_buff[1] >> 27) & 3;
state_ta.zwritedisable=(state->tafifo_buff[1] >> 26) & 1;
state_ta.cachebypass=(state->tafifo_buff[1] >> 21) & 1;
state_ta.dcalcctrl=(state->tafifo_buff[1] >> 20) & 1;
state_ta.volumeinstruction=(state->tafifo_buff[1] >> 29) & 7;
//state_ta.textureusize=1 << (3+((tafifo_buff[2] >> 3) & 7));
//state_ta.texturevsize=1 << (3+(tafifo_buff[2] & 7));
state_ta.texturesizes=tafifo_buff[2] & 0x3f;
state_ta.blend_mode = tafifo_buff[2] >> 26;
state_ta.srcselect=(tafifo_buff[2] >> 25) & 1;
state_ta.dstselect=(tafifo_buff[2] >> 24) & 1;
state_ta.fogcontrol=(tafifo_buff[2] >> 22) & 3;
state_ta.colorclamp=(tafifo_buff[2] >> 21) & 1;
state_ta.use_alpha = (tafifo_buff[2] >> 20) & 1;
state_ta.ignoretexalpha=(tafifo_buff[2] >> 19) & 1;
state_ta.flipuv=(tafifo_buff[2] >> 17) & 3;
state_ta.clampuv=(tafifo_buff[2] >> 15) & 3;
state_ta.filtermode=(tafifo_buff[2] >> 13) & 3;
state_ta.sstexture=(tafifo_buff[2] >> 12) & 1;
state_ta.mmdadjust=(tafifo_buff[2] >> 8) & 1;
state_ta.tsinstruction=(tafifo_buff[2] >> 6) & 3;
//state_ta.textureusize=1 << (3+((state->tafifo_buff[2] >> 3) & 7));
//state_ta.texturevsize=1 << (3+(state->tafifo_buff[2] & 7));
state_ta.texturesizes=state->tafifo_buff[2] & 0x3f;
state_ta.blend_mode = state->tafifo_buff[2] >> 26;
state_ta.srcselect=(state->tafifo_buff[2] >> 25) & 1;
state_ta.dstselect=(state->tafifo_buff[2] >> 24) & 1;
state_ta.fogcontrol=(state->tafifo_buff[2] >> 22) & 3;
state_ta.colorclamp=(state->tafifo_buff[2] >> 21) & 1;
state_ta.use_alpha = (state->tafifo_buff[2] >> 20) & 1;
state_ta.ignoretexalpha=(state->tafifo_buff[2] >> 19) & 1;
state_ta.flipuv=(state->tafifo_buff[2] >> 17) & 3;
state_ta.clampuv=(state->tafifo_buff[2] >> 15) & 3;
state_ta.filtermode=(state->tafifo_buff[2] >> 13) & 3;
state_ta.sstexture=(state->tafifo_buff[2] >> 12) & 1;
state_ta.mmdadjust=(state->tafifo_buff[2] >> 8) & 1;
state_ta.tsinstruction=(state->tafifo_buff[2] >> 6) & 3;
if (state_ta.texture == 1)
{
state_ta.textureaddress=(tafifo_buff[3] & 0x1FFFFF) << 3;
state_ta.scanorder=(tafifo_buff[3] >> 26) & 1;
state_ta.pixelformat=(tafifo_buff[3] >> 27) & 7;
state_ta.mipmapped=(tafifo_buff[3] >> 31) & 1;
state_ta.vqcompressed=(tafifo_buff[3] >> 30) & 1;
state_ta.strideselect=(tafifo_buff[3] >> 25) & 1;
state_ta.paletteselector=(tafifo_buff[3] >> 21) & 0x3F;
state_ta.textureaddress=(state->tafifo_buff[3] & 0x1FFFFF) << 3;
state_ta.scanorder=(state->tafifo_buff[3] >> 26) & 1;
state_ta.pixelformat=(state->tafifo_buff[3] >> 27) & 7;
state_ta.mipmapped=(state->tafifo_buff[3] >> 31) & 1;
state_ta.vqcompressed=(state->tafifo_buff[3] >> 30) & 1;
state_ta.strideselect=(state->tafifo_buff[3] >> 25) & 1;
state_ta.paletteselector=(state->tafifo_buff[3] >> 21) & 0x3F;
#if DEBUG_PVRDLIST
mame_printf_verbose(" Texture at %08x format %d\n", (tafifo_buff[3] & 0x1FFFFF) << 3, state_ta.pixelformat);
mame_printf_verbose(" Texture at %08x format %d\n", (state->tafifo_buff[3] & 0x1FFFFF) << 3, state_ta.pixelformat);
#endif
}
if (state_ta.paratype == 4)
@ -1560,9 +1540,9 @@ static void process_ta_fifo(running_machine& machine)
{
#if DEBUG_PVRDLIST
mame_printf_verbose(" Vertex modifier volume");
mame_printf_verbose(" A(%f,%f,%f) B(%f,%f,%f) C(%f,%f,%f)", u2f(tafifo_buff[1]), u2f(tafifo_buff[2]),
u2f(tafifo_buff[3]), u2f(tafifo_buff[4]), u2f(tafifo_buff[5]), u2f(tafifo_buff[6]), u2f(tafifo_buff[7]),
u2f(tafifo_buff[8]), u2f(tafifo_buff[9]));
mame_printf_verbose(" A(%f,%f,%f) B(%f,%f,%f) C(%f,%f,%f)", u2f(state->tafifo_buff[1]), u2f(state->tafifo_buff[2]),
u2f(state->tafifo_buff[3]), u2f(state->tafifo_buff[4]), u2f(state->tafifo_buff[5]), u2f(state->tafifo_buff[6]), u2f(state->tafifo_buff[7]),
u2f(state->tafifo_buff[8]), u2f(state->tafifo_buff[9]));
mame_printf_verbose("\n");
#endif
}
@ -1570,9 +1550,9 @@ static void process_ta_fifo(running_machine& machine)
{
#if DEBUG_PVRDLIST
mame_printf_verbose(" Vertex sprite");
mame_printf_verbose(" A(%f,%f,%f) B(%f,%f,%f) C(%f,%f,%f) D(%f,%f,)", u2f(tafifo_buff[1]), u2f(tafifo_buff[2]),
u2f(tafifo_buff[3]), u2f(tafifo_buff[4]), u2f(tafifo_buff[5]), u2f(tafifo_buff[6]), u2f(tafifo_buff[7]),
u2f(tafifo_buff[8]), u2f(tafifo_buff[9]), u2f(tafifo_buff[10]), u2f(tafifo_buff[11]));
mame_printf_verbose(" A(%f,%f,%f) B(%f,%f,%f) C(%f,%f,%f) D(%f,%f,)", u2f(state->tafifo_buff[1]), u2f(state->tafifo_buff[2]),
u2f(state->tafifo_buff[3]), u2f(state->tafifo_buff[4]), u2f(state->tafifo_buff[5]), u2f(state->tafifo_buff[6]), u2f(state->tafifo_buff[7]),
u2f(state->tafifo_buff[8]), u2f(state->tafifo_buff[9]), u2f(state->tafifo_buff[10]), u2f(state->tafifo_buff[11]));
mame_printf_verbose("\n");
#endif
if (state_ta.texture == 1)
@ -1581,24 +1561,24 @@ static void process_ta_fifo(running_machine& machine)
{
strip *ts;
vert *tv = &rd->verts[rd->verts_size];
tv[0].x = u2f(tafifo_buff[0x1]);
tv[0].y = u2f(tafifo_buff[0x2]);
tv[0].w = u2f(tafifo_buff[0x3]);
tv[1].x = u2f(tafifo_buff[0x4]);
tv[1].y = u2f(tafifo_buff[0x5]);
tv[1].w = u2f(tafifo_buff[0x6]);
tv[3].x = u2f(tafifo_buff[0x7]);
tv[3].y = u2f(tafifo_buff[0x8]);
tv[3].w = u2f(tafifo_buff[0x9]);
tv[2].x = u2f(tafifo_buff[0xa]);
tv[2].y = u2f(tafifo_buff[0xb]);
tv[0].x = u2f(state->tafifo_buff[0x1]);
tv[0].y = u2f(state->tafifo_buff[0x2]);
tv[0].w = u2f(state->tafifo_buff[0x3]);
tv[1].x = u2f(state->tafifo_buff[0x4]);
tv[1].y = u2f(state->tafifo_buff[0x5]);
tv[1].w = u2f(state->tafifo_buff[0x6]);
tv[3].x = u2f(state->tafifo_buff[0x7]);
tv[3].y = u2f(state->tafifo_buff[0x8]);
tv[3].w = u2f(state->tafifo_buff[0x9]);
tv[2].x = u2f(state->tafifo_buff[0xa]);
tv[2].y = u2f(state->tafifo_buff[0xb]);
tv[2].w = tv[0].w+tv[3].w-tv[1].w;
tv[0].u = u2f(tafifo_buff[0xd] & 0xffff0000);
tv[0].v = u2f(tafifo_buff[0xd] << 16);
tv[1].u = u2f(tafifo_buff[0xe] & 0xffff0000);
tv[1].v = u2f(tafifo_buff[0xe] << 16);
tv[3].u = u2f(tafifo_buff[0xf] & 0xffff0000);
tv[3].v = u2f(tafifo_buff[0xf] << 16);
tv[0].u = u2f(state->tafifo_buff[0xd] & 0xffff0000);
tv[0].v = u2f(state->tafifo_buff[0xd] << 16);
tv[1].u = u2f(state->tafifo_buff[0xe] & 0xffff0000);
tv[1].v = u2f(state->tafifo_buff[0xe] << 16);
tv[3].u = u2f(state->tafifo_buff[0xf] & 0xffff0000);
tv[3].v = u2f(state->tafifo_buff[0xf] << 16);
tv[2].u = tv[0].u+tv[3].u-tv[1].u;
tv[2].v = tv[0].v+tv[3].v-tv[1].v;
@ -1615,7 +1595,7 @@ static void process_ta_fifo(running_machine& machine)
{
#if DEBUG_PVRDLIST
mame_printf_verbose(" Vertex polygon");
mame_printf_verbose(" V(%f,%f,%f) T(%f,%f)", u2f(tafifo_buff[1]), u2f(tafifo_buff[2]), u2f(tafifo_buff[3]), u2f(tafifo_buff[4]), u2f(tafifo_buff[5]));
mame_printf_verbose(" V(%f,%f,%f) T(%f,%f)", u2f(state->tafifo_buff[1]), u2f(state->tafifo_buff[2]), u2f(state->tafifo_buff[3]), u2f(state->tafifo_buff[4]), u2f(state->tafifo_buff[5]));
mame_printf_verbose("\n");
#endif
if (rd->verts_size <= 65530)
@ -1625,11 +1605,11 @@ static void process_ta_fifo(running_machine& machine)
/* -- this is also wildly inaccurate! */
vert *tv = &rd->verts[rd->verts_size];
tv->x=u2f(tafifo_buff[1]);
tv->y=u2f(tafifo_buff[2]);
tv->w=u2f(tafifo_buff[3]);
tv->u=u2f(tafifo_buff[4]);
tv->v=u2f(tafifo_buff[5]);
tv->x=u2f(state->tafifo_buff[1]);
tv->y=u2f(state->tafifo_buff[2]);
tv->w=u2f(state->tafifo_buff[3]);
tv->u=u2f(state->tafifo_buff[4]);
tv->v=u2f(state->tafifo_buff[5]);
if((!rd->strips_size) ||
@ -1651,14 +1631,14 @@ static void process_ta_fifo(running_machine& machine)
WRITE64_HANDLER( ta_fifo_poly_w )
{
//dc_state *state = space->machine().driver_data<dc_state>();
dc_state *state = space->machine().driver_data<dc_state>();
if (mem_mask == U64(0xffffffffffffffff)) // 64 bit
{
tafifo_buff[state_ta.tafifo_pos]=(UINT32)data;
tafifo_buff[state_ta.tafifo_pos+1]=(UINT32)(data >> 32);
state->tafifo_buff[state_ta.tafifo_pos]=(UINT32)data;
state->tafifo_buff[state_ta.tafifo_pos+1]=(UINT32)(data >> 32);
#if DEBUG_FIFO_POLY
mame_printf_debug("ta_fifo_poly_w: Unmapped write64 %08x = %" I64FMT "x -> %08x %08x\n", 0x10000000+offset*8, data, tafifo_buff[state_ta.tafifo_pos], tafifo_buff[state_ta.tafifo_pos+1]);
mame_printf_debug("ta_fifo_poly_w: Unmapped write64 %08x = %" I64FMT "x -> %08x %08x\n", 0x10000000+offset*8, data, state->tafifo_buff[state_ta.tafifo_pos], state->tafifo_buff[state_ta.tafifo_pos+1]);
#endif
state_ta.tafifo_pos += 2;
}
@ -1738,6 +1718,7 @@ static void computedilated(void)
static void render_hline(running_machine &machine,bitmap_t *bitmap, texinfo *ti, int y, float xl, float xr, float ul, float ur, float vl, float vr, float wl, float wr)
{
dc_state *state = machine.driver_data<dc_state>();
int xxl, xxr;
float dx, ddx, dudx, dvdx, dwdx;
UINT32 *tdata;
@ -1795,7 +1776,7 @@ static void render_hline(running_machine &machine,bitmap_t *bitmap, texinfo *ti,
c = ti->r(machine, ti, u, v);
// debug dip to turn on/off bilinear filtering, it's slooooow
if (debug_dip_status&0x1)
if (state->debug_dip_status&0x1)
{
if(ti->filter_mode >= TEX_FILTER_BILINEAR)
{
@ -2040,7 +2021,7 @@ static void render_to_accumulation_buffer(running_machine &machine,bitmap_t *bit
for(i=sv; i <= ev-2; i++)
{
if (!(debug_dip_status&0x2))
if (!(state->debug_dip_status&0x2))
render_tri(machine, bitmap, &ts->ti, state_ta.grab[rs].verts + i);
}
@ -2259,7 +2240,7 @@ static void pvr_drawframebuffer(running_machine &machine,bitmap_t *bitmap,const
for (x=0;x < xi;x++)
{
fbaddr=BITMAP_ADDR32(bitmap,y,x*2+0);
c=*(((UINT16 *)dc_framebuffer_ram) + (WORD2_XOR_LE(addrp) >> 1));
c=*(((UINT16 *)state->dc_framebuffer_ram) + (WORD2_XOR_LE(addrp) >> 1));
b = (c & 0x001f) << 3;
g = (c & 0x03e0) >> 2;
@ -2279,7 +2260,7 @@ static void pvr_drawframebuffer(running_machine &machine,bitmap_t *bitmap,const
for (x=0;x < xi;x++)
{
fbaddr=BITMAP_ADDR32(bitmap,y,x);
c=*(((UINT16 *)dc_framebuffer_ram) + (WORD2_XOR_LE(addrp) >> 1));
c=*(((UINT16 *)state->dc_framebuffer_ram) + (WORD2_XOR_LE(addrp) >> 1));
b = (c & 0x001f) << 3;
g = (c & 0x03e0) >> 2;
@ -2303,7 +2284,7 @@ static void pvr_drawframebuffer(running_machine &machine,bitmap_t *bitmap,const
for (x=0;x < xi;x++)
{
fbaddr=BITMAP_ADDR32(bitmap,y,x*2+0);
c=*(((UINT16 *)dc_framebuffer_ram) + (WORD2_XOR_LE(addrp) >> 1));
c=*(((UINT16 *)state->dc_framebuffer_ram) + (WORD2_XOR_LE(addrp) >> 1));
b = (c & 0x001f) << 3;
g = (c & 0x07e0) >> 3;
@ -2325,7 +2306,7 @@ static void pvr_drawframebuffer(running_machine &machine,bitmap_t *bitmap,const
for (x=0;x < xi;x++)
{
fbaddr=BITMAP_ADDR32(bitmap,y,x);
c=*(((UINT16 *)dc_framebuffer_ram) + (WORD2_XOR_LE(addrp) >> 1));
c=*(((UINT16 *)state->dc_framebuffer_ram) + (WORD2_XOR_LE(addrp) >> 1));
b = (c & 0x001f) << 3;
g = (c & 0x07e0) >> 3;
@ -2348,7 +2329,7 @@ static void pvr_drawframebuffer(running_machine &machine,bitmap_t *bitmap,const
for (x=0;x < xi;x++)
{
fbaddr=BITMAP_ADDR32(bitmap,y,x*2+0);
c=*(((UINT16 *)dc_framebuffer_ram) + (WORD2_XOR_LE(addrp) >> 1));
c=*(((UINT16 *)state->dc_framebuffer_ram) + (WORD2_XOR_LE(addrp) >> 1));
b = (c & 0x001f) << 3;
g = (c & 0x07e0) >> 3;
@ -2369,7 +2350,7 @@ static void pvr_drawframebuffer(running_machine &machine,bitmap_t *bitmap,const
for (x=0;x < xi;x++)
{
fbaddr=BITMAP_ADDR32(bitmap,y,x);
c=*(((UINT16 *)dc_framebuffer_ram) + (WORD2_XOR_LE(addrp) >> 1));
c=*(((UINT16 *)state->dc_framebuffer_ram) + (WORD2_XOR_LE(addrp) >> 1));
b = (c & 0x001f) << 3;
g = (c & 0x07e0) >> 3;
@ -2392,7 +2373,7 @@ static void pvr_drawframebuffer(running_machine &machine,bitmap_t *bitmap,const
for (x=0;x < xi;x++)
{
fbaddr=BITMAP_ADDR32(bitmap,y,x*2+0);
c=*(((UINT16 *)dc_framebuffer_ram) + (WORD2_XOR_LE(addrp) >> 1));
c=*(((UINT16 *)state->dc_framebuffer_ram) + (WORD2_XOR_LE(addrp) >> 1));
b = (c & 0x001f) << 3;
g = (c & 0x07e0) >> 3;
@ -2413,7 +2394,7 @@ static void pvr_drawframebuffer(running_machine &machine,bitmap_t *bitmap,const
for (x=0;x < xi;x++)
{
fbaddr=BITMAP_ADDR32(bitmap,y,x);
c=*(((UINT16 *)dc_framebuffer_ram) + (WORD2_XOR_LE(addrp) >> 1));
c=*(((UINT16 *)state->dc_framebuffer_ram) + (WORD2_XOR_LE(addrp) >> 1));
b = (c & 0x001f) << 3;
g = (c & 0x07e0) >> 3;
@ -2524,20 +2505,20 @@ static TIMER_CALLBACK(vbin)
{
dc_state *state = machine.driver_data<dc_state>();
dc_sysctrl_regs[SB_ISTNRM] |= IST_VBL_IN; // V Blank-in interrupt
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_VBL_IN; // V Blank-in interrupt
dc_update_interrupt_status(machine);
vbin_timer->adjust(machine.primary_screen->time_until_pos(spg_vblank_in_irq_line_num));
state->vbin_timer->adjust(machine.primary_screen->time_until_pos(spg_vblank_in_irq_line_num));
}
static TIMER_CALLBACK(vbout)
{
dc_state *state = machine.driver_data<dc_state>();
dc_sysctrl_regs[SB_ISTNRM] |= IST_VBL_OUT; // V Blank-out interrupt
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_VBL_OUT; // V Blank-out interrupt
dc_update_interrupt_status(machine);
vbout_timer->adjust(machine.primary_screen->time_until_pos(spg_vblank_out_irq_line_num));
state->vbout_timer->adjust(machine.primary_screen->time_until_pos(spg_vblank_out_irq_line_num));
}
static TIMER_CALLBACK(hbin)
@ -2546,57 +2527,60 @@ static TIMER_CALLBACK(hbin)
if(spg_hblank_int_mode & 1)
{
if(scanline == next_y)
if(state->scanline == state->next_y)
{
dc_sysctrl_regs[SB_ISTNRM] |= IST_HBL_IN; // H Blank-in interrupt
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_HBL_IN; // H Blank-in interrupt
dc_update_interrupt_status(machine);
next_y+=spg_line_comp_val;
state->next_y+=spg_line_comp_val;
}
}
else if((scanline == spg_line_comp_val) || (spg_hblank_int_mode & 2))
else if((state->scanline == spg_line_comp_val) || (spg_hblank_int_mode & 2))
{
dc_sysctrl_regs[SB_ISTNRM] |= IST_HBL_IN; // H Blank-in interrupt
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_HBL_IN; // H Blank-in interrupt
dc_update_interrupt_status(machine);
}
// printf("hbin on scanline %d\n",scanline);
// printf("hbin on state->scanline %d\n",state->scanline);
scanline++;
state->scanline++;
if(scanline >= spg_vblank_in_irq_line_num)
if(state->scanline >= spg_vblank_in_irq_line_num)
{
scanline = 0;
next_y = spg_line_comp_val;
state->scanline = 0;
state->next_y = spg_line_comp_val;
}
hbin_timer->adjust(machine.primary_screen->time_until_pos(scanline, spg_hblank_in_irq-1));
state->hbin_timer->adjust(machine.primary_screen->time_until_pos(state->scanline, spg_hblank_in_irq-1));
}
static TIMER_CALLBACK(endofrender_video)
{
dc_sysctrl_regs[SB_ISTNRM] |= IST_EOR_VIDEO;// VIDEO end of render
dc_state *state = machine.driver_data<dc_state>();
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_EOR_VIDEO;// VIDEO end of render
dc_update_interrupt_status(machine);
endofrender_timer_video->adjust(attotime::never);
state->endofrender_timer_video->adjust(attotime::never);
}
static TIMER_CALLBACK(endofrender_tsp)
{
dc_sysctrl_regs[SB_ISTNRM] |= IST_EOR_TSP; // TSP end of render
dc_state *state = machine.driver_data<dc_state>();
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_EOR_TSP; // TSP end of render
dc_update_interrupt_status(machine);
endofrender_timer_tsp->adjust(attotime::never);
endofrender_timer_video->adjust(attotime::from_usec(500) );
state->endofrender_timer_tsp->adjust(attotime::never);
state->endofrender_timer_video->adjust(attotime::from_usec(500) );
}
static TIMER_CALLBACK(endofrender_isp)
{
dc_sysctrl_regs[SB_ISTNRM] |= IST_EOR_ISP; // ISP end of render
dc_state *state = machine.driver_data<dc_state>();
state->dc_sysctrl_regs[SB_ISTNRM] |= IST_EOR_ISP; // ISP end of render
dc_update_interrupt_status(machine);
endofrender_timer_isp->adjust(attotime::never);
endofrender_timer_tsp->adjust(attotime::from_usec(500) );
state->endofrender_timer_isp->adjust(attotime::never);
state->endofrender_timer_tsp->adjust(attotime::from_usec(500) );
}
@ -2604,7 +2588,7 @@ VIDEO_START(dc)
{
dc_state *state = machine.driver_data<dc_state>();
memset(pvrctrl_regs, 0, sizeof(pvrctrl_regs));
memset(state->pvrctrl_regs, 0, sizeof(state->pvrctrl_regs));
memset(state->pvrta_regs, 0, sizeof(state->pvrta_regs));
memset(state_ta.grab, 0, sizeof(state_ta.grab));
pvr_build_parameterconfig();
@ -2633,25 +2617,25 @@ VIDEO_START(dc)
computedilated();
vbout_timer = machine.scheduler().timer_alloc(FUNC(vbout));
vbout_timer->adjust(machine.primary_screen->time_until_pos(spg_vblank_out_irq_line_num));
state->vbout_timer = machine.scheduler().timer_alloc(FUNC(vbout));
state->vbout_timer->adjust(machine.primary_screen->time_until_pos(spg_vblank_out_irq_line_num));
vbin_timer = machine.scheduler().timer_alloc(FUNC(vbin));
vbin_timer->adjust(machine.primary_screen->time_until_pos(spg_vblank_in_irq_line_num));
state->vbin_timer = machine.scheduler().timer_alloc(FUNC(vbin));
state->vbin_timer->adjust(machine.primary_screen->time_until_pos(spg_vblank_in_irq_line_num));
hbin_timer = machine.scheduler().timer_alloc(FUNC(hbin));
hbin_timer->adjust(machine.primary_screen->time_until_pos(0, spg_hblank_in_irq-1));
state->hbin_timer = machine.scheduler().timer_alloc(FUNC(hbin));
state->hbin_timer->adjust(machine.primary_screen->time_until_pos(0, spg_hblank_in_irq-1));
scanline = 0;
next_y = 0;
state->scanline = 0;
state->next_y = 0;
endofrender_timer_isp = machine.scheduler().timer_alloc(FUNC(endofrender_isp));
endofrender_timer_tsp = machine.scheduler().timer_alloc(FUNC(endofrender_tsp));
endofrender_timer_video = machine.scheduler().timer_alloc(FUNC(endofrender_video));
state->endofrender_timer_isp = machine.scheduler().timer_alloc(FUNC(endofrender_isp));
state->endofrender_timer_tsp = machine.scheduler().timer_alloc(FUNC(endofrender_tsp));
state->endofrender_timer_video = machine.scheduler().timer_alloc(FUNC(endofrender_video));
endofrender_timer_isp->adjust(attotime::never);
endofrender_timer_tsp->adjust(attotime::never);
endofrender_timer_video->adjust(attotime::never);
state->endofrender_timer_isp->adjust(attotime::never);
state->endofrender_timer_tsp->adjust(attotime::never);
state->endofrender_timer_video->adjust(attotime::never);
fake_accumulationbuffer_bitmap = auto_bitmap_alloc(machine,1024,1024,BITMAP_FORMAT_RGB32);
@ -2701,7 +2685,7 @@ SCREEN_UPDATE(dc)
pvr_drawframebuffer(screen->machine(),bitmap,cliprect);
// update this here so we only do string lookup once per frame
debug_dip_status = input_port_read(screen->machine(), "MAMEDEBUG");
state->debug_dip_status = input_port_read(screen->machine(), "MAMEDEBUG");
return 0;
}