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(MESS) victor9k: Floppy WIP. (nw)

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This commit is contained in:
Curt Coder 2014-11-06 12:29:54 +02:00
parent bb1cb94670
commit e2ccd784ba
2 changed files with 15 additions and 5 deletions
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2
src/mess/drivers/victor9k.c
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@ -511,7 +511,7 @@ static MACHINE_CONFIG_START( victor9k, victor9k_state )
MCFG_DEVICE_ADD(FDC_TAG, VICTOR_9000_FDC, 0) MCFG_DEVICE_ADD(FDC_TAG, VICTOR_9000_FDC, 0)
MCFG_VICTOR_9000_FDC_IRQ_CB(WRITELINE(victor9k_state, fdc_irq_w)) MCFG_VICTOR_9000_FDC_IRQ_CB(WRITELINE(victor9k_state, fdc_irq_w))
MCFG_VICTOR_9000_FDC_SYN_CB(DEVWRITELINE(I8259A_TAG, pic8259_device, ir0_w)) MCFG_DEVCB_XOR(1) MCFG_VICTOR_9000_FDC_SYN_CB(DEVWRITELINE(I8259A_TAG, pic8259_device, ir0_w)) MCFG_DEVCB_XOR(1)
MCFG_VICTOR_9000_FDC_LBRDY_CB(INPUTLINE(I8088_TAG, INPUT_LINE_TEST)) MCFG_VICTOR_9000_FDC_LBRDY_CB(INPUTLINE(I8088_TAG, INPUT_LINE_TEST)) MCFG_DEVCB_XOR(1)
// internal ram // internal ram
MCFG_RAM_ADD(RAM_TAG) MCFG_RAM_ADD(RAM_TAG)

18
src/mess/machine/victor9k_fdc.c
View File

@ -13,7 +13,7 @@
TODO: TODO:
- disk error 8 (sync missing?) - disk error 2 (cannot find block header?)
- 8048 spindle speed control - 8048 spindle speed control
- read PLL - read PLL
- write logic - write logic
@ -28,8 +28,8 @@
// MACROS / CONSTANTS // MACROS / CONSTANTS
//************************************************************************** //**************************************************************************
#define LOG 1 #define LOG 0
#define LOG_VIA 1 #define LOG_VIA 0
#define LOG_SCP 0 #define LOG_SCP 0
#define I8048_TAG "5d" #define I8048_TAG "5d"
@ -211,7 +211,7 @@ victor_9000_fdc_t::victor_9000_fdc_t(const machine_config &mconfig, const char *
m_via6_irq(CLEAR_LINE), m_via6_irq(CLEAR_LINE),
m_syn(0), m_syn(0),
m_lbrdy(1), m_lbrdy(1),
m_period(attotime::from_nsec(21300)) m_period(attotime::from_nsec(2130))
{ {
cur_live.tm = attotime::never; cur_live.tm = attotime::never;
cur_live.state = IDLE; cur_live.state = IDLE;
@ -1103,6 +1103,8 @@ void victor_9000_fdc_t::live_run(const attotime &limit)
// syn // syn
int syn = !(cur_live.sync_byte_counter == 15); int syn = !(cur_live.sync_byte_counter == 15);
if (LOG) logerror("%s bit %u sync %u bc %u sbc %u sBC %u syn %u\n",cur_live.tm.as_string(),bit,sync,cur_live.bit_counter,cur_live.sync_bit_counter,cur_live.sync_byte_counter,syn);
// GCR decoder // GCR decoder
if (cur_live.drw) { if (cur_live.drw) {
cur_live.i = cur_live.drw << 10 | cur_live.shift_reg; cur_live.i = cur_live.drw << 10 | cur_live.shift_reg;
@ -1120,6 +1122,14 @@ void victor_9000_fdc_t::live_run(const attotime &limit)
if (brdy != cur_live.brdy) { if (brdy != cur_live.brdy) {
if (LOG) logerror("%s BRDY %u\n", cur_live.tm.as_string(),brdy); if (LOG) logerror("%s BRDY %u\n", cur_live.tm.as_string(),brdy);
if (LOG && !brdy)
{
UINT8 e = cur_live.e;
UINT8 i = cur_live.i;
UINT8 data = BIT(e, 6) << 7 | BIT(i, 7) << 6 | BIT(e, 5) << 5 | BIT(e, 4) << 4 | BIT(e, 2) << 3 | BIT(i, 1) << 2 | (e & 0x03);
logerror("%s BRDY %02x\n",cur_live.tm.as_string(),data);
}
cur_live.brdy = brdy; cur_live.brdy = brdy;
if (!brdy) cur_live.lbrdy = 0; if (!brdy) cur_live.lbrdy = 0;
syncpoint = true; syncpoint = true;