mirror of
https://github.com/holub/mame
synced 2025-07-04 09:28:51 +03:00
new working machines
-------------------------- Triumph-Adler Alphatronic P10 [rfka01] Triumph-Adler Alphatronic P50 [rfka01, Carl]
This commit is contained in:
parent
288b397098
commit
e2ed5d1008
@ -125,14 +125,14 @@ i80188_cpu_device::i80188_cpu_device(const machine_config &mconfig, const char *
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: i80186_cpu_device(mconfig, I80188, tag, owner, clock, 8)
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: i80186_cpu_device(mconfig, I80188, tag, owner, clock, 8)
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{
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{
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memcpy(m_timing, m_i80186_timing, sizeof(m_i80186_timing));
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memcpy(m_timing, m_i80186_timing, sizeof(m_i80186_timing));
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set_irq_acknowledge_callback(*this, FUNC(i80186_cpu_device::int_callback));
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set_irq_acknowledge_callback(*this, FUNC(i80186_cpu_device::inta_callback));
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}
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}
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i80186_cpu_device::i80186_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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i80186_cpu_device::i80186_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: i80186_cpu_device(mconfig, I80186, tag, owner, clock, 16)
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: i80186_cpu_device(mconfig, I80186, tag, owner, clock, 16)
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{
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{
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memcpy(m_timing, m_i80186_timing, sizeof(m_i80186_timing));
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memcpy(m_timing, m_i80186_timing, sizeof(m_i80186_timing));
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set_irq_acknowledge_callback(*this, FUNC(i80186_cpu_device::int_callback));
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set_irq_acknowledge_callback(*this, FUNC(i80186_cpu_device::inta_callback));
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}
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}
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i80186_cpu_device::i80186_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int data_bus_size)
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i80186_cpu_device::i80186_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int data_bus_size)
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@ -144,6 +144,8 @@ i80186_cpu_device::i80186_cpu_device(const machine_config &mconfig, device_type
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, m_out_chip_select_func(*this)
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, m_out_chip_select_func(*this)
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, m_out_tmrout0_func(*this)
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, m_out_tmrout0_func(*this)
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, m_out_tmrout1_func(*this)
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, m_out_tmrout1_func(*this)
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, m_irmx_irq_cb(*this)
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, m_irmx_irq_ack(*this)
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{
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{
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}
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}
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@ -618,7 +620,7 @@ void i80186_cpu_device::device_start()
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state_add( I80186_REQST, "REQST", m_intr.request ).formatstr("%04X");
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state_add( I80186_REQST, "REQST", m_intr.request ).formatstr("%04X");
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state_add( I80186_PRIMSK, "PRIMSK", m_intr.priority_mask ).formatstr("%04X");
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state_add( I80186_PRIMSK, "PRIMSK", m_intr.priority_mask ).formatstr("%04X");
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state_add( I80186_INTSTS, "INTSTS", m_intr.status ).formatstr("%04X");
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state_add( I80186_INTSTS, "INTSTS", m_intr.status ).formatstr("%04X");
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state_add( I80186_TCUCON, "TCUCON", m_intr.timer ).formatstr("%04X");
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state_add( I80186_TCUCON, "TCUCON", m_intr.timer[0] ).formatstr("%04X");
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state_add( I80186_DMA0CON, "DMA0CON", m_intr.dma[0] ).formatstr("%04X");
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state_add( I80186_DMA0CON, "DMA0CON", m_intr.dma[0] ).formatstr("%04X");
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state_add( I80186_DMA1CON, "DMA1CON", m_intr.dma[1] ).formatstr("%04X");
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state_add( I80186_DMA1CON, "DMA1CON", m_intr.dma[1] ).formatstr("%04X");
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state_add( I80186_I0CON, "I0CON", m_intr.ext[0] ).formatstr("%04X");
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state_add( I80186_I0CON, "I0CON", m_intr.ext[0] ).formatstr("%04X");
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@ -649,6 +651,7 @@ void i80186_cpu_device::device_start()
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save_item(NAME(m_dma[1].dest));
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save_item(NAME(m_dma[1].dest));
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save_item(NAME(m_dma[1].count));
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save_item(NAME(m_dma[1].count));
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save_item(NAME(m_dma[1].control));
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save_item(NAME(m_dma[1].control));
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save_item(NAME(m_intr.vector));
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save_item(NAME(m_intr.pending));
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save_item(NAME(m_intr.pending));
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save_item(NAME(m_intr.ack_mask));
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save_item(NAME(m_intr.ack_mask));
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save_item(NAME(m_intr.priority_mask));
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save_item(NAME(m_intr.priority_mask));
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@ -683,6 +686,8 @@ void i80186_cpu_device::device_start()
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m_out_tmrout1_func.resolve_safe();
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m_out_tmrout1_func.resolve_safe();
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m_read_slave_ack_func.resolve_safe(0);
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m_read_slave_ack_func.resolve_safe(0);
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m_out_chip_select_func.resolve_safe();
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m_out_chip_select_func.resolve_safe();
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m_irmx_irq_cb.resolve_safe();
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m_irmx_irq_ack.resolve();
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}
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}
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void i80186_cpu_device::device_reset()
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void i80186_cpu_device::device_reset()
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@ -690,7 +695,9 @@ void i80186_cpu_device::device_reset()
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i8086_common_cpu_device::device_reset();
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i8086_common_cpu_device::device_reset();
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/* reset the interrupt state */
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/* reset the interrupt state */
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m_intr.priority_mask = 0x0007;
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m_intr.priority_mask = 0x0007;
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m_intr.timer = 0x000f;
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m_intr.timer[0] = 0x000f;
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m_intr.timer[1] = 0x000f;
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m_intr.timer[2] = 0x000f;
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m_intr.dma[0] = 0x000f;
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m_intr.dma[0] = 0x000f;
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m_intr.dma[1] = 0x000f;
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m_intr.dma[1] = 0x000f;
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m_intr.ext[0] = 0x000f;
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m_intr.ext[0] = 0x000f;
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@ -841,6 +848,17 @@ void i80186_cpu_device::write_word(uint32_t addr, uint16_t data)
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* 80186 interrupt controller
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* 80186 interrupt controller
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*
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*
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*************************************/
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*************************************/
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IRQ_CALLBACK_MEMBER(i80186_cpu_device::inta_callback)
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{
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if (BIT(m_reloc, 14))
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{
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if (!m_irmx_irq_ack.isnull())
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return m_irmx_irq_ack(device, irqline);
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return 0;
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}
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return int_callback(device, irqline);
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}
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IRQ_CALLBACK_MEMBER(i80186_cpu_device::int_callback)
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IRQ_CALLBACK_MEMBER(i80186_cpu_device::int_callback)
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{
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{
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uint8_t vector;
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uint8_t vector;
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@ -879,6 +897,8 @@ IRQ_CALLBACK_MEMBER(i80186_cpu_device::int_callback)
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if((LOG_INTERRUPTS) && (m_intr.in_service!=old))
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if((LOG_INTERRUPTS) && (m_intr.in_service!=old))
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logerror("intr.in_service changed from %02X to %02X\n",old,m_intr.in_service);
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logerror("intr.in_service changed from %02X to %02X\n",old,m_intr.in_service);
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if (!BIT(m_reloc, 14))
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{
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if (m_intr.ack_mask == 0x0001)
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if (m_intr.ack_mask == 0x0001)
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{
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{
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switch (m_intr.poll_status & 0x1f)
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switch (m_intr.poll_status & 0x1f)
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@ -888,10 +908,6 @@ IRQ_CALLBACK_MEMBER(i80186_cpu_device::int_callback)
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case 0x13: m_intr.status &= ~0x04; break;
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case 0x13: m_intr.status &= ~0x04; break;
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}
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}
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}
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}
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m_intr.ack_mask = 0;
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/* a request no longer pending */
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m_intr.poll_status &= ~0x8000;
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/* return the vector */
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/* return the vector */
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switch(m_intr.poll_status & 0x1F)
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switch(m_intr.poll_status & 0x1F)
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@ -901,6 +917,24 @@ IRQ_CALLBACK_MEMBER(i80186_cpu_device::int_callback)
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default:
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default:
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vector = m_intr.poll_status & 0x1f; break;
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vector = m_intr.poll_status & 0x1f; break;
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}
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}
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}
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else
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{
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if (m_intr.ack_mask & 0x31)
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{
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if (m_intr.ack_mask & 1)
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m_intr.status &= ~0x01;
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else if(m_intr.ack_mask & 0x10)
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m_intr.status &= ~0x02;
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else if(m_intr.ack_mask & 0x20)
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m_intr.status &= ~0x04;
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}
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vector = m_intr.poll_status & 0xff;
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}
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m_intr.ack_mask = 0;
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/* a request no longer pending */
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m_intr.poll_status &= ~0x8000;
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if (LOG_INTERRUPTS)
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if (LOG_INTERRUPTS)
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{
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{
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@ -925,7 +959,31 @@ void i80186_cpu_device::update_interrupt_state()
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for (Priority = 0; Priority <= m_intr.priority_mask; Priority++)
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for (Priority = 0; Priority <= m_intr.priority_mask; Priority++)
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{
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{
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/* note: by checking 4 bits, we also verify that the mask is off */
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/* note: by checking 4 bits, we also verify that the mask is off */
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if ((m_intr.timer & 0x0F) == Priority)
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if (BIT(m_reloc, 14))
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{
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for (IntNo = 0; IntNo < 3; IntNo++)
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{
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if ((m_intr.timer[IntNo] & 0x0F) == Priority)
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{
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int irq = (1 << IntNo);
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/* if we're already servicing something at this level, don't generate anything new */
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if (m_intr.in_service & 0x01)
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return;
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/* if there's something pending, generate an interrupt */
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if (m_intr.status & irq)
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{
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new_vector = m_intr.vector | Priority;
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/* set the clear mask and generate the int */
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m_intr.ack_mask = IntNo ? (8 << IntNo) : 1;
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goto generate_int;
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}
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}
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}
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}
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else
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{
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if ((m_intr.timer[0] & 0x0F) == Priority)
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{
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{
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/* if we're already servicing something at this level, don't generate anything new */
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/* if we're already servicing something at this level, don't generate anything new */
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if (m_intr.in_service & 0x01)
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if (m_intr.in_service & 0x01)
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@ -948,6 +1006,7 @@ void i80186_cpu_device::update_interrupt_state()
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goto generate_int;
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goto generate_int;
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}
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}
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}
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}
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}
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/* check DMA interrupts */
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/* check DMA interrupts */
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for (IntNo = 0; IntNo < 2; IntNo++)
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for (IntNo = 0; IntNo < 2; IntNo++)
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@ -960,6 +1019,9 @@ void i80186_cpu_device::update_interrupt_state()
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/* if there's something pending, generate an interrupt */
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/* if there's something pending, generate an interrupt */
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if (m_intr.request & (0x04 << IntNo))
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if (m_intr.request & (0x04 << IntNo))
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{
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{
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if (BIT(m_reloc, 14))
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new_vector = m_intr.vector | Priority;
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else
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new_vector = 0x0a + IntNo;
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new_vector = 0x0a + IntNo;
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/* set the clear mask and generate the int */
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/* set the clear mask and generate the int */
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@ -968,6 +1030,9 @@ void i80186_cpu_device::update_interrupt_state()
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}
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}
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}
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}
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if (BIT(m_reloc, 14))
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continue;
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/* check external interrupts */
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/* check external interrupts */
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for (IntNo = 0; IntNo < 4; IntNo++)
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for (IntNo = 0; IntNo < 4; IntNo++)
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{
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{
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@ -1002,14 +1067,22 @@ void i80186_cpu_device::update_interrupt_state()
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}
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}
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}
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}
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m_intr.pending = 0;
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m_intr.pending = 0;
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if (!BIT(m_reloc, 14))
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set_input_line(0, CLEAR_LINE);
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set_input_line(0, CLEAR_LINE);
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else
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m_irmx_irq_cb(CLEAR_LINE);
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return;
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return;
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generate_int:
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generate_int:
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/* generate the appropriate interrupt */
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/* generate the appropriate interrupt */
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m_intr.poll_status = 0x8000 | new_vector;
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m_intr.poll_status = 0x8000 | new_vector;
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if (!m_intr.pending)
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if (!m_intr.pending)
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{
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if (!BIT(m_reloc, 14))
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set_input_line(0, ASSERT_LINE);
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set_input_line(0, ASSERT_LINE);
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else
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m_irmx_irq_cb(ASSERT_LINE);
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}
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m_intr.pending = 1;
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m_intr.pending = 1;
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if (LOG_INTERRUPTS) logerror("(%f) **** Requesting interrupt vector %02X\n", machine().time().as_double(), new_vector);
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if (LOG_INTERRUPTS) logerror("(%f) **** Requesting interrupt vector %02X\n", machine().time().as_double(), new_vector);
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}
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}
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@ -1048,12 +1121,28 @@ void i80186_cpu_device::handle_eoi(int data)
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for (Priority = 0; ((Priority <= 7) && !handled); Priority++)
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for (Priority = 0; ((Priority <= 7) && !handled); Priority++)
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{
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{
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/* check for in-service timers */
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/* check for in-service timers */
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if ((m_intr.timer & 0x07) == Priority && (m_intr.in_service & 0x01))
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if (BIT(m_reloc, 14))
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{
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for (IntNo = 0; ((IntNo < 2) && !handled) ; IntNo++)
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{
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int mask = IntNo ? (8 << IntNo) : 1;
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if ((m_intr.timer[IntNo] & 0x07) == Priority && (m_intr.in_service & mask))
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{
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m_intr.in_service &= ~mask;
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if (LOG_INTERRUPTS) logerror("(%f) **** Got EOI for timer%d\n", machine().time().as_double(), IntNo);
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handled=1;
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}
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}
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}
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else
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{
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if ((m_intr.timer[0] & 0x07) == Priority && (m_intr.in_service & 0x01))
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{
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{
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m_intr.in_service &= ~0x01;
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m_intr.in_service &= ~0x01;
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if (LOG_INTERRUPTS) logerror("(%f) **** Got EOI for timer\n", machine().time().as_double());
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if (LOG_INTERRUPTS) logerror("(%f) **** Got EOI for timer\n", machine().time().as_double());
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handled=1;
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handled=1;
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}
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}
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}
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/* check for in-service DMA interrupts */
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/* check for in-service DMA interrupts */
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for (IntNo = 0; ((IntNo < 2) && !handled) ; IntNo++)
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for (IntNo = 0; ((IntNo < 2) && !handled) ; IntNo++)
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@ -1064,6 +1153,9 @@ void i80186_cpu_device::handle_eoi(int data)
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handled=1;
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handled=1;
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}
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}
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if (BIT(m_reloc, 14))
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continue;
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/* check external interrupts */
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/* check external interrupts */
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for (IntNo = 0; ((IntNo < 4) && !handled) ; IntNo++)
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for (IntNo = 0; ((IntNo < 4) && !handled) ; IntNo++)
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if ((m_intr.ext[IntNo] & 0x07) == Priority && (m_intr.in_service & (0x10 << IntNo)))
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if ((m_intr.ext[IntNo] & 0x07) == Priority && (m_intr.in_service & (0x10 << IntNo)))
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@ -1080,6 +1172,17 @@ void i80186_cpu_device::handle_eoi(int data)
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/* Trigger an external interrupt, optionally supplying the vector to take */
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/* Trigger an external interrupt, optionally supplying the vector to take */
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void i80186_cpu_device::external_int(uint16_t intno, int state)
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void i80186_cpu_device::external_int(uint16_t intno, int state)
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{
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{
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if (BIT(m_reloc, 14))
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{
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if (!intno)
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{
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set_input_line(0, state);
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return;
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}
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logerror("irq to line %d in irmx mode\n",intno);
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return;
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}
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if (!(m_intr.ext_state & (1 << intno)) == !state)
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if (!(m_intr.ext_state & (1 << intno)) == !state)
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return;
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return;
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@ -1453,6 +1556,10 @@ READ16_MEMBER(i80186_cpu_device::internal_port_r)
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switch (offset)
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switch (offset)
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{
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{
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case 0x10:
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if (LOG_PORTS) logerror("%05X:read interrupt vector\n", m_pc);
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return m_intr.vector;
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case 0x11:
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case 0x11:
|
||||||
if (LOG_PORTS) logerror("%05X:ERROR - read from 80186 EOI\n", m_pc);
|
if (LOG_PORTS) logerror("%05X:ERROR - read from 80186 EOI\n", m_pc);
|
||||||
break;
|
break;
|
||||||
@ -1460,7 +1567,7 @@ READ16_MEMBER(i80186_cpu_device::internal_port_r)
|
|||||||
case 0x12:
|
case 0x12:
|
||||||
if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll\n", m_pc);
|
if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll\n", m_pc);
|
||||||
if (m_intr.poll_status & 0x8000)
|
if (m_intr.poll_status & 0x8000)
|
||||||
int_callback(*this, 0);
|
inta_callback(*this, 0);
|
||||||
return m_intr.poll_status;
|
return m_intr.poll_status;
|
||||||
|
|
||||||
case 0x13:
|
case 0x13:
|
||||||
@ -1469,13 +1576,21 @@ READ16_MEMBER(i80186_cpu_device::internal_port_r)
|
|||||||
|
|
||||||
case 0x14:
|
case 0x14:
|
||||||
if (LOG_PORTS) logerror("%05X:read 80186 interrupt mask\n", m_pc);
|
if (LOG_PORTS) logerror("%05X:read 80186 interrupt mask\n", m_pc);
|
||||||
temp = (m_intr.timer >> 3) & 0x01;
|
temp = (m_intr.timer[0] >> 3) & 0x01;
|
||||||
temp |= (m_intr.dma[0] >> 1) & 0x04;
|
temp |= (m_intr.dma[0] >> 1) & 0x04;
|
||||||
temp |= (m_intr.dma[1] >> 0) & 0x08;
|
temp |= (m_intr.dma[1] >> 0) & 0x08;
|
||||||
|
if (BIT(m_reloc, 14))
|
||||||
|
{
|
||||||
|
temp |= (m_intr.timer[1] << 1) & 0x10;
|
||||||
|
temp |= (m_intr.timer[2] << 2) & 0x20;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
temp |= (m_intr.ext[0] << 1) & 0x10;
|
temp |= (m_intr.ext[0] << 1) & 0x10;
|
||||||
temp |= (m_intr.ext[1] << 2) & 0x20;
|
temp |= (m_intr.ext[1] << 2) & 0x20;
|
||||||
temp |= (m_intr.ext[2] << 3) & 0x40;
|
temp |= (m_intr.ext[2] << 3) & 0x40;
|
||||||
temp |= (m_intr.ext[3] << 4) & 0x80;
|
temp |= (m_intr.ext[3] << 4) & 0x80;
|
||||||
|
}
|
||||||
return temp;
|
return temp;
|
||||||
|
|
||||||
case 0x15:
|
case 0x15:
|
||||||
@ -1499,7 +1614,7 @@ READ16_MEMBER(i80186_cpu_device::internal_port_r)
|
|||||||
|
|
||||||
case 0x19:
|
case 0x19:
|
||||||
if (LOG_PORTS) logerror("%05X:read 80186 timer interrupt control\n", m_pc);
|
if (LOG_PORTS) logerror("%05X:read 80186 timer interrupt control\n", m_pc);
|
||||||
return m_intr.timer;
|
return m_intr.timer[0];
|
||||||
|
|
||||||
case 0x1a:
|
case 0x1a:
|
||||||
if (LOG_PORTS) logerror("%05X:read 80186 DMA 0 interrupt control\n", m_pc);
|
if (LOG_PORTS) logerror("%05X:read 80186 DMA 0 interrupt control\n", m_pc);
|
||||||
@ -1511,18 +1626,30 @@ READ16_MEMBER(i80186_cpu_device::internal_port_r)
|
|||||||
|
|
||||||
case 0x1c:
|
case 0x1c:
|
||||||
if (LOG_PORTS) logerror("%05X:read 80186 INT 0 interrupt control\n", m_pc);
|
if (LOG_PORTS) logerror("%05X:read 80186 INT 0 interrupt control\n", m_pc);
|
||||||
|
if (BIT(m_reloc, 14))
|
||||||
|
return m_intr.timer[1];
|
||||||
|
else
|
||||||
return m_intr.ext[0];
|
return m_intr.ext[0];
|
||||||
|
|
||||||
case 0x1d:
|
case 0x1d:
|
||||||
if (LOG_PORTS) logerror("%05X:read 80186 INT 1 interrupt control\n", m_pc);
|
if (LOG_PORTS) logerror("%05X:read 80186 INT 1 interrupt control\n", m_pc);
|
||||||
|
if (BIT(m_reloc, 14))
|
||||||
|
return m_intr.timer[2];
|
||||||
|
else
|
||||||
return m_intr.ext[1];
|
return m_intr.ext[1];
|
||||||
|
|
||||||
case 0x1e:
|
case 0x1e:
|
||||||
if (LOG_PORTS) logerror("%05X:read 80186 INT 2 interrupt control\n", m_pc);
|
if (LOG_PORTS) logerror("%05X:read 80186 INT 2 interrupt control\n", m_pc);
|
||||||
|
if (BIT(m_reloc, 14))
|
||||||
|
return 0;
|
||||||
|
else
|
||||||
return m_intr.ext[2];
|
return m_intr.ext[2];
|
||||||
|
|
||||||
case 0x1f:
|
case 0x1f:
|
||||||
if (LOG_PORTS) logerror("%05X:read 80186 INT 3 interrupt control\n", m_pc);
|
if (LOG_PORTS) logerror("%05X:read 80186 INT 3 interrupt control\n", m_pc);
|
||||||
|
if (BIT(m_reloc, 14))
|
||||||
|
return 0;
|
||||||
|
else
|
||||||
return m_intr.ext[3];
|
return m_intr.ext[3];
|
||||||
|
|
||||||
case 0x28:
|
case 0x28:
|
||||||
@ -1633,6 +1760,11 @@ WRITE16_MEMBER(i80186_cpu_device::internal_port_w)
|
|||||||
|
|
||||||
switch (offset)
|
switch (offset)
|
||||||
{
|
{
|
||||||
|
case 0x10:
|
||||||
|
if (LOG_PORTS) logerror("%05X:write interrupt vector = %04X\n", m_pc, data);
|
||||||
|
m_intr.vector = data & 0xf8;
|
||||||
|
break;
|
||||||
|
|
||||||
case 0x11:
|
case 0x11:
|
||||||
if (LOG_PORTS) logerror("%05X:80186 EOI = %04X\n", m_pc, data);
|
if (LOG_PORTS) logerror("%05X:80186 EOI = %04X\n", m_pc, data);
|
||||||
handle_eoi(data);
|
handle_eoi(data);
|
||||||
@ -1649,13 +1781,21 @@ WRITE16_MEMBER(i80186_cpu_device::internal_port_w)
|
|||||||
|
|
||||||
case 0x14:
|
case 0x14:
|
||||||
if (LOG_PORTS) logerror("%05X:80186 interrupt mask = %04X\n", m_pc, data);
|
if (LOG_PORTS) logerror("%05X:80186 interrupt mask = %04X\n", m_pc, data);
|
||||||
m_intr.timer = (m_intr.timer & ~0x08) | ((data << 3) & 0x08);
|
m_intr.timer[0] = (m_intr.timer[0] & ~0x08) | ((data << 3) & 0x08);
|
||||||
m_intr.dma[0] = (m_intr.dma[0] & ~0x08) | ((data << 1) & 0x08);
|
m_intr.dma[0] = (m_intr.dma[0] & ~0x08) | ((data << 1) & 0x08);
|
||||||
m_intr.dma[1] = (m_intr.dma[1] & ~0x08) | ((data << 0) & 0x08);
|
m_intr.dma[1] = (m_intr.dma[1] & ~0x08) | ((data << 0) & 0x08);
|
||||||
|
if (BIT(m_reloc, 14))
|
||||||
|
{
|
||||||
|
m_intr.timer[1] = (m_intr.timer[1] & ~0x08) | ((data >> 1) & 0x08);
|
||||||
|
m_intr.timer[2] = (m_intr.timer[2] & ~0x08) | ((data >> 2) & 0x08);
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
m_intr.ext[0] = (m_intr.ext[0] & ~0x08) | ((data >> 1) & 0x08);
|
m_intr.ext[0] = (m_intr.ext[0] & ~0x08) | ((data >> 1) & 0x08);
|
||||||
m_intr.ext[1] = (m_intr.ext[1] & ~0x08) | ((data >> 2) & 0x08);
|
m_intr.ext[1] = (m_intr.ext[1] & ~0x08) | ((data >> 2) & 0x08);
|
||||||
m_intr.ext[2] = (m_intr.ext[2] & ~0x08) | ((data >> 3) & 0x08);
|
m_intr.ext[2] = (m_intr.ext[2] & ~0x08) | ((data >> 3) & 0x08);
|
||||||
m_intr.ext[3] = (m_intr.ext[3] & ~0x08) | ((data >> 4) & 0x08);
|
m_intr.ext[3] = (m_intr.ext[3] & ~0x08) | ((data >> 4) & 0x08);
|
||||||
|
}
|
||||||
update_interrupt_state();
|
update_interrupt_state();
|
||||||
break;
|
break;
|
||||||
|
|
||||||
@ -1685,7 +1825,7 @@ WRITE16_MEMBER(i80186_cpu_device::internal_port_w)
|
|||||||
|
|
||||||
case 0x19:
|
case 0x19:
|
||||||
if (LOG_PORTS) logerror("%05X:80186 timer interrupt contol = %04X\n", m_pc, data);
|
if (LOG_PORTS) logerror("%05X:80186 timer interrupt contol = %04X\n", m_pc, data);
|
||||||
m_intr.timer = data & 0x000f;
|
m_intr.timer[0] = data & 0x000f;
|
||||||
update_interrupt_state();
|
update_interrupt_state();
|
||||||
break;
|
break;
|
||||||
|
|
||||||
@ -1703,24 +1843,32 @@ WRITE16_MEMBER(i80186_cpu_device::internal_port_w)
|
|||||||
|
|
||||||
case 0x1c:
|
case 0x1c:
|
||||||
if (LOG_PORTS) logerror("%05X:80186 INT 0 interrupt control = %04X\n", m_pc, data);
|
if (LOG_PORTS) logerror("%05X:80186 INT 0 interrupt control = %04X\n", m_pc, data);
|
||||||
|
if (BIT(m_reloc, 14))
|
||||||
|
m_intr.timer[1] = data & 0x000f;
|
||||||
|
else
|
||||||
m_intr.ext[0] = data & 0x007f;
|
m_intr.ext[0] = data & 0x007f;
|
||||||
update_interrupt_state();
|
update_interrupt_state();
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x1d:
|
case 0x1d:
|
||||||
if (LOG_PORTS) logerror("%05X:80186 INT 1 interrupt control = %04X\n", m_pc, data);
|
if (LOG_PORTS) logerror("%05X:80186 INT 1 interrupt control = %04X\n", m_pc, data);
|
||||||
|
if (BIT(m_reloc, 14))
|
||||||
|
m_intr.timer[2] = data & 0x000f;
|
||||||
|
else
|
||||||
m_intr.ext[1] = data & 0x007f;
|
m_intr.ext[1] = data & 0x007f;
|
||||||
update_interrupt_state();
|
update_interrupt_state();
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x1e:
|
case 0x1e:
|
||||||
if (LOG_PORTS) logerror("%05X:80186 INT 2 interrupt control = %04X\n", m_pc, data);
|
if (LOG_PORTS) logerror("%05X:80186 INT 2 interrupt control = %04X\n", m_pc, data);
|
||||||
|
if (!BIT(m_reloc, 14))
|
||||||
m_intr.ext[2] = data & 0x001f;
|
m_intr.ext[2] = data & 0x001f;
|
||||||
update_interrupt_state();
|
update_interrupt_state();
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x1f:
|
case 0x1f:
|
||||||
if (LOG_PORTS) logerror("%05X:80186 INT 3 interrupt control = %04X\n", m_pc, data);
|
if (LOG_PORTS) logerror("%05X:80186 INT 3 interrupt control = %04X\n", m_pc, data);
|
||||||
|
if (!BIT(m_reloc, 14))
|
||||||
m_intr.ext[3] = data & 0x001f;
|
m_intr.ext[3] = data & 0x001f;
|
||||||
update_interrupt_state();
|
update_interrupt_state();
|
||||||
break;
|
break;
|
||||||
|
@ -20,8 +20,10 @@ public:
|
|||||||
auto chip_select_callback() { return m_out_chip_select_func.bind(); }
|
auto chip_select_callback() { return m_out_chip_select_func.bind(); }
|
||||||
auto tmrout0_handler() { return m_out_tmrout0_func.bind(); }
|
auto tmrout0_handler() { return m_out_tmrout0_func.bind(); }
|
||||||
auto tmrout1_handler() { return m_out_tmrout1_func.bind(); }
|
auto tmrout1_handler() { return m_out_tmrout1_func.bind(); }
|
||||||
|
auto irmx_irq_cb() { return m_irmx_irq_cb.bind(); }
|
||||||
|
|
||||||
IRQ_CALLBACK_MEMBER(int_callback);
|
IRQ_CALLBACK_MEMBER(int_callback);
|
||||||
|
IRQ_CALLBACK_MEMBER(inta_callback);
|
||||||
DECLARE_WRITE_LINE_MEMBER(drq0_w) { m_dma[0].drq_state = state; }
|
DECLARE_WRITE_LINE_MEMBER(drq0_w) { m_dma[0].drq_state = state; }
|
||||||
DECLARE_WRITE_LINE_MEMBER(drq1_w) { m_dma[1].drq_state = state; }
|
DECLARE_WRITE_LINE_MEMBER(drq1_w) { m_dma[1].drq_state = state; }
|
||||||
DECLARE_WRITE_LINE_MEMBER(tmrin0_w) { if(state && (m_timer[0].control & 0x8004) == 0x8004) { inc_timer(0); } }
|
DECLARE_WRITE_LINE_MEMBER(tmrin0_w) { if(state && (m_timer[0].control & 0x8004) == 0x8004) { inc_timer(0); } }
|
||||||
@ -30,6 +32,7 @@ public:
|
|||||||
DECLARE_WRITE_LINE_MEMBER(int1_w) { external_int(1, state); }
|
DECLARE_WRITE_LINE_MEMBER(int1_w) { external_int(1, state); }
|
||||||
DECLARE_WRITE_LINE_MEMBER(int2_w) { external_int(2, state); }
|
DECLARE_WRITE_LINE_MEMBER(int2_w) { external_int(2, state); }
|
||||||
DECLARE_WRITE_LINE_MEMBER(int3_w) { external_int(3, state); }
|
DECLARE_WRITE_LINE_MEMBER(int3_w) { external_int(3, state); }
|
||||||
|
template <typename... T> void set_irmx_irq_ack(T &&... args) { m_irmx_irq_ack.set(std::forward<T>(args)...); }
|
||||||
|
|
||||||
// device_memory_interface overrides
|
// device_memory_interface overrides
|
||||||
virtual space_config_vector memory_space_config() const override;
|
virtual space_config_vector memory_space_config() const override;
|
||||||
@ -121,6 +124,7 @@ private:
|
|||||||
|
|
||||||
struct intr_state
|
struct intr_state
|
||||||
{
|
{
|
||||||
|
uint8_t vector;
|
||||||
uint8_t pending;
|
uint8_t pending;
|
||||||
uint16_t ack_mask;
|
uint16_t ack_mask;
|
||||||
uint16_t priority_mask;
|
uint16_t priority_mask;
|
||||||
@ -128,7 +132,7 @@ private:
|
|||||||
uint16_t request;
|
uint16_t request;
|
||||||
uint16_t status;
|
uint16_t status;
|
||||||
uint16_t poll_status;
|
uint16_t poll_status;
|
||||||
uint16_t timer;
|
uint16_t timer[3];
|
||||||
uint16_t dma[2];
|
uint16_t dma[2];
|
||||||
uint16_t ext[4];
|
uint16_t ext[4];
|
||||||
uint8_t ext_state;
|
uint8_t ext_state;
|
||||||
@ -154,6 +158,8 @@ private:
|
|||||||
devcb_write16 m_out_chip_select_func;
|
devcb_write16 m_out_chip_select_func;
|
||||||
devcb_write_line m_out_tmrout0_func;
|
devcb_write_line m_out_tmrout0_func;
|
||||||
devcb_write_line m_out_tmrout1_func;
|
devcb_write_line m_out_tmrout1_func;
|
||||||
|
devcb_write_line m_irmx_irq_cb;
|
||||||
|
device_irq_acknowledge_delegate m_irmx_irq_ack;
|
||||||
};
|
};
|
||||||
|
|
||||||
class i80188_cpu_device : public i80186_cpu_device
|
class i80188_cpu_device : public i80186_cpu_device
|
||||||
|
@ -25,6 +25,7 @@ Driver file for IBM PC, IBM PC XT, and related machines.
|
|||||||
#include "machine/genpc.h"
|
#include "machine/genpc.h"
|
||||||
#include "machine/i8251.h"
|
#include "machine/i8251.h"
|
||||||
#include "cpu/i86/i86.h"
|
#include "cpu/i86/i86.h"
|
||||||
|
#include "cpu/i86/i186.h"
|
||||||
#include "cpu/nec/nec.h"
|
#include "cpu/nec/nec.h"
|
||||||
#include "bus/isa/isa.h"
|
#include "bus/isa/isa.h"
|
||||||
#include "bus/isa/isa_cards.h"
|
#include "bus/isa/isa_cards.h"
|
||||||
@ -67,6 +68,7 @@ public:
|
|||||||
void ittxtra(machine_config &config);
|
void ittxtra(machine_config &config);
|
||||||
void cadd810(machine_config &config);
|
void cadd810(machine_config &config);
|
||||||
void juko16(machine_config &config);
|
void juko16(machine_config &config);
|
||||||
|
void alphatp50(machine_config &config);
|
||||||
|
|
||||||
void init_bondwell();
|
void init_bondwell();
|
||||||
|
|
||||||
@ -1738,6 +1740,76 @@ ROM_START( spc400d )
|
|||||||
ROM_LOAD("fb896.u6", 0xc000, 0x4000, CRC(a6f3ad8c) SHA1(1ee012f9a1757eb68150fedc9db16ff356722f72))
|
ROM_LOAD("fb896.u6", 0xc000, 0x4000, CRC(a6f3ad8c) SHA1(1ee012f9a1757eb68150fedc9db16ff356722f72))
|
||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
|
|
||||||
|
/******************************************* Triumph-Adler Alphatronic P10 ***
|
||||||
|
Form factor: Desktop
|
||||||
|
Links: https://www.marcuslausch.de/2020/01/21/triumph-adler-alphatronic-p10/, http://www.cc-computerarchiv.de/CC-Archiv/bc-alt/gb-triad/gb-triad-6_87.html
|
||||||
|
CPU: 8088@4.77MHz on a motherboard branded Super-640
|
||||||
|
RAM: 640KB
|
||||||
|
Video: Hercules (branded MG-200), monitor: 12" amber
|
||||||
|
Mass storage: 2x5.25" DSDD, a single floppy/hdd version was called P20
|
||||||
|
Interfaces: V24, Centronics
|
||||||
|
On board: RTC
|
||||||
|
DIP switches: 1 2 3 4 5 6 7 8 effect
|
||||||
|
OFF default
|
||||||
|
ON FPU present
|
||||||
|
OFF FPU absent
|
||||||
|
ON ON Display: none
|
||||||
|
OFF OFF monochrome
|
||||||
|
OFF ON Color 40x25
|
||||||
|
ON OFF Color 80x25
|
||||||
|
ON ON 1 Floppy disk drive
|
||||||
|
OFF ON 2
|
||||||
|
ON OFF 3
|
||||||
|
OFF OFF 4
|
||||||
|
|
||||||
|
*****************************************************************************/
|
||||||
|
|
||||||
|
ROM_START( alphatp10 )
|
||||||
|
ROM_REGION(0x10000,"bios", 0)
|
||||||
|
ROM_LOAD("cgab01_04_06.bin", 0x8000, 0x4000, CRC(4f1048e9) SHA1(c5feee7c00fdb7466c6afec753363d11b32983b5))
|
||||||
|
ROM_LOAD("cgab02_04_07.bin", 0xc000, 0x4000, CRC(a95998cb) SHA1(1d939f0b7ea3999c44f98b30c26d36e394b87503))
|
||||||
|
ROM_END
|
||||||
|
|
||||||
|
|
||||||
|
void pc_state::alphatp50(machine_config &config)
|
||||||
|
{
|
||||||
|
/* basic machine hardware */
|
||||||
|
I80186(config, m_maincpu, 16_MHz_XTAL);
|
||||||
|
m_maincpu->set_addrmap(AS_PROGRAM, &pc_state::pc16_map);
|
||||||
|
m_maincpu->set_addrmap(AS_IO, &pc_state::pc16_io);
|
||||||
|
downcast<i80186_cpu_device &>(*m_maincpu).set_irmx_irq_ack("mb:pic8259", FUNC(pic8259_device::inta_cb));
|
||||||
|
|
||||||
|
ibm5160_mb_device &mb(IBM5160_MOTHERBOARD(config, "mb", 0));
|
||||||
|
mb.set_cputag(m_maincpu);
|
||||||
|
mb.int_callback().set(m_maincpu, FUNC(i80186_cpu_device::int0_w));
|
||||||
|
mb.nmi_callback().set_inputline(m_maincpu, INPUT_LINE_NMI);
|
||||||
|
mb.set_input_default(DEVICE_INPUT_DEFAULTS_NAME(pccga));
|
||||||
|
|
||||||
|
// FIXME: determine ISA bus clock
|
||||||
|
ISA8_SLOT(config, "isa1", 0, "mb:isa", pc_isa8_cards, "cga", false);
|
||||||
|
ISA8_SLOT(config, "isa2", 0, "mb:isa", pc_isa8_cards, "fdc_xt", false);
|
||||||
|
ISA8_SLOT(config, "isa3", 0, "mb:isa", pc_isa8_cards, "lpt", false);
|
||||||
|
ISA8_SLOT(config, "isa4", 0, "mb:isa", pc_isa8_cards, "com", false);
|
||||||
|
ISA8_SLOT(config, "isa5", 0, "mb:isa", pc_isa8_cards, nullptr, false);
|
||||||
|
|
||||||
|
/* keyboard */
|
||||||
|
PC_KBDC_SLOT(config, "kbd", pc_xt_keyboards, STR_KBD_IBM_PC_XT_83).set_pc_kbdc_slot(subdevice("mb:pc_kbdc"));
|
||||||
|
|
||||||
|
/* internal ram */
|
||||||
|
RAM(config, RAM_TAG).set_default_size("512K").set_extra_options("128K, 256K, 384K");
|
||||||
|
|
||||||
|
/* software lists */
|
||||||
|
SOFTWARE_LIST(config, "disk_list").set_original("ibm5150");
|
||||||
|
}
|
||||||
|
|
||||||
|
ROM_START( alphatp50 )
|
||||||
|
ROM_REGION16_LE(0x10000, "bios", 0)
|
||||||
|
ROMX_LOAD("pc50ii_even_103_16.4.87.bin", 0x8000, 0x4000, CRC(97067b5b) SHA1(260bdeb0a2640141d707eda7b55f2ad4e9c466cd), ROM_SKIP(1))
|
||||||
|
ROMX_LOAD("pc50ii_odd_104_16.4.87.bin", 0x8001, 0x4000, CRC(a628a056) SHA1(0ea6b1bcb8fe9cdf85a570df5fb169abfd5cbbe8), ROM_SKIP(1))
|
||||||
|
ROM_END
|
||||||
|
|
||||||
|
|
||||||
/***************************************************************************
|
/***************************************************************************
|
||||||
|
|
||||||
Game driver(s)
|
Game driver(s)
|
||||||
@ -1784,6 +1856,8 @@ COMP( 1992, iskr3104, ibm5150, 0, iskr3104, pccga, pc_state,
|
|||||||
COMP( 1985, sicpc1605, ibm5150, 0, siemens, pccga, pc_state, empty_init, "Siemens", "Sicomp PC16-05", MACHINE_NOT_WORKING )
|
COMP( 1985, sicpc1605, ibm5150, 0, siemens, pccga, pc_state, empty_init, "Siemens", "Sicomp PC16-05", MACHINE_NOT_WORKING )
|
||||||
COMP( 1985, pc7000, ibm5150, 0, eagle1600, pccga, pc_state, empty_init, "Sharp", "PC-7000", MACHINE_NOT_WORKING )
|
COMP( 1985, pc7000, ibm5150, 0, eagle1600, pccga, pc_state, empty_init, "Sharp", "PC-7000", MACHINE_NOT_WORKING )
|
||||||
COMP( 1987, to16, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Thomson SIMIV", "TO16", MACHINE_NOT_WORKING )
|
COMP( 1987, to16, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Thomson SIMIV", "TO16", MACHINE_NOT_WORKING )
|
||||||
|
COMP( 1985, alphatp10, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Triumph-Adler", "Alphatronic P10", 0 )
|
||||||
|
COMP( 1985, alphatp50, ibm5150, 0, alphatp50, pccga, pc_state, empty_init, "Triumph-Adler", "Alphatronic P50", 0 )
|
||||||
COMP( 198?, hstrtpls, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Vendex", "HeadStart Plus", MACHINE_NOT_WORKING )
|
COMP( 198?, hstrtpls, ibm5150, 0, pccga, pccga, pc_state, empty_init, "Vendex", "HeadStart Plus", MACHINE_NOT_WORKING )
|
||||||
COMP( 1988, laser_turbo_xt, ibm5150, 0, pccga, pccga, pc_state, empty_init, "VTech", "Laser Turbo XT", 0 )
|
COMP( 1988, laser_turbo_xt, ibm5150, 0, pccga, pccga, pc_state, empty_init, "VTech", "Laser Turbo XT", 0 )
|
||||||
COMP( 1989, laser_xt3, ibm5150, 0, pccga, pccga, pc_state, empty_init, "VTech", "Laser XT/3", 0 )
|
COMP( 1989, laser_xt3, ibm5150, 0, pccga, pccga, pc_state, empty_init, "VTech", "Laser XT/3", 0 )
|
||||||
|
@ -32189,6 +32189,8 @@ mpx16 // Ciarcia's Circuit Cellar Micromint MPX-16
|
|||||||
hstrtpls // Vendex HeadStart Plus
|
hstrtpls // Vendex HeadStart Plus
|
||||||
nms9100 // Philips NMS 9100 series
|
nms9100 // Philips NMS 9100 series
|
||||||
to16 // Thomson TO16
|
to16 // Thomson TO16
|
||||||
|
alphatp10 // Triumph-Adler Alphatronic P10
|
||||||
|
alphatp50 // Triumph-Adler Alphatronic P50
|
||||||
|
|
||||||
@source:pc100.cpp
|
@source:pc100.cpp
|
||||||
pc100 //
|
pc100 //
|
||||||
|
Loading…
Reference in New Issue
Block a user