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ppccom.c - Fix and simplify PPC4xx DMA interrupt logic. Fixes goal animations in fiveside. [Phil Bennett]

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This commit is contained in:
Phil Bennett 2013-11-01 18:51:30 +00:00
parent e7517ea39e
commit e30701b9a0
2 changed files with 24 additions and 24 deletions
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46
src/emu/cpu/powerpc/ppccom.c
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@ -1762,35 +1762,35 @@ static int ppc4xx_get_irq_line(powerpc_state *ppc, UINT32 bitmask)
static void ppc4xx_dma_update_irq_states(powerpc_state *ppc) static void ppc4xx_dma_update_irq_states(powerpc_state *ppc)
{ {
int dmachan;
/* update the IRQ state for each DMA channel */ /* update the IRQ state for each DMA channel */
for (dmachan = 0; dmachan < 4; dmachan++) for (int dmachan = 0; dmachan < 4; dmachan++)
{ {
if ((ppc->dcr[DCR4XX_DMACR0 + 8 * dmachan] & PPC4XX_DMACR_CIE) && (ppc->dcr[DCR4XX_DMASR] & (0x11 << (27 - dmachan)))) bool irq_pending = false;
ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_DMA(dmachan), ASSERT_LINE);
else
ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_DMA(dmachan), CLEAR_LINE);
// DMA chaining interrupts // Channel interrupt enabled?
switch (dmachan) if ((ppc->dcr[DCR4XX_DMACR0 + 8 * dmachan] & PPC4XX_DMACR_CIE))
{ {
case 0: // Terminal count and end-of-transfer status bits
if ((ppc->dcr[DCR4XX_DMACR0 + 8 * dmachan] & PPC4XX_DMACR_CIE) && (ppc->dcr[DCR4XX_DMASR] & 0x80000)) int bitmask = 0x11 << (27 - dmachan);
ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_DMA(dmachan), ASSERT_LINE);
else
ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_DMA(dmachan), CLEAR_LINE);
break;
case 1: // Chained transfer status bit
case 2: switch (dmachan)
case 3: {
if ((ppc->dcr[DCR4XX_DMACR0 + 8 * dmachan] & PPC4XX_DMACR_CIE) && (ppc->dcr[DCR4XX_DMASR] & (1 << (7 - dmachan)))) case 0:
ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_DMA(dmachan), ASSERT_LINE); bitmask |= 0x00080000;
else break;
ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_DMA(dmachan), CLEAR_LINE);
break; case 1:
case 2:
case 3:
bitmask |= 1 << (7 - dmachan);
break;
}
irq_pending = (ppc->dcr[DCR4XX_DMASR] & bitmask) != 0;
} }
ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_DMA(dmachan), irq_pending ? ASSERT_LINE : CLEAR_LINE);
} }
} }

2
src/emu/cpu/powerpc/ppcdrc.c
View File

@ -922,7 +922,7 @@ static void code_compile_block(powerpc_state *ppc, UINT8 mode, offs_t pc)
const opcode_desc *desclist; const opcode_desc *desclist;
int override = FALSE; int override = FALSE;
drcuml_block *block; drcuml_block *block;
logerror("Compile %08X\n", pc);
g_profiler.start(PROFILER_DRC_COMPILE); g_profiler.start(PROFILER_DRC_COMPILE);
/* get a description of this sequence */ /* get a description of this sequence */