Cleanups and version bump.

This commit is contained in:
Aaron Giles 2008-07-03 15:50:46 +00:00
parent c26a5b3fd5
commit e376a53661
19 changed files with 123 additions and 123 deletions

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@ -977,7 +977,7 @@ static int adsp2100_execute(int cycles)
adsp2100.pc++;
}
}
/* parse the instruction */
switch (op >> 16)
{

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@ -1634,7 +1634,7 @@ static void generate_delay_slot_and_branch(drcuml_block *block, compiler_state *
{
compiler_state compiler_temp = *compiler;
UINT32 op = *desc->opptr.l;
/* fetch the target register if dynamic, in case it is modified by the delay slot */
if (desc->targetpc == BRANCH_TARGET_DYNAMIC)
UML_MOV(block, MEM(&mips3->impstate->jmpdest), R32(RSREG)); // mov [jmpdest],<rsreg>

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@ -292,7 +292,7 @@ void ppccom_reset(powerpc_state *ppc)
ppc->spr[SPR4XX_TCR] &= ~PPC4XX_TCR_WRC_MASK;
ppc->spu.regs[SPU4XX_LINE_STATUS] = 0x06;
}
/* initialize the 602 HID0 register */
if (ppc->flavor == PPC_MODEL_602)
ppc->spr[SPR603_HID0] = 1;

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@ -354,7 +354,7 @@ static void compute_debug_flags(running_machine *machine, const debug_cpu_info *
/* add in the watchpoint flags */
machine->debug_flags |= (info->flags & DEBUG_FLAG_WATCHPOINT) >> (24 - 4);
/* if any of the watchpoint flags are set and we're live, tell the memory system */
if (global.livecpu != NULL && ((info->flags & DEBUG_FLAG_WATCHPOINT) != 0))
memory_set_context(-1);
@ -602,8 +602,8 @@ void debug_cpu_instruction_hook(running_machine *machine, offs_t curpc)
/*-------------------------------------------------
debug_cpu_memory_read_hook - the memory system
calls this hook when watchpoints are enabled
debug_cpu_memory_read_hook - the memory system
calls this hook when watchpoints are enabled
and a memory read happens
-------------------------------------------------*/
@ -622,8 +622,8 @@ void debug_cpu_memory_read_hook(running_machine *machine, int cpunum, int spacen
/*-------------------------------------------------
debug_cpu_memory_write_hook - the memory
system calls this hook when watchpoints are
debug_cpu_memory_write_hook - the memory
system calls this hook when watchpoints are
enabled and a memory write happens
-------------------------------------------------*/
@ -1124,7 +1124,7 @@ static void breakpoint_update_flags(debug_cpu_info *info)
info->flags |= DEBUG_FLAG_LIVE_BP;
break;
}
/* push the flags out globally */
if (global.livecpu != NULL)
compute_debug_flags(Machine, global.livecpu);
@ -1279,7 +1279,7 @@ static void watchpoint_update_flags(debug_cpu_info *info, int spacenum)
UINT32 writeflag = DEBUG_FLAG_LIVE_WPW_PROGRAM << spacenum;
UINT32 readflag = DEBUG_FLAG_LIVE_WPR_PROGRAM << spacenum;
debug_cpu_watchpoint *wp;
/* if hotspots are enabled, turn on all reads */
if (info->hotspots != NULL)
{
@ -1305,7 +1305,7 @@ static void watchpoint_update_flags(debug_cpu_info *info, int spacenum)
if ((readflag | writeflag) == 0)
break;
}
/* push the flags out globally */
if (global.livecpu != NULL)
compute_debug_flags(Machine, global.livecpu);

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@ -787,7 +787,7 @@ static void memory_exit(running_machine *machine)
void memory_set_context(int activecpu)
{
addrspace_data *space;
/* remember dynamic RAM/ROM */
if (activecpu == -1)
activecpu = cur_context;

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@ -898,7 +898,7 @@ static void dcs_register_state(void)
if (dcs_sram != NULL)
state_save_register_global_pointer(dcs_sram, 0x8000*4 / sizeof(dcs_sram[0]));
if (dcs.rev == 2)
state_save_register_postload(Machine, sdrc_postload, NULL);
}

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@ -27,7 +27,7 @@ typedef struct
UINT8 oneshot;
UINT8 oneshotplaying;
UINT16 rom_offset;
} sound_channel;
@ -189,12 +189,12 @@ void * flower_sh_start(int clock, const struct CustomSound_interface *config)
for (i = 0; i < num_voices; i++)
{
voice = &channel_list[i];
voice->frequency = 0;
voice->volume = 0;
voice->counter = 0;
voice->rom_offset = 0;
state_save_register_item("flower_custom", i+1, voice->frequency);
state_save_register_item("flower_custom", i+1, voice->counter);
state_save_register_item("flower_custom", i+1, voice->volume);

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@ -2021,13 +2021,13 @@ sw6 - ON= enable player2 move left OFF= disabled
sw7 - ON= enable player2 fire/shoot OFF= disabled
sw8 - not used/unknown
--------------------------------------------------------------------------
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
--------------------------------------------------------------------------
# of player ships
- 3 ships on on
- 4 ships off on
- 5 ships on off
- 6 ships off off
- 3 ships on on
- 4 ships off on
- 5 ships on off
- 6 ships off off
Maximum Credits= 9

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@ -273,7 +273,7 @@
This is the most famous game from Cal Omega 903 System. In the test mode you can see
the name "Gaming Draw Poker", but in the manual figure as "Casino Poker". Also in some
game lists you can see it with another name: "Arcade Poker".
game lists you can see it with another name: "Arcade Poker".
The game uses the same GFX set that Jack Potten's Poker for cards and has similar
layout, but the game is different and the old discrete pitched sounds were replaced
@ -621,7 +621,7 @@
#include "machine/6850acia.h"
#include "sound/ay8910.h"
#include "deprecat.h"
#include "deprecat.h"
/* UART */
@ -1610,12 +1610,12 @@ GFXDECODE_END
Pin | Description | Wired to
-----+----------------+--------------------------
01 | VSS | GND
02 | Port A - bit 0 | U43 (4N23, multiplexer)
03 | Port A - bit 1 | U44 (4N23, multiplexer)
04 | Port A - bit 2 | U45 (4N23, multiplexer)
05 | Port A - bit 3 | U46 (4N23, multiplexer)
06 | Port A - bit 4 | U47 (4N23, multiplexer)
07 | Port A - bit 5 | U48 (4N23, multiplexer)
02 | Port A - bit 0 | U43 (4N23, multiplexer)
03 | Port A - bit 1 | U44 (4N23, multiplexer)
04 | Port A - bit 2 | U45 (4N23, multiplexer)
05 | Port A - bit 3 | U46 (4N23, multiplexer)
06 | Port A - bit 4 | U47 (4N23, multiplexer)
07 | Port A - bit 5 | U48 (4N23, multiplexer)
08 | Port A - bit 6 | SW1-5 (settings)
09 | Port A - bit 7 | U80 (4023B)
10 | Port B - bit 0 | U55 (MCT6) ---> L1
@ -1634,14 +1634,14 @@ GFXDECODE_END
23 | CS2 | I/O
24 | CS1 | +5V
25 | E | 02 (= CPU clock)
26 | Data Bus D7 | D7
27 | Data Bus D6 | D6
28 | Data Bus D5 | D5
29 | Data Bus D4 | D4
30 | Data Bus D3 | D3
31 | Data Bus D2 | D2
32 | Data Bus D1 | D1
33 | Data Bus D0 | D0
26 | Data Bus D7 | D7
27 | Data Bus D6 | D6
28 | Data Bus D5 | D5
29 | Data Bus D4 | D4
30 | Data Bus D3 | D3
31 | Data Bus D2 | D2
32 | Data Bus D1 | D1
33 | Data Bus D0 | D0
34 | RES | RES
35 | RS1 | A1
36 | RS0 | A0
@ -1692,14 +1692,14 @@ static const pia6821_interface sys903_pia0_intf =
23 | CS2 | I/O
24 | CS1 | +5V
25 | E | 02 (= CPU clock)
26 | Data Bus D7 | D7
27 | Data Bus D6 | D6
28 | Data Bus D5 | D5
29 | Data Bus D4 | D4
30 | Data Bus D3 | D3
31 | Data Bus D2 | D2
32 | Data Bus D1 | D1
33 | Data Bus D0 | D0
26 | Data Bus D7 | D7
27 | Data Bus D6 | D6
28 | Data Bus D5 | D5
29 | Data Bus D4 | D4
30 | Data Bus D3 | D3
31 | Data Bus D2 | D2
32 | Data Bus D1 | D1
33 | Data Bus D0 | D0
34 | RES | RES
35 | RS1 | A1
36 | RS0 | A0
@ -1726,12 +1726,12 @@ static const pia6821_interface sys903_pia1_intf =
Pin | Description | Wired to
-----+----------------+--------------------------
01 | VSS | GND
02 | Port A - bit 0 | U45 (4N23, multiplexer)
03 | Port A - bit 1 | U45 (4N23, multiplexer)
04 | Port A - bit 2 | U46 (4N23, multiplexer)
05 | Port A - bit 3 | U46 (4N23, multiplexer)
06 | Port A - bit 4 | U47 (4N23, multiplexer)
07 | Port A - bit 5 | U47 (4N23, multiplexer)
02 | Port A - bit 0 | U45 (4N23, multiplexer)
03 | Port A - bit 1 | U45 (4N23, multiplexer)
04 | Port A - bit 2 | U46 (4N23, multiplexer)
05 | Port A - bit 3 | U46 (4N23, multiplexer)
06 | Port A - bit 4 | U47 (4N23, multiplexer)
07 | Port A - bit 5 | U47 (4N23, multiplexer)
08 | Port A - bit 6 | U61 (4023B) --> U57 (556, pin 5) [50/60]
09 | Port A - bit 7 | U57 (556, pin 2) --> SW to GND [50/60]
10 | Port B - bit 0 | U49 (MCT6) ---> L1
@ -1750,14 +1750,14 @@ static const pia6821_interface sys903_pia1_intf =
23 | CS2 | I/O
24 | CS1 | +5V
25 | E | 02 (= CPU clock)
26 | Data Bus D7 | D7
27 | Data Bus D6 | D6
28 | Data Bus D5 | D5
29 | Data Bus D4 | D4
30 | Data Bus D3 | D3
31 | Data Bus D2 | D2
32 | Data Bus D1 | D1
33 | Data Bus D0 | D0
26 | Data Bus D7 | D7
27 | Data Bus D6 | D6
28 | Data Bus D5 | D5
29 | Data Bus D4 | D4
30 | Data Bus D3 | D3
31 | Data Bus D2 | D2
32 | Data Bus D1 | D1
33 | Data Bus D0 | D0
34 | RES | RES
35 | RS1 | A1
36 | RS0 | A0
@ -1808,14 +1808,14 @@ static const pia6821_interface sys905_pia0_intf =
23 | CS2 | I/O
24 | CS1 | +5V
25 | E | 02 (= CPU clock)
26 | Data Bus D7 | D7
27 | Data Bus D6 | D6
28 | Data Bus D5 | D5
29 | Data Bus D4 | D4
30 | Data Bus D3 | D3
31 | Data Bus D2 | D2
32 | Data Bus D1 | D1
33 | Data Bus D0 | D0
26 | Data Bus D7 | D7
27 | Data Bus D6 | D6
28 | Data Bus D5 | D5
29 | Data Bus D4 | D4
30 | Data Bus D3 | D3
31 | Data Bus D2 | D2
32 | Data Bus D1 | D1
33 | Data Bus D0 | D0
34 | RES | RES
35 | RS1 | A1
36 | RS0 | A0
@ -2011,8 +2011,8 @@ ROM_START( comg079 ) /* Cal Omega v7.9 (Arcade Poker) */
ROM_LOAD( "07-91.u5", 0x1800, 0x0800, CRC(da415c27) SHA1(be42f1d36579ff8fafd6df4e30a64a6141a7a2ae) )
ROM_LOAD( "07-92.u6", 0x2000, 0x0800, CRC(31211ed3) SHA1(799bc4ca77ee01a4d45320263e4cc2d066ec26e5) )
/* code jumps to $2e64 where there's an inexistent mnemonic 0x32! (kill).
also writes to $axxx (inexistent) and $08fx-$09xx (supposed to be $0880-$0881).
/* code jumps to $2e64 where there's an inexistent mnemonic 0x32! (kill).
also writes to $axxx (inexistent) and $08fx-$09xx (supposed to be $0880-$0881).
*/
ROM_LOAD( "07-93.u7", 0x2800, 0x0800, BAD_DUMP CRC(52c84b9c) SHA1(569d6384b9084a11fe84e291f1c165bc0df3ab49) )
ROM_LOAD( "07-94.u8", 0x3000, 0x0800, CRC(ed0e7d4a) SHA1(72f512ca2da573e4571ca6f164fb055daa26dd3c) )

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@ -1189,7 +1189,7 @@ PORT_START_TAG("IN3") /* SERVICESW */
PORT_START_TAG("FAKE") /* Fake: To switch between monitors at run time */
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_SERVICE4 ) PORT_TOGGLE
PORT_START_TAG("ANALOG0") /* steering wheel player 1 */
PORT_BIT( 0xff, 0x8A, IPT_PADDLE ) PORT_MINMAX(0x00,0xff) PORT_SENSITIVITY(25) PORT_KEYDELTA(25) PORT_REVERSE PORT_NAME("P1 Wheel")

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@ -3,7 +3,7 @@ King Of Football (c)1995 BMC
preliminary driver by Tomasz Slanina
--
--
MC68000P10
M28 (OKI 6295, next to rom C9)
@ -102,10 +102,10 @@ static READ16_HANDLER(prot_r)
{
case 0x0000: return 0x0d00;
case 0xff00: return 0x8d00;
case 0x8000: return 0x0f0f;
}
logerror("unk prot r %x %x\n",prot_data, activecpu_get_previouspc());
return mame_rand(machine);
}
@ -130,20 +130,20 @@ static WRITE16_HANDLER(bmc_2_videoram_w)
static ADDRESS_MAP_START( koftball_mem, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x000000, 0x01ffff) AM_ROM
AM_RANGE(0x220000, 0x22ffff) AM_RAM AM_BASE(&main_ram)
AM_RANGE(0x260000, 0x260fff) AM_WRITE(bmc_1_videoram_w) AM_BASE(&bmc_1_videoram)
AM_RANGE(0x261000, 0x261fff) AM_WRITE(bmc_2_videoram_w) AM_BASE(&bmc_2_videoram)
AM_RANGE(0x262000, 0x26ffff) AM_RAM
AM_RANGE(0x280000, 0x28ffff) AM_RAM /* unused ? */
AM_RANGE(0x2a0000, 0x2a001f) AM_WRITENOP
AM_RANGE(0x2a0000, 0x2a001f) AM_READ(random_number_r)
AM_RANGE(0x2a0000, 0x2a001f) AM_READ(random_number_r)
AM_RANGE(0x2b0000, 0x2b0003) AM_READ(random_number_r)
AM_RANGE(0x2d8000, 0x2d8001) AM_READ(random_number_r)
/*sound chip or mcu comm ? maybe just i/o (offset 0xe=lamps?)*/
AM_RANGE(0x2da000, 0x2da001) AM_WRITENOP /* offset ? */
AM_RANGE(0x2da002, 0x2da003) AM_WRITENOP /* data ? */
AM_RANGE(0x2db000, 0x2db001) AM_WRITE(bmc_RAMDAC_offset_w)
AM_RANGE(0x2db002, 0x2db003) AM_READWRITE(bmc_RAMDAC_color_r, bmc_RAMDAC_color_w)
AM_RANGE(0x2db004, 0x2db005) AM_WRITENOP
@ -157,7 +157,7 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( koftball )
PORT_START
PORT_START
PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("info") PORT_CODE(KEYCODE_Z)//info page
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("test2") PORT_CODE(KEYCODE_X)
PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("dec") PORT_CODE(KEYCODE_C)//dec sound test
@ -166,7 +166,7 @@ static INPUT_PORTS_START( koftball )
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("test6") PORT_CODE(KEYCODE_N)
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("test7") PORT_CODE(KEYCODE_M)
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("test8") PORT_CODE(KEYCODE_A) //test mode exit
PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("BET") PORT_CODE(KEYCODE_S) //bet ?
PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("test12") PORT_CODE(KEYCODE_D)
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("test13") PORT_CODE(KEYCODE_F)
@ -268,7 +268,7 @@ static const UINT16 nvram[]=
0xffff
};
#endif
#endif
static DRIVER_INIT(koftball)
{
colorram=auto_malloc(768);
@ -282,7 +282,7 @@ static DRIVER_INIT(koftball)
++offset;
}
}
#endif
#endif
}
GAME( 1995, koftball, 0, koftball, koftball, koftball, ROT0, "BMC", "King of Football", GAME_NOT_WORKING | GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS )

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@ -1,7 +1,7 @@
/***************************************************************************
Irem M63 hardware
Irem M63 hardware
****************************************************************************
Wily Tower (c) 1984 Irem
@ -13,7 +13,7 @@ driver by Nicola Salmoria
PCB Layout (based on Atomic Boy PCB)
------------------------------------
Both boards has etched NANAO logo.
Both boards has etched NANAO logo.
They (Eizo Nanao Corporation) own Irem Software Engineering.

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@ -234,7 +234,7 @@ static INPUT_PORTS_START( hasamu )
/* Coin Mode 1 */
IREM_COIN_MODE_1_NEW_HIGH
/* Coin Mode 2, not supported yet */
// IREM_COIN_MODE_2
// IREM_COIN_MODE_2
INPUT_PORTS_END
static INPUT_PORTS_START( dynablst )
@ -278,7 +278,7 @@ static INPUT_PORTS_START( dynablst )
/* Coin Mode 1 */
IREM_COIN_MODE_1_NEW_HIGH
/* Coin Mode 2, not supported yet */
// IREM_COIN_MODE_2
// IREM_COIN_MODE_2
IREM_JOYSTICKS_3_4
INPUT_PORTS_END
@ -340,7 +340,7 @@ static INPUT_PORTS_START( dynablsb )
/* Coin Mode 1 */
IREM_COIN_MODE_1_NEW_HIGH
/* Coin Mode 2, not supported yet */
// IREM_COIN_MODE_2
// IREM_COIN_MODE_2
IREM_JOYSTICKS_3_4
INPUT_PORTS_END
@ -397,7 +397,7 @@ static INPUT_PORTS_START( bombrman ) /* Does not appear to support 4 players or
/* Coin Mode 1 */
IREM_COIN_MODE_1_NEW_HIGH
/* Coin Mode 2, not supported yet */
// IREM_COIN_MODE_2
// IREM_COIN_MODE_2
INPUT_PORTS_END
static INPUT_PORTS_START( bbmanw )
@ -441,7 +441,7 @@ static INPUT_PORTS_START( bbmanw )
/* Coin Mode 1 */
IREM_COIN_MODE_1_NEW_HIGH
/* Coin Mode 2, not supported yet */
// IREM_COIN_MODE_2
// IREM_COIN_MODE_2
IREM_JOYSTICKS_3_4
INPUT_PORTS_END
@ -514,7 +514,7 @@ static INPUT_PORTS_START( quizf1 )
/* Coin Mode 1 */
IREM_COIN_MODE_1_NEW_HIGH
/* Coin Mode 2, not supported yet */
// IREM_COIN_MODE_2
// IREM_COIN_MODE_2
INPUT_PORTS_END
static INPUT_PORTS_START( matchit2 )
@ -581,7 +581,7 @@ static INPUT_PORTS_START( matchit2 )
/* Coin Mode 1 */
IREM_COIN_MODE_1_NEW_HIGH
/* Coin Mode 2, not supported yet */
// IREM_COIN_MODE_2
// IREM_COIN_MODE_2
INPUT_PORTS_END
static INPUT_PORTS_START( shisen2 )
@ -650,7 +650,7 @@ static INPUT_PORTS_START( shisen2 )
/* Coin Mode 1 */
IREM_COIN_MODE_1_NEW_HIGH
/* Coin Mode 2, not supported yet */
// IREM_COIN_MODE_2
// IREM_COIN_MODE_2
INPUT_PORTS_END
static INPUT_PORTS_START( riskchal )
@ -695,7 +695,7 @@ static INPUT_PORTS_START( riskchal )
/* Coin Mode 1 */
IREM_COIN_MODE_1_NEW_HIGH
/* Coin Mode 2, not supported yet */
// IREM_COIN_MODE_2
// IREM_COIN_MODE_2
INPUT_PORTS_END
/*****************************************************************************/

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@ -28,7 +28,7 @@ ROMs
1x M27C4001 (u18.7)(sound)
2008.07.01 - Tomasz Slanina - preliminary gfx blitter emulation
2008.07.01 - Tomasz Slanina - preliminary gfx blitter emulation
TODO:
- fix blitter writes (missing fill ?)
@ -57,13 +57,13 @@ static WRITE16_HANDLER(blitter_9b8000_w)
int h = video_screen_get_height(machine->primary_screen);
int x,y;
UINT16 pix;
int x0=(data_9a8000&0xff)<<1;
int y0=data_9a8000>>8;
int dx=data_9b0000&0xff;
int dy=((data_9b0000>>8)^0xff)+1;
UINT32 of=data_998000|(data_9a0000<<8);
if(of==0)
{
fillbitmap(tmpbitmap,get_black_pen(machine),0);
@ -74,10 +74,10 @@ static WRITE16_HANDLER(blitter_9b8000_w)
{
dx=0x100;
}
dx<<=1;
#if 0
#if 0
printf("[%x] %x blit %x -> %x,%x (%x*%x ) [%x] %x - %.4x %.4x - %.4x - %.4x\n",data,activecpu_get_pc(),of,x0,y0,dx,dy,data_9b0000,data_9a8000,data_9a0000,data_998000,data_990000,data_988000);
#endif
@ -88,20 +88,20 @@ static WRITE16_HANDLER(blitter_9b8000_w)
if(of<len && y+y0<h && x+x0<w)
{
pix=*(rom+of);
if(pix==0)
{
pix=0x100; //dirty hack
pix=0x100; //dirty hack
}
{
*BITMAP_ADDR16(tmpbitmap, y+y0, x+x0) = pix;
}
}
++of;
}
}
}
}
@ -137,12 +137,12 @@ static WRITE16_HANDLER(unk_w)
switch(activecpu_get_pc())
{
case 0x1348: mainram[0x00932/2]=0xffff; break; //dirt way to exit loop
/* case 0x16ce:
{
int addr=(activecpu_get_reg(M68K_D2)+0x089c)>>1;
mainram[addr&0x7fff]=0xffff;//mame_rand(machine);
}
break;*/
/* case 0x16ce:
{
int addr=(activecpu_get_reg(M68K_D2)+0x089c)>>1;
mainram[addr&0x7fff]=0xffff;//mame_rand(machine);
}
break;*/
}
}
@ -198,8 +198,8 @@ static ADDRESS_MAP_START( steaser_map, ADDRESS_SPACE_PROGRAM, 16 )
AM_RANGE(0x800000, 0x800001) AM_READ( steaser_bd0000_r )
AM_RANGE(0x880000, 0x880001) AM_READ( steaser_bd0000_r )
AM_RANGE(0x840000, 0x840001) AM_WRITE(mcu_w)
// AM_RANGE(0x8c0000, 0x8c0001) AM_WRITENOP
// AM_RANGE(0x900000, 0x900003) AM_RAM
// AM_RANGE(0x8c0000, 0x8c0001) AM_WRITENOP
// AM_RANGE(0x900000, 0x900003) AM_RAM
AM_RANGE(0x900000, 0x900001) AM_WRITE(color_offset_w)
AM_RANGE(0x900002, 0x900003) AM_WRITE(color_data_w)
@ -225,13 +225,13 @@ INPUT_PORTS_END
static INTERRUPT_GEN( steaser_irq )
{
int num=cpu_getiloops()+3;
cpunum_set_input_line(machine, 0, num, HOLD_LINE);
cpunum_set_input_line(machine, 0, num, HOLD_LINE);
}
static MACHINE_DRIVER_START( steaser )
MDRV_CPU_ADD_TAG("main", M68000, 11059200 )
MDRV_CPU_PROGRAM_MAP(steaser_map,0)
MDRV_CPU_VBLANK_INT_HACK(steaser_irq,4)
MDRV_CPU_VBLANK_INT_HACK(steaser_irq,4)
MDRV_SCREEN_ADD("main", RASTER)
MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)

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@ -2235,7 +2235,7 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( contcirc )
PORT_START_TAG("DSW1") /* DSW A */
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW A:1")
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW A:1")
PORT_DIPSETTING( 0x01, DEF_STR( Upright ) )
PORT_DIPSETTING( 0x00, "Cockpit" ) // analogue accelerator pedal
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
@ -2727,9 +2727,9 @@ static INPUT_PORTS_START( aquajack )
PORT_DIPUNUSED_DIPLOC( 0x02, 0x02, "SW B:7" ) /* Dip 7 shown as "Do Not Touch" in manuals */
PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SW B:8" ) /* Dip 8 */
/* The previous taito_z.c said ---
The Romstar (US version) manual list this as "Endless Game" - Has no effect on "World" version
--- , and declared it as unused switch.
*/
The Romstar (US version) manual list this as "Endless Game" - Has no effect on "World" version
--- , and declared it as unused switch.
*/
/* PORT_DIPNAME( 0x01, 0x01, "Endless Game" ) PORT_DIPLOCATION("SW B:8") */
/* PORT_DIPSETTING( 0x01, "Normal Game" ) */
/* PORT_DIPSETTING( 0x00, "Endless Game" ) */

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@ -204,11 +204,11 @@ INTERRUPT_GEN( bang_interrupt )
/***************************************************************************
World Rally 2 analog controls
World Rally 2 analog controls
- added by Mirko Mattioli <els@fastwebnet.it>
---------------------------------------------------------------
WR2 pcb has two ADC, one for each player. The ADCs have in common
the clock signal line (adc_clk) and the chip enable signal line
the clock signal line (adc_clk) and the chip enable signal line
(adc_cs) and, of course, two different data out signal lines.
When "Pot Wheel" option is selected via dip-switch, then the gear
is enabled (low/high shifter); the gear is disabled in joy mode by

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@ -183,8 +183,8 @@ static void draw_sprites_pre(running_machine *machine, int x_offs, int y_offs)
if (sprites_flipscreen)
{
/* -zx/y is there to fix zoomed sprite coords in screenflip.
drawgfxzoom does not know to draw from flip-side of sprites when
screen is flipped; so we must correct the coords ourselves. */
drawgfxzoom does not know to draw from flip-side of sprites when
screen is flipped; so we must correct the coords ourselves. */
curx = 320 - curx - zx;
cury = 256 - cury - zy;

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@ -204,7 +204,7 @@ VIDEO_START( phoenix )
state_save_register_global(videoram_pg_index);
state_save_register_global(palette_bank);
state_save_register_global(cocktail_mode);
/* some more candidates */
pleiads_protection_question = 0;
survival_protection_value = 0;

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@ -9,4 +9,4 @@
***************************************************************************/
const char build_version[] = "0.125u8 ("__DATE__")";
const char build_version[] = "0.125u9 ("__DATE__")";