68000: Rework interrupt handling [O. Galibert]
* Implement the cpu space as an address space * Make all vectored interrupts use the cpu space * Make it possible to direct the cpu space to another space, use it for amiga (which handles it as a normal AS_PROGRAM read) * Make it possible to disable the priority muxer and get 3 lines instead, use it for cps2
This commit is contained in:
parent
b54a2a517c
commit
e39802db90
@ -252,12 +252,17 @@ static DEVICE_INPUT_DEFAULTS_START( terminal )
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DEVICE_INPUT_DEFAULTS( "RS232_STOPBITS", 0xff, RS232_STOPBITS_2 )
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DEVICE_INPUT_DEFAULTS_END
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void vme_fccpu20_device::cpu_space_map(address_map &map)
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{
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map(0xfffff2, 0xffffff).lr16("bim irq", [this](offs_t offset) -> u16 { return m_bim->iack(offset+1); });
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}
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void vme_fccpu20_device::device_add_mconfig(machine_config &config)
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{
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/* basic machine hardware */
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M68020(config, m_maincpu, CLOCK50 / 3); /* Crytstal verified from picture HCI */
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m_maincpu->set_addrmap(AS_PROGRAM, &vme_fccpu20_device::cpu20_mem);
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m_maincpu->set_irq_acknowledge_callback("bim", FUNC(bim68153_device::iack));
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m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &vme_fccpu20_device::cpu_space_map);
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/* PIT Parallel Interface and Timer device, assumed strapped for on board clock */
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PIT68230(config, m_pit, CLOCK32 / 4); /* Crystal not verified */
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@ -69,6 +69,7 @@ private:
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DECLARE_WRITE32_MEMBER (bootvect_w);
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void cpu20_mem(address_map &map);
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void cpu_space_map(address_map &map);
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required_device<pit68230_device> m_pit;
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required_device<bim68153_device> m_bim;
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@ -200,6 +200,55 @@ void vme_fcscsi1_card_device::fcscsi1_mem(address_map &map)
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map(0xcc0009, 0xcc0009).rw(FUNC(vme_fcscsi1_card_device::tcr_r), FUNC(vme_fcscsi1_card_device::tcr_w)); /* The Control Register, SCSI ID and FD drive select bits */
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}
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/*
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----------------------------------------------------
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IRQ IRQ
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Level Source B4l inserted B4l removed (Def)
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-----------------------------------------------------
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1 P3 Pin #13 AV1 Autovector AV1 Autovector
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2 DMAC DMAC AV2 Autovector
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3 SCSIBC AV3 Autovector AV3 Autovector
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4 FDC AV4 Autovector AV4 Autovector
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5 PI/T Timer PI/T Timer Vect PI/T Timer Vect
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6 -- -- --
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7 PI/T Port PI/T Port Vect PI/T Port Vect
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------------------------------------------------------
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Default configuration: B41 jumper removed
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The PI/T port interrupt can be used under software control to
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cause non-maskable (Level 7) interrupts if the watchdog timer
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elapses and/or if the VMEbus interrupt trigger call occurs.
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*/
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/* TODO: Add configurable B41 jumper */
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#define B41 0
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void vme_fcscsi1_card_device::update_irq_to_maincpu() {
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if (fdc_irq_state) {
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m_maincpu->set_input_line(M68K_IRQ_3, ASSERT_LINE);
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m_maincpu->set_input_line(M68K_IRQ_2, CLEAR_LINE);
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m_maincpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
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} else if (dmac_irq_state) {
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m_maincpu->set_input_line(M68K_IRQ_3, CLEAR_LINE);
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m_maincpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
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m_maincpu->set_input_line(M68K_IRQ_2, ASSERT_LINE);
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} else {
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m_maincpu->set_input_line(M68K_IRQ_3, CLEAR_LINE);
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m_maincpu->set_input_line(M68K_IRQ_2, CLEAR_LINE);
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m_maincpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
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}
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}
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void vme_fcscsi1_card_device::cpu_space_map(address_map &map)
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{
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map(0xfffff0, 0xffffff).m(m_maincpu, FUNC(m68000_base_device::autovectors_map));
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map(0xfffff4, 0xfffff5).lr16("dmac irq", [this]() -> u16 {
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dmac_irq_state = 0;
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u16 vector = B41 ? dmac_irq_vector : 0x18+2;
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update_irq_to_maincpu();
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return vector;
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});
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}
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FLOPPY_FORMATS_MEMBER( vme_fcscsi1_card_device::floppy_formats )
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FLOPPY_PC_FORMAT
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@ -233,7 +282,7 @@ void vme_fcscsi1_card_device::device_add_mconfig(machine_config &config)
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/* basic machine hardware */
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M68010(config, m_maincpu, CPU_CRYSTAL / 2); /* 7474 based frequency divide by 2 */
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m_maincpu->set_addrmap(AS_PROGRAM, &vme_fcscsi1_card_device::fcscsi1_mem);
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m_maincpu->set_irq_acknowledge_callback(FUNC(vme_fcscsi1_card_device::maincpu_irq_acknowledge_callback));
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m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &vme_fcscsi1_card_device::cpu_space_map);
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/* FDC */
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WD1772(config, m_fdc, PIT_CRYSTAL / 2);
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@ -461,67 +510,6 @@ WRITE8_MEMBER (vme_fcscsi1_card_device::not_implemented_w){
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return;
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}
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/*
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----------------------------------------------------
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IRQ IRQ
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Level Source B4l inserted B4l removed (Def)
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-----------------------------------------------------
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1 P3 Pin #13 AV1 Autovector AV1 Autovector
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2 DMAC DMAC AV2 Autovector
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3 SCSIBC AV3 Autovector AV3 Autovector
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4 FDC AV4 Autovector AV4 Autovector
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5 PI/T Timer PI/T Timer Vect PI/T Timer Vect
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6 -- -- --
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7 PI/T Port PI/T Port Vect PI/T Port Vect
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------------------------------------------------------
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Default configuration: B41 jumper removed
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The PI/T port interrupt can be used under software control to
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cause non-maskable (Level 7) interrupts if the watchdog timer
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elapses and/or if the VMEbus interrupt trigger call occurs.
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*/
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/* TODO: Add configurable B41 jumper */
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#define B41 0
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void vme_fcscsi1_card_device::update_irq_to_maincpu() {
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if (fdc_irq_state) {
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m_maincpu->set_input_line(M68K_IRQ_3, ASSERT_LINE);
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m_maincpu->set_input_line(M68K_IRQ_2, CLEAR_LINE);
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m_maincpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
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} else if (dmac_irq_state) {
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m_maincpu->set_input_line(M68K_IRQ_3, CLEAR_LINE);
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m_maincpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
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#if B41 == 1
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m_maincpu->set_input_line_and_vector(M68K_IRQ_2, ASSERT_LINE, dmac_irq_vector);
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#else
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m_maincpu->set_input_line(M68K_IRQ_2, ASSERT_LINE);
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#endif
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} else {
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m_maincpu->set_input_line(M68K_IRQ_3, CLEAR_LINE);
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m_maincpu->set_input_line(M68K_IRQ_2, CLEAR_LINE);
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m_maincpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
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}
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}
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IRQ_CALLBACK_MEMBER(vme_fcscsi1_card_device::maincpu_irq_acknowledge_callback)
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{
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// We immediately update the interrupt presented to the CPU, so that it doesn't
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// end up retrying the same interrupt over and over. We then return the appropriate vector.
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int vector = 0;
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switch(irqline) {
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case 2:
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dmac_irq_state = 0;
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vector = dmac_irq_vector;
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break;
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default:
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logerror("\nUnexpected IRQ ACK Callback: IRQ %d\n", irqline);
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return 0;
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}
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update_irq_to_maincpu();
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return vector;
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}
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// This info isn't kept in a card driver atm so storing it as a comment for later use
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// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
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//COMP( 1986, fcscsi1, 0, 0, fcscsi1, fcscsi1, driver_device, 0, "Force Computers Gmbh", "SYS68K/SCSI-1", MACHINE_IS_SKELETON )
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@ -35,8 +35,6 @@ protected:
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int dmac_irq_vector;
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private:
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IRQ_CALLBACK_MEMBER(maincpu_irq_acknowledge_callback);
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//dmac
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DECLARE_WRITE8_MEMBER(dma_end);
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DECLARE_WRITE8_MEMBER(dma_error);
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@ -60,6 +58,7 @@ private:
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DECLARE_WRITE8_MEMBER(scsi_w);
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void fcscsi1_mem(address_map &map);
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void cpu_space_map(address_map &map);
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required_device<cpu_device> m_maincpu;
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required_device<wd1772_device> m_fdc;
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@ -22,6 +22,9 @@ constexpr int M68K_IC_SIZE = 128;
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/* There are 7 levels of interrupt to the 68K.
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* A transition from < 7 to 7 will cause a non-maskable interrupt (NMI).
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*
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* If disable_interrupt_mixer() has been called, the 3 interrupt lines
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* are modeled instead, as numbers 0-2.
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*/
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constexpr int M68K_IRQ_NONE = 0;
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constexpr int M68K_IRQ_1 = 1;
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@ -73,23 +76,6 @@ constexpr int M68K_HMMU_DISABLE = 0; /* no translation */
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constexpr int M68K_HMMU_ENABLE_II = 1; /* Mac II style fixed translation */
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constexpr int M68K_HMMU_ENABLE_LC = 2; /* Mac LC style fixed translation */
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/* Special interrupt acknowledge values.
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* Use these as special returns from the interrupt acknowledge callback
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* (specified later in this header).
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*/
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/* Causes an interrupt autovector (0x18 + interrupt level) to be taken.
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* This happens in a real 68K if VPA or AVEC is asserted during an interrupt
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* acknowledge cycle instead of DTACK.
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*/
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constexpr uint32_t M68K_INT_ACK_AUTOVECTOR = 0xffffffff;
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/* Causes the spurious interrupt vector (0x18) to be taken
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* This happens in a real 68K if BERR is asserted during the interrupt
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* acknowledge cycle (i.e. no devices responded to the acknowledge).
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*/
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constexpr uint32_t M68K_INT_ACK_SPURIOUS = 0xfffffffe;
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enum
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{
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/* NOTE: M68K_SP fetches the current SP, be it USP, ISP, or MSP */
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@ -106,10 +92,15 @@ enum
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class m68000_base_device : public cpu_device
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{
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public:
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enum {
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AS_CPU_SPACE = 4
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};
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// construction/destruction
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m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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void autovectors_map(address_map &map);
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protected:
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void presave();
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void postload();
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@ -122,9 +113,8 @@ protected:
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// device_execute_interface overrides
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virtual uint32_t execute_min_cycles() const override { return 4; };
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virtual uint32_t execute_max_cycles() const override { return 158; };
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virtual uint32_t execute_input_lines() const override { return 8; }; // number of input lines
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virtual uint32_t execute_default_irq_vector(int inputnum) const override { return M68K_INT_ACK_AUTOVECTOR; }
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virtual bool execute_input_edge_triggered(int inputnum) const override { return inputnum == M68K_IRQ_7; }
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virtual uint32_t execute_input_lines() const override { return m_interrupt_mixer ? 8 : 3; }; // number of input lines
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virtual bool execute_input_edge_triggered(int inputnum) const override { return m_interrupt_mixer ? inputnum == M68K_IRQ_7 : false; }
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virtual void execute_run() override;
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virtual void execute_set_input(int inputnum, int state) override;
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@ -138,6 +128,7 @@ protected:
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// address spaces
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const address_space_config m_program_config, m_oprogram_config;
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address_space_config m_cpu_space_config;
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void define_state(void);
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@ -151,6 +142,8 @@ public:
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int get_pmmu_enable() {return m_pmmu_enabled;};
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void set_fpu_enable(int enable);
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void set_buserror_details(uint32_t fault_addr, uint8_t rw, uint8_t fc);
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void disable_interrupt_mixer() { m_interrupt_mixer = false; }
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void set_cpu_space(int space_id) { m_cpu_space_id = space_id; }
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protected:
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m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
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@ -161,6 +154,8 @@ protected:
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int m_has_fpu; /* Indicates if a FPU is available (yes on 030, 040, may be on 020) */
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bool m_interrupt_mixer; /* Indicates whether to put a virtual 8->3 priority mixer on the input lines (default true) */
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int m_cpu_space_id; /* CPU space address space id (default AS_CPU_SPACE) */
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uint32_t m_cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */
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//
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@ -232,8 +227,6 @@ protected:
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const uint8_t* m_cyc_exception;
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/* Callbacks to host */
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device_irq_acknowledge_delegate m_int_ack_callback; /* Interrupt Acknowledge */
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write32_delegate m_bkpt_ack_callback; /* Breakpoint Acknowledge */
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write_line_delegate m_reset_instr_callback; /* Called when a RESET instruction is encountered */
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write32_delegate m_cmpild_instr_callback; /* Called when a CMPI.L #v, Dn instruction is encountered */
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write_line_delegate m_rte_instr_callback; /* Called when a RTE instruction is encountered */
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@ -241,7 +234,7 @@ protected:
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allowing writeback to be disabled globally or selectively
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or other side effects to be implemented */
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address_space *m_program, *m_oprogram;
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address_space *m_program, *m_oprogram, *m_cpu_space;
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/* Redirect memory calls */
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@ -324,6 +317,7 @@ protected:
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void init_cpu_scc68070(void);
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void init_cpu_coldfire(void);
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void default_autovectors_map(address_map &map);
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void m68ki_exception_interrupt(uint32_t int_level);
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@ -640,9 +640,12 @@ void m68000_base_device::set_irq_line(int irqline, int state)
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vstate &= ~(1 << irqline);
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m_virq_state = vstate;
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for(blevel = 7; blevel > 0; blevel--)
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if(vstate & (1 << blevel))
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break;
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if(m_interrupt_mixer) {
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for(blevel = 7; blevel > 0; blevel--)
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if(vstate & (1 << blevel))
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break;
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} else
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blevel = vstate;
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m_int_level = blevel << 8;
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@ -920,7 +923,7 @@ void m68000_base_device::init_cpu_common(void)
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//this = device;//deviceparam;
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m_program = &space(AS_PROGRAM);
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m_oprogram = has_space(AS_OPCODES) ? &space(AS_OPCODES) : m_program;
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m_int_ack_callback = device_irq_acknowledge_delegate(FUNC(m68000_base_device::standard_irq_callback_member), this);
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m_cpu_space = &space(m_cpu_space_id);
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/* disable all MMUs */
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m_has_pmmu = 0;
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@ -2119,18 +2122,19 @@ void m68000_base_device::m68ki_exception_interrupt(uint32_t int_level)
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if(m_stopped)
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return;
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/* Acknowledge the interrupt */
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vector = m_int_ack_callback(*this, int_level);
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/* Inform the device than an interrupt is taken */
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if(m_interrupt_mixer)
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standard_irq_callback(int_level);
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else
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for(int i=0; i<3; i++)
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if(int_level & (1<<i))
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standard_irq_callback(i);
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/* Get the interrupt vector */
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if(vector == M68K_INT_ACK_AUTOVECTOR)
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/* Use the autovectors. This is the most commonly used implementation */
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vector = EXCEPTION_INTERRUPT_AUTOVECTOR+int_level;
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else if(vector == M68K_INT_ACK_SPURIOUS)
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/* Called if no devices respond to the interrupt acknowledge */
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vector = EXCEPTION_SPURIOUS_INTERRUPT;
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else if(vector > 255)
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return;
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/* Acknowledge the interrupt by reading the cpu space. */
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/* We require the handlers for autovector to return the correct
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vector, including for spurious interrupts. */
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vector = m_cpu_space->read_word(0xfffffff0 | (int_level << 1)) & 0xff;
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/* Start exception processing */
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sr = m68ki_init_exception();
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@ -2170,7 +2174,10 @@ m68000_base_device::m68000_base_device(const machine_config &mconfig, const char
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const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits, address_map_constructor internal_map)
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: cpu_device(mconfig, type, tag, owner, clock),
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m_program_config("program", ENDIANNESS_BIG, prg_data_width, prg_address_bits, 0, internal_map),
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m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, prg_data_width, prg_address_bits, 0, internal_map)
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m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, prg_data_width, prg_address_bits, 0, internal_map),
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m_cpu_space_config("cpu space", ENDIANNESS_BIG, prg_data_width, prg_address_bits, 0, address_map_constructor(FUNC(m68000_base_device::default_autovectors_map), this)),
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m_interrupt_mixer(true),
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m_cpu_space_id(AS_CPU_SPACE)
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{
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clear_all();
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}
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@ -2180,7 +2187,10 @@ m68000_base_device::m68000_base_device(const machine_config &mconfig, const char
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const device_type type, uint32_t prg_data_width, uint32_t prg_address_bits)
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: cpu_device(mconfig, type, tag, owner, clock),
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m_program_config("program", ENDIANNESS_BIG, prg_data_width, prg_address_bits),
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m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, prg_data_width, prg_address_bits)
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m_oprogram_config("decrypted_opcodes", ENDIANNESS_BIG, prg_data_width, prg_address_bits),
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m_cpu_space_config("cpu space", ENDIANNESS_BIG, prg_data_width, prg_address_bits, 0, address_map_constructor(FUNC(m68000_base_device::default_autovectors_map), this)),
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m_interrupt_mixer(true),
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m_cpu_space_id(AS_CPU_SPACE)
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{
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clear_all();
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}
|
||||
@ -2257,7 +2267,6 @@ void m68000_base_device::clear_all()
|
||||
m_cyc_instruction = nullptr;
|
||||
m_cyc_exception = nullptr;
|
||||
|
||||
m_int_ack_callback = device_irq_acknowledge_delegate();
|
||||
m_program = nullptr;
|
||||
|
||||
m_space = nullptr;
|
||||
@ -2302,6 +2311,19 @@ void m68000_base_device::clear_all()
|
||||
m_internal = nullptr;
|
||||
}
|
||||
|
||||
void m68000_base_device::autovectors_map(address_map &map)
|
||||
{
|
||||
// Eventually add the sync to E due to vpa
|
||||
map(0x2, 0xf).lr16("autovectors", [](offs_t offset) -> u16 { return 0x19+offset; });
|
||||
}
|
||||
|
||||
void m68000_base_device::default_autovectors_map(address_map &map)
|
||||
{
|
||||
if(m_cpu_space_id == AS_CPU_SPACE && !has_configured_map(AS_CPU_SPACE)) {
|
||||
offs_t mask = make_bitmask<offs_t>(m_program_config.addr_width());
|
||||
map(mask - 0xf, mask).m(*this, FUNC(m68000_base_device::autovectors_map));
|
||||
}
|
||||
}
|
||||
|
||||
void m68000_base_device::device_start()
|
||||
{
|
||||
@ -2344,14 +2366,27 @@ void m68000_base_device::execute_set_input(int inputnum, int state)
|
||||
device_memory_interface::space_config_vector m68000_base_device::memory_space_config() const
|
||||
{
|
||||
if(has_configured_map(AS_OPCODES))
|
||||
return space_config_vector {
|
||||
std::make_pair(AS_PROGRAM, &m_program_config),
|
||||
std::make_pair(AS_OPCODES, &m_oprogram_config)
|
||||
};
|
||||
if(m_cpu_space_id == AS_CPU_SPACE)
|
||||
return space_config_vector {
|
||||
std::make_pair(AS_PROGRAM, &m_program_config),
|
||||
std::make_pair(AS_OPCODES, &m_oprogram_config),
|
||||
std::make_pair(AS_CPU_SPACE, &m_cpu_space_config)
|
||||
};
|
||||
else
|
||||
return space_config_vector {
|
||||
std::make_pair(AS_PROGRAM, &m_program_config),
|
||||
std::make_pair(AS_OPCODES, &m_oprogram_config)
|
||||
};
|
||||
else
|
||||
return space_config_vector {
|
||||
std::make_pair(AS_PROGRAM, &m_program_config)
|
||||
};
|
||||
if(m_cpu_space_id == AS_CPU_SPACE)
|
||||
return space_config_vector {
|
||||
std::make_pair(AS_PROGRAM, &m_program_config),
|
||||
std::make_pair(AS_CPU_SPACE, &m_cpu_space_config)
|
||||
};
|
||||
else
|
||||
return space_config_vector {
|
||||
std::make_pair(AS_PROGRAM, &m_program_config)
|
||||
};
|
||||
}
|
||||
|
||||
|
||||
|
@ -166,9 +166,8 @@ void bim68153_device::device_reset()
|
||||
cycle is initiated in BIM by receiving IACK low R/W, A1, A2, A3 are latched, and the interrupt level on line A1-A3
|
||||
is compared with any interrupt requests pending in the chip. Further activity can be one of four cases.*/
|
||||
#define MAX_VECTOR 255
|
||||
IRQ_CALLBACK_MEMBER(bim68153_device::iack)
|
||||
u16 bim68153_device::iack(int irqline)
|
||||
{
|
||||
int vec = M68K_INT_ACK_AUTOVECTOR;
|
||||
int found = 0;
|
||||
// int level = 0;
|
||||
int ch = -1;
|
||||
@ -183,7 +182,7 @@ IRQ_CALLBACK_MEMBER(bim68153_device::iack)
|
||||
LOGIACK(" - IRQ cleared due to IACKIN\n");
|
||||
m_out_iackout_cb(CLEAR_LINE);
|
||||
m_out_int_cb(CLEAR_LINE); // should really be tristated
|
||||
return MAX_VECTOR + 1; // This is a 68K emulation specific response and will terminate the iack cycle
|
||||
return 0x18;
|
||||
}
|
||||
|
||||
for (auto & elem : m_chn)
|
||||
@ -205,10 +204,11 @@ IRQ_CALLBACK_MEMBER(bim68153_device::iack)
|
||||
{
|
||||
m_out_iackout_cb(CLEAR_LINE); // No more interrupts to serve, pass the message to next device in daisy chain
|
||||
m_out_int_cb(CLEAR_LINE); // should really be tristated but board driver must make sure to mitigate if this is a problem
|
||||
return MAX_VECTOR + 1; // This is a 68K emulation specific response and will terminate the iack cycle
|
||||
return 0x18;
|
||||
}
|
||||
|
||||
m_irq_level = m_chn[ch]->m_control & bim68153_channel::REG_CNTRL_INT_LVL_MSK;
|
||||
int vec;
|
||||
|
||||
if ((m_chn[ch]->m_control & bim68153_channel::REG_CNTRL_INT_EXT) == 0)
|
||||
{
|
||||
|
@ -104,7 +104,7 @@ public:
|
||||
// construction/destruction
|
||||
bim68153_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
IRQ_CALLBACK_MEMBER(iack);
|
||||
u16 iack(int irqline);
|
||||
int acknowledge();
|
||||
int get_irq_level();
|
||||
|
||||
|
@ -67,8 +67,15 @@ void m68340_cpu_device::update_ipl()
|
||||
}
|
||||
}
|
||||
|
||||
IRQ_CALLBACK_MEMBER(m68340_cpu_device::int_ack)
|
||||
void m68340_cpu_device::internal_vectors_r(address_map &map)
|
||||
{
|
||||
map(0xfffff2, 0xffffff).r(FUNC(m68340_cpu_device::int_ack));
|
||||
}
|
||||
|
||||
|
||||
u16 m68340_cpu_device::int_ack(offs_t offset)
|
||||
{
|
||||
int irqline = offset + 1;
|
||||
uint8_t pit_iarb = pit_arbitrate(irqline);
|
||||
uint8_t scu_iarb = m_serial->arbitrate(irqline);
|
||||
uint8_t t1_iarb = m_timer[0]->arbitrate(irqline);
|
||||
@ -76,7 +83,7 @@ IRQ_CALLBACK_MEMBER(m68340_cpu_device::int_ack)
|
||||
uint8_t iarb = std::max({pit_iarb, scu_iarb, t1_iarb, t2_iarb});
|
||||
LOGMASKED(LOG_IPL, "Level %d interrupt arbitration: PIT = %X, SCU = %X, T1 = %X, T2 = %X\n", irqline, pit_iarb, scu_iarb, t1_iarb, t2_iarb);
|
||||
int response = 0;
|
||||
uint32_t vector = standard_irq_callback(irqline);
|
||||
uint32_t vector = 0x18; // Spurious interrupt
|
||||
|
||||
// Valid IARB levels are F (high) to 1 (low) and should be unique among modules using the same interrupt level
|
||||
if (iarb != 0)
|
||||
@ -228,6 +235,7 @@ m68340_cpu_device::m68340_cpu_device(const machine_config &mconfig, const char *
|
||||
m_m68340DMA = nullptr;
|
||||
m_m68340_base = 0;
|
||||
m_ipl = 0;
|
||||
m_cpu_space_config.m_internal_map = address_map_constructor(FUNC(m68340_cpu_device::internal_vectors_r), this);
|
||||
}
|
||||
|
||||
void m68340_cpu_device::device_reset()
|
||||
@ -259,8 +267,6 @@ void m68340_cpu_device::device_start()
|
||||
m_m68340_base = 0x00000000;
|
||||
|
||||
m_internal = &space(AS_PROGRAM);
|
||||
|
||||
m_int_ack_callback = device_irq_acknowledge_delegate(FUNC(m68340_cpu_device::int_ack), this);
|
||||
}
|
||||
|
||||
void m68340_cpu_device::m68k_reset_peripherals()
|
||||
|
@ -56,7 +56,8 @@ private:
|
||||
required_device_array<mc68340_timer_module_device, 2> m_timer;
|
||||
|
||||
void update_ipl();
|
||||
IRQ_CALLBACK_MEMBER(int_ack);
|
||||
void internal_vectors_r(address_map &map);
|
||||
u16 int_ack(offs_t offset);
|
||||
|
||||
TIMER_CALLBACK_MEMBER(periodic_interrupt_timer_callback);
|
||||
|
||||
|
@ -253,9 +253,9 @@ void fga002_device::trigger_interrupt(uint8_t data)
|
||||
m_out_int_cb(ASSERT_LINE);
|
||||
}
|
||||
|
||||
IRQ_CALLBACK_MEMBER(fga002_device::iack)
|
||||
u16 fga002_device::iack()
|
||||
{
|
||||
int vec = M68K_INT_ACK_AUTOVECTOR;
|
||||
int vec = 0x18; // Spurious interrupt
|
||||
int vec_found = 0;
|
||||
int level;
|
||||
|
||||
@ -295,7 +295,7 @@ IRQ_CALLBACK_MEMBER(fga002_device::iack)
|
||||
default: break; /* Since we need the vector for the switch statement the default job is already done */
|
||||
}
|
||||
LOGVEC("dev:%02x ", vec);
|
||||
if (vec == INT_ACK_AUTOVECTOR) vec = INT_EMPTY;
|
||||
if (vec == 0x18) vec = INT_EMPTY;
|
||||
LOGVEC("avec:%02x ", vec);
|
||||
|
||||
// Add vector page bits and return vector
|
||||
|
@ -25,7 +25,7 @@ class fga002_device : public device_t
|
||||
DECLARE_WRITE_LINE_MEMBER( lirq6_w );
|
||||
DECLARE_WRITE_LINE_MEMBER( lirq7_w );
|
||||
|
||||
IRQ_CALLBACK_MEMBER(iack);
|
||||
u16 iack();
|
||||
int acknowledge();
|
||||
int get_irq_level();
|
||||
|
||||
|
@ -353,6 +353,11 @@ void mc68328_device::internal_map(address_map &map)
|
||||
map(0xfff000, 0xffffff).rw(FUNC(mc68328_device::internal_read), FUNC(mc68328_device::internal_write));
|
||||
}
|
||||
|
||||
void mc68328_device::cpu_space_map(address_map &map)
|
||||
{
|
||||
map(0xfffff2, 0xffffff).r(FUNC(mc68328_device::irq_callback));
|
||||
}
|
||||
|
||||
|
||||
mc68328_device::mc68328_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
: m68000_device(mconfig, tag, owner, clock, MC68328, 16, 24, address_map_constructor(FUNC(mc68328_device::internal_map), this))
|
||||
@ -448,8 +453,6 @@ void mc68328_device::device_reset()
|
||||
{
|
||||
m68000_device::device_reset();
|
||||
|
||||
m_int_ack_callback = device_irq_acknowledge_delegate(FUNC(mc68328_device::vector_gen), this);
|
||||
|
||||
m_regs.scr = 0x0c;
|
||||
m_regs.grpbasea = 0x0000;
|
||||
m_regs.grpbaseb = 0x0000;
|
||||
@ -705,9 +708,9 @@ void mc68328_device::set_port_d_lines(uint8_t state, int bit)
|
||||
poll_port_d_interrupts();
|
||||
}
|
||||
|
||||
IRQ_CALLBACK_MEMBER( mc68328_device::vector_gen )
|
||||
u16 mc68328_device::irq_callback(offs_t offset)
|
||||
{
|
||||
return m_regs.ivr | irqline;
|
||||
return m_regs.ivr | (offset + 1);
|
||||
}
|
||||
|
||||
uint32_t mc68328_device::get_timer_frequency(uint32_t index)
|
||||
|
@ -330,7 +330,8 @@ private:
|
||||
// internal state
|
||||
void set_interrupt_line(uint32_t line, uint32_t active);
|
||||
void poll_port_d_interrupts();
|
||||
IRQ_CALLBACK_MEMBER(vector_gen);
|
||||
void cpu_space_map(address_map &map);
|
||||
u16 irq_callback(offs_t offset);
|
||||
uint32_t get_timer_frequency(uint32_t index);
|
||||
void maybe_start_timer(uint32_t index, uint32_t new_enable);
|
||||
void timer_compare_event(uint32_t index);
|
||||
|
@ -1114,30 +1114,31 @@ WRITE8_MEMBER( mc68901_device::write )
|
||||
}
|
||||
|
||||
|
||||
int mc68901_device::get_vector()
|
||||
u16 mc68901_device::get_vector()
|
||||
{
|
||||
int ch;
|
||||
|
||||
for (ch = 15; ch >= 0; ch--)
|
||||
for (int ch = 15; ch >= 0; ch--)
|
||||
{
|
||||
if (BIT(m_imr, ch) && BIT(m_ipr, ch))
|
||||
{
|
||||
if (m_vr & VR_S)
|
||||
if (!machine().side_effects_disabled())
|
||||
{
|
||||
/* set interrupt-in-service bit */
|
||||
m_isr |= (1 << ch);
|
||||
if (m_vr & VR_S)
|
||||
{
|
||||
/* set interrupt-in-service bit */
|
||||
m_isr |= (1 << ch);
|
||||
}
|
||||
|
||||
/* clear interrupt pending bit */
|
||||
m_ipr &= ~(1 << ch);
|
||||
|
||||
check_interrupts();
|
||||
}
|
||||
|
||||
/* clear interrupt pending bit */
|
||||
m_ipr &= ~(1 << ch);
|
||||
|
||||
check_interrupts();
|
||||
|
||||
return (m_vr & 0xf0) | ch;
|
||||
}
|
||||
}
|
||||
|
||||
return M68K_INT_ACK_SPURIOUS;
|
||||
return 0x18; // Spurious irq
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER( mc68901_device::i0_w ) { gpio_input(0, state); }
|
||||
|
@ -75,7 +75,7 @@ public:
|
||||
DECLARE_READ8_MEMBER( read );
|
||||
DECLARE_WRITE8_MEMBER( write );
|
||||
|
||||
int get_vector();
|
||||
u16 get_vector();
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER( i0_w );
|
||||
DECLARE_WRITE_LINE_MEMBER( i1_w );
|
||||
|
@ -284,7 +284,7 @@ void sega_scu_device::device_timer(emu_timer &timer, device_timer_id id, int par
|
||||
const uint16_t irqmask = 1 << (11-id);
|
||||
|
||||
if(!(m_ism & irqmask))
|
||||
m_hostcpu->set_input_line_and_vector(irqlevel, HOLD_LINE, irqvector);
|
||||
m_hostcpu->set_input_line_and_vector(irqlevel, HOLD_LINE, irqvector); // SH2
|
||||
else
|
||||
m_ist |= (irqmask);
|
||||
|
||||
@ -400,7 +400,7 @@ void sega_scu_device::handle_dma_direct(uint8_t level)
|
||||
{
|
||||
//popmessage("Warning: SCU transfer from BIOS area, contact MAMEdev");
|
||||
if(!(m_ism & IRQ_DMAILL))
|
||||
m_hostcpu->set_input_line_and_vector(3, HOLD_LINE, 0x4c);
|
||||
m_hostcpu->set_input_line_and_vector(3, HOLD_LINE, 0x4c); // SH2
|
||||
else
|
||||
m_ist |= (IRQ_DMAILL);
|
||||
return;
|
||||
@ -620,7 +620,7 @@ void sega_scu_device::check_scanline_timers(int scanline,int y_step)
|
||||
{
|
||||
if(!(m_ism & IRQ_TIMER_0))
|
||||
{
|
||||
m_hostcpu->set_input_line_and_vector(0xc, HOLD_LINE, 0x43 );
|
||||
m_hostcpu->set_input_line_and_vector(0xc, HOLD_LINE, 0x43 ); // SH2
|
||||
dma_start_factor_ack(3);
|
||||
}
|
||||
else
|
||||
@ -635,7 +635,7 @@ void sega_scu_device::check_scanline_timers(int scanline,int y_step)
|
||||
{
|
||||
if(!(m_ism & IRQ_TIMER_1))
|
||||
{
|
||||
m_hostcpu->set_input_line_and_vector(0xb, HOLD_LINE, 0x44 );
|
||||
m_hostcpu->set_input_line_and_vector(0xb, HOLD_LINE, 0x44 ); // SH2
|
||||
dma_start_factor_ack(4);
|
||||
}
|
||||
else
|
||||
@ -692,7 +692,7 @@ void sega_scu_device::test_pending_irqs()
|
||||
{
|
||||
if(irq_level[i] != -1) /* TODO: cheap check for undefined irqs */
|
||||
{
|
||||
m_hostcpu->set_input_line_and_vector(irq_level[i], HOLD_LINE, 0x40 + i);
|
||||
m_hostcpu->set_input_line_and_vector(irq_level[i], HOLD_LINE, 0x40 + i); // SH2
|
||||
m_ist &= ~(1 << i);
|
||||
return; /* avoid spurious irqs, correct? */
|
||||
}
|
||||
@ -707,7 +707,7 @@ WRITE_LINE_MEMBER(sega_scu_device::vblank_out_w)
|
||||
|
||||
if(!(m_ism & IRQ_VBLANK_OUT))
|
||||
{
|
||||
m_hostcpu->set_input_line_and_vector(0xe, HOLD_LINE, 0x41);
|
||||
m_hostcpu->set_input_line_and_vector(0xe, HOLD_LINE, 0x41); // SH2
|
||||
dma_start_factor_ack(1);
|
||||
}
|
||||
else
|
||||
@ -721,7 +721,7 @@ WRITE_LINE_MEMBER(sega_scu_device::vblank_in_w)
|
||||
|
||||
if(!(m_ism & IRQ_VBLANK_IN))
|
||||
{
|
||||
m_hostcpu->set_input_line_and_vector(0xf, HOLD_LINE ,0x40);
|
||||
m_hostcpu->set_input_line_and_vector(0xf, HOLD_LINE ,0x40); // SH2
|
||||
dma_start_factor_ack(0);
|
||||
}
|
||||
else
|
||||
@ -735,7 +735,7 @@ WRITE_LINE_MEMBER(sega_scu_device::hblank_in_w)
|
||||
|
||||
if(!(m_ism & IRQ_HBLANK_IN))
|
||||
{
|
||||
m_hostcpu->set_input_line_and_vector(0xd, HOLD_LINE, 0x42);
|
||||
m_hostcpu->set_input_line_and_vector(0xd, HOLD_LINE, 0x42); // SH2
|
||||
dma_start_factor_ack(2);
|
||||
}
|
||||
else
|
||||
@ -749,7 +749,7 @@ WRITE_LINE_MEMBER(sega_scu_device::vdp1_end_w)
|
||||
|
||||
if(!(m_ism & IRQ_VDP1_END))
|
||||
{
|
||||
m_hostcpu->set_input_line_and_vector(0x2, HOLD_LINE, 0x4d);
|
||||
m_hostcpu->set_input_line_and_vector(0x2, HOLD_LINE, 0x4d); // SH2
|
||||
dma_start_factor_ack(6);
|
||||
}
|
||||
else
|
||||
@ -763,7 +763,7 @@ WRITE_LINE_MEMBER(sega_scu_device::sound_req_w)
|
||||
|
||||
if(!(m_ism & IRQ_SOUND_REQ))
|
||||
{
|
||||
m_hostcpu->set_input_line_and_vector(9, HOLD_LINE, 0x46);
|
||||
m_hostcpu->set_input_line_and_vector(9, HOLD_LINE, 0x46); // SH2
|
||||
dma_start_factor_ack(5);
|
||||
}
|
||||
else
|
||||
@ -776,7 +776,7 @@ WRITE_LINE_MEMBER(sega_scu_device::smpc_irq_w)
|
||||
return;
|
||||
|
||||
if(!(m_ism & IRQ_SMPC))
|
||||
m_hostcpu->set_input_line_and_vector(8, HOLD_LINE, 0x47);
|
||||
m_hostcpu->set_input_line_and_vector(8, HOLD_LINE, 0x47); // SH2
|
||||
else
|
||||
m_ist |= (IRQ_SMPC);
|
||||
}
|
||||
@ -787,7 +787,7 @@ WRITE_LINE_MEMBER(sega_scu_device::scudsp_end_w)
|
||||
return;
|
||||
|
||||
if(!(m_ism & IRQ_DSP_END))
|
||||
m_hostcpu->set_input_line_and_vector(0xa, HOLD_LINE, 0x45);
|
||||
m_hostcpu->set_input_line_and_vector(0xa, HOLD_LINE, 0x45); // SH2
|
||||
else
|
||||
m_ist |= (IRQ_DSP_END);
|
||||
|
||||
|
@ -148,6 +148,7 @@ tmp68301_device::tmp68301_device(const machine_config &mconfig, const char *tag,
|
||||
{
|
||||
memset(m_regs, 0, sizeof(m_regs));
|
||||
memset(m_icr, 0, sizeof(m_icr));
|
||||
m_cpu_space_config.m_internal_map = address_map_constructor(FUNC(tmp68301_device::internal_vectors_r), this);
|
||||
}
|
||||
|
||||
|
||||
@ -166,7 +167,6 @@ void tmp68301_device::device_start()
|
||||
m_out_parallel_cb.resolve_safe();
|
||||
|
||||
m_program->install_device(0xfffc00, 0xffffff, *this, &tmp68301_device::tmp68301_regs);
|
||||
m_int_ack_callback = device_irq_acknowledge_delegate(FUNC(tmp68301_device::irq_callback), this);
|
||||
|
||||
save_item(NAME(m_regs));
|
||||
save_item(NAME(m_icr));
|
||||
@ -198,8 +198,15 @@ void tmp68301_device::device_reset()
|
||||
// INLINE HELPERS
|
||||
//**************************************************************************
|
||||
|
||||
IRQ_CALLBACK_MEMBER(tmp68301_device::irq_callback)
|
||||
void tmp68301_device::internal_vectors_r(address_map &map)
|
||||
{
|
||||
map(0xfffff2, 0xffffff).r(FUNC(tmp68301_device::irq_callback));
|
||||
}
|
||||
|
||||
|
||||
u16 tmp68301_device::irq_callback(offs_t offset)
|
||||
{
|
||||
int irqline = offset + 1;
|
||||
uint8_t IVNR = m_regs[0x9a/2] & 0xe0; // Interrupt Vector Number Register (IVNR)
|
||||
|
||||
for (int src : { 0, 7, 3, 1, 8, 4, 5, 9, 2 })
|
||||
|
@ -51,8 +51,6 @@ private:
|
||||
|
||||
void tmp68301_regs(address_map &map);
|
||||
|
||||
IRQ_CALLBACK_MEMBER(irq_callback);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
@ -92,6 +90,9 @@ private:
|
||||
uint16_t m_pdir;
|
||||
uint16_t m_pdr;
|
||||
uint8_t m_icr[10];
|
||||
|
||||
void internal_vectors_r(address_map &map);
|
||||
u16 irq_callback(offs_t offset);
|
||||
};
|
||||
|
||||
DECLARE_DEVICE_TYPE(TMP68301, tmp68301_device)
|
||||
|
@ -1822,7 +1822,7 @@ TIMER_CALLBACK_MEMBER(saturn_state::vdp1_draw_end )
|
||||
#if 0
|
||||
if(!(m_scu.ism & IRQ_VDP1_END))
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(0x2, HOLD_LINE, 0x4d);
|
||||
m_maincpu->set_input_line_and_vector(0x2, HOLD_LINE, 0x4d); // SH2
|
||||
scu_do_transfer(6);
|
||||
}
|
||||
else
|
||||
|
@ -529,7 +529,7 @@ WRITE8_MEMBER(mario_state::masao_sh_irqtrigger_w)
|
||||
if (m_last == 1 && data == 0)
|
||||
{
|
||||
/* setting bit 0 high then low triggers IRQ on the sound CPU */
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
m_last = data;
|
||||
|
@ -137,7 +137,7 @@ WRITE_LINE_MEMBER(timeplt_audio_device::sh_irqtrigger_w)
|
||||
if (m_last_irq_state == 0 && state)
|
||||
{
|
||||
/* setting bit 0 low then high triggers IRQ on the sound CPU */
|
||||
m_soundcpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_soundcpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
m_last_irq_state = state;
|
||||
|
@ -125,7 +125,7 @@ WRITE_LINE_MEMBER(trackfld_audio_device::sh_irqtrigger_w)
|
||||
if (m_last_irq == 0 && state)
|
||||
{
|
||||
/* setting bit 0 low then high triggers IRQ on the sound CPU */
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
m_last_irq = state;
|
||||
|
@ -175,10 +175,10 @@ TIMER_DEVICE_CALLBACK_MEMBER(_1942_state::_1942_scanline)
|
||||
int scanline = param;
|
||||
|
||||
if(scanline == 240) // vblank-out irq
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xd7); /* RST 10h - vblank */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xd7); /* Z80 - RST 10h - vblank */
|
||||
|
||||
if(scanline == 0) // unknown irq event, presumably vblank-in or a periodic one (writes to the soundlatch and drives freeze dip-switch)
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xcf); /* RST 08h */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xcf); /* Z80 - RST 08h */
|
||||
}
|
||||
|
||||
|
||||
|
@ -69,7 +69,7 @@ WRITE8_MEMBER(_88games_state::k88games_5f84_w)
|
||||
|
||||
WRITE8_MEMBER(_88games_state::k88games_sh_irqtrigger_w)
|
||||
{
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
|
||||
|
@ -804,35 +804,14 @@ WRITE_LINE_MEMBER( abc1600_state::nmi_w )
|
||||
// MACHINE INITIALIZATION
|
||||
//**************************************************************************
|
||||
|
||||
//-------------------------------------------------
|
||||
// IRQ_CALLBACK_MEMBER( abc1600_int_ack )
|
||||
//-------------------------------------------------
|
||||
|
||||
IRQ_CALLBACK_MEMBER( abc1600_state::abc1600_int_ack )
|
||||
void abc1600_state::cpu_space_map(address_map &map)
|
||||
{
|
||||
int data = 0;
|
||||
|
||||
switch (irqline)
|
||||
{
|
||||
case M68K_IRQ_2:
|
||||
data = m_cio->intack_r();
|
||||
break;
|
||||
|
||||
case M68K_IRQ_5:
|
||||
data = m_dart->m1_r();
|
||||
break;
|
||||
|
||||
case M68K_IRQ_7:
|
||||
m_maincpu->set_input_line(M68K_IRQ_7, CLEAR_LINE);
|
||||
|
||||
data = M68K_INT_ACK_AUTOVECTOR;
|
||||
break;
|
||||
}
|
||||
|
||||
return data;
|
||||
map(0xfffff0, 0xffffff).m(m_maincpu, FUNC(m68000_base_device::autovectors_map));
|
||||
map(0xfffff4, 0xfffff5).lr16("cio int", [this]() -> u16 { return m_cio->intack_r(); });
|
||||
map(0xfffffa, 0xfffffb).lr16("dart int", [this]() -> u16 { return m_dart->m1_r(); });
|
||||
map(0xfffffe, 0xffffff).lr16("hmi int", [this]() -> u16 { m_maincpu->set_input_line(M68K_IRQ_7, CLEAR_LINE); return 0x18+7; });
|
||||
}
|
||||
|
||||
|
||||
void abc1600_state::machine_start()
|
||||
{
|
||||
// state saving
|
||||
@ -881,7 +860,7 @@ void abc1600_state::abc1600(machine_config &config)
|
||||
// basic machine hardware
|
||||
M68008(config, m_maincpu, 64_MHz_XTAL / 8);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &abc1600_state::abc1600_mem);
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(abc1600_state::abc1600_int_ack));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &abc1600_state::cpu_space_map);
|
||||
|
||||
// video hardware
|
||||
ABC1600_MOVER(config, ABC1600_MOVER_TAG, 0);
|
||||
|
@ -525,17 +525,17 @@ TIMER_DEVICE_CALLBACK_MEMBER(airbustr_state::airbustr_scanline)
|
||||
int scanline = param;
|
||||
|
||||
if(scanline == 240) // vblank-out irq
|
||||
m_master->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_master->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
|
||||
/* Pandora "sprite end dma" irq? TODO: timing is likely off */
|
||||
if(scanline == 64)
|
||||
m_master->set_input_line_and_vector(0, HOLD_LINE, 0xfd);
|
||||
m_master->set_input_line_and_vector(0, HOLD_LINE, 0xfd); // Z80
|
||||
}
|
||||
|
||||
/* Sub Z80 uses IM2 too, but 0xff irq routine just contains an irq ack in it */
|
||||
INTERRUPT_GEN_MEMBER(airbustr_state::slave_interrupt)
|
||||
{
|
||||
device.execute().set_input_line_and_vector(0, HOLD_LINE, 0xfd);
|
||||
device.execute().set_input_line_and_vector(0, HOLD_LINE, 0xfd); // Z80
|
||||
}
|
||||
|
||||
/* Machine Initialization */
|
||||
|
@ -209,10 +209,10 @@ TIMER_DEVICE_CALLBACK_MEMBER(airraid_state::cshooter_scanline)
|
||||
int scanline = param;
|
||||
|
||||
if(scanline == 240) // updates scroll resgiters
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xd7); /* RST 10h */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xd7); /* Z80 - RST 10h */
|
||||
|
||||
if(scanline == 250) // vblank-out irq
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xcf); /* RST 08h */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xcf); /* Z80 - RST 08h */
|
||||
}
|
||||
|
||||
|
||||
|
@ -1653,6 +1653,7 @@ void a1000_state::a1000(machine_config &config)
|
||||
// main cpu
|
||||
M68000(config, m_maincpu, amiga_state::CLK_7M_PAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &a1000_state::a1000_mem);
|
||||
m_maincpu->set_cpu_space(AS_PROGRAM);
|
||||
|
||||
ADDRESS_MAP_BANK(config, "overlay").set_map(&a1000_state::a1000_overlay_map).set_options(ENDIANNESS_BIG, 16, 22, 0x200000);
|
||||
ADDRESS_MAP_BANK(config, "bootrom").set_map(&a1000_state::a1000_bootrom_map).set_options(ENDIANNESS_BIG, 16, 19, 0x40000);
|
||||
@ -1689,6 +1690,7 @@ void a2000_state::a2000(machine_config &config)
|
||||
// main cpu
|
||||
M68000(config, m_maincpu, amiga_state::CLK_7M_PAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &a2000_state::a2000_mem);
|
||||
m_maincpu->set_cpu_space(AS_PROGRAM);
|
||||
|
||||
ADDRESS_MAP_BANK(config, "overlay").set_map(&amiga_state::overlay_512kb_map).set_options(ENDIANNESS_BIG, 16, 22, 0x200000);
|
||||
|
||||
@ -1737,6 +1739,7 @@ void a500_state::a500(machine_config &config)
|
||||
// main cpu
|
||||
M68000(config, m_maincpu, amiga_state::CLK_7M_PAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &a500_state::a500_mem);
|
||||
m_maincpu->set_cpu_space(AS_PROGRAM);
|
||||
|
||||
ADDRESS_MAP_BANK(config, "overlay").set_map(&amiga_state::overlay_1mb_map).set_options(ENDIANNESS_BIG, 16, 22, 0x200000);
|
||||
|
||||
@ -1775,6 +1778,7 @@ void cdtv_state::cdtv(machine_config &config)
|
||||
// main cpu
|
||||
M68000(config, m_maincpu, amiga_state::CLK_7M_PAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &cdtv_state::cdtv_mem);
|
||||
m_maincpu->set_cpu_space(AS_PROGRAM);
|
||||
|
||||
// remote control input converter
|
||||
m6502_device &u75(M6502(config, "u75", XTAL(3'000'000)));
|
||||
@ -1848,6 +1852,7 @@ void a3000_state::a3000(machine_config &config)
|
||||
// main cpu
|
||||
M68030(config, m_maincpu, XTAL(32'000'000) / 2);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &a3000_state::a3000_mem);
|
||||
m_maincpu->set_cpu_space(AS_PROGRAM);
|
||||
|
||||
ADDRESS_MAP_BANK(config, "overlay").set_map(&amiga_state::overlay_1mb_map32).set_options(ENDIANNESS_BIG, 32, 22, 0x200000);
|
||||
|
||||
@ -1884,6 +1889,7 @@ void a500p_state::a500p(machine_config &config)
|
||||
// main cpu
|
||||
M68000(config, m_maincpu, amiga_state::CLK_7M_PAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &a500p_state::a500p_mem);
|
||||
m_maincpu->set_cpu_space(AS_PROGRAM);
|
||||
|
||||
ADDRESS_MAP_BANK(config, "overlay").set_map(&amiga_state::overlay_1mb_map).set_options(ENDIANNESS_BIG, 16, 22, 0x200000);
|
||||
|
||||
@ -1923,6 +1929,7 @@ void a600_state::a600(machine_config &config)
|
||||
// main cpu
|
||||
M68000(config, m_maincpu, amiga_state::CLK_7M_PAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &a600_state::a600_mem);
|
||||
m_maincpu->set_cpu_space(AS_PROGRAM);
|
||||
|
||||
ADDRESS_MAP_BANK(config, "overlay").set_map(&amiga_state::overlay_2mb_map16).set_options(ENDIANNESS_BIG, 16, 22, 0x200000);
|
||||
|
||||
@ -1969,6 +1976,7 @@ void a1200_state::a1200(machine_config &config)
|
||||
// main cpu
|
||||
M68EC020(config, m_maincpu, amiga_state::CLK_28M_PAL / 2);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &a1200_state::a1200_mem);
|
||||
m_maincpu->set_cpu_space(AS_PROGRAM);
|
||||
|
||||
ADDRESS_MAP_BANK(config, "overlay").set_map(&amiga_state::overlay_2mb_map32).set_options(ENDIANNESS_BIG, 32, 22, 0x200000);
|
||||
|
||||
@ -2029,6 +2037,7 @@ void a4000_state::a4000(machine_config &config)
|
||||
// main cpu
|
||||
M68040(config, m_maincpu, XTAL(50'000'000) / 2);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &a4000_state::a4000_mem);
|
||||
m_maincpu->set_cpu_space(AS_PROGRAM);
|
||||
|
||||
ADDRESS_MAP_BANK(config, "overlay").set_map(&amiga_state::overlay_2mb_map32).set_options(ENDIANNESS_BIG, 32, 22, 0x200000);
|
||||
|
||||
@ -2073,6 +2082,7 @@ void a4000_state::a400030(machine_config &config)
|
||||
// main cpu
|
||||
M68EC030(config.replace(), m_maincpu, XTAL(50'000'000) / 2);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &a4000_state::a400030_mem);
|
||||
m_maincpu->set_cpu_space(AS_PROGRAM);
|
||||
|
||||
// todo: ide
|
||||
}
|
||||
@ -2097,6 +2107,7 @@ void cd32_state::cd32(machine_config &config)
|
||||
// main cpu
|
||||
M68EC020(config, m_maincpu, amiga_state::CLK_28M_PAL / 2);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &cd32_state::cd32_mem);
|
||||
m_maincpu->set_cpu_space(AS_PROGRAM);
|
||||
|
||||
ADDRESS_MAP_BANK(config, "overlay").set_map(&amiga_state::overlay_2mb_map32).set_options(ENDIANNESS_BIG, 32, 22, 0x200000);
|
||||
|
||||
@ -2149,6 +2160,7 @@ void a4000_state::a4000t(machine_config &config)
|
||||
// main cpu
|
||||
M68040(config.replace(), m_maincpu, XTAL(50'000'000) / 2);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &a4000_state::a4000t_mem);
|
||||
m_maincpu->set_cpu_space(AS_PROGRAM);
|
||||
|
||||
// todo: ide, zorro3, scsi, super dmac
|
||||
}
|
||||
|
@ -240,7 +240,7 @@ void amust_state::do_int()
|
||||
|| (BIT(m_port0a, 5) && m_drq)) // when reading from floppy, only do it when DRQ is high.
|
||||
{
|
||||
//printf("%X,%X,%X ",m_port0a,sync,m_drq);
|
||||
m_maincpu->set_input_line_and_vector(INPUT_LINE_IRQ0, ASSERT_LINE, 0x00);
|
||||
m_maincpu->set_input_line_and_vector(INPUT_LINE_IRQ0, ASSERT_LINE, 0x00); // Z80
|
||||
}
|
||||
else
|
||||
m_maincpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
|
||||
|
@ -268,18 +268,21 @@ void apollo_state::apollo_bus_error()
|
||||
apollo_csr_set_status_register(APOLLO_CSR_SR_CPU_TIMEOUT, APOLLO_CSR_SR_CPU_TIMEOUT);
|
||||
}
|
||||
|
||||
IRQ_CALLBACK_MEMBER(apollo_state::apollo_irq_acknowledge)
|
||||
void apollo_state::cpu_space_map(address_map &map)
|
||||
{
|
||||
int result = M68K_INT_ACK_AUTOVECTOR;
|
||||
map(0xfffff2, 0xffffff).r(FUNC(apollo_state::apollo_irq_acknowledge));
|
||||
}
|
||||
|
||||
m_maincpu->set_input_line(irqline, CLEAR_LINE);
|
||||
u16 apollo_state::apollo_irq_acknowledge(offs_t offset)
|
||||
{
|
||||
m_maincpu->set_input_line(offset+1, CLEAR_LINE);
|
||||
|
||||
MLOG2(("apollo_irq_acknowledge: interrupt level=%d", irqline));
|
||||
MLOG2(("apollo_irq_acknowledge: interrupt level=%d", offset+1));
|
||||
|
||||
if (irqline == 6) {
|
||||
result = apollo_pic_acknowledge(device, irqline);
|
||||
}
|
||||
return result;
|
||||
if (offset+1 == 6)
|
||||
return apollo_pic_get_vector();
|
||||
else
|
||||
return 0x19 + offset;
|
||||
}
|
||||
|
||||
/***************************************************************************
|
||||
@ -414,7 +417,7 @@ READ32_MEMBER(apollo_state::ram_with_parity_r){
|
||||
|
||||
if (apollo_csr_get_control_register() & APOLLO_CSR_CR_INTERRUPT_ENABLE) {
|
||||
// force parity error (if NMI is enabled)
|
||||
m_maincpu->set_input_line_and_vector(7, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR);
|
||||
m_maincpu->set_input_line(7, ASSERT_LINE);
|
||||
|
||||
}
|
||||
}
|
||||
@ -1047,7 +1050,7 @@ void apollo_state::dn3500(machine_config &config)
|
||||
/* basic machine hardware */
|
||||
M68030(config, m_maincpu, 25000000); /* 25 MHz 68030 */
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &apollo_state::dn3500_map);
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(apollo_state::apollo_irq_acknowledge));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &apollo_state::cpu_space_map);
|
||||
|
||||
config.m_minimum_quantum = attotime::from_hz(60);
|
||||
|
||||
@ -1066,7 +1069,7 @@ void apollo_state::dsp3500(machine_config &config)
|
||||
{
|
||||
M68030(config, m_maincpu, 25000000); /* 25 MHz 68030 */
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &apollo_state::dsp3500_map);
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(apollo_state::apollo_irq_acknowledge));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &apollo_state::cpu_space_map);
|
||||
config.m_minimum_quantum = attotime::from_hz(60);
|
||||
|
||||
apollo_terminal(config);
|
||||
@ -1102,7 +1105,7 @@ void apollo_state::dn3000(machine_config &config)
|
||||
{
|
||||
dn3500(config);
|
||||
M68020PMMU(config.replace(), m_maincpu, 12000000); /* 12 MHz */
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(apollo_state::apollo_irq_acknowledge));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &apollo_state::cpu_space_map);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &apollo_state::dn3000_map);
|
||||
config.device_remove( APOLLO_SIO2_TAG );
|
||||
m_ram->set_default_size("8M").set_extra_options("4M");
|
||||
@ -1114,7 +1117,7 @@ void apollo_state::dn3000(machine_config &config)
|
||||
void apollo_state::dsp3000(machine_config &config)
|
||||
{
|
||||
M68020PMMU(config, m_maincpu, 12000000); /* 12 MHz */
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(apollo_state::apollo_irq_acknowledge));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &apollo_state::cpu_space_map);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &apollo_state::dsp3000_map);
|
||||
config.m_minimum_quantum = attotime::from_hz(60);
|
||||
|
||||
@ -1160,7 +1163,7 @@ void apollo_state::dsp5500(machine_config &config)
|
||||
{
|
||||
M68040(config, m_maincpu, 25000000); /* 25 MHz */
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &apollo_state::dsp5500_map);
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(apollo_state::apollo_irq_acknowledge));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &apollo_state::cpu_space_map);
|
||||
config.m_minimum_quantum = attotime::from_hz(60);
|
||||
|
||||
apollo_terminal(config);
|
||||
|
@ -145,10 +145,10 @@ TIMER_DEVICE_CALLBACK_MEMBER(argus_state::scanline)
|
||||
int scanline = param;
|
||||
|
||||
if(scanline == 240) // vblank-out irq
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xd7); /* RST 10h */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xd7); /* Z80 - RST 10h */
|
||||
|
||||
if(scanline == 16) // vblank-in irq
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xcf); /* RST 08h */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xcf); /* Z80 - RST 08h */
|
||||
}
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(argus_state::butasan_scanline)
|
||||
@ -156,10 +156,10 @@ TIMER_DEVICE_CALLBACK_MEMBER(argus_state::butasan_scanline)
|
||||
int scanline = param;
|
||||
|
||||
if(scanline == 248) // vblank-out irq
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xd7); /* RST 10h */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xd7); /* Z80 - RST 10h */
|
||||
|
||||
if(scanline == 8) // vblank-in irq
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xcf); /* RST 08h */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xcf); /* Z80 - RST 08h */
|
||||
}
|
||||
|
||||
|
||||
|
@ -1212,6 +1212,16 @@ void st_state::ikbd_map(address_map &map)
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// ADDRESS_MAP( cpu_space_map )
|
||||
//-------------------------------------------------
|
||||
|
||||
void st_state::cpu_space_map(address_map &map)
|
||||
{
|
||||
map(0xfffff0, 0xffffff).m(m_maincpu, FUNC(m68000_base_device::autovectors_map));
|
||||
map(0xfffffc, 0xfffffd).r(m_mfp, FUNC(mc68901_device::get_vector));
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// ADDRESS_MAP( st_map )
|
||||
//-------------------------------------------------
|
||||
@ -1786,21 +1796,6 @@ WRITE_LINE_MEMBER( st_state::fdc_drq_w )
|
||||
// MACHINE INITIALIZATION
|
||||
//**************************************************************************
|
||||
|
||||
//-------------------------------------------------
|
||||
// IRQ_CALLBACK_MEMBER( atarist_int_ack )
|
||||
//-------------------------------------------------
|
||||
|
||||
IRQ_CALLBACK_MEMBER(st_state::atarist_int_ack)
|
||||
{
|
||||
if (irqline == M68K_IRQ_6)
|
||||
{
|
||||
return m_mfp->get_vector();
|
||||
}
|
||||
|
||||
return M68K_INT_ACK_AUTOVECTOR;
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// configure_memory -
|
||||
//-------------------------------------------------
|
||||
@ -1998,7 +1993,7 @@ void st_state::common(machine_config &config)
|
||||
{
|
||||
// basic machine hardware
|
||||
M68000(config, m_maincpu, Y2/4);
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(st_state::atarist_int_ack));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &st_state::cpu_space_map);
|
||||
|
||||
keyboard(config);
|
||||
|
||||
@ -2206,7 +2201,6 @@ void stbook_state::stbook(machine_config &config)
|
||||
// basic machine hardware
|
||||
M68000(config, m_maincpu, U517/2);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &stbook_state::stbook_map);
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(st_state::atarist_int_ack));
|
||||
|
||||
//MCFG_DEVICE_ADD(COP888_TAG, COP888, Y700)
|
||||
|
||||
|
@ -906,7 +906,7 @@ WRITE8_MEMBER(attache816_state::z80_comms_ctrl_w)
|
||||
WRITE_LINE_MEMBER(attache816_state::ppi_irq)
|
||||
{
|
||||
if(m_x86_irq_enable & 0x01)
|
||||
m_extcpu->set_input_line_and_vector(0,state,0x03);
|
||||
m_extcpu->set_input_line_and_vector(0,state,0x03); // I8086
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(attache816_state::x86_dsr)
|
||||
|
@ -39,7 +39,7 @@ WRITE_LINE_MEMBER(battlnts_state::vblank_irq)
|
||||
|
||||
WRITE8_MEMBER(battlnts_state::battlnts_sh_irqtrigger_w)
|
||||
{
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(battlnts_state::battlnts_bankswitch_w)
|
||||
|
@ -235,7 +235,7 @@ TIMER_CALLBACK_MEMBER(berzerk_state::irq_callback)
|
||||
|
||||
/* set the IRQ line if enabled */
|
||||
if (m_irq_enabled)
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xfc);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xfc); // Z80
|
||||
|
||||
/* set up for next interrupt */
|
||||
next_irq_number = (irq_number + 1) % IRQS_PER_FRAME;
|
||||
|
@ -76,7 +76,7 @@ INPUT_PORTS_END
|
||||
INTERRUPT_GEN_MEMBER(adder5_state::ad5_fake_timer_int)
|
||||
{
|
||||
// this should be coming from the Timer / SIM modules of the Coldfire
|
||||
// m_maincpu->set_input_line_and_vector(5, HOLD_LINE, 0x8c);
|
||||
// m_maincpu->set_input_line_and_vector(5, HOLD_LINE, 0x8c); // MCF5206E but disabled
|
||||
}
|
||||
|
||||
void adder5_state::bfm_ad5(machine_config &config)
|
||||
|
@ -324,7 +324,7 @@ WRITE_LINE_MEMBER(bitgraph_state::system_clock_write)
|
||||
}
|
||||
if (state)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_6, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR);
|
||||
m_maincpu->set_input_line(M68K_IRQ_6, ASSERT_LINE);
|
||||
}
|
||||
else
|
||||
{
|
||||
|
@ -273,7 +273,7 @@ INPUT_PORTS_END
|
||||
/* handler called by the 2151 emulator when the internal timers cause an IRQ */
|
||||
WRITE_LINE_MEMBER(blockout_state::irq_handler)
|
||||
{
|
||||
m_audiocpu->set_input_line_and_vector(0, state ? ASSERT_LINE : CLEAR_LINE, 0xff);
|
||||
m_audiocpu->set_input_line_and_vector(0, state ? ASSERT_LINE : CLEAR_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
|
||||
|
@ -131,7 +131,7 @@ WRITE8_MEMBER(bottom9_state::bottom9_1f90_w)
|
||||
|
||||
WRITE8_MEMBER(bottom9_state::bottom9_sh_irqtrigger_w)
|
||||
{
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
INTERRUPT_GEN_MEMBER(bottom9_state::bottom9_sound_interrupt)
|
||||
|
@ -355,10 +355,11 @@ public:
|
||||
|
||||
//TIMER_CALLBACK_MEMBER(keyboard_callback);
|
||||
TIMER_CALLBACK_MEMBER(counter_6ms_callback);
|
||||
IRQ_CALLBACK_MEMBER(cat_int_ack);
|
||||
|
||||
void cat(machine_config &config);
|
||||
void cat_mem(address_map &map);
|
||||
void cpu_space_map(address_map &map);
|
||||
|
||||
protected:
|
||||
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
|
||||
};
|
||||
@ -915,10 +916,10 @@ TIMER_CALLBACK_MEMBER(cat_state::counter_6ms_callback)
|
||||
m_6ms_counter++;
|
||||
}
|
||||
|
||||
IRQ_CALLBACK_MEMBER(cat_state::cat_int_ack)
|
||||
void cat_state::cpu_space_map(address_map &map)
|
||||
{
|
||||
m_maincpu->set_input_line(M68K_IRQ_1,CLEAR_LINE);
|
||||
return M68K_INT_ACK_AUTOVECTOR;
|
||||
map(0xfffff0, 0xffffff).m(m_maincpu, FUNC(m68000_base_device::autovectors_map));
|
||||
map(0xfffff2, 0xfffff3).lr16("interrupt 1", [this]() -> u16 { m_maincpu->set_input_line(1, CLEAR_LINE); return 0x19; });
|
||||
}
|
||||
|
||||
MACHINE_START_MEMBER(cat_state,cat)
|
||||
@ -983,12 +984,10 @@ uint32_t cat_state::screen_update_cat(screen_device &screen, bitmap_rgb32 &bitma
|
||||
*/
|
||||
WRITE_LINE_MEMBER(cat_state::cat_duart_irq_handler)
|
||||
{
|
||||
int irqvector = m_duart->get_irq_vector();
|
||||
|
||||
#ifdef DEBUG_DUART_IRQ_HANDLER
|
||||
fprintf(stderr, "Duart IRQ handler called: state: %02X, vector: %06X\n", state, irqvector);
|
||||
#endif
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_1, state, irqvector);
|
||||
m_maincpu->set_input_line(M68K_IRQ_1, state);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(cat_state::cat_duart_txa) // semit sends stuff here; connects to the serial port on the back
|
||||
@ -1059,7 +1058,7 @@ void cat_state::cat(machine_config &config)
|
||||
/* basic machine hardware */
|
||||
M68000(config, m_maincpu, XTAL(19'968'000)/4);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &cat_state::cat_mem);
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(cat_state::cat_int_ack));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &cat_state::cpu_space_map);
|
||||
|
||||
MCFG_MACHINE_START_OVERRIDE(cat_state,cat)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(cat_state,cat)
|
||||
|
@ -256,7 +256,7 @@ void cclimber_state::machine_start()
|
||||
WRITE8_MEMBER(cclimber_state::swimmer_sh_soundlatch_w)
|
||||
{
|
||||
m_soundlatch->write(data);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
|
||||
|
@ -233,6 +233,11 @@ WRITE16_MEMBER( cgc7900_state::interrupt_mask_w )
|
||||
m_int_mask = data;
|
||||
}
|
||||
|
||||
void cgc7900_state::cpu_space_map(address_map &map)
|
||||
{
|
||||
map(0xfffff2, 0xffffff).lr16("interrupt", [this](offs_t offset) -> u16 { return int_vectors[offset+1]; });
|
||||
}
|
||||
|
||||
void cgc7900_state::irq_encoder(int pin, int state)
|
||||
{
|
||||
if (state == ASSERT_LINE)
|
||||
@ -242,7 +247,7 @@ void cgc7900_state::irq_encoder(int pin, int state)
|
||||
|
||||
if (!BIT(m_int_mask, pin))
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(int_levels[pin], state, int_vectors[pin]);
|
||||
m_maincpu->set_input_line(int_levels[pin], state);
|
||||
}
|
||||
}
|
||||
|
||||
@ -463,6 +468,8 @@ void cgc7900_state::cgc7900(machine_config &config)
|
||||
/* basic machine hardware */
|
||||
M68000(config, m_maincpu, XTAL(28'480'000)/4);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &cgc7900_state::cgc7900_mem);
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &cgc7900_state::cpu_space_map);
|
||||
|
||||
|
||||
i8035_device &kbmcu(I8035(config, I8035_TAG, 1000000));
|
||||
kbmcu.set_addrmap(AS_PROGRAM, &cgc7900_state::keyboard_mem);
|
||||
|
@ -113,7 +113,7 @@ WRITE_LINE_MEMBER(champbas_state::irq_enable_w)
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(exctsccr_state::exctsccr_sound_irq)
|
||||
{
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
|
||||
|
@ -346,9 +346,9 @@ TIMER_DEVICE_CALLBACK_MEMBER(changela_state::changela_scanline)
|
||||
int scanline = param;
|
||||
|
||||
if(scanline == 256) // vblank irq
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xdf);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xdf); // Z80
|
||||
else if(((scanline % 64) == 0)) // timer irq, 3 times per given vblank field
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xcf);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xcf); // Z80
|
||||
}
|
||||
|
||||
INTERRUPT_GEN_MEMBER(changela_state::chl_mcu_irq)
|
||||
|
@ -100,7 +100,7 @@ READ8_MEMBER(circusc_state::circusc_sh_timer_r)
|
||||
|
||||
WRITE8_MEMBER(circusc_state::circusc_sh_irqtrigger_w)
|
||||
{
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(circusc_state::coin_counter_1_w)
|
||||
|
@ -311,7 +311,7 @@ WRITE8_MEMBER(combatsc_state::protection_clock_w)
|
||||
|
||||
WRITE8_MEMBER(combatsc_state::combatsc_sh_irqtrigger_w)
|
||||
{
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
READ8_MEMBER(combatsc_state::combatsc_busy_r)
|
||||
|
@ -232,7 +232,7 @@ GFXDECODE_END
|
||||
WRITE_LINE_MEMBER(commando_state::vblank_irq)
|
||||
{
|
||||
if (state)
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xd7); // RST 10h - VBLANK
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xd7); // Z80 - RST 10h - VBLANK
|
||||
}
|
||||
|
||||
/* Machine Driver */
|
||||
|
@ -1034,10 +1034,10 @@ TIMER_DEVICE_CALLBACK_MEMBER(cosmic_state::panic_scanline)
|
||||
int scanline = param;
|
||||
|
||||
if(scanline == 224) // vblank-out irq
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xd7); /* RST 10h */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xd7); /* Z80 - RST 10h */
|
||||
|
||||
if(scanline == 0) // vblank-in irq
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xcf); /* RST 08h */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xcf); /* Z80 - RST 08h */
|
||||
}
|
||||
|
||||
|
||||
|
@ -350,14 +350,14 @@ TIMER_DEVICE_CALLBACK_MEMBER(cps_state::ganbare_interrupt)
|
||||
m_maincpu->set_input_line(4, ASSERT_LINE);
|
||||
}
|
||||
|
||||
IRQ_CALLBACK_MEMBER(cps_state::cps1_int_ack)
|
||||
void cps_state::cpu_space_map(address_map &map)
|
||||
{
|
||||
// clear the IPL1 and IPL2 flip-flops
|
||||
m_maincpu->set_input_line(2, CLEAR_LINE);
|
||||
m_maincpu->set_input_line(4, CLEAR_LINE);
|
||||
|
||||
// assert VPA
|
||||
return M68K_INT_ACK_AUTOVECTOR;
|
||||
// Eventually add the sync to E due to vpa
|
||||
map(0xfffff2, 0xffffff).lr16("autovectors", [this](offs_t offset) -> u16 {
|
||||
// clear the IPL1 and IPL2 flip-flops
|
||||
m_maincpu->set_input_line(2, CLEAR_LINE);
|
||||
m_maincpu->set_input_line(4, CLEAR_LINE);
|
||||
return 0x19+offset; });
|
||||
}
|
||||
|
||||
|
||||
@ -3389,7 +3389,7 @@ void cps_state::cps1_10MHz(machine_config &config)
|
||||
M68000(config, m_maincpu, XTAL(10'000'000)); /* verified on pcb */
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &cps_state::main_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(cps_state::cps1_interrupt));
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(cps_state::cps1_int_ack));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &cps_state::cpu_space_map);
|
||||
|
||||
Z80(config, m_audiocpu, XTAL(3'579'545)); /* verified on pcb */
|
||||
m_audiocpu->set_addrmap(AS_PROGRAM, &cps_state::sub_map);
|
||||
|
@ -657,7 +657,7 @@ Stephh's inputs notes (based on some tests on the "parent" set) :
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(cps2_state::cps2_interrupt)
|
||||
{
|
||||
/* 2 is vblank, 4 is some sort of scanline interrupt, 6 is both at the same time. */
|
||||
/* direct irq line connection, irq1 is vblank, irq2 is some sort of scanline interrupt. */
|
||||
if (param == 0)
|
||||
m_scancalls = 0;
|
||||
|
||||
@ -673,7 +673,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(cps2_state::cps2_interrupt)
|
||||
if (m_scanline1 == param || (m_scanline1 < param && !m_scancalls))
|
||||
{
|
||||
m_cps_b_regs[0x10/2] = 0;
|
||||
m_maincpu->set_input_line(4, HOLD_LINE);
|
||||
m_maincpu->set_input_line(2, HOLD_LINE);
|
||||
m_screen->update_partial(param);
|
||||
m_scancalls++;
|
||||
// popmessage("IRQ4 scancounter = %04i", param);
|
||||
@ -683,7 +683,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(cps2_state::cps2_interrupt)
|
||||
if(m_scanline2 == param || (m_scanline2 < param && !m_scancalls))
|
||||
{
|
||||
m_cps_b_regs[0x12 / 2] = 0;
|
||||
m_maincpu->set_input_line(4, HOLD_LINE);
|
||||
m_maincpu->set_input_line(2, HOLD_LINE);
|
||||
m_screen->update_partial(param);
|
||||
m_scancalls++;
|
||||
// popmessage("IRQ4 scancounter = %04i", param);
|
||||
@ -693,7 +693,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(cps2_state::cps2_interrupt)
|
||||
{
|
||||
m_cps_b_regs[0x10 / 2] = m_scanline1;
|
||||
m_cps_b_regs[0x12 / 2] = m_scanline2;
|
||||
m_maincpu->set_input_line(2, HOLD_LINE);
|
||||
m_maincpu->set_input_line(1, HOLD_LINE);
|
||||
cps2_objram_latch();
|
||||
}
|
||||
// popmessage("Raster calls = %i", m_scancalls);
|
||||
@ -1301,6 +1301,8 @@ void cps2_state::cps2(machine_config &config)
|
||||
M68000(config, m_maincpu, XTAL(16'000'000));
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &cps2_state::cps2_map);
|
||||
m_maincpu->set_addrmap(AS_OPCODES, &cps2_state::decrypted_opcodes_map);
|
||||
m_maincpu->disable_interrupt_mixer();
|
||||
|
||||
TIMER(config, "scantimer").configure_scanline(FUNC(cps2_state::cps2_interrupt), "screen", 0, 1);
|
||||
|
||||
Z80(config, m_audiocpu, XTAL(8'000'000));
|
||||
|
@ -586,7 +586,7 @@ INTERRUPT_GEN_MEMBER(dacholer_state::sound_irq)
|
||||
{
|
||||
if (m_music_interrupt_enable == 1)
|
||||
{
|
||||
device.execute().set_input_line_and_vector(0, HOLD_LINE, 0x30);
|
||||
device.execute().set_input_line_and_vector(0, HOLD_LINE, 0x30); // Z80
|
||||
}
|
||||
}
|
||||
|
||||
@ -599,7 +599,7 @@ WRITE_LINE_MEMBER(dacholer_state::adpcm_int)
|
||||
m_msm_toggle ^= 1;
|
||||
if (m_msm_toggle == 0)
|
||||
{
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0x38);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0x38); // Z80
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -231,10 +231,10 @@ TIMER_DEVICE_CALLBACK_MEMBER(darkmist_state::scanline)
|
||||
int scanline = param;
|
||||
|
||||
if(scanline == 240) // vblank-out irq
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0x10); /* RST 10h */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0x10); /* Z80 - RST 10h */
|
||||
|
||||
if(scanline == 0) // vblank-in irq
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0x08); /* RST 08h */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0x08); /* Z80 - RST 08h */
|
||||
}
|
||||
|
||||
|
||||
|
@ -350,7 +350,7 @@ WRITE8_MEMBER(ddayjlc_state::bg2_w)
|
||||
WRITE8_MEMBER(ddayjlc_state::sound_w)
|
||||
{
|
||||
m_soundlatch->write(data);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(ddayjlc_state::flip_screen_w)
|
||||
|
@ -2378,7 +2378,7 @@ WRITE8_MEMBER(ddenlovr_state::mmpanic_blitter2_w)
|
||||
WRITE_LINE_MEMBER(ddenlovr_state::mmpanic_blitter_irq)
|
||||
{
|
||||
if (state)
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xdf); // RST 18
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xdf); // Z80 - RST 18
|
||||
}
|
||||
|
||||
void ddenlovr_state::mmpanic_update_leds()
|
||||
@ -2524,7 +2524,7 @@ WRITE8_MEMBER(ddenlovr_state::funkyfig_blitter_w)
|
||||
WRITE_LINE_MEMBER(ddenlovr_state::funkyfig_blitter_irq)
|
||||
{
|
||||
if (0) // this vector looks wrong
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xe0);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xe0); // Z80
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(ddenlovr_state::funkyfig_rombank_w)
|
||||
@ -9896,15 +9896,15 @@ WRITE_LINE_MEMBER(ddenlovr_state::mmpanic_irq)
|
||||
//if (downcast<cpu_device *>(m_maincpu)->input_state(0))
|
||||
// return;
|
||||
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xcf); // RST 08, vblank
|
||||
m_soundcpu->set_input_line(0, HOLD_LINE); // NMI by main cpu
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xcf); // Z80 - RST 08, vblank
|
||||
m_soundcpu->set_input_line(0, HOLD_LINE); // Z80 - NMI by main cpu
|
||||
}
|
||||
|
||||
|
||||
WRITE_LINE_MEMBER(ddenlovr_state::mmpanic_rtc_irq)
|
||||
{
|
||||
if (state)
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xdf); // RST 18, clock
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xdf); // Z80 - RST 18, clock
|
||||
}
|
||||
|
||||
void ddenlovr_state::mmpanic(machine_config &config)
|
||||
@ -9980,7 +9980,7 @@ WRITE_LINE_MEMBER(ddenlovr_state::hanakanz_irq)
|
||||
//if (downcast<cpu_device *>(m_maincpu)->input_state(0))
|
||||
// return;
|
||||
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xe0);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xe0); // Z80
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(ddenlovr_state::hanakanz_rtc_irq)
|
||||
@ -9994,7 +9994,7 @@ WRITE_LINE_MEMBER(ddenlovr_state::hanakanz_rtc_irq)
|
||||
//if (downcast<cpu_device *>(drvm_maincpu)->input_state(0))
|
||||
// return;
|
||||
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xe2);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xe2); // Z80
|
||||
}
|
||||
|
||||
void ddenlovr_state::hanakanz(machine_config &config)
|
||||
|
@ -325,10 +325,10 @@ TIMER_DEVICE_CALLBACK_MEMBER(deadang_state::main_scanline)
|
||||
int scanline = param;
|
||||
|
||||
if(scanline == 240) // vblank-out irq
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xc4/4);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xc4/4); // V30
|
||||
|
||||
if(scanline == 0) // vblank-in irq
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xc8/4);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xc8/4); // V30
|
||||
}
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(deadang_state::sub_scanline)
|
||||
@ -336,10 +336,10 @@ TIMER_DEVICE_CALLBACK_MEMBER(deadang_state::sub_scanline)
|
||||
int scanline = param;
|
||||
|
||||
if(scanline == 240) // vblank-out irq
|
||||
m_subcpu->set_input_line_and_vector(0, HOLD_LINE,0xc4/4);
|
||||
m_subcpu->set_input_line_and_vector(0, HOLD_LINE,0xc4/4); // V30
|
||||
|
||||
if(scanline == 0) // vblank-in irq
|
||||
m_subcpu->set_input_line_and_vector(0, HOLD_LINE,0xc8/4);
|
||||
m_subcpu->set_input_line_and_vector(0, HOLD_LINE,0xc8/4); // V30
|
||||
}
|
||||
|
||||
/* Machine Drivers */
|
||||
|
@ -335,9 +335,7 @@ private:
|
||||
/* 2681 DUART */
|
||||
WRITE_LINE_MEMBER(dectalk_state::duart_irq_handler)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_6, state, M68K_INT_ACK_AUTOVECTOR);
|
||||
//drvstate->m_maincpu->set_input_line_and_vector(M68K_IRQ_6, CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR);
|
||||
//drvstate->m_maincpu->set_input_line_and_vector(M68K_IRQ_6, HOLD_LINE, vector);
|
||||
m_maincpu->set_input_line(M68K_IRQ_6, state);
|
||||
}
|
||||
|
||||
READ8_MEMBER(dectalk_state::duart_input)
|
||||
@ -402,10 +400,10 @@ void dectalk_state::dsp_semaphore_w(bool state)
|
||||
#ifdef VERBOSE
|
||||
logerror("speech int fired!\n");
|
||||
#endif
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_5, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR);
|
||||
m_maincpu->set_input_line(M68K_IRQ_5, ASSERT_LINE);
|
||||
}
|
||||
else
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_5, CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR);
|
||||
m_maincpu->set_input_line(M68K_IRQ_5, CLEAR_LINE);
|
||||
}
|
||||
|
||||
// read the output fifo and set the interrupt line active on the dsp
|
||||
@ -602,7 +600,7 @@ WRITE16_MEMBER(dectalk_state::m68k_spcflags_w)// 68k write to the speech flags (
|
||||
#ifdef SPC_LOG_68K
|
||||
logerror(" speech int fired!\n");
|
||||
#endif
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_5, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR); // set int because semaphore was set
|
||||
m_maincpu->set_input_line(M68K_IRQ_5, ASSERT_LINE); // set int because semaphore was set
|
||||
}
|
||||
}
|
||||
else // data&0x40 == 0
|
||||
@ -610,7 +608,7 @@ WRITE16_MEMBER(dectalk_state::m68k_spcflags_w)// 68k write to the speech flags (
|
||||
#ifdef SPC_LOG_68K
|
||||
logerror(" | 0x40 = 0: speech int disabled\n");
|
||||
#endif
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_5, CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR); // clear int because int is now disabled
|
||||
m_maincpu->set_input_line(M68K_IRQ_5, CLEAR_LINE); // clear int because int is now disabled
|
||||
}
|
||||
}
|
||||
|
||||
@ -642,7 +640,7 @@ WRITE16_MEMBER(dectalk_state::m68k_tlcflags_w)// dtmf flags write
|
||||
#ifdef TLC_LOG
|
||||
logerror(" TLC int fired!\n");
|
||||
#endif
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_4, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR); // set int because tone detect was set
|
||||
m_maincpu->set_input_line(M68K_IRQ_4, ASSERT_LINE); // set int because tone detect was set
|
||||
}
|
||||
}
|
||||
else // data&0x40 == 0
|
||||
@ -651,7 +649,7 @@ WRITE16_MEMBER(dectalk_state::m68k_tlcflags_w)// dtmf flags write
|
||||
logerror(" | 0x40 = 0: tone detect int disabled\n");
|
||||
#endif
|
||||
if ((!(data&0x4000)) || (!m_tlc_ringdetect)) // check to be sure we don't disable int if both ints fired at once
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_4, CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR); // clear int because int is now disabled
|
||||
m_maincpu->set_input_line(M68K_IRQ_4, CLEAR_LINE); // clear int because int is now disabled
|
||||
}
|
||||
if (data&0x100) // bit 8: answer phone relay enable
|
||||
{
|
||||
@ -675,7 +673,7 @@ WRITE16_MEMBER(dectalk_state::m68k_tlcflags_w)// dtmf flags write
|
||||
#ifdef TLC_LOG
|
||||
logerror(" TLC int fired!\n");
|
||||
#endif
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_4, ASSERT_LINE, M68K_INT_ACK_AUTOVECTOR); // set int because tone detect was set
|
||||
m_maincpu->set_input_line(M68K_IRQ_4, ASSERT_LINE); // set int because tone detect was set
|
||||
}
|
||||
}
|
||||
else // data&0x4000 == 0
|
||||
@ -684,7 +682,7 @@ WRITE16_MEMBER(dectalk_state::m68k_tlcflags_w)// dtmf flags write
|
||||
logerror(" | 0x4000 = 0: ring detect int disabled\n");
|
||||
#endif
|
||||
if ((!(data&0x40)) || (!m_tlc_tonedetect)) // check to be sure we don't disable int if both ints fired at once
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_4, CLEAR_LINE, M68K_INT_ACK_AUTOVECTOR); // clear int because int is now disabled
|
||||
m_maincpu->set_input_line(M68K_IRQ_4, CLEAR_LINE); // clear int because int is now disabled
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -355,17 +355,17 @@ TIMER_DEVICE_CALLBACK_MEMBER(dfruit_state::dfruit_irq_scanline)
|
||||
|
||||
if (scanline == 240 && (m_irq_enable & 4))
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, m_irq_vector[2]);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, m_irq_vector[2]); // TC0091LVC
|
||||
}
|
||||
|
||||
if (scanline == 0 && (m_irq_enable & 2))
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, m_irq_vector[1]);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, m_irq_vector[1]); // TC0091LVC
|
||||
}
|
||||
|
||||
if (scanline == 196 && (m_irq_enable & 1))
|
||||
{
|
||||
//m_maincpu->set_input_line_and_vector(0, HOLD_LINE, m_irq_vector[0]);
|
||||
//m_maincpu->set_input_line_and_vector(0, HOLD_LINE, m_irq_vector[0]); // TC0091LVC
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -441,11 +441,11 @@ TIMER_DEVICE_CALLBACK_MEMBER(djboy_state::djboy_scanline)
|
||||
int scanline = param;
|
||||
|
||||
if(scanline == 240) // vblank-out irq
|
||||
m_mastercpu->set_input_line_and_vector(0, HOLD_LINE, 0xfd);
|
||||
m_mastercpu->set_input_line_and_vector(0, HOLD_LINE, 0xfd); // Z80
|
||||
|
||||
/* Pandora "sprite end dma" irq? TODO: timing is clearly off, attract mode relies on this */
|
||||
if(scanline == 64)
|
||||
m_mastercpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_mastercpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
void djboy_state::machine_start()
|
||||
|
@ -454,7 +454,7 @@ WRITE8_MEMBER(dkong_state::memory_write_byte)
|
||||
WRITE_LINE_MEMBER(dkong_state::s2650_interrupt)
|
||||
{
|
||||
if (state)
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0x03);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0x03); // Z80
|
||||
}
|
||||
|
||||
/*************************************
|
||||
|
@ -527,12 +527,12 @@ void dmndrby_state::dmndrby_palette(palette_device &palette) const
|
||||
/*Main Z80 is IM 0,HW-latched irqs. */
|
||||
INTERRUPT_GEN_MEMBER(dmndrby_state::dderby_irq)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xd7); /* RST 10h */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xd7); /* Z80 - RST 10h */
|
||||
}
|
||||
|
||||
INTERRUPT_GEN_MEMBER(dmndrby_state::dderby_timer_irq)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xcf); /* RST 08h */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xcf); /* Z80 - RST 08h */
|
||||
}
|
||||
|
||||
void dmndrby_state::dderby(machine_config &config)
|
||||
|
@ -307,8 +307,8 @@ WRITE_LINE_MEMBER(dynduke_state::vblank_irq)
|
||||
{
|
||||
if (state)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xc8/4);
|
||||
m_slave->set_input_line_and_vector(0, HOLD_LINE, 0xc8/4);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xc8/4); // V30
|
||||
m_slave->set_input_line_and_vector(0, HOLD_LINE, 0xc8/4); // V30
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -149,11 +149,11 @@ TIMER_DEVICE_CALLBACK_MEMBER(ecoinfr_state::ecoinfr_irq_timer)
|
||||
|
||||
if (irq_toggle==0)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xe4);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xe4); // Z80
|
||||
}
|
||||
else
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xe0);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xe0); // Z80
|
||||
}
|
||||
|
||||
|
||||
|
@ -158,7 +158,7 @@ TIMER_CALLBACK_MEMBER(enigma2_state::interrupt_assert_callback)
|
||||
int vpos = m_screen->vpos();
|
||||
uint16_t counter = vpos_to_vysnc_chain_counter(vpos);
|
||||
uint8_t vector = 0xc7 | ((counter & 0x80) >> 3) | ((~counter & 0x80) >> 4);
|
||||
m_maincpu->set_input_line_and_vector(0, ASSERT_LINE, vector);
|
||||
m_maincpu->set_input_line_and_vector(0, ASSERT_LINE, vector); // Z80
|
||||
|
||||
/* set up for next interrupt */
|
||||
if (counter == INT_TRIGGER_COUNT_1)
|
||||
|
@ -194,7 +194,8 @@ public:
|
||||
void init_sq1();
|
||||
void init_denib();
|
||||
DECLARE_INPUT_CHANGED_MEMBER(key_stroke);
|
||||
IRQ_CALLBACK_MEMBER(maincpu_irq_acknowledge_callback);
|
||||
void cpu_space_map(address_map &map);
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(esq5505_otis_irq);
|
||||
|
||||
private:
|
||||
@ -253,20 +254,11 @@ FLOPPY_FORMATS_MEMBER( esq5505_state::floppy_formats )
|
||||
FLOPPY_ESQIMG_FORMAT
|
||||
FLOPPY_FORMATS_END
|
||||
|
||||
IRQ_CALLBACK_MEMBER(esq5505_state::maincpu_irq_acknowledge_callback)
|
||||
void esq5505_state::cpu_space_map(address_map &map)
|
||||
{
|
||||
switch(irqline)
|
||||
{
|
||||
case 1:
|
||||
return M68K_INT_ACK_AUTOVECTOR;
|
||||
case 2:
|
||||
return dmac_irq_vector;
|
||||
case 3:
|
||||
return duart_irq_vector;
|
||||
default:
|
||||
logerror("\nUnexpected IRQ ACK Callback: IRQ %d\n", irqline);
|
||||
return 0;
|
||||
}
|
||||
map(0xfffff0, 0xffffff).m(m_maincpu, FUNC(m68000_base_device::autovectors_map));
|
||||
map(0xfffff4, 0xfffff5).lr16("dmac irq", [this]() -> u16 { return dmac_irq_vector; });
|
||||
map(0xfffff6, 0xfffff7).lr16("duart irq", [this]() -> u16 { return duart_irq_vector; });
|
||||
}
|
||||
|
||||
void esq5505_state::machine_start()
|
||||
@ -320,13 +312,13 @@ void esq5505_state::update_irq_to_maincpu()
|
||||
{
|
||||
m_maincpu->set_input_line(M68K_IRQ_2, CLEAR_LINE);
|
||||
m_maincpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_3, ASSERT_LINE, duart_irq_vector);
|
||||
m_maincpu->set_input_line(M68K_IRQ_3, ASSERT_LINE);
|
||||
}
|
||||
else if (dmac_irq_state)
|
||||
{
|
||||
m_maincpu->set_input_line(M68K_IRQ_3, CLEAR_LINE);
|
||||
m_maincpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_2, ASSERT_LINE, dmac_irq_vector);
|
||||
m_maincpu->set_input_line(M68K_IRQ_2, ASSERT_LINE);
|
||||
}
|
||||
else if (otis_irq_state)
|
||||
{
|
||||
@ -623,7 +615,7 @@ void esq5505_state::vfx(machine_config &config)
|
||||
{
|
||||
M68000(config, m_maincpu, 10_MHz_XTAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &esq5505_state::vfx_map);
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(esq5505_state::maincpu_irq_acknowledge_callback));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &esq5505_state::cpu_space_map);
|
||||
|
||||
ES5510(config, m_esp, 10_MHz_XTAL);
|
||||
m_esp->set_disable();
|
||||
@ -714,7 +706,7 @@ void esq5505_state::vfx32(machine_config &config)
|
||||
{
|
||||
M68000(config, m_maincpu, 30.4761_MHz_XTAL / 2);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &esq5505_state::vfxsd_map);
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(esq5505_state::maincpu_irq_acknowledge_callback));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &esq5505_state::cpu_space_map);
|
||||
|
||||
ES5510(config, m_esp, 10_MHz_XTAL);
|
||||
m_esp->set_disable();
|
||||
|
@ -27,10 +27,10 @@ TIMER_DEVICE_CALLBACK_MEMBER(exedexes_state::exedexes_scanline)
|
||||
int scanline = param;
|
||||
|
||||
if(scanline == 240) // vblank-out irq
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xd7); /* RST 10h - vblank */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xd7); /* Z80 - RST 10h - vblank */
|
||||
|
||||
if(scanline == 0) // unknown irq event
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xcf); /* RST 08h */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xcf); /* Z80 - RST 08h */
|
||||
}
|
||||
|
||||
|
||||
|
@ -472,7 +472,7 @@ GFXDECODE_END
|
||||
/* handler called by the 3812 emulator when the internal timers cause an IRQ */
|
||||
WRITE_LINE_MEMBER(exprraid_state::irqhandler)
|
||||
{
|
||||
m_slave->set_input_line_and_vector(0, state, 0xff);
|
||||
m_slave->set_input_line_and_vector(0, state, 0xff); // M6809
|
||||
}
|
||||
|
||||
void exprraid_state::machine_start()
|
||||
|
@ -805,7 +805,7 @@ WRITE_LINE_MEMBER(fantland_state::vblank_irq)
|
||||
|
||||
INTERRUPT_GEN_MEMBER(fantland_state::fantland_sound_irq)
|
||||
{
|
||||
device.execute().set_input_line_and_vector(0, HOLD_LINE, 0x80 / 4);
|
||||
device.execute().set_input_line_and_vector(0, HOLD_LINE, 0x80 / 4); // I8088
|
||||
}
|
||||
|
||||
void fantland_state::fantland(machine_config &config)
|
||||
@ -851,7 +851,7 @@ void fantland_state::fantland(machine_config &config)
|
||||
|
||||
WRITE_LINE_MEMBER(fantland_state::galaxygn_sound_irq)
|
||||
{
|
||||
m_audiocpu->set_input_line_and_vector(0, state ? ASSERT_LINE : CLEAR_LINE, 0x80/4);
|
||||
m_audiocpu->set_input_line_and_vector(0, state ? ASSERT_LINE : CLEAR_LINE, 0x80/4); // I8088
|
||||
}
|
||||
|
||||
void fantland_state::galaxygn(machine_config &config)
|
||||
|
@ -280,7 +280,7 @@ private:
|
||||
DECLARE_WRITE32_MEMBER (bootvect_w);
|
||||
|
||||
/* Interrupt support */
|
||||
// IRQ_CALLBACK_MEMBER(maincpu_iack_callback);
|
||||
void cpu_space_map(address_map &map);
|
||||
DECLARE_WRITE_LINE_MEMBER(fga_irq_callback);
|
||||
uint8_t fga_irq_state;
|
||||
// int fga_irq_vector;
|
||||
@ -658,12 +658,18 @@ static void fccpu30_vme_cards(device_slot_interface &device)
|
||||
/*
|
||||
* Machine configuration
|
||||
*/
|
||||
|
||||
void cpu30_state::cpu_space_map(address_map &map)
|
||||
{
|
||||
map(0xfffff2, 0xffffff).lr16("fga002 irq", [this](offs_t offset) -> u16 { return m_fga002->iack(); });
|
||||
}
|
||||
|
||||
void cpu30_state::cpu30(machine_config &config)
|
||||
{
|
||||
/* basic machine hardware */
|
||||
M68030(config, m_maincpu, XTAL(25'000'000));
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &cpu30_state::cpu30_mem);
|
||||
m_maincpu->set_irq_acknowledge_callback("fga002", FUNC(fga002_device::iack));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &cpu30_state::cpu_space_map);
|
||||
NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
|
||||
|
||||
VME(config, "vme", 0);
|
||||
|
@ -1722,7 +1722,7 @@ void cps_state::fcrash(machine_config &config)
|
||||
M68000(config, m_maincpu, 10000000);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &cps_state::fcrash_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(cps_state::cps1_interrupt));
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(cps_state::cps1_int_ack));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &cps_state::cpu_space_map);
|
||||
|
||||
Z80(config, m_audiocpu, 24000000/6); /* ? */
|
||||
m_audiocpu->set_addrmap(AS_PROGRAM, &cps_state::sound_map);
|
||||
@ -1786,7 +1786,7 @@ void cps_state::kodb(machine_config &config)
|
||||
M68000(config, m_maincpu, 10000000);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &cps_state::fcrash_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(cps_state::cps1_interrupt));
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(cps_state::cps1_int_ack));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &cps_state::cpu_space_map);
|
||||
|
||||
Z80(config, m_audiocpu, 3579545);
|
||||
m_audiocpu->set_addrmap(AS_PROGRAM, &cps_state::kodb_sound_map);
|
||||
@ -1827,7 +1827,7 @@ void cps_state::mtwinsb(machine_config &config)
|
||||
M68000(config, m_maincpu, 10000000);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &cps_state::mtwinsb_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(cps_state::cps1_interrupt));
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(cps_state::cps1_int_ack));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &cps_state::cpu_space_map);
|
||||
|
||||
Z80(config, m_audiocpu, 3579545);
|
||||
m_audiocpu->set_addrmap(AS_PROGRAM, &cps_state::sgyxz_sound_map);
|
||||
@ -1919,7 +1919,7 @@ void cps_state::knightsb(machine_config &config)
|
||||
M68000(config, m_maincpu, 24000000 / 2);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &cps_state::knightsb_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(cps_state::cps1_interrupt));
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(cps_state::cps1_int_ack));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &cps_state::cpu_space_map);
|
||||
|
||||
Z80(config, m_audiocpu, 29821000 / 8);
|
||||
m_audiocpu->set_addrmap(AS_PROGRAM, &cps_state::knightsb_z80map);
|
||||
@ -2300,7 +2300,7 @@ void cps_state::dinopic(machine_config &config)
|
||||
M68000(config, m_maincpu, 12000000);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &cps_state::dinopic_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(cps_state::cps1_interrupt));
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(cps_state::cps1_int_ack));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &cps_state::cpu_space_map);
|
||||
|
||||
//PIC16C57(config, m_audiocpu, 12000000).set_disable(); /* no valid dumps .. */
|
||||
|
||||
@ -2489,7 +2489,7 @@ void cps_state::sgyxz(machine_config &config)
|
||||
M68000(config, m_maincpu, 12000000);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &cps_state::sgyxz_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(cps_state::cps1_interrupt));
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(cps_state::cps1_int_ack));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &cps_state::cpu_space_map);
|
||||
|
||||
Z80(config, m_audiocpu, 3579545);
|
||||
m_audiocpu->set_addrmap(AS_PROGRAM, &cps_state::sgyxz_sound_map);
|
||||
@ -2612,7 +2612,7 @@ void cps_state::punipic(machine_config &config)
|
||||
M68000(config, m_maincpu, 12000000);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &cps_state::punipic_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(cps_state::cps1_interrupt));
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(cps_state::cps1_int_ack));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &cps_state::cpu_space_map);
|
||||
|
||||
//PIC16C57(config, m_audiocpu, 12000000).set_disable(); /* no valid dumps .. */
|
||||
|
||||
@ -2804,7 +2804,7 @@ void cps_state::sf2m1(machine_config &config)
|
||||
M68000(config, m_maincpu, XTAL(12'000'000));
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &cps_state::sf2m1_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(cps_state::cps1_interrupt));
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(cps_state::cps1_int_ack));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &cps_state::cpu_space_map);
|
||||
|
||||
Z80(config, m_audiocpu, XTAL(3'579'545));
|
||||
m_audiocpu->set_addrmap(AS_PROGRAM, &cps_state::sgyxz_sound_map);
|
||||
@ -3179,7 +3179,7 @@ void cps_state::slampic(machine_config &config)
|
||||
M68000(config, m_maincpu, 12000000);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &cps_state::slampic_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(cps_state::cps1_interrupt));
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(cps_state::cps1_int_ack));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &cps_state::cpu_space_map);
|
||||
|
||||
//PIC16C57(config, m_audiocpu, 12000000).set_disable(); /* no valid dumps .. */
|
||||
|
||||
@ -3278,7 +3278,7 @@ void cps_state::varthb(machine_config &config)
|
||||
M68000(config, m_maincpu, 12000000);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &cps_state::varthb_map);
|
||||
m_maincpu->set_vblank_int("screen", FUNC(cps_state::cps1_interrupt));
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(cps_state::cps1_int_ack));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &cps_state::cpu_space_map);
|
||||
|
||||
Z80(config, m_audiocpu, 3579545);
|
||||
m_audiocpu->set_addrmap(AS_PROGRAM, &cps_state::sgyxz_sound_map);
|
||||
|
@ -256,7 +256,7 @@ WRITE8_MEMBER(firetrap_state::firetrap_8751_w)
|
||||
{
|
||||
m_i8751_current_command = 0;
|
||||
m_i8751_return = 0xff; /* This value is XOR'd and must equal 0 */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
return;
|
||||
}
|
||||
|
||||
@ -307,7 +307,7 @@ WRITE8_MEMBER(firetrap_state::firetrap_8751_w)
|
||||
}
|
||||
|
||||
/* Signal main cpu task is complete */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
m_i8751_current_command=data;
|
||||
}
|
||||
|
||||
@ -410,7 +410,7 @@ INPUT_CHANGED_MEMBER(firetrap_state::coin_inserted)
|
||||
if (m_coin_command_pending && !m_i8751_current_command)
|
||||
{
|
||||
m_i8751_return = m_coin_command_pending;
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
m_coin_command_pending = 0;
|
||||
}
|
||||
}
|
||||
|
@ -247,7 +247,7 @@ WRITE8_MEMBER( fp1100_state::sub_to_main_w )
|
||||
{
|
||||
m_main_latch = data;
|
||||
LOG("%s: From sub:%X\n",machine().describe_context(),data);
|
||||
//m_maincpu->set_input_line_and_vector(0, ASSERT_LINE, 0xf0);
|
||||
//m_maincpu->set_input_line_and_vector(0, ASSERT_LINE, 0xf0); // Z80
|
||||
}
|
||||
|
||||
/*
|
||||
@ -344,7 +344,7 @@ WRITE8_MEMBER( fp1100_state::portc_w )
|
||||
if (BIT(m_irq_mask, 4))
|
||||
if (!BIT(data, 3))
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(0, ASSERT_LINE, 0xf0);
|
||||
m_maincpu->set_input_line_and_vector(0, ASSERT_LINE, 0xf0); // Z80
|
||||
LOG("%s: PortC:%X\n",machine().describe_context(),data);
|
||||
}
|
||||
if (BIT(bits, 5))
|
||||
@ -596,7 +596,7 @@ TIMER_DEVICE_CALLBACK_MEMBER( fp1100_state::timer_c )
|
||||
INTERRUPT_GEN_MEMBER( fp1100_state::vblank_irq )
|
||||
{
|
||||
// if (BIT(m_irq_mask, 4))
|
||||
// m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xf8);
|
||||
// m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xf8); // Z80
|
||||
}
|
||||
|
||||
void fp1100_state::machine_reset()
|
||||
|
@ -87,7 +87,7 @@ WRITE_LINE_MEMBER(galaxia_state::vblank_irq)
|
||||
{
|
||||
if (state)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0x03);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0x03); // S2650
|
||||
cvs_scroll_stars();
|
||||
}
|
||||
}
|
||||
|
@ -269,7 +269,7 @@ private:
|
||||
virtual void video_start() override;
|
||||
void palette_init(palette_device &palette);
|
||||
uint32_t screen_update_goldngam(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
IRQ_CALLBACK_MEMBER(moviecrd_irq_ack);
|
||||
void cpu_space_map(address_map &map);
|
||||
|
||||
void moviecrd_map(address_map &map);
|
||||
void swisspkr_map(address_map &map);
|
||||
@ -385,19 +385,11 @@ void goldngam_state::swisspkr_map(address_map &map)
|
||||
|
||||
*/
|
||||
|
||||
IRQ_CALLBACK_MEMBER(goldngam_state::moviecrd_irq_ack)
|
||||
void goldngam_state::cpu_space_map(address_map &map)
|
||||
{
|
||||
switch (irqline)
|
||||
{
|
||||
case MOVIECRD_DUART1_IRQ:
|
||||
return m_duart[0]->get_irq_vector();
|
||||
|
||||
case MOVIECRD_DUART2_IRQ:
|
||||
return m_duart[1]->get_irq_vector();
|
||||
|
||||
default:
|
||||
return M68K_INT_ACK_AUTOVECTOR;
|
||||
}
|
||||
map(0xfffff0, 0xffffff).m(m_maincpu, FUNC(m68000_base_device::autovectors_map));
|
||||
map(0xfffff4, 0xfffff5).lr16("duart0 int", [this]() -> u16 { return m_duart[0]->get_irq_vector(); });
|
||||
map(0xfffff8, 0xfffff9).lr16("duart0 int", [this]() -> u16 { return m_duart[1]->get_irq_vector(); });
|
||||
}
|
||||
|
||||
void goldngam_state::moviecrd_map(address_map &map)
|
||||
@ -638,7 +630,7 @@ void goldngam_state::moviecrd(machine_config &config)
|
||||
|
||||
/* basic machine hardware */
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &goldngam_state::moviecrd_map);
|
||||
m_maincpu->set_irq_acknowledge_callback(FUNC(goldngam_state::moviecrd_irq_ack));
|
||||
m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &goldngam_state::cpu_space_map);
|
||||
|
||||
m_ptm->irq_callback().set_inputline("maincpu", M68K_IRQ_1);
|
||||
|
||||
|
@ -637,7 +637,7 @@ GFXDECODE_END
|
||||
WRITE_LINE_MEMBER(goodejan_state::vblank_irq)
|
||||
{
|
||||
if (state)
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0x208/4);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0x208/4); // V30
|
||||
/* vector 0x00c is just a reti */
|
||||
}
|
||||
|
||||
|
@ -135,7 +135,7 @@ WRITE16_MEMBER(gradius3_state::cpuB_irqtrigger_w)
|
||||
|
||||
WRITE16_MEMBER(gradius3_state::sound_irq_w)
|
||||
{
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gradius3_state::sound_bank_w)
|
||||
|
@ -433,9 +433,9 @@ TIMER_DEVICE_CALLBACK_MEMBER(gundealr_state::scanline)
|
||||
int scanline = param;
|
||||
|
||||
if(scanline == 240) // vblank-out irq
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xd7); /* RST 10h */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xd7); /* Z80 - RST 10h */
|
||||
else if((scanline == 0) || (scanline == 120) ) //timer irq
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xcf); /* RST 10h */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE,0xcf); /* Z80 - RST 10h */
|
||||
}
|
||||
|
||||
void gundealr_state::gundealr(machine_config &config)
|
||||
|
@ -581,9 +581,9 @@ void gunpey_state::irq_check(uint8_t irq_type)
|
||||
m_irq_cause |= irq_type;
|
||||
|
||||
if(m_irq_cause & m_irq_mask)
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0x200/4);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0x200/4); // V30
|
||||
else
|
||||
m_maincpu->set_input_line_and_vector(0, CLEAR_LINE, 0x200/4);
|
||||
m_maincpu->set_input_line_and_vector(0, CLEAR_LINE, 0x200/4); // V30
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gunpey_state::status_w)
|
||||
|
@ -153,7 +153,7 @@ WRITE8_MEMBER(gyruss_state::gyruss_filter1_w)
|
||||
WRITE8_MEMBER(gyruss_state::gyruss_sh_irqtrigger_w)
|
||||
{
|
||||
/* writing to this register triggers IRQ on the sound CPU */
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gyruss_state::gyruss_i8039_irq_w)
|
||||
|
@ -113,7 +113,7 @@ private:
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(h8_state::h8_irq_pulse)
|
||||
{
|
||||
if (m_irq_ctl & 1)
|
||||
m_maincpu->set_input_line_and_vector(INPUT_LINE_IRQ0, ASSERT_LINE, 0xcf);
|
||||
m_maincpu->set_input_line_and_vector(INPUT_LINE_IRQ0, ASSERT_LINE, 0xcf); // I8080
|
||||
}
|
||||
|
||||
READ8_MEMBER( h8_state::portf0_r )
|
||||
@ -261,7 +261,7 @@ But, all of this can only occur if bit 5 of port F0 is low. */
|
||||
c = !m_ff_b; // from /Q of 2nd flipflop
|
||||
m_ff_b = a; // from Q of 1st flipflop
|
||||
if (c)
|
||||
m_maincpu->set_input_line_and_vector(INPUT_LINE_IRQ0, ASSERT_LINE, 0xd7);
|
||||
m_maincpu->set_input_line_and_vector(INPUT_LINE_IRQ0, ASSERT_LINE, 0xd7); // I8080
|
||||
}
|
||||
}
|
||||
else
|
||||
|
@ -164,7 +164,7 @@ void h89_state::machine_reset()
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(h89_state::h89_irq_timer)
|
||||
{
|
||||
if (m_port_f2 & 0x02)
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xcf);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xcf); // Z80
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( h89_state::port_f2_w )
|
||||
|
@ -26,10 +26,10 @@ TIMER_DEVICE_CALLBACK_MEMBER(higemaru_state::higemaru_scanline)
|
||||
int scanline = param;
|
||||
|
||||
if(scanline == 240) // vblank-out irq
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xcf); /* RST 08h - vblank */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xcf); /* Z80 - RST 08h - vblank */
|
||||
|
||||
if(scanline == 0) // unknown irq event, does various stuff like copying the spriteram
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xd7); /* RST 10h */
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0xd7); /* Z80 - RST 10h */
|
||||
}
|
||||
|
||||
|
||||
|
@ -218,7 +218,7 @@ WRITE16_MEMBER(hp16500_state::maskval_w)
|
||||
|
||||
WRITE_LINE_MEMBER(hp16500_state::irq_2)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_2, state, M68K_INT_ACK_AUTOVECTOR);
|
||||
m_maincpu->set_input_line(M68K_IRQ_2, state);
|
||||
}
|
||||
|
||||
void hp16500_state::hp1650_map(address_map &map)
|
||||
|
@ -122,13 +122,13 @@ private:
|
||||
void add_dio16_bus(machine_config &mconfig);
|
||||
void add_dio32_bus(machine_config &mconfig);
|
||||
|
||||
DECLARE_WRITE_LINE_MEMBER(dio_irq1_w) { m_maincpu->set_input_line_and_vector(M68K_IRQ_1, state, M68K_INT_ACK_AUTOVECTOR); };
|
||||
DECLARE_WRITE_LINE_MEMBER(dio_irq2_w) { m_maincpu->set_input_line_and_vector(M68K_IRQ_2, state, M68K_INT_ACK_AUTOVECTOR); };
|
||||
DECLARE_WRITE_LINE_MEMBER(dio_irq3_w) { m_maincpu->set_input_line_and_vector(M68K_IRQ_3, state, M68K_INT_ACK_AUTOVECTOR); };
|
||||
DECLARE_WRITE_LINE_MEMBER(dio_irq4_w) { m_maincpu->set_input_line_and_vector(M68K_IRQ_4, state, M68K_INT_ACK_AUTOVECTOR); };
|
||||
DECLARE_WRITE_LINE_MEMBER(dio_irq5_w) { m_maincpu->set_input_line_and_vector(M68K_IRQ_5, state, M68K_INT_ACK_AUTOVECTOR); };
|
||||
DECLARE_WRITE_LINE_MEMBER(dio_irq6_w) { m_maincpu->set_input_line_and_vector(M68K_IRQ_6, state, M68K_INT_ACK_AUTOVECTOR); };
|
||||
DECLARE_WRITE_LINE_MEMBER(dio_irq7_w) { m_maincpu->set_input_line_and_vector(M68K_IRQ_7, state, M68K_INT_ACK_AUTOVECTOR); };
|
||||
DECLARE_WRITE_LINE_MEMBER(dio_irq1_w) { m_maincpu->set_input_line(M68K_IRQ_1, state); };
|
||||
DECLARE_WRITE_LINE_MEMBER(dio_irq2_w) { m_maincpu->set_input_line(M68K_IRQ_2, state); };
|
||||
DECLARE_WRITE_LINE_MEMBER(dio_irq3_w) { m_maincpu->set_input_line(M68K_IRQ_3, state); };
|
||||
DECLARE_WRITE_LINE_MEMBER(dio_irq4_w) { m_maincpu->set_input_line(M68K_IRQ_4, state); };
|
||||
DECLARE_WRITE_LINE_MEMBER(dio_irq5_w) { m_maincpu->set_input_line(M68K_IRQ_5, state); };
|
||||
DECLARE_WRITE_LINE_MEMBER(dio_irq6_w) { m_maincpu->set_input_line(M68K_IRQ_6, state); };
|
||||
DECLARE_WRITE_LINE_MEMBER(dio_irq7_w) { m_maincpu->set_input_line(M68K_IRQ_7, state); };
|
||||
|
||||
bool m_bus_error;
|
||||
emu_timer *m_bus_error_timer;
|
||||
|
@ -667,37 +667,37 @@ void hp_ipc_state::floppy_id_w(uint8_t data)
|
||||
|
||||
WRITE_LINE_MEMBER(hp_ipc_state::irq_1)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_1, state, M68K_INT_ACK_AUTOVECTOR);
|
||||
m_maincpu->set_input_line(M68K_IRQ_1, state);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(hp_ipc_state::irq_2)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_2, state, M68K_INT_ACK_AUTOVECTOR);
|
||||
m_maincpu->set_input_line(M68K_IRQ_2, state);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(hp_ipc_state::irq_3)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_3, state, M68K_INT_ACK_AUTOVECTOR);
|
||||
m_maincpu->set_input_line(M68K_IRQ_3, state);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(hp_ipc_state::irq_4)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_4, state, M68K_INT_ACK_AUTOVECTOR);
|
||||
m_maincpu->set_input_line(M68K_IRQ_4, state);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(hp_ipc_state::irq_5)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_5, state, M68K_INT_ACK_AUTOVECTOR);
|
||||
m_maincpu->set_input_line(M68K_IRQ_5, state);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(hp_ipc_state::irq_6)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_6, state, M68K_INT_ACK_AUTOVECTOR);
|
||||
m_maincpu->set_input_line(M68K_IRQ_6, state);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(hp_ipc_state::irq_7)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_7, state, M68K_INT_ACK_AUTOVECTOR);
|
||||
m_maincpu->set_input_line(M68K_IRQ_7, state);
|
||||
}
|
||||
|
||||
|
||||
|
@ -102,7 +102,7 @@ void ht68k_state::machine_reset()
|
||||
|
||||
WRITE_LINE_MEMBER(ht68k_state::duart_irq_handler)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_3, state, M68K_INT_ACK_AUTOVECTOR);
|
||||
m_maincpu->set_input_line(M68K_IRQ_3, state);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(ht68k_state::duart_txb)
|
||||
|
@ -605,11 +605,11 @@ TIMER_DEVICE_CALLBACK_MEMBER(hvyunit_state::scanline)
|
||||
int scanline = param;
|
||||
|
||||
if(scanline == 240) // vblank-out irq
|
||||
m_mastercpu->set_input_line_and_vector(0, HOLD_LINE, 0xfd);
|
||||
m_mastercpu->set_input_line_and_vector(0, HOLD_LINE, 0xfd); // Z80
|
||||
|
||||
/* Pandora "sprite end dma" irq? TODO: timing is likely off */
|
||||
if(scanline == 64)
|
||||
m_mastercpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_mastercpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
/*************************************
|
||||
|
@ -539,7 +539,7 @@ void hyperscan_state::spg290_timers_update()
|
||||
if (elem.control & 0x08000000)
|
||||
{
|
||||
elem.control |= 0x04000000;
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 56);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 56); // SCORE7
|
||||
}
|
||||
}
|
||||
else
|
||||
@ -558,12 +558,12 @@ WRITE_LINE_MEMBER(hyperscan_state::spg290_vblank_irq)
|
||||
if (state && m_ppu.irq_control & 0x01) // VBlanking Start IRQ
|
||||
{
|
||||
m_ppu.irq_status |= 0x01;
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 53);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 53); // SCORE7
|
||||
}
|
||||
else if (!state && m_ppu.irq_control & 0x02) // VBlanking End IRQ
|
||||
{
|
||||
m_ppu.irq_status |= 0x02;
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 53);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 53); // SCORE7
|
||||
}
|
||||
}
|
||||
|
||||
@ -581,7 +581,7 @@ void hyperscan_state::device_timer(emu_timer &timer, device_timer_id id, int par
|
||||
// TODO: replace with real I2C emulation
|
||||
m_i2c.rdata = 0;
|
||||
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 39);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 39); // SCORE7
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
@ -290,7 +290,7 @@ void icebox_state::port_f1_w(u8 data)
|
||||
WRITE_LINE_MEMBER(icebox_state::drq_w)
|
||||
{
|
||||
if (BIT(m_f1, 2))
|
||||
m_maincpu->set_input_line_and_vector(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE, 0x00);
|
||||
m_maincpu->set_input_line_and_vector(INPUT_LINE_IRQ0, state ? ASSERT_LINE : CLEAR_LINE, 0x00); // Z80
|
||||
}
|
||||
|
||||
static void floppies(device_slot_interface &device)
|
||||
|
@ -214,12 +214,12 @@ INTERRUPT_GEN_MEMBER( instruct_state::t2l_int )
|
||||
|
||||
// Check INT sw & key
|
||||
if (BIT(switches, 1))
|
||||
device.execute().set_input_line_and_vector(0, BIT(hwkeys, 1) ? ASSERT_LINE : CLEAR_LINE, vector);
|
||||
device.execute().set_input_line_and_vector(0, BIT(hwkeys, 1) ? ASSERT_LINE : CLEAR_LINE, vector); // S2650
|
||||
else
|
||||
// process ac input
|
||||
{
|
||||
m_irqstate ^= 1;
|
||||
device.execute().set_input_line_and_vector(0, m_irqstate ? ASSERT_LINE : CLEAR_LINE, vector);
|
||||
device.execute().set_input_line_and_vector(0, m_irqstate ? ASSERT_LINE : CLEAR_LINE, vector); // S2650
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -405,12 +405,12 @@ void sgi_ip2_state::sgi_ip2_map(address_map &map)
|
||||
|
||||
WRITE_LINE_MEMBER(sgi_ip2_state::duarta_irq_handler)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_6, state, M68K_INT_ACK_AUTOVECTOR);
|
||||
m_maincpu->set_input_line(M68K_IRQ_6, state);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(sgi_ip2_state::duartb_irq_handler)
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_6, state, M68K_INT_ACK_AUTOVECTOR);
|
||||
m_maincpu->set_input_line(M68K_IRQ_6, state);
|
||||
}
|
||||
|
||||
static DEVICE_INPUT_DEFAULTS_START( ip2_terminal )
|
||||
|
@ -42,7 +42,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(ironhors_state::ironhors_scanline_tick)
|
||||
|
||||
WRITE8_MEMBER(ironhors_state::sh_irqtrigger_w)
|
||||
{
|
||||
m_soundcpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_soundcpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(ironhors_state::filter_w)
|
||||
|
@ -263,7 +263,7 @@ WRITE8_MEMBER(junofrst_state::sh_irqtrigger_w)
|
||||
if (m_last_irq == 0 && data == 1)
|
||||
{
|
||||
/* setting bit 0 low then high triggers IRQ on the sound CPU */
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
m_last_irq = data;
|
||||
|
@ -31,12 +31,12 @@ Main CPU:
|
||||
|
||||
void kingofb_state::video_interrupt_w(uint8_t data)
|
||||
{
|
||||
m_video_cpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_video_cpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
void kingofb_state::sprite_interrupt_w(uint8_t data)
|
||||
{
|
||||
m_sprite_cpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_sprite_cpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
void kingofb_state::scroll_interrupt_w(uint8_t data)
|
||||
@ -48,7 +48,7 @@ void kingofb_state::scroll_interrupt_w(uint8_t data)
|
||||
void kingofb_state::sound_command_w(uint8_t data)
|
||||
{
|
||||
m_soundlatch->write(data);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
|
||||
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
|
||||
}
|
||||
|
||||
|
||||
|
@ -409,7 +409,7 @@ GFXDECODE_END
|
||||
|
||||
INTERRUPT_GEN_MEMBER(laserbat_state_base::laserbat_interrupt)
|
||||
{
|
||||
device.execute().set_input_line_and_vector(0, HOLD_LINE, 0x0a);
|
||||
device.execute().set_input_line_and_vector(0, HOLD_LINE, 0x0a); // S2650
|
||||
}
|
||||
|
||||
void laserbat_state_base::init_laserbat()
|
||||
|
@ -503,12 +503,12 @@ TIMER_DEVICE_CALLBACK_MEMBER(lastbank_state::irq_scanline)
|
||||
|
||||
if (scanline == 240 && (m_irq_enable & 4))
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, m_irq_vector[2]);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, m_irq_vector[2]); // Z80
|
||||
}
|
||||
|
||||
if (scanline == 0 && (m_irq_enable & 2))
|
||||
{
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, m_irq_vector[1]);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, m_irq_vector[1]); // Z80
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -106,7 +106,7 @@ WRITE8_MEMBER(lwings_state::lwings_bankswitch_w)
|
||||
INTERRUPT_GEN_MEMBER(lwings_state::lwings_interrupt)
|
||||
{
|
||||
if(m_nmi_mask)
|
||||
device.execute().set_input_line_and_vector(0, HOLD_LINE, 0xd7); /* RST 10h */
|
||||
device.execute().set_input_line_and_vector(0, HOLD_LINE, 0xd7); /* Z80 - RST 10h */
|
||||
}
|
||||
|
||||
INTERRUPT_GEN_MEMBER(lwings_state::avengers_interrupt)
|
||||
|
@ -340,7 +340,7 @@ WRITE_LINE_MEMBER(lwriter_state::via_int_w)
|
||||
{
|
||||
logerror(" VIA: INT output set to %d!\n", state);
|
||||
//TODO: this is likely wrong, the VPA pin which controls whether autovector is enabled or not is controlled by PAL U8D, which is not dumped.
|
||||
m_maincpu->set_input_line_and_vector(M68K_IRQ_1, (state ? ASSERT_LINE : CLEAR_LINE), M68K_INT_ACK_AUTOVECTOR);
|
||||
m_maincpu->set_input_line(M68K_IRQ_1, (state ? ASSERT_LINE : CLEAR_LINE));
|
||||
}
|
||||
|
||||
/* scc stuff */
|
||||
|
@ -191,7 +191,7 @@ INPUT_PORTS_END
|
||||
|
||||
INTERRUPT_GEN_MEMBER(m79amb_state::m79amb_interrupt)
|
||||
{
|
||||
device.execute().set_input_line_and_vector(0, HOLD_LINE, 0xcf); /* RST 08h */
|
||||
device.execute().set_input_line_and_vector(0, HOLD_LINE, 0xcf); /* Z80 - RST 08h */
|
||||
}
|
||||
|
||||
void m79amb_state::m79amb(machine_config &config)
|
||||
|
@ -718,13 +718,13 @@ INTERRUPT_GEN_MEMBER(m90_state::bomblord_fake_nmi)
|
||||
WRITE_LINE_MEMBER(m90_state::dynablsb_vblank_int_w)
|
||||
{
|
||||
if (state)
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0x60/4);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0x60/4); // V35
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(m90_state::bomblord_vblank_int_w)
|
||||
{
|
||||
if (state)
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0x50/4);
|
||||
m_maincpu->set_input_line_and_vector(0, HOLD_LINE, 0x50/4); // V35
|
||||
}
|
||||
|
||||
|
||||
|
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Reference in New Issue
Block a user