Renamed some #defines to match up closer to the ATA specification. Added validation to register access, switching Primal Rage 2 away from using the DMA interface in it's DMA handler as the game only executes normal read commands (nw)

src/emu/machine/idectrl.c

@@ -232,6 +232,15 @@ WRITE16_MEMBER( ide_controller_device::write_cs1 )
 			m_slot[i]->dev()->write_cs1(space, offset, data, mem_mask);
 }
 
+WRITE_LINE_MEMBER( ide_controller_device::write_dmack )
+{
+//  printf( "write_dmack %04x\n", state );
+
+	for (int i = 0; i < 2; i++)
+		if (m_slot[i]->dev() != NULL)
+			m_slot[i]->dev()->write_dmack(state);
+}
+
 WRITE8_MEMBER( ide_controller_device::write_via_config )
 {
 //  printf( "write via config %04x %04x %04x\n", offset, data, mem_mask );
@@ -416,7 +425,9 @@ bus_master_ide_controller_device::bus_master_ide_controller_device(const machine
 	dma_last_buffer(0),
 	bus_master_command(0),
 	bus_master_status(0),
-	bus_master_descriptor(0)
+	bus_master_descriptor(0),
+	m_irq(0),
+	m_dmarq(0)
 {
 }
 
@@ -568,6 +579,8 @@ WRITE32_MEMBER( bus_master_ide_controller_device::ide_bus_master32_w )
 
 void bus_master_ide_controller_device::execute_dma()
 {
+	write_dmack(ASSERT_LINE);
+
 	while (m_dmarq && (bus_master_status & IDE_BUSMASTER_STATUS_ACTIVE))
 	{
 		/* if we're out of space, grab the next descriptor */
@@ -624,4 +637,6 @@ void bus_master_ide_controller_device::execute_dma()
 			}
 		}
 	}
+
+	write_dmack(CLEAR_LINE);
 }

src/emu/machine/idectrl.h

@@ -94,9 +94,11 @@ public:
 	UINT16 read_dma();
 	DECLARE_READ16_MEMBER(read_cs0);
 	DECLARE_READ16_MEMBER(read_cs1);
+
 	void write_dma(UINT16 data);
 	DECLARE_WRITE16_MEMBER(write_cs0);
 	DECLARE_WRITE16_MEMBER(write_cs1);
+	DECLARE_WRITE_LINE_MEMBER(write_dmack);
 
 	DECLARE_READ8_MEMBER(read_via_config);
 	DECLARE_WRITE8_MEMBER(write_via_config);

src/emu/machine/idehd.h

@@ -3,12 +3,29 @@
 
 #define IDE_DISK_SECTOR_SIZE            512
 
-#define IDE_STATUS_ERROR                    0x01
-#define IDE_STATUS_HIT_INDEX                0x02
-#define IDE_STATUS_BUFFER_READY             0x08
-#define IDE_STATUS_SEEK_COMPLETE            0x10
-#define IDE_STATUS_DRIVE_READY              0x40
-#define IDE_STATUS_BUSY                     0x80
+// Error
+#define IDE_STATUS_ERR  (0x01)
+
+// Index
+#define IDE_STATUS_IDX  (0x02)
+
+// Corrected Data
+#define IDE_STATUS_CORR (0x04)
+
+// Data Request
+#define IDE_STATUS_DRQ  (0x08)
+
+// Drive Seek Complete
+#define IDE_STATUS_DSC  (0x10)
+
+// Drive Write Fault
+#define IDE_STATUS_DWF  (0x20)
+
+// Drive Ready
+#define IDE_STATUS_DRDY (0x40)
+
+// Busy
+#define IDE_STATUS_BSY  (0x80)
 
 #define IDE_ERROR_NONE                      0x00
 #define IDE_ERROR_DEFAULT                   0x01
@@ -32,6 +49,7 @@ public:
 	virtual void write_dma(UINT16 data) = 0;
 	virtual DECLARE_WRITE16_MEMBER(write_cs0) = 0;
 	virtual DECLARE_WRITE16_MEMBER(write_cs1) = 0;
+	virtual DECLARE_WRITE_LINE_MEMBER(write_dmack) = 0;
 	virtual DECLARE_WRITE_LINE_MEMBER(write_csel) = 0;
 	virtual DECLARE_WRITE_LINE_MEMBER(write_dasp) = 0;
 
@@ -62,6 +80,7 @@ public:
 	virtual DECLARE_WRITE16_MEMBER(write_cs1);
 	virtual DECLARE_WRITE_LINE_MEMBER(write_csel);
 	virtual DECLARE_WRITE_LINE_MEMBER(write_dasp);
+	virtual DECLARE_WRITE_LINE_MEMBER(write_dmack);
 
 	virtual UINT8 *get_features() { return m_features; }
 	
@@ -75,6 +94,9 @@ protected:
 	virtual bool is_ready() = 0;
 	virtual void read_key(UINT8 key[]) = 0;
 
+	bool device_selected() { return m_cur_drive == m_csel; }
+	bool single_device() { return m_csel == 0 && m_dasp == 0; }
+
 	void set_irq(int state);
 	void set_dmarq(int state);
 	void ide_build_features();
@@ -98,12 +120,15 @@ private:
 	void security_error();
 	void continue_read();
 	void read_first_sector();
-	void handle_command(UINT8 _command);
+	void handle_command();
 	void read_buffer_empty();
 	void write_buffer_full();
 
 	int m_csel;
 	int m_dasp;
+	int m_dmack;
+	int m_dmarq;
+	int m_irq;
 
 	int             m_cur_drive;
 	UINT16          m_cur_cylinder;
@@ -119,12 +144,11 @@ private:
 	UINT8           m_buffer[IDE_DISK_SECTOR_SIZE];
 	UINT16          m_buffer_offset;
 
-	UINT8           m_adapter_control;
-	UINT8           m_precomp_offset;
+	UINT8           m_device_control;
+	UINT8           m_feature;
 	UINT16          m_sector_count;
 	UINT16          m_block_count;
 
-	UINT8           m_interrupt_pending;
 	UINT16          m_sectors_until_int;
 
 	UINT8           m_dma_active;

src/mame/drivers/zn.c

@@ -1338,11 +1338,13 @@ void zn_state::atpsx_dma_read( UINT32 *p_n_psxram, UINT32 n_address, INT32 n_siz
 		return;
 	}
 
+	address_space &space = machine().firstcpu->space(AS_PROGRAM);
+
 	/* dma size is in 32-bit words, convert to words */
 	n_size <<= 1;
 	while( n_size > 0 )
 	{
-		psxwriteword( p_n_psxram, n_address, m_ide->read_dma() );
+		psxwriteword( p_n_psxram, n_address, m_ide->read_cs0(space, 0, 0xffff) );
 		n_address += 2;
 		n_size--;
 	}