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various comment updates (nw)

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This commit is contained in:
Lord-Nightmare 2017-06-04 04:01:22 -04:00
parent d00079702a
commit e3fa1b874e
3 changed files with 6 additions and 6 deletions
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4
src/devices/cpu/upd7725/upd7725.h
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@ -187,8 +187,8 @@ private:
int m_icount;
bool m_irq; // old irq line state, for detecting rising edges.
// m_irq_firing: if an irq has fired; 0 = not fired or has already finished firing
// 1 = next opcode is the first half of int firing 'NOP+push pc'
// 2 = next opcode is the second half of int firing 'JMP 0100'
// 1 = next opcode is the first half of int firing 'NOP'
// 2 = next opcode is the second half of int firing 'CALL 0100'
int m_irq_firing;
address_space *m_program, *m_data;
direct_read_data *m_direct;

4
src/devices/sound/ay8910.cpp
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@ -398,8 +398,8 @@ AY-3-8914/A: 2 I/O ports
AY-3-8914A die is unknown.
AY-3-8916: 2 I/O ports
A7 thru A4 enable state for selecting a register can be changed with a
factory mask adjustment but was 1111 for the part shipped with the
Intellivision ECS module.
factory mask adjustment; its mask is unknown. This chip was shipped
with certain later Intellivision II systems.
Pins 24, 25, and 26 are /A9, /A8(!), and TEST2, which are an active low,
low(!) and high chip enable, respectively.
NOTE: the /A8 enable polarity may be mixed up with AY-3-8917 below.

4
src/mame/drivers/bpmmicro.cpp
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@ -21,9 +21,9 @@
* 286 based w/240 pin tech adapter integrated as a "mezzanine board", expandable ram:
* BP-1400/240 - uses a 30 OR 72 pin SIMM (some programmers may have
the 30 pin SIMM socket populated) for up to 8MB? of ram
* BP-1400/84 - more or less a 1200/84 with expandable ram, very rare.
* Silicon Sculptor - custom firmware locked to Actel fpga/pld [1400?]
devices, may have a custom MB
devices, may have a custom MB; drives 84 pins (no third connector)
so probably "BP1400/84" based, i.e. a neutered BP-1400/240.
* Silicon Sculptor 6X - as above but 6 programmers ganged together
* 486 based:
* BP-1600 - 486DX4 100Mhz based, uses a 72 pin SIMM for up to 16MB of