correct model number and speed for intellec4 paper tape reader (thanks AJR)

This commit is contained in:
Vas Crabb 2017-07-13 05:31:16 +10:00
parent 22f9272f49
commit e42bb7d2f1
4 changed files with 49 additions and 28 deletions

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@ -251,5 +251,5 @@ void device_univ_card_interface::set_bus(univ_bus_device &bus)
#include "tapereader.h" #include "tapereader.h"
SLOT_INTERFACE_START(intellec4_univ_cards) SLOT_INTERFACE_START(intellec4_univ_cards)
SLOT_INTERFACE("ptreader", INTELLEC4_TAPE_READER) SLOT_INTERFACE("imm4_90", INTELLEC4_TAPE_READER)
SLOT_INTERFACE_END SLOT_INTERFACE_END

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@ -5,66 +5,82 @@
#include "tapereader.h" #include "tapereader.h"
DEFINE_DEVICE_TYPE_NS(INTELLEC4_TAPE_READER, bus::intellec4, tape_reader_device, "intlc4ptr", "INTELLEC 4 paper tape reader") DEFINE_DEVICE_TYPE_NS(INTELLEC4_TAPE_READER, bus::intellec4, imm4_90_device, "imm4_90", "Intel imm4-90 High-Speed Paper Tape Reader")
namespace bus { namespace intellec4 { namespace bus { namespace intellec4 {
tape_reader_device::tape_reader_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock) imm4_90_device::imm4_90_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
: device_t(mconfig, INTELLEC4_TAPE_READER, tag, owner, clock) : device_t(mconfig, INTELLEC4_TAPE_READER, tag, owner, clock)
, device_univ_card_interface(mconfig, *this) , device_univ_card_interface(mconfig, *this)
, device_image_interface(mconfig, *this) , device_image_interface(mconfig, *this)
, m_step_timer(nullptr)
, m_data(0xffU) , m_data(0xffU)
, m_ready(false) , m_ready(false)
, m_advance(false) , m_advance(false)
, m_stepping(false)
{ {
} }
image_init_result tape_reader_device::call_load() image_init_result imm4_90_device::call_load()
{ {
m_step_timer->reset();
m_data = 0x00U; m_data = 0x00U;
m_ready = false; m_ready = false;
m_stepping = false;
return image_init_result::PASS; return image_init_result::PASS;
} }
void tape_reader_device::call_unload() void imm4_90_device::call_unload()
{ {
m_step_timer->reset();
m_data = 0xffU; m_data = 0xffU;
m_ready = false; m_ready = false;
m_stepping = false;
} }
void tape_reader_device::device_start() void imm4_90_device::device_start()
{ {
m_step_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(imm4_90_device::step), this));
save_item(NAME(m_data)); save_item(NAME(m_data));
save_item(NAME(m_ready)); save_item(NAME(m_ready));
save_item(NAME(m_advance)); save_item(NAME(m_advance));
save_item(NAME(m_stepping));
rom_ports_space().install_read_handler(0x0040U, 0x004fU, read8_delegate(FUNC(tape_reader_device::rom4_in), this)); rom_ports_space().install_read_handler(0x0040U, 0x004fU, read8_delegate(FUNC(imm4_90_device::rom4_in), this));
rom_ports_space().install_read_handler(0x0060U, 0x006fU, read8_delegate(FUNC(tape_reader_device::rom6_in), this)); rom_ports_space().install_read_handler(0x0060U, 0x006fU, read8_delegate(FUNC(imm4_90_device::rom6_in), this));
rom_ports_space().install_read_handler(0x0070U, 0x007fU, read8_delegate(FUNC(tape_reader_device::rom7_in), this)); rom_ports_space().install_read_handler(0x0070U, 0x007fU, read8_delegate(FUNC(imm4_90_device::rom7_in), this));
rom_ports_space().install_write_handler(0x0040U, 0x004fU, write8_delegate(FUNC(tape_reader_device::rom4_out), this)); rom_ports_space().install_write_handler(0x0040U, 0x004fU, write8_delegate(FUNC(imm4_90_device::rom4_out), this));
} }
DECLARE_WRITE_LINE_MEMBER(tape_reader_device::advance) DECLARE_WRITE_LINE_MEMBER(imm4_90_device::advance)
{ {
// this is edge-sensitive - CPU sends the narrowest pulse it can // this is edge-sensitive - CPU sends the narrowest pulse it can
if (!m_advance && !bool(state)) if (!m_advance && !bool(state) && !m_stepping)
{ {
// FIXME: it probably shouldn't be quite this fast m_ready = false;
if (is_loaded() && fread(&m_data, 1U)) m_stepping = true;
{ m_step_timer->adjust(attotime::from_msec(5)); // 200 characters/second
m_ready = true;
}
else
{
m_data = 0xffU;
m_ready = false;
}
} }
m_advance = !bool(state); m_advance = !bool(state);
} }
TIMER_CALLBACK_MEMBER(imm4_90_device::step)
{
m_stepping = false;
if (is_loaded() && fread(&m_data, 1U))
{
m_ready = true;
}
else
{
m_data = 0xffU;
m_ready = false;
}
}
} } // namespace bus::intellec4 } } // namespace bus::intellec4

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@ -1,11 +1,12 @@
// license:BSD-3-Clause // license:BSD-3-Clause
// copyright-holders:Vas Crabb // copyright-holders:Vas Crabb
/* /*
High-speed paper tape reader imm4-90 High-Speed Paper Tape Reader
The monitor PROM has support for loading BNPF or Intel HEX from this The monitor PROM has support for loading BNPF or Intel HEX from this
device (use J command to select it), but it doesn't appear in any device (use J command to select it), but it doesn't appear in any
catalogues or manuals I've seen. catalogues or manuals I've seen. Apparently it was announced in
Computerworld.
*/ */
#ifndef MAME_BUS_INTELLEC4_TAPEREADER_H #ifndef MAME_BUS_INTELLEC4_TAPEREADER_H
#define MAME_BUS_INTELLEC4_TAPEREADER_H #define MAME_BUS_INTELLEC4_TAPEREADER_H
@ -16,10 +17,10 @@ catalogues or manuals I've seen.
namespace bus { namespace intellec4 { namespace bus { namespace intellec4 {
class tape_reader_device : public device_t, public device_univ_card_interface, public device_image_interface class imm4_90_device : public device_t, public device_univ_card_interface, public device_image_interface
{ {
public: public:
tape_reader_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock); imm4_90_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
virtual image_init_result call_load() override; virtual image_init_result call_load() override;
virtual void call_unload() override; virtual void call_unload() override;
@ -41,14 +42,18 @@ private:
DECLARE_READ8_MEMBER(rom7_in) { return (~m_data >> 4) & 0x0fU; } DECLARE_READ8_MEMBER(rom7_in) { return (~m_data >> 4) & 0x0fU; }
DECLARE_WRITE8_MEMBER(rom4_out) { advance(BIT(data, 3)); } DECLARE_WRITE8_MEMBER(rom4_out) { advance(BIT(data, 3)); }
DECLARE_WRITE_LINE_MEMBER(advance); DECLARE_WRITE_LINE_MEMBER(advance);
TIMER_CALLBACK_MEMBER(step);
emu_timer *m_step_timer;
u8 m_data; u8 m_data;
bool m_ready; bool m_ready;
bool m_advance; bool m_advance;
bool m_stepping;
}; };
} } // namespace bus::intellec4 } } // namespace bus::intellec4
DECLARE_DEVICE_TYPE_NS(INTELLEC4_TAPE_READER, bus::intellec4, tape_reader_device) DECLARE_DEVICE_TYPE_NS(INTELLEC4_TAPE_READER, bus::intellec4, imm4_90_device)
#endif // MAME_BUS_INTELLEC4_TAPEREADER_H #endif // MAME_BUS_INTELLEC4_TAPEREADER_H

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@ -327,7 +327,7 @@ MACHINE_CONFIG_START(intellec4)
MCFG_INTELLEC4_UNIV_BUS_RAM_PORTS_SPACE("maincpu", mcs40_cpu_device_base::AS_RAM_PORTS) MCFG_INTELLEC4_UNIV_BUS_RAM_PORTS_SPACE("maincpu", mcs40_cpu_device_base::AS_RAM_PORTS)
MCFG_INTELLEC4_UNIV_BUS_RESET_4002_CB(WRITELINE(intellec4_state, bus_reset_4002)) MCFG_INTELLEC4_UNIV_BUS_RESET_4002_CB(WRITELINE(intellec4_state, bus_reset_4002))
MCFG_INTELLEC4_UNIV_BUS_USER_RESET_CB(WRITELINE(intellec4_state, bus_user_reset)) MCFG_INTELLEC4_UNIV_BUS_USER_RESET_CB(WRITELINE(intellec4_state, bus_user_reset))
MCFG_INTELLEC4_UNIV_SLOT_ADD("bus", "j7", 518000. / 7, intellec4_univ_cards, "ptreader") MCFG_INTELLEC4_UNIV_SLOT_ADD("bus", "j7", 518000. / 7, intellec4_univ_cards, "imm4_90")
MCFG_INTELLEC4_UNIV_SLOT_ADD("bus", "j8", 518000. / 7, intellec4_univ_cards, nullptr) MCFG_INTELLEC4_UNIV_SLOT_ADD("bus", "j8", 518000. / 7, intellec4_univ_cards, nullptr)
MCFG_INTELLEC4_UNIV_SLOT_ADD("bus", "j9", 518000. / 7, intellec4_univ_cards, nullptr) MCFG_INTELLEC4_UNIV_SLOT_ADD("bus", "j9", 518000. / 7, intellec4_univ_cards, nullptr)
MCFG_INTELLEC4_UNIV_SLOT_ADD("bus", "j10", 518000. / 7, intellec4_univ_cards, nullptr) MCFG_INTELLEC4_UNIV_SLOT_ADD("bus", "j10", 518000. / 7, intellec4_univ_cards, nullptr)