added empty opcode handlers

src/emu/cpu/sm510/sm510.c

@@ -138,9 +138,6 @@ void sm510_base_device::device_reset()
 
 
 
-
-
-
 //-------------------------------------------------
 //  execute
 //-------------------------------------------------
@@ -180,6 +177,77 @@ void sm510_base_device::execute_run()
 		get_opcode_param();
 
 		// handle opcode
+		switch (m_op & 0xf0)
+		{
+			case 0x20: op_lax(); break;
+			case 0x30: op_adx(); break;
+			case 0x40: op_lb(); break;
 
+			case 0x80: case 0x90: case 0xa0: case 0xb0:
+				op_t(); break;
+			case 0xc0: case 0xd0: case 0xe0: case 0xf0:
+				op_tm(); break;
+
+			default:
+				switch (m_op & 0xfc)
+				{
+			case 0x04: op_rm(); break;
+			case 0x0c: op_sm(); break;
+			case 0x10: op_exc(); break;
+			case 0x14: op_exci(); break;
+			case 0x18: op_lda(); break;
+			case 0x1c: op_excd(); break;
+			case 0x54: op_tmi(); break;
+			case 0x70: case 0x74: case 0x78: op_tl();
+			case 0x7c: op_tml(); break;
+
+			default:
+				switch (m_op)
+				{
+			case 0x00: op_skip(); break;
+			case 0x01: op_atbp(); break;
+			case 0x02: op_sbm(); break;
+			case 0x03: op_atpl(); break;
+			case 0x08: op_add(); break;
+			case 0x09: op_add11(); break;
+			case 0x0a: op_coma(); break;
+			case 0x0b: op_exbla(); break;
+
+			case 0x51: op_tb(); break;
+			case 0x52: op_tc(); break;
+			case 0x53: op_tam(); break;
+			case 0x58: op_tis(); break;
+			case 0x59: op_atl(); break;
+			case 0x5a: op_ta0(); break;
+			case 0x5b: op_tabl(); break;
+			case 0x5d: op_cend(); break;
+			case 0x5e: op_tal(); break;
+			case 0x5f: op_lbl(); break;
+
+			case 0x60: op_atfc(); break;
+			case 0x61: op_atr(); break;
+			case 0x62: op_wr(); break;
+			case 0x63: op_ws(); break;
+			case 0x64: op_incb(); break;
+			case 0x65: op_idiv(); break;
+			case 0x66: op_rc(); break;
+			case 0x67: op_sc(); break;
+			case 0x68: op_tf1(); break;
+			case 0x69: op_tf4(); break;
+			case 0x6a: op_kta(); break;
+			case 0x6b: op_rot(); break;
+			case 0x6c: op_decb(); break;
+			case 0x6d: op_bdc(); break;
+			case 0x6e: op_rtn0(); break;
+			case 0x6f: op_rtn1(); break;
+
+			default: op_illegal(); break;
+				}
+				break; // 0xff
+
+				}
+				break; // 0xfc
+
+		} // big switch
 	}
 }

src/emu/cpu/sm510/sm510.h

@@ -93,6 +93,61 @@ protected:
 	void push_stack();
 
 	// opcode handlers
+	void op_lb();
+	void op_lbl();
+	void op_sbm();
+	void op_exbla();
+	void op_incb();
+	void op_decb();
+
+	void op_atpl();
+	void op_rtn0();
+	void op_rtn1();
+	void op_tl();
+	void op_tml();
+	void op_tm();
+	void op_t();
+
+	void op_exc();
+	void op_bdc();
+	void op_exci();
+	void op_excd();
+	void op_lda();
+	void op_lax();
+	void op_wr();
+	void op_ws();
+
+	void op_kta();
+	void op_atbp();
+	void op_atl();
+	void op_atfc();
+	void op_atr();
+
+	void op_add();
+	void op_add11();
+	void op_adx();
+	void op_coma();
+	void op_rot();
+	void op_rc();
+	void op_sc();
+
+	void op_tb();
+	void op_tc();
+	void op_tam();
+	void op_tmi();
+	void op_ta0();
+	void op_tabl();
+	void op_tis();
+	void op_tal();
+	void op_tf1();
+	void op_tf4();
+
+	void op_rm();
+	void op_sm();
+	void op_skip();
+	void op_cend();
+	void op_idiv();
+
 	void op_illegal();
 };
 

src/emu/cpu/sm510/sm510op.inc

@@ -35,6 +35,269 @@ void sm510_base_device::push_stack()
 
 // instruction set
 
+// RAM address instructions
+
+void sm510_base_device::op_lb()
+{
+	// x
+}
+
+void sm510_base_device::op_lbl()
+{
+	// x
+}
+
+void sm510_base_device::op_sbm()
+{
+	// x
+}
+
+void sm510_base_device::op_exbla()
+{
+	// x
+}
+
+void sm510_base_device::op_incb()
+{
+	// x
+}
+
+void sm510_base_device::op_decb()
+{
+	// x
+}
+
+
+// ROM address instructions
+
+void sm510_base_device::op_atpl()
+{
+	// x
+}
+
+void sm510_base_device::op_rtn0()
+{
+	// x
+}
+
+void sm510_base_device::op_rtn1()
+{
+	// x
+}
+
+void sm510_base_device::op_tl()
+{
+	// x
+}
+
+void sm510_base_device::op_tml()
+{
+	// x
+}
+
+void sm510_base_device::op_tm()
+{
+	// x
+}
+
+void sm510_base_device::op_t()
+{
+	// x
+}
+
+
+// Data transfer instructions
+
+void sm510_base_device::op_exc()
+{
+	// x
+}
+
+void sm510_base_device::op_bdc()
+{
+	// x
+}
+
+void sm510_base_device::op_exci()
+{
+	// x
+}
+
+void sm510_base_device::op_excd()
+{
+	// x
+}
+
+void sm510_base_device::op_lda()
+{
+	// x
+}
+
+void sm510_base_device::op_lax()
+{
+	// x
+}
+
+void sm510_base_device::op_wr()
+{
+	// x
+}
+
+void sm510_base_device::op_ws()
+{
+	// x
+}
+
+
+// I/O instructions
+
+void sm510_base_device::op_kta()
+{
+	// x
+}
+
+void sm510_base_device::op_atbp()
+{
+	// x
+}
+
+void sm510_base_device::op_atl()
+{
+	// x
+}
+
+void sm510_base_device::op_atfc()
+{
+	// x
+}
+
+void sm510_base_device::op_atr()
+{
+	// x
+}
+
+
+// Arithmetic instructions
+
+void sm510_base_device::op_add()
+{
+	// x
+}
+
+void sm510_base_device::op_add11()
+{
+	// x
+}
+
+void sm510_base_device::op_adx()
+{
+	// x
+}
+
+void sm510_base_device::op_coma()
+{
+	// x
+}
+
+void sm510_base_device::op_rot()
+{
+	// x
+}
+
+void sm510_base_device::op_rc()
+{
+	// x
+}
+
+void sm510_base_device::op_sc()
+{
+	// x
+}
+
+
+// Test instructions
+
+void sm510_base_device::op_tb()
+{
+	// x
+}
+
+void sm510_base_device::op_tc()
+{
+	// x
+}
+
+void sm510_base_device::op_tam()
+{
+	// x
+}
+
+void sm510_base_device::op_tmi()
+{
+	// x
+}
+
+void sm510_base_device::op_ta0()
+{
+	// x
+}
+
+void sm510_base_device::op_tabl()
+{
+	// x
+}
+
+void sm510_base_device::op_tis()
+{
+	// x
+}
+
+void sm510_base_device::op_tal()
+{
+	// x
+}
+
+void sm510_base_device::op_tf1()
+{
+	// x
+}
+
+void sm510_base_device::op_tf4()
+{
+	// x
+}
+
+
+// Bit manipulation instructions
+
+void sm510_base_device::op_rm()
+{
+	// x
+}
+
+void sm510_base_device::op_sm()
+{
+	// x
+}
+
+
+// Special instructions
+
+void sm510_base_device::op_skip()
+{
+	// no operation
+}
+
+void sm510_base_device::op_cend()
+{
+	// clock stop
+}
+
+void sm510_base_device::op_idiv()
+{
+	// reset DIV
+}
+
 void sm510_base_device::op_illegal()
 {
 	logerror("%s unknown opcode $%03X at $%04X\n", tag(), m_op, m_prev_pc);