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https://github.com/holub/mame
synced 2025-04-27 02:33:13 +03:00
ti99: Improved logging for the cartslot (nw).
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5eefcfdb68
commit
e4c856dd1f
@ -118,6 +118,7 @@
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#define TRACE_GROM 0
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#define TRACE_GKRACKER 0
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#define TRACE_CRU 0
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#define TRACE_BANKSWITCH 0
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#define GROM3_TAG "grom3"
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#define GROM4_TAG "grom4"
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@ -1654,7 +1655,7 @@ WRITE8_MEMBER(ti99_cartridge_pcb::write)
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{
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if (m_romspace_selected)
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{
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if (TRACE_ILLWRITE) space.device().logerror("Cannot write to ROM space at %04x\n", offset);
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if (TRACE_ILLWRITE) m_cart->logerror("Cannot write to ROM space at %04x\n", offset);
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}
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else
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{
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@ -1760,6 +1761,7 @@ WRITE8_MEMBER(ti99_paged12k_cartridge::write)
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if (m_romspace_selected)
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{
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m_rom_page = (offset >> 1) & 1;
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if (TRACE_BANKSWITCH) if ((offset & 1)==0) m_cart->logerror("Set ROM page = %d (writing to %04x)\n", m_rom_page, (offset | 0x6000));
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}
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else
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{
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@ -1807,6 +1809,7 @@ WRITE8_MEMBER(ti99_paged16k_cartridge::write)
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if (m_romspace_selected)
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{
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m_rom_page = (offset >> 1) & 1;
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if (TRACE_BANKSWITCH) if ((offset & 1)==0) m_cart->logerror("Set ROM page = %d (writing to %04x)\n", m_rom_page, (offset | 0x6000));
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}
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else
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{
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@ -1863,7 +1866,7 @@ WRITE8_MEMBER(ti99_minimem_cartridge::write)
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{
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if ((offset & 0x1000)==0x0000)
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{
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if (TRACE_ILLWRITE) space.device().logerror("Write access to cartridge ROM at address %04x ignored", offset);
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if (TRACE_ILLWRITE) m_cart->logerror("Write access to cartridge ROM at address %04x ignored", offset);
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}
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else
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{
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@ -1969,7 +1972,7 @@ READ8Z_MEMBER(ti99_super_cartridge::crureadz)
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if ((offset & 0xfff0) == 0x0800)
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{
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if (TRACE_CRU) space.device().logerror("CRU accessed at %04x\n", offset);
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if (TRACE_CRU) m_cart->logerror("CRU accessed at %04x\n", offset);
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uint8_t val = 0x02 << (m_ram_page << 1);
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*value = (val >> ((offset - 0x0800)>>1)) & 0xff;
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}
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@ -1979,9 +1982,12 @@ WRITE8_MEMBER(ti99_super_cartridge::cruwrite)
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{
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if ((offset & 0xfff0) == 0x0800)
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{
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if (TRACE_CRU) space.device().logerror("CRU accessed at %04x\n", offset);
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if (TRACE_CRU) m_cart->logerror("CRU accessed at %04x\n", offset);
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if (data != 0)
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{
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m_ram_page = (offset-0x0802)>>2;
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if (TRACE_BANKSWITCH) if ((offset & 1)==0) m_cart->logerror("Set RAM page = %d (CRU address %04x)\n", m_ram_page, offset);
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}
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}
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}
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@ -2034,7 +2040,7 @@ READ8Z_MEMBER(ti99_mbx_cartridge::readz)
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{
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// Also reads the value of 6ffe
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*value = m_ram_ptr[offset & 0x03ff];
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if (TRACE_READ) space.device().logerror("%04x (RAM) -> %02x\n", offset + 0x6000, *value);
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if (TRACE_READ) m_cart->logerror("%04x (RAM) -> %02x\n", offset + 0x6000, *value);
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}
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else
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{
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@ -2045,7 +2051,7 @@ READ8Z_MEMBER(ti99_mbx_cartridge::readz)
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else // 7000 area
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*value = m_rom_ptr[(offset & 0x0fff) | (m_rom_page << 12)];
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if (TRACE_READ) space.device().logerror("%04x(%04x) -> %02x\n", offset + 0x6000, offset | (m_rom_page<<13), *value);
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if (TRACE_READ) m_cart->logerror("%04x(%04x) -> %02x\n", offset + 0x6000, offset | (m_rom_page<<13), *value);
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}
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}
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}
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@ -2066,13 +2072,13 @@ WRITE8_MEMBER(ti99_mbx_cartridge::write)
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{
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// Valid values are 0, 1, 2, 3
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m_rom_page = data & 3;
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if (TRACE_WRITE) if ((offset & 1)==0) space.device().logerror("Set ROM page = %d\n", data);
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if (TRACE_BANKSWITCH) if ((offset & 1)==0) m_cart->logerror("Set ROM page = %d (writing to %04x)\n", m_rom_page, (offset | 0x6000));
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}
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if (m_ram_ptr != nullptr)
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m_ram_ptr[offset & 0x03ff] = data;
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else
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if (TRACE_ILLWRITE) space.device().logerror("Write access to %04x but no RAM present\n", offset+0x6000);
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if (TRACE_ILLWRITE) m_cart->logerror("Write access to %04x but no RAM present\n", offset+0x6000);
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}
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}
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else
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@ -2150,6 +2156,7 @@ WRITE8_MEMBER(ti99_paged379i_cartridge::write)
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// The page is determined by the inverted outputs.
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m_rom_page = (~offset)>>1 & mask;
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if (TRACE_BANKSWITCH) if ((offset & 1)==0) m_cart->logerror("Set ROM page = %d (writing to %04x)\n", m_rom_page, (offset | 0x6000));
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}
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}
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@ -2190,6 +2197,7 @@ WRITE8_MEMBER(ti99_paged378_cartridge::write)
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if (m_romspace_selected)
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{
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m_rom_page = ((offset >> 1)&0x003f);
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if (TRACE_BANKSWITCH) if ((offset & 1)==0) m_cart->logerror("Set ROM page = %d (writing to %04x)\n", m_rom_page, (offset | 0x6000));
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}
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}
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@ -2226,7 +2234,10 @@ WRITE8_MEMBER(ti99_paged377_cartridge::write)
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// Bits: 011x xxxb bbbb bbbx
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// x = don't care, bbbb = bank
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if (m_romspace_selected)
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{
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m_rom_page = ((offset >> 1)&0x00ff);
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if (TRACE_BANKSWITCH) if ((offset & 1)==0) m_cart->logerror("Set ROM page = %d (writing to %04x)\n", m_rom_page, (offset | 0x6000));
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}
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}
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/*****************************************************************************
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@ -2298,6 +2309,7 @@ WRITE8_MEMBER(ti99_pagedcru_cartridge::cruwrite)
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if (data != 0 && bit > 0)
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{
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m_rom_page = (bit-1)/2;
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if (TRACE_BANKSWITCH) m_cart->logerror("Set ROM page = %d (CRU address %d)\n", m_rom_page, offset);
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}
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}
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}
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@ -2394,6 +2406,7 @@ WRITE8_MEMBER(ti99_gromemu_cartridge::write)
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return; // no paging
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}
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m_rom_page = (offset >> 1) & 1;
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if (TRACE_BANKSWITCH) if ((offset & 1)==0) m_cart->logerror("Set ROM page = %d (writing to %04x)\n", m_rom_page, (offset | 0x6000));
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}
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else
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{
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@ -2445,7 +2458,7 @@ WRITE8_MEMBER(ti99_gromemu_cartridge::gromemuwrite)
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}
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else
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{
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if (TRACE_ILLWRITE) space.device().logerror("Ignoring write to GROM area at address %04x\n", m_grom_address);
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if (TRACE_ILLWRITE) m_cart->logerror("Ignoring write to GROM area at address %04x\n", m_grom_address);
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}
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}
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