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route16.cpp: added player 2 inputs to T.T. Mahjong [Angelo Salese]

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This commit is contained in:
angelosa 2017-12-04 12:07:41 +01:00
parent 62c3cab42d
commit e5193d9fa3
2 changed files with 66 additions and 20 deletions
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83
src/mame/drivers/route16.cpp
View File

@ -147,7 +147,7 @@ WRITE8_MEMBER(route16_state::ttmahjng_input_port_matrix_w)
} }
READ8_MEMBER(route16_state::ttmahjng_input_port_matrix_r) READ8_MEMBER(route16_state::ttmahjng_p1_matrix_r)
{ {
uint8_t ret = 0; uint8_t ret = 0;
@ -163,6 +163,21 @@ READ8_MEMBER(route16_state::ttmahjng_input_port_matrix_r)
return ret; return ret;
} }
READ8_MEMBER(route16_state::ttmahjng_p2_matrix_r)
{
uint8_t ret = 0;
switch (m_ttmahjng_port_select)
{
case 1: ret = ioport("KEY4")->read(); break;
case 2: ret = ioport("KEY5")->read(); break;
case 4: ret = ioport("KEY6")->read(); break;
case 8: ret = ioport("KEY7")->read(); break;
default: break;
}
return ret;
}
/*************************************************************************** /***************************************************************************
@ -249,8 +264,8 @@ static ADDRESS_MAP_START( ttmahjng_cpu1_map, AS_PROGRAM, 8, route16_state )
AM_RANGE(0x0000, 0x3fff) AM_ROM AM_RANGE(0x0000, 0x3fff) AM_ROM
AM_RANGE(0x4000, 0x43ff) AM_RAM AM_SHARE("sharedram") AM_RANGE(0x4000, 0x43ff) AM_RAM AM_SHARE("sharedram")
AM_RANGE(0x4800, 0x4800) AM_READ_PORT("DSW") AM_WRITE(out0_w) AM_RANGE(0x4800, 0x4800) AM_READ_PORT("DSW") AM_WRITE(out0_w)
AM_RANGE(0x5000, 0x5000) AM_READ_PORT("IN0") AM_WRITE(out1_w) AM_RANGE(0x5000, 0x5000) AM_READ(ttmahjng_p2_matrix_r) AM_WRITE(out1_w)
AM_RANGE(0x5800, 0x5800) AM_READWRITE(ttmahjng_input_port_matrix_r, ttmahjng_input_port_matrix_w) AM_RANGE(0x5800, 0x5800) AM_READWRITE(ttmahjng_p1_matrix_r, ttmahjng_input_port_matrix_w)
AM_RANGE(0x6800, 0x6800) AM_DEVWRITE("ay8910", ay8910_device, data_w) AM_RANGE(0x6800, 0x6800) AM_DEVWRITE("ay8910", ay8910_device, data_w)
AM_RANGE(0x6900, 0x6900) AM_DEVWRITE("ay8910", ay8910_device, address_w) AM_RANGE(0x6900, 0x6900) AM_DEVWRITE("ay8910", ay8910_device, address_w)
AM_RANGE(0x8000, 0xbfff) AM_RAM AM_SHARE("videoram1") AM_RANGE(0x8000, 0xbfff) AM_RAM AM_SHARE("videoram1")
@ -492,37 +507,27 @@ static INPUT_PORTS_START( ttmahjng )
PORT_DIPSETTING( 0x00, "00" ) PORT_DIPSETTING( 0x00, "00" )
PORT_DIPSETTING( 0x80, "80" ) PORT_DIPSETTING( 0x80, "80" )
PORT_START("IN0") /* IN1 */ PORT_START("KEY0")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_START("KEY0") /* IN2 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A ) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_E ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_E )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_I ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_I )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_M ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_M )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_KAN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) // START2? PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("KEY1") /* IN3 */ PORT_START("KEY1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_B ) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_B )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_J ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_J )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_N ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_N )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_REACH )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 ) // START1? PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("KEY2") /* IN4 */ PORT_START("KEY2")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_C ) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_C )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_G ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_G )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K )
@ -532,7 +537,7 @@ static INPUT_PORTS_START( ttmahjng )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("KEY3") /* IN5 */ PORT_START("KEY3")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_D ) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_D )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_H ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_H )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_L ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_L )
@ -541,6 +546,46 @@ static INPUT_PORTS_START( ttmahjng )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("KEY4")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A ) PORT_COCKTAIL
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_E ) PORT_COCKTAIL
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_I ) PORT_COCKTAIL
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_M ) PORT_COCKTAIL
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) PORT_COCKTAIL
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("KEY5")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_B ) PORT_COCKTAIL
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F ) PORT_COCKTAIL
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_J ) PORT_COCKTAIL
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_N ) PORT_COCKTAIL
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) PORT_COCKTAIL
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("KEY6")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_C ) PORT_COCKTAIL
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_G ) PORT_COCKTAIL
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K ) PORT_COCKTAIL
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) PORT_COCKTAIL
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) PORT_COCKTAIL
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_START("KEY7")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_D ) PORT_COCKTAIL
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_H ) PORT_COCKTAIL
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_L ) PORT_COCKTAIL
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) PORT_COCKTAIL
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
INPUT_PORTS_END INPUT_PORTS_END
MACHINE_START_MEMBER(route16_state, speakres) MACHINE_START_MEMBER(route16_state, speakres)

3
src/mame/includes/route16.h
View File

@ -31,7 +31,8 @@ public:
DECLARE_WRITE8_MEMBER(route16_sharedram_w); DECLARE_WRITE8_MEMBER(route16_sharedram_w);
DECLARE_READ8_MEMBER(routex_prot_read); DECLARE_READ8_MEMBER(routex_prot_read);
DECLARE_WRITE8_MEMBER(ttmahjng_input_port_matrix_w); DECLARE_WRITE8_MEMBER(ttmahjng_input_port_matrix_w);
DECLARE_READ8_MEMBER(ttmahjng_input_port_matrix_r); DECLARE_READ8_MEMBER(ttmahjng_p1_matrix_r);
DECLARE_READ8_MEMBER(ttmahjng_p2_matrix_r);
DECLARE_READ8_MEMBER(speakres_in3_r); DECLARE_READ8_MEMBER(speakres_in3_r);
DECLARE_WRITE8_MEMBER(speakres_out2_w); DECLARE_WRITE8_MEMBER(speakres_out2_w);
DECLARE_WRITE8_MEMBER(stratvox_sn76477_w); DECLARE_WRITE8_MEMBER(stratvox_sn76477_w);