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irq note (nw)
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@ -21,11 +21,18 @@ data structures look very similar between all of them
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IRQ mask register on the internal interrupt controller is set to 0xd8
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so levels 0,1,2,5 are unmasked
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so levels 0,1,2,5 are unmasked, vectors get set during the sound CPU init code.
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returning random values / triggering random interrupts eventually results in a situation
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where the CPU stops writing to the sound related addresses and starts reading / masking the
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serial comms register.
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level 0/1 irq (fatfurwa) starts at 0xd277 (both the same vector)
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serial comms related, maybe to get commands from main CPU if not done with shared ram?
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level 2 irq (fatfurwa) 0xdd20
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simple routine increases counter in RAM, maybe hooked to one / all of the timer irqs
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level 5 irq: (fatfurwa) starts at 0xc1e1
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largest irq, does things with ports 100 / 102 / 104 / 106, 10a (not 108 directly tho)
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no other irqs (or the NMI) are valid.
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*/
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