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https://github.com/holub/mame
synced 2025-05-29 00:53:09 +03:00
simplify add/sub a bit
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parent
bc1701628f
commit
e5ed0ffaec
@ -13,10 +13,13 @@ INLINE UINT16 POP_STACK(tms32051_state *cpustate)
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return pc;
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}
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INLINE INT32 SUB(tms32051_state *cpustate, UINT32 a, UINT32 b, int shift16)
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INLINE INT32 SUB(tms32051_state *cpustate, UINT32 a, UINT32 b)
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{
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UINT32 res = a - b;
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// C is cleared if borrow was generated
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cpustate->st1.c = (b > a) ? 0 : 1;
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// check overflow
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if ((a ^ b) & (a ^ res) & 0x80000000)
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{
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@ -29,28 +32,16 @@ INLINE INT32 SUB(tms32051_state *cpustate, UINT32 a, UINT32 b, int shift16)
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cpustate->st0.ov = 1;
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}
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// set carry
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if (!shift16)
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{
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// C is cleared if borrow was generated
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cpustate->st1.c = (b > a) ? 0 : 1;
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}
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else
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{
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// if 16-bit shift, C is cleared if borrow was generated, otherwise C is unaffected
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if (b > a)
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{
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cpustate->st1.c = 0;
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}
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}
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return (INT32)(res);
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}
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INLINE INT32 ADD(tms32051_state *cpustate, UINT32 a, UINT32 b, int shift16)
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INLINE INT32 ADD(tms32051_state *cpustate, UINT32 a, UINT32 b)
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{
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UINT32 res = a + b;
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// C is set if carry was generated
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cpustate->st1.c = (a > res) ? 1 : 0;
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// check overflow
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if ((a ^ res) & (b ^ res) & 0x80000000)
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{
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@ -63,21 +54,6 @@ INLINE INT32 ADD(tms32051_state *cpustate, UINT32 a, UINT32 b, int shift16)
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cpustate->st0.ov = 1;
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}
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// check carry
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if (!shift16)
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{
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// C is set if carry was generated
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cpustate->st1.c = (((UINT64)(a) + (UINT64)(b)) & U64(0x100000000)) ? 1 : 0;
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}
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else
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{
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// if 16-bit shift, C is set carry was generated, otherwise C is unaffected
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if (((UINT64)(a) + (UINT64)(b)) & U64(0x100000000))
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{
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cpustate->st1.c = 1;
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}
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}
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return (INT32)(res);
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}
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@ -327,7 +303,7 @@ static void op_add_mem(tms32051_state *cpustate)
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d = (UINT32)(UINT16)(data) << shift;
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}
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cpustate->acc = ADD(cpustate, cpustate->acc, d, 0);
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cpustate->acc = ADD(cpustate, cpustate->acc, d);
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CYCLES(1);
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}
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@ -336,7 +312,7 @@ static void op_add_simm(tms32051_state *cpustate)
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{
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UINT16 imm = cpustate->op & 0xff;
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cpustate->acc = ADD(cpustate, cpustate->acc, imm, 0);
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cpustate->acc = ADD(cpustate, cpustate->acc, imm);
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CYCLES(1);
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}
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@ -356,7 +332,7 @@ static void op_add_limm(tms32051_state *cpustate)
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d = (UINT32)(UINT16)(imm) << shift;
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}
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cpustate->acc = ADD(cpustate, cpustate->acc, d, 0);
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cpustate->acc = ADD(cpustate, cpustate->acc, d);
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CYCLES(2);
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}
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@ -368,7 +344,7 @@ static void op_add_s16_mem(tms32051_state *cpustate)
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static void op_addb(tms32051_state *cpustate)
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{
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cpustate->acc = ADD(cpustate, cpustate->acc, cpustate->accb, 0);
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cpustate->acc = ADD(cpustate, cpustate->acc, cpustate->accb);
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CYCLES(1);
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}
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@ -683,7 +659,7 @@ static void op_satl(tms32051_state *cpustate)
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static void op_sbb(tms32051_state *cpustate)
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{
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cpustate->acc = SUB(cpustate, cpustate->acc, cpustate->accb, 0);
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cpustate->acc = SUB(cpustate, cpustate->acc, cpustate->accb);
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CYCLES(1);
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}
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@ -750,7 +726,7 @@ static void op_sub_mem(tms32051_state *cpustate)
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d = (UINT32)(UINT16)(data) << shift;
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}
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cpustate->acc = SUB(cpustate, cpustate->acc, d, 0);
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cpustate->acc = SUB(cpustate, cpustate->acc, d);
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CYCLES(1);
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}
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@ -764,7 +740,7 @@ static void op_sub_simm(tms32051_state *cpustate)
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{
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UINT16 imm = cpustate->op & 0xff;
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cpustate->acc = SUB(cpustate, cpustate->acc, imm, 0);
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cpustate->acc = SUB(cpustate, cpustate->acc, imm);
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CYCLES(1);
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}
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@ -784,7 +760,7 @@ static void op_sub_limm(tms32051_state *cpustate)
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d = (UINT32)(UINT16)(imm) << shift;
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}
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cpustate->acc = SUB(cpustate, cpustate->acc, d, 0);
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cpustate->acc = SUB(cpustate, cpustate->acc, d);
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CYCLES(2);
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}
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@ -1453,7 +1429,7 @@ static void op_xpl_imm(tms32051_state *cpustate)
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static void op_apac(tms32051_state *cpustate)
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{
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INT32 spreg = PREG_PSCALER(cpustate, cpustate->preg);
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cpustate->acc = ADD(cpustate, cpustate->acc, spreg, 0);
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cpustate->acc = ADD(cpustate, cpustate->acc, spreg);
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CYCLES(1);
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}
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@ -1486,7 +1462,7 @@ static void op_lta(tms32051_state *cpustate)
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cpustate->treg0 = data;
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spreg = PREG_PSCALER(cpustate, cpustate->preg);
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cpustate->acc = ADD(cpustate, cpustate->acc, spreg, 0);
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cpustate->acc = ADD(cpustate, cpustate->acc, spreg);
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if (cpustate->pmst.trm == 0)
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{
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cpustate->treg1 = data;
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