mirror of
https://github.com/holub/mame
synced 2025-04-23 17:00:53 +03:00
Make TC0040IOC its own device type and separate its functionality from TC0220IOC
This commit is contained in:
AJR
parent
f31b152080
commit
e61fc8189b
@ -423,8 +423,7 @@ WRITE16_MEMBER(ninjaw_state::tc0100scn_triple_screen_w)
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static ADDRESS_MAP_START( ninjaw_master_map, AS_PROGRAM, 16, ninjaw_state )
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AM_RANGE(0x000000, 0x0bffff) AM_ROM
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AM_RANGE(0x0c0000, 0x0cffff) AM_RAM /* main ram */
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AM_RANGE(0x200000, 0x200001) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, portreg_r, portreg_w, 0x00ff)
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AM_RANGE(0x200002, 0x200003) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, port_r, port_w, 0x00ff)
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AM_RANGE(0x200000, 0x200003) AM_DEVREADWRITE8("tc0040ioc", tc0040ioc_device, read, write, 0x00ff)
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AM_RANGE(0x210000, 0x210001) AM_WRITE(cpua_ctrl_w)
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AM_RANGE(0x220000, 0x220003) AM_READWRITE(sound_r,sound_w)
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AM_RANGE(0x240000, 0x24ffff) AM_RAM AM_SHARE("share1")
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@ -446,8 +445,7 @@ ADDRESS_MAP_END
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static ADDRESS_MAP_START( ninjaw_slave_map, AS_PROGRAM, 16, ninjaw_state )
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AM_RANGE(0x000000, 0x05ffff) AM_ROM
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AM_RANGE(0x080000, 0x08ffff) AM_RAM /* main ram */
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AM_RANGE(0x200000, 0x200001) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, portreg_r, portreg_w, 0x00ff)
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AM_RANGE(0x200002, 0x200003) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, port_r, port_w, 0x00ff)
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AM_RANGE(0x200000, 0x200003) AM_DEVREADWRITE8("tc0040ioc", tc0040ioc_device, read, write, 0x00ff)
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AM_RANGE(0x240000, 0x24ffff) AM_RAM AM_SHARE("share1")
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AM_RANGE(0x260000, 0x263fff) AM_RAM AM_SHARE("spriteram")
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AM_RANGE(0x280000, 0x293fff) AM_DEVREAD("tc0100scn_1", tc0100scn_device, word_r) AM_WRITE(tc0100scn_triple_screen_w) /* tilemaps (1st screen/all screens) */
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@ -459,8 +457,7 @@ ADDRESS_MAP_END
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static ADDRESS_MAP_START( darius2_master_map, AS_PROGRAM, 16, ninjaw_state )
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AM_RANGE(0x000000, 0x0bffff) AM_ROM
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AM_RANGE(0x0c0000, 0x0cffff) AM_RAM /* main ram */
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AM_RANGE(0x200000, 0x200001) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, portreg_r, portreg_w, 0x00ff)
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AM_RANGE(0x200002, 0x200003) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, port_r, port_w, 0x00ff)
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AM_RANGE(0x200000, 0x200003) AM_DEVREADWRITE8("tc0040ioc", tc0040ioc_device, read, write, 0x00ff)
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AM_RANGE(0x210000, 0x210001) AM_WRITE(cpua_ctrl_w)
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AM_RANGE(0x220000, 0x220003) AM_READWRITE(sound_r,sound_w)
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AM_RANGE(0x240000, 0x24ffff) AM_RAM AM_SHARE("share1")
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@ -479,8 +476,7 @@ ADDRESS_MAP_END
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static ADDRESS_MAP_START( darius2_slave_map, AS_PROGRAM, 16, ninjaw_state )
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AM_RANGE(0x000000, 0x05ffff) AM_ROM
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AM_RANGE(0x080000, 0x08ffff) AM_RAM /* main ram */
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AM_RANGE(0x200000, 0x200001) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, portreg_r, portreg_w, 0x00ff)
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AM_RANGE(0x200002, 0x200003) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, port_r, port_w, 0x00ff)
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AM_RANGE(0x200000, 0x200003) AM_DEVREADWRITE8("tc0040ioc", tc0040ioc_device, read, write, 0x00ff)
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AM_RANGE(0x240000, 0x24ffff) AM_RAM AM_SHARE("share1")
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AM_RANGE(0x260000, 0x263fff) AM_RAM AM_SHARE("spriteram")
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AM_RANGE(0x280000, 0x293fff) AM_DEVREAD("tc0100scn_1", tc0100scn_device, word_r) AM_WRITE(tc0100scn_triple_screen_w) /* tilemaps (1st screen/all screens) */
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@ -748,13 +744,13 @@ static MACHINE_CONFIG_START( ninjaw )
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MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* CPU slices */
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MCFG_DEVICE_ADD("tc0220ioc", TC0220IOC, 0)
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MCFG_TC0220IOC_READ_0_CB(IOPORT("DSWA"))
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MCFG_TC0220IOC_READ_1_CB(IOPORT("DSWB"))
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MCFG_TC0220IOC_READ_2_CB(IOPORT("IN0"))
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MCFG_TC0220IOC_READ_3_CB(IOPORT("IN1"))
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MCFG_TC0220IOC_WRITE_4_CB(WRITE8(ninjaw_state, coin_control_w))
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MCFG_TC0220IOC_READ_7_CB(IOPORT("IN2"))
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MCFG_DEVICE_ADD("tc0040ioc", TC0040IOC, 0)
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MCFG_TC0040IOC_READ_0_CB(IOPORT("DSWA"))
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MCFG_TC0040IOC_READ_1_CB(IOPORT("DSWB"))
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MCFG_TC0040IOC_READ_2_CB(IOPORT("IN0"))
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MCFG_TC0040IOC_READ_3_CB(IOPORT("IN1"))
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MCFG_TC0040IOC_WRITE_4_CB(WRITE8(ninjaw_state, coin_control_w))
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MCFG_TC0040IOC_READ_7_CB(IOPORT("IN2"))
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/* video hardware */
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MCFG_GFXDECODE_ADD("gfxdecode", "palette", ninjaw)
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@ -502,8 +502,7 @@ static ADDRESS_MAP_START( tetrista_map, AS_PROGRAM, 16, taitob_state )
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AM_RANGE(0x000000, 0x07ffff) AM_ROM
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AM_RANGE(0x200000, 0x201fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
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TC0180VCU_MEMRW( 0x400000 )
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AM_RANGE(0x600000, 0x600001) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, portreg_r, portreg_w, 0xff00)
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AM_RANGE(0x600002, 0x600003) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, port_r, port_w, 0xff00)
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AM_RANGE(0x600000, 0x600003) AM_DEVREADWRITE8("tc0040ioc", tc0040ioc_device, read, write, 0xff00)
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AM_RANGE(0x800000, 0x803fff) AM_RAM /* Main RAM */
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AM_RANGE(0xa00000, 0xa00001) AM_READNOP AM_DEVWRITE8("tc0140syt", tc0140syt_device, master_port_w, 0xff00)
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AM_RANGE(0xa00002, 0xa00003) AM_DEVREADWRITE8("tc0140syt", tc0140syt_device, master_comm_r, master_comm_w, 0xff00)
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@ -623,8 +622,7 @@ static ADDRESS_MAP_START( masterw_map, AS_PROGRAM, 16, taitob_state )
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AM_RANGE(0x200000, 0x203fff) AM_RAM /* Main RAM */
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TC0180VCU_MEMRW( 0x400000 )
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AM_RANGE(0x600000, 0x601fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
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AM_RANGE(0x800000, 0x800001) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, portreg_r, portreg_w, 0xff00)
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AM_RANGE(0x800002, 0x800003) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, port_r, port_w, 0xff00)
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AM_RANGE(0x800000, 0x800003) AM_DEVREADWRITE8("tc0040ioc", tc0040ioc_device, read, write, 0xff00)
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AM_RANGE(0xa00000, 0xa00001) AM_READNOP AM_DEVWRITE8("tc0140syt", tc0140syt_device, master_port_w, 0xff00)
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AM_RANGE(0xa00002, 0xa00003) AM_DEVREADWRITE8("tc0140syt", tc0140syt_device, master_comm_r, master_comm_w, 0xff00)
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ADDRESS_MAP_END
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@ -1976,13 +1974,13 @@ static MACHINE_CONFIG_START( masterw )
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MCFG_QUANTUM_TIME(attotime::from_hz(600))
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MCFG_DEVICE_ADD("tc0220ioc", TC0220IOC, 0)
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MCFG_TC0220IOC_READ_0_CB(IOPORT("DSWA"))
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MCFG_TC0220IOC_READ_1_CB(IOPORT("DSWB"))
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MCFG_TC0220IOC_READ_2_CB(IOPORT("IN0"))
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MCFG_TC0220IOC_READ_3_CB(IOPORT("IN1"))
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MCFG_TC0220IOC_WRITE_4_CB(WRITE8(taitob_state, player_12_coin_ctrl_w))
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MCFG_TC0220IOC_READ_7_CB(IOPORT("IN2"))
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MCFG_DEVICE_ADD("tc0040ioc", TC0040IOC, 0)
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MCFG_TC0040IOC_READ_0_CB(IOPORT("DSWA"))
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MCFG_TC0040IOC_READ_1_CB(IOPORT("DSWB"))
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MCFG_TC0040IOC_READ_2_CB(IOPORT("IN0"))
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MCFG_TC0040IOC_READ_3_CB(IOPORT("IN1"))
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MCFG_TC0040IOC_WRITE_4_CB(WRITE8(taitob_state, player_12_coin_ctrl_w))
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MCFG_TC0040IOC_READ_7_CB(IOPORT("IN2"))
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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@ -167,9 +167,9 @@ some kind of zoom table?
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READ8_MEMBER(taitoh_state::syvalion_input_bypass_r)
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{
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/* Bypass TC0220IOC controller for analog input */
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/* Bypass TC0040IOC controller for analog input */
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uint8_t port = m_tc0220ioc->port_r(space, 0); /* read port number */
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uint8_t port = m_tc0040ioc->port_r(space, 0); /* read port number */
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switch( port )
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{
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@ -210,7 +210,7 @@ READ8_MEMBER(taitoh_state::syvalion_input_bypass_r)
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return 0x00;
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default:
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return m_tc0220ioc->portreg_r(space, offset);
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return m_tc0040ioc->portreg_r(space, offset);
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}
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}
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@ -237,8 +237,8 @@ WRITE8_MEMBER(taitoh_state::coin_control_w)
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static ADDRESS_MAP_START( syvalion_map, AS_PROGRAM, 16, taitoh_state )
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AM_RANGE(0x000000, 0x07ffff) AM_ROM
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AM_RANGE(0x100000, 0x10ffff) AM_MIRROR(0x010000) AM_RAM AM_SHARE("m68000_mainram")
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AM_RANGE(0x200000, 0x200001) AM_READ8(syvalion_input_bypass_r, 0x00ff) AM_DEVWRITE8("tc0220ioc", tc0220ioc_device, portreg_w, 0x00ff)
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AM_RANGE(0x200002, 0x200003) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, port_r, port_w, 0x00ff)
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AM_RANGE(0x200000, 0x200001) AM_READ8(syvalion_input_bypass_r, 0x00ff) AM_DEVWRITE8("tc0040ioc", tc0040ioc_device, portreg_w, 0x00ff)
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AM_RANGE(0x200002, 0x200003) AM_DEVREADWRITE8("tc0040ioc", tc0040ioc_device, port_r, port_w, 0x00ff)
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AM_RANGE(0x300000, 0x300001) AM_READNOP AM_DEVWRITE8("tc0140syt", tc0140syt_device, master_port_w, 0x00ff)
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AM_RANGE(0x300002, 0x300003) AM_DEVREADWRITE8("tc0140syt", tc0140syt_device, master_comm_r, master_comm_w, 0x00ff)
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AM_RANGE(0x400000, 0x420fff) AM_DEVREADWRITE("tc0080vco", tc0080vco_device, word_r, word_w)
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@ -248,8 +248,7 @@ ADDRESS_MAP_END
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static ADDRESS_MAP_START( recordbr_map, AS_PROGRAM, 16, taitoh_state )
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AM_RANGE(0x000000, 0x07ffff) AM_ROM
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AM_RANGE(0x100000, 0x10ffff) AM_MIRROR(0x010000) AM_RAM AM_SHARE("m68000_mainram")
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AM_RANGE(0x200000, 0x200001) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, portreg_r, portreg_w, 0x00ff)
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AM_RANGE(0x200002, 0x200003) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, port_r, port_w, 0x00ff)
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AM_RANGE(0x200000, 0x200003) AM_DEVREADWRITE8("tc0040ioc", tc0040ioc_device, read, write, 0x00ff)
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AM_RANGE(0x300000, 0x300001) AM_READNOP AM_DEVWRITE8("tc0140syt", tc0140syt_device, master_port_w, 0x00ff)
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AM_RANGE(0x300002, 0x300003) AM_DEVREADWRITE8("tc0140syt", tc0140syt_device, master_comm_r, master_comm_w, 0x00ff)
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AM_RANGE(0x400000, 0x420fff) AM_DEVREADWRITE("tc0080vco", tc0080vco_device, word_r, word_w)
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@ -261,8 +260,7 @@ static ADDRESS_MAP_START( tetristh_map, AS_PROGRAM, 16, taitoh_state )
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AM_RANGE(0x100000, 0x10ffff) AM_MIRROR(0x010000) AM_RAM AM_SHARE("m68000_mainram")
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AM_RANGE(0x200000, 0x200001) AM_READNOP AM_DEVWRITE8("tc0140syt", tc0140syt_device, master_port_w, 0x00ff)
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AM_RANGE(0x200002, 0x200003) AM_DEVREADWRITE8("tc0140syt", tc0140syt_device, master_comm_r, master_comm_w, 0x00ff)
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AM_RANGE(0x300000, 0x300001) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, portreg_r, portreg_w, 0x00ff)
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AM_RANGE(0x300002, 0x300003) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, port_r, port_w, 0x00ff)
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AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8("tc0040ioc", tc0040ioc_device, read, write, 0x00ff)
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AM_RANGE(0x400000, 0x420fff) AM_DEVREADWRITE("tc0080vco", tc0080vco_device, word_r, word_w)
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AM_RANGE(0x500800, 0x500fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
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ADDRESS_MAP_END
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@ -649,13 +647,13 @@ static MACHINE_CONFIG_START( syvalion )
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MCFG_QUANTUM_TIME(attotime::from_hz(600))
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MCFG_DEVICE_ADD("tc0220ioc", TC0220IOC, 0)
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MCFG_TC0220IOC_READ_0_CB(IOPORT("DSWA"))
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MCFG_TC0220IOC_READ_1_CB(IOPORT("DSWB"))
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MCFG_TC0220IOC_READ_2_CB(IOPORT("IN0"))
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MCFG_TC0220IOC_READ_3_CB(IOPORT("IN1"))
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MCFG_TC0220IOC_WRITE_4_CB(WRITE8(taitoh_state, coin_control_w))
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MCFG_TC0220IOC_READ_7_CB(IOPORT("IN2"))
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MCFG_DEVICE_ADD("tc0040ioc", TC0040IOC, 0)
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MCFG_TC0040IOC_READ_0_CB(IOPORT("DSWA"))
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MCFG_TC0040IOC_READ_1_CB(IOPORT("DSWB"))
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MCFG_TC0040IOC_READ_2_CB(IOPORT("IN0"))
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MCFG_TC0040IOC_READ_3_CB(IOPORT("IN1"))
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MCFG_TC0040IOC_WRITE_4_CB(WRITE8(taitoh_state, coin_control_w))
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MCFG_TC0040IOC_READ_7_CB(IOPORT("IN2"))
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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@ -705,13 +703,13 @@ static MACHINE_CONFIG_START( recordbr )
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MCFG_QUANTUM_TIME(attotime::from_hz(600))
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MCFG_DEVICE_ADD("tc0220ioc", TC0220IOC, 0)
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MCFG_TC0220IOC_READ_0_CB(IOPORT("DSWA"))
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MCFG_TC0220IOC_READ_1_CB(IOPORT("DSWB"))
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MCFG_TC0220IOC_READ_2_CB(IOPORT("IN0"))
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MCFG_TC0220IOC_READ_3_CB(IOPORT("IN1"))
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MCFG_TC0220IOC_WRITE_4_CB(WRITE8(taitoh_state, coin_control_w))
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MCFG_TC0220IOC_READ_7_CB(IOPORT("IN2"))
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MCFG_DEVICE_ADD("tc0040ioc", TC0040IOC, 0)
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MCFG_TC0040IOC_READ_0_CB(IOPORT("DSWA"))
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MCFG_TC0040IOC_READ_1_CB(IOPORT("DSWB"))
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MCFG_TC0040IOC_READ_2_CB(IOPORT("IN0"))
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MCFG_TC0040IOC_READ_3_CB(IOPORT("IN1"))
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MCFG_TC0040IOC_WRITE_4_CB(WRITE8(taitoh_state, coin_control_w))
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MCFG_TC0040IOC_READ_7_CB(IOPORT("IN2"))
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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@ -134,8 +134,6 @@ void taitol_state::state_register()
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void taitol_2cpu_state::state_register()
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{
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taitol_state::state_register();
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save_item(NAME(m_mux_ctrl));
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}
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void fhawk_state::state_register()
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@ -205,8 +203,6 @@ void taitol_state::taito_machine_reset()
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void taitol_2cpu_state::taito_machine_reset()
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{
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taitol_state::taito_machine_reset();
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m_mux_ctrl = 0;
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}
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void fhawk_state::taito_machine_reset()
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@ -494,43 +490,6 @@ WRITE8_MEMBER(taitol_state::sound_w)
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}
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#endif
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READ8_MEMBER(taitol_2cpu_state::mux_r)
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{
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switch (m_mux_ctrl)
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{
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case 0:
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return m_dswa->read();
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case 1:
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return m_dswb->read();
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case 2:
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return m_in0->read();
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case 3:
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return m_in1->read();
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case 7:
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return m_in2->read();
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default:
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logerror("Mux read from unknown port %d (%04x)\n", m_mux_ctrl, space.device().safe_pc());
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return 0xff;
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}
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}
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WRITE8_MEMBER(taitol_2cpu_state::mux_w)
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{
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switch (m_mux_ctrl)
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{
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case 4:
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coin_control_w(space, 0, data);
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break;
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default:
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logerror("Mux write to unknown port %d, %02x (%04x)\n", m_mux_ctrl, data, space.device().safe_pc());
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}
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}
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WRITE8_MEMBER(taitol_2cpu_state::mux_ctrl_w)
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{
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m_mux_ctrl = data;
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}
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WRITE_LINE_MEMBER(champwr_state::msm5205_vck)
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{
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@ -644,8 +603,7 @@ ADDRESS_MAP_END
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static ADDRESS_MAP_START( raimais_map, AS_PROGRAM, 8, taitol_2cpu_state )
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COMMON_BANKS_MAP
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AM_RANGE(0x8000, 0x87ff) AM_DEVREADWRITE("dpram", mb8421_device, right_r, right_w)
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AM_RANGE(0x8800, 0x8800) AM_READWRITE(mux_r, mux_w)
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AM_RANGE(0x8801, 0x8801) AM_WRITE(mux_ctrl_w) AM_READNOP // Watchdog or interrupt ack (value ignored)
|
||||
AM_RANGE(0x8800, 0x8801) AM_DEVREADWRITE("tc0040ioc", tc0040ioc_device, read, write)
|
||||
AM_RANGE(0x8c00, 0x8c00) AM_READNOP AM_DEVWRITE("tc0140syt", tc0140syt_device, master_port_w)
|
||||
AM_RANGE(0x8c01, 0x8c01) AM_DEVREADWRITE("tc0140syt", tc0140syt_device, master_comm_r, master_comm_w)
|
||||
AM_RANGE(0xa000, 0xbfff) AM_RAM
|
||||
@ -714,8 +672,7 @@ static ADDRESS_MAP_START( kurikint_map, AS_PROGRAM, 8, taitol_2cpu_state )
|
||||
COMMON_BANKS_MAP
|
||||
AM_RANGE(0x8000, 0x9fff) AM_RAM
|
||||
AM_RANGE(0xa000, 0xa7ff) AM_DEVREADWRITE("dpram", mb8421_device, right_r, right_w)
|
||||
AM_RANGE(0xa800, 0xa800) AM_READWRITE(mux_r, mux_w)
|
||||
AM_RANGE(0xa801, 0xa801) AM_WRITE(mux_ctrl_w) AM_READNOP // Watchdog or interrupt ack (value ignored)
|
||||
AM_RANGE(0xa800, 0xa801) AM_DEVREADWRITE("tc0040ioc", tc0040ioc_device, read, write)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( kurikint_2_map, AS_PROGRAM, 8, taitol_2cpu_state )
|
||||
@ -1747,7 +1704,14 @@ static MACHINE_CONFIG_DERIVED( raimais, fhawk )
|
||||
MCFG_CPU_MODIFY("slave")
|
||||
MCFG_CPU_PROGRAM_MAP(raimais_2_map)
|
||||
|
||||
MCFG_DEVICE_REMOVE("tc0220ioc") // I/O chip is a TC0040IOC
|
||||
MCFG_DEVICE_REMOVE("tc0220ioc")
|
||||
MCFG_DEVICE_ADD("tc0040ioc", TC0040IOC, 0)
|
||||
MCFG_TC0040IOC_READ_0_CB(IOPORT("DSWA"))
|
||||
MCFG_TC0040IOC_READ_1_CB(IOPORT("DSWB"))
|
||||
MCFG_TC0040IOC_READ_2_CB(IOPORT("IN0"))
|
||||
MCFG_TC0040IOC_READ_3_CB(IOPORT("IN1"))
|
||||
MCFG_TC0040IOC_WRITE_4_CB(WRITE8(taitol_state, coin_control_w))
|
||||
MCFG_TC0040IOC_READ_7_CB(IOPORT("IN2"))
|
||||
|
||||
MCFG_DEVICE_ADD("dpram", MB8421, 0)
|
||||
|
||||
@ -1777,6 +1741,14 @@ static MACHINE_CONFIG_START( kurikint )
|
||||
|
||||
MCFG_DEVICE_ADD("dpram", MB8421, 0)
|
||||
|
||||
MCFG_DEVICE_ADD("tc0040ioc", TC0040IOC, 0)
|
||||
MCFG_TC0040IOC_READ_0_CB(IOPORT("DSWA"))
|
||||
MCFG_TC0040IOC_READ_1_CB(IOPORT("DSWB"))
|
||||
MCFG_TC0040IOC_READ_2_CB(IOPORT("IN0"))
|
||||
MCFG_TC0040IOC_READ_3_CB(IOPORT("IN1"))
|
||||
MCFG_TC0040IOC_WRITE_4_CB(WRITE8(taitol_state, coin_control_w))
|
||||
MCFG_TC0040IOC_READ_7_CB(IOPORT("IN2"))
|
||||
|
||||
MCFG_MACHINE_START_OVERRIDE(taitol_state, taito_l)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(taitol_state, taito_l)
|
||||
|
||||
|
||||
@ -1106,9 +1106,9 @@ CUSTOM_INPUT_MEMBER(taitoz_state::taitoz_pedal_r)
|
||||
|
||||
READ8_MEMBER(taitoz_state::contcirc_input_bypass_r)
|
||||
{
|
||||
/* Bypass TC0220IOC controller for analog input */
|
||||
/* Bypass TC0040IOC controller for analog input */
|
||||
|
||||
uint8_t port = m_tc0220ioc->port_r(space, 0); /* read port number */
|
||||
uint8_t port = m_tc0040ioc->port_r(space, 0); /* read port number */
|
||||
uint16_t steer = 0xff80 + m_steer.read_safe(0x80);
|
||||
|
||||
switch (port)
|
||||
@ -1120,16 +1120,16 @@ READ8_MEMBER(taitoz_state::contcirc_input_bypass_r)
|
||||
return steer >> 8;
|
||||
|
||||
default:
|
||||
return m_tc0220ioc->portreg_r(space, offset);
|
||||
return m_tc0040ioc->portreg_r(space, offset);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(taitoz_state::chasehq_input_bypass_r)
|
||||
{
|
||||
/* Bypass TC0220IOC controller for extra inputs */
|
||||
/* Bypass TC0040IOC controller for extra inputs */
|
||||
|
||||
uint8_t port = m_tc0220ioc->port_r(space, 0); /* read port number */
|
||||
uint8_t port = m_tc0040ioc->port_r(space, 0); /* read port number */
|
||||
uint16_t steer = 0xff80 + m_steer.read_safe(0x80);
|
||||
|
||||
switch (port)
|
||||
@ -1153,7 +1153,7 @@ READ8_MEMBER(taitoz_state::chasehq_input_bypass_r)
|
||||
return steer >> 8;
|
||||
|
||||
default:
|
||||
return m_tc0220ioc->portreg_r(space, offset);
|
||||
return m_tc0040ioc->portreg_r(space, offset);
|
||||
}
|
||||
}
|
||||
|
||||
@ -1472,8 +1472,8 @@ static ADDRESS_MAP_START( contcirc_cpub_map, AS_PROGRAM, 16, taitoz_state )
|
||||
AM_RANGE(0x000000, 0x03ffff) AM_ROM
|
||||
AM_RANGE(0x080000, 0x083fff) AM_RAM
|
||||
AM_RANGE(0x084000, 0x087fff) AM_RAM AM_SHARE("share1")
|
||||
AM_RANGE(0x100000, 0x100001) AM_READ8(contcirc_input_bypass_r, 0x00ff) AM_DEVWRITE8("tc0220ioc", tc0220ioc_device, portreg_w, 0x00ff)
|
||||
AM_RANGE(0x100002, 0x100003) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, port_r, port_w, 0x00ff) /* (actually game uses TC040IOC) */
|
||||
AM_RANGE(0x100000, 0x100001) AM_READ8(contcirc_input_bypass_r, 0x00ff) AM_DEVWRITE8("tc0040ioc", tc0040ioc_device, portreg_w, 0x00ff)
|
||||
AM_RANGE(0x100002, 0x100003) AM_DEVREADWRITE8("tc0040ioc", tc0040ioc_device, watchdog_r, port_w, 0x00ff)
|
||||
AM_RANGE(0x200000, 0x200003) AM_READWRITE(taitoz_sound_r, taitoz_sound_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -1483,8 +1483,8 @@ static ADDRESS_MAP_START( chasehq_map, AS_PROGRAM, 16, taitoz_state )
|
||||
AM_RANGE(0x100000, 0x107fff) AM_RAM
|
||||
AM_RANGE(0x108000, 0x10bfff) AM_RAM AM_SHARE("share1")
|
||||
AM_RANGE(0x10c000, 0x10ffff) AM_RAM
|
||||
AM_RANGE(0x400000, 0x400001) AM_READ8(chasehq_input_bypass_r, 0x00ff) AM_DEVWRITE8("tc0220ioc", tc0220ioc_device, portreg_w, 0x00ff)
|
||||
AM_RANGE(0x400002, 0x400003) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, port_r, port_w, 0x00ff)
|
||||
AM_RANGE(0x400000, 0x400001) AM_READ8(chasehq_input_bypass_r, 0x00ff) AM_DEVWRITE8("tc0040ioc", tc0040ioc_device, portreg_w, 0x00ff)
|
||||
AM_RANGE(0x400002, 0x400003) AM_DEVREADWRITE8("tc0040ioc", tc0040ioc_device, watchdog_r, port_w, 0x00ff)
|
||||
AM_RANGE(0x800000, 0x800001) AM_WRITE(chasehq_cpua_ctrl_w)
|
||||
AM_RANGE(0x820000, 0x820003) AM_READWRITE(taitoz_sound_r, taitoz_sound_w)
|
||||
AM_RANGE(0xa00000, 0xa00007) AM_DEVREADWRITE("tc0110pcr", tc0110pcr_device, word_r, step1_word_w) /* palette */
|
||||
@ -1519,8 +1519,7 @@ static ADDRESS_MAP_START( enforce_cpub_map, AS_PROGRAM, 16, taitoz_state )
|
||||
AM_RANGE(0x100000, 0x103fff) AM_RAM
|
||||
AM_RANGE(0x104000, 0x107fff) AM_RAM AM_SHARE("share1")
|
||||
AM_RANGE(0x200000, 0x200003) AM_READWRITE(taitoz_sound_r, taitoz_sound_w)
|
||||
AM_RANGE(0x300000, 0x300001) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, portreg_r, portreg_w, 0x00ff)
|
||||
AM_RANGE(0x300002, 0x300003) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, port_r, port_w, 0x00ff)
|
||||
AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8("tc0040ioc", tc0040ioc_device, read, write, 0x00ff)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
@ -2962,13 +2961,13 @@ static MACHINE_CONFIG_START( contcirc )
|
||||
MCFG_MACHINE_START_OVERRIDE(taitoz_state,taitoz)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(taitoz_state,taitoz)
|
||||
|
||||
MCFG_DEVICE_ADD("tc0220ioc", TC0220IOC, 0)
|
||||
MCFG_TC0220IOC_READ_0_CB(IOPORT("DSWA"))
|
||||
MCFG_TC0220IOC_READ_1_CB(IOPORT("DSWB"))
|
||||
MCFG_TC0220IOC_READ_2_CB(IOPORT("IN0"))
|
||||
MCFG_TC0220IOC_READ_3_CB(IOPORT("IN1"))
|
||||
MCFG_TC0220IOC_WRITE_4_CB(WRITE8(taitoz_state, coin_control_w))
|
||||
MCFG_TC0220IOC_READ_7_CB(IOPORT("IN2"))
|
||||
MCFG_DEVICE_ADD("tc0040ioc", TC0040IOC, 0)
|
||||
MCFG_TC0040IOC_READ_0_CB(IOPORT("DSWA"))
|
||||
MCFG_TC0040IOC_READ_1_CB(IOPORT("DSWB"))
|
||||
MCFG_TC0040IOC_READ_2_CB(IOPORT("IN0"))
|
||||
MCFG_TC0040IOC_READ_3_CB(IOPORT("IN1"))
|
||||
MCFG_TC0040IOC_WRITE_4_CB(WRITE8(taitoz_state, coin_control_w))
|
||||
MCFG_TC0040IOC_READ_7_CB(IOPORT("IN2"))
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
@ -3041,13 +3040,13 @@ static MACHINE_CONFIG_START( chasehq )
|
||||
MCFG_MACHINE_START_OVERRIDE(taitoz_state,taitoz)
|
||||
MCFG_MACHINE_RESET_OVERRIDE(taitoz_state,taitoz)
|
||||
|
||||
MCFG_DEVICE_ADD("tc0220ioc", TC0220IOC, 0)
|
||||
MCFG_TC0220IOC_READ_0_CB(IOPORT("DSWA"))
|
||||
MCFG_TC0220IOC_READ_1_CB(IOPORT("DSWB"))
|
||||
MCFG_TC0220IOC_READ_2_CB(IOPORT("IN0"))
|
||||
MCFG_TC0220IOC_READ_3_CB(IOPORT("IN1"))
|
||||
MCFG_TC0220IOC_WRITE_4_CB(WRITE8(taitoz_state, coin_control_w))
|
||||
MCFG_TC0220IOC_READ_7_CB(IOPORT("IN2"))
|
||||
MCFG_DEVICE_ADD("tc0040ioc", TC0040IOC, 0)
|
||||
MCFG_TC0040IOC_READ_0_CB(IOPORT("DSWA"))
|
||||
MCFG_TC0040IOC_READ_1_CB(IOPORT("DSWB"))
|
||||
MCFG_TC0040IOC_READ_2_CB(IOPORT("IN0"))
|
||||
MCFG_TC0040IOC_READ_3_CB(IOPORT("IN1"))
|
||||
MCFG_TC0040IOC_WRITE_4_CB(WRITE8(taitoz_state, coin_control_w))
|
||||
MCFG_TC0040IOC_READ_7_CB(IOPORT("IN2"))
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
@ -3122,13 +3121,13 @@ static MACHINE_CONFIG_START( enforce )
|
||||
|
||||
MCFG_QUANTUM_TIME(attotime::from_hz(600))
|
||||
|
||||
MCFG_DEVICE_ADD("tc0220ioc", TC0220IOC, 0)
|
||||
MCFG_TC0220IOC_READ_0_CB(IOPORT("DSWA"))
|
||||
MCFG_TC0220IOC_READ_1_CB(IOPORT("DSWB"))
|
||||
MCFG_TC0220IOC_READ_2_CB(IOPORT("IN0"))
|
||||
MCFG_TC0220IOC_READ_3_CB(IOPORT("IN1"))
|
||||
MCFG_TC0220IOC_WRITE_4_CB(WRITE8(taitoz_state, coin_control_w))
|
||||
MCFG_TC0220IOC_READ_7_CB(IOPORT("IN2"))
|
||||
MCFG_DEVICE_ADD("tc0040ioc", TC0040IOC, 0)
|
||||
MCFG_TC0040IOC_READ_0_CB(IOPORT("DSWA"))
|
||||
MCFG_TC0040IOC_READ_1_CB(IOPORT("DSWB"))
|
||||
MCFG_TC0040IOC_READ_2_CB(IOPORT("IN0"))
|
||||
MCFG_TC0040IOC_READ_3_CB(IOPORT("IN1"))
|
||||
MCFG_TC0040IOC_WRITE_4_CB(WRITE8(taitoz_state, coin_control_w))
|
||||
MCFG_TC0040IOC_READ_7_CB(IOPORT("IN2"))
|
||||
|
||||
/* video hardware */
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
|
||||
@ -192,7 +192,7 @@ WRITE16_MEMBER(topspeed_state::cpua_ctrl_w)
|
||||
READ8_MEMBER(topspeed_state::input_bypass_r)
|
||||
{
|
||||
// Read port number
|
||||
uint8_t port = m_tc0220ioc->port_r(space, 0);
|
||||
uint8_t port = m_tc0040ioc->port_r(space, 0);
|
||||
uint16_t steer = 0xff80 + m_steer.read_safe(0);
|
||||
|
||||
switch (port)
|
||||
@ -204,7 +204,7 @@ READ8_MEMBER(topspeed_state::input_bypass_r)
|
||||
return steer >> 8;
|
||||
|
||||
default:
|
||||
return m_tc0220ioc->portreg_r(space, offset);
|
||||
return m_tc0040ioc->portreg_r(space, offset);
|
||||
}
|
||||
}
|
||||
|
||||
@ -404,8 +404,8 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( cpub_map, AS_PROGRAM, 16, topspeed_state )
|
||||
AM_RANGE(0x000000, 0x01ffff) AM_ROM
|
||||
AM_RANGE(0x400000, 0x40ffff) AM_RAM AM_SHARE("sharedram")
|
||||
AM_RANGE(0x880000, 0x880001) AM_READ8(input_bypass_r, 0x00ff) AM_DEVWRITE8("tc0220ioc", tc0220ioc_device, portreg_w, 0x00ff)
|
||||
AM_RANGE(0x880002, 0x880003) AM_DEVREADWRITE8("tc0220ioc", tc0220ioc_device, port_r, port_w, 0x00ff)
|
||||
AM_RANGE(0x880000, 0x880001) AM_READ8(input_bypass_r, 0x00ff) AM_DEVWRITE8("tc0040ioc", tc0040ioc_device, portreg_w, 0x00ff)
|
||||
AM_RANGE(0x880002, 0x880003) AM_DEVREADWRITE8("tc0040ioc", tc0040ioc_device, port_r, port_w, 0x00ff)
|
||||
AM_RANGE(0x900000, 0x9003ff) AM_READWRITE(motor_r, motor_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -602,13 +602,13 @@ static MACHINE_CONFIG_START( topspeed )
|
||||
MCFG_TC0140SYT_MASTER_CPU("maincpu")
|
||||
MCFG_TC0140SYT_SLAVE_CPU("audiocpu")
|
||||
|
||||
MCFG_DEVICE_ADD("tc0220ioc", TC0220IOC, 0)
|
||||
MCFG_TC0220IOC_READ_0_CB(IOPORT("DSWA"))
|
||||
MCFG_TC0220IOC_READ_1_CB(IOPORT("DSWB"))
|
||||
MCFG_TC0220IOC_READ_2_CB(IOPORT("IN0"))
|
||||
MCFG_TC0220IOC_READ_3_CB(IOPORT("IN1"))
|
||||
MCFG_TC0220IOC_WRITE_4_CB(WRITE8(topspeed_state, coins_w))
|
||||
MCFG_TC0220IOC_READ_7_CB(IOPORT("IN2"))
|
||||
MCFG_DEVICE_ADD("tc0040ioc", TC0040IOC, 0)
|
||||
MCFG_TC0040IOC_READ_0_CB(IOPORT("DSWA"))
|
||||
MCFG_TC0040IOC_READ_1_CB(IOPORT("DSWB"))
|
||||
MCFG_TC0040IOC_READ_2_CB(IOPORT("IN0"))
|
||||
MCFG_TC0040IOC_READ_3_CB(IOPORT("IN1"))
|
||||
MCFG_TC0040IOC_WRITE_4_CB(WRITE8(topspeed_state, coins_w))
|
||||
MCFG_TC0040IOC_READ_7_CB(IOPORT("IN2"))
|
||||
|
||||
// video hardware
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
|
||||
@ -18,7 +18,7 @@ public:
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_audiocpu(*this, "audiocpu"),
|
||||
m_tc0080vco(*this, "tc0080vco"),
|
||||
m_tc0220ioc(*this, "tc0220ioc"),
|
||||
m_tc0040ioc(*this, "tc0040ioc"),
|
||||
m_gfxdecode(*this, "gfxdecode"),
|
||||
m_palette(*this, "palette") { }
|
||||
|
||||
@ -29,7 +29,7 @@ public:
|
||||
required_device<cpu_device> m_maincpu;
|
||||
required_device<cpu_device> m_audiocpu;
|
||||
required_device<tc0080vco_device> m_tc0080vco;
|
||||
required_device<tc0220ioc_device> m_tc0220ioc;
|
||||
optional_device<tc0040ioc_device> m_tc0040ioc;
|
||||
required_device<gfxdecode_device> m_gfxdecode;
|
||||
required_device<palette_device> m_palette;
|
||||
|
||||
|
||||
@ -115,19 +115,10 @@ public:
|
||||
, m_audio_cpu(*this, "audiocpu")
|
||||
, m_audio_prg(*this, "audiocpu")
|
||||
, m_audio_bnk(*this, "bank7")
|
||||
, m_dswa(*this, "DSWA")
|
||||
, m_dswb(*this, "DSWB")
|
||||
, m_in0(*this, "IN0")
|
||||
, m_in1(*this, "IN1")
|
||||
, m_in2(*this, "IN2")
|
||||
, m_mux_ctrl(0)
|
||||
{
|
||||
}
|
||||
|
||||
DECLARE_WRITE8_MEMBER(sound_bankswitch_w);
|
||||
DECLARE_READ8_MEMBER(mux_r);
|
||||
DECLARE_WRITE8_MEMBER(mux_w);
|
||||
DECLARE_WRITE8_MEMBER(mux_ctrl_w);
|
||||
|
||||
protected:
|
||||
virtual void state_register() override;
|
||||
@ -136,14 +127,6 @@ protected:
|
||||
required_device<cpu_device> m_audio_cpu;
|
||||
required_region_ptr<u8> m_audio_prg;
|
||||
optional_memory_bank m_audio_bnk;
|
||||
|
||||
required_ioport m_dswa;
|
||||
required_ioport m_dswb;
|
||||
required_ioport m_in0;
|
||||
required_ioport m_in1;
|
||||
required_ioport m_in2;
|
||||
|
||||
u8 m_mux_ctrl;
|
||||
};
|
||||
|
||||
|
||||
|
||||
@ -36,6 +36,7 @@ public:
|
||||
m_tc0150rod(*this, "tc0150rod"),
|
||||
m_tc0100scn(*this, "tc0100scn"),
|
||||
m_tc0110pcr(*this, "tc0110pcr"),
|
||||
m_tc0040ioc(*this, "tc0040ioc"),
|
||||
m_tc0220ioc(*this, "tc0220ioc"),
|
||||
m_tc0510nio(*this, "tc0510nio"),
|
||||
m_tc0140syt(*this, "tc0140syt"),
|
||||
@ -64,6 +65,7 @@ public:
|
||||
optional_device<tc0150rod_device> m_tc0150rod;
|
||||
optional_device<tc0100scn_device> m_tc0100scn;
|
||||
optional_device<tc0110pcr_device> m_tc0110pcr;
|
||||
optional_device<tc0040ioc_device> m_tc0040ioc;
|
||||
optional_device<tc0220ioc_device> m_tc0220ioc;
|
||||
optional_device<tc0510nio_device> m_tc0510nio;
|
||||
optional_device<tc0140syt_device> m_tc0140syt; // bshark & spacegun miss the CPUs which shall use TC0140
|
||||
|
||||
@ -27,7 +27,7 @@ public:
|
||||
m_msm2(*this, "msm2"),
|
||||
m_pc080sn_1(*this, "pc080sn_1"),
|
||||
m_pc080sn_2(*this, "pc080sn_2"),
|
||||
m_tc0220ioc(*this, "tc0220ioc"),
|
||||
m_tc0040ioc(*this, "tc0040ioc"),
|
||||
m_filter1l(*this, "filter1l"),
|
||||
m_filter1r(*this, "filter1r"),
|
||||
m_filter2(*this, "filter2"),
|
||||
@ -47,7 +47,7 @@ public:
|
||||
required_device<msm5205_device> m_msm2;
|
||||
required_device<pc080sn_device> m_pc080sn_1;
|
||||
required_device<pc080sn_device> m_pc080sn_2;
|
||||
required_device<tc0220ioc_device> m_tc0220ioc;
|
||||
required_device<tc0040ioc_device> m_tc0040ioc;
|
||||
required_device<filter_volume_device> m_filter1l;
|
||||
required_device<filter_volume_device> m_filter1r;
|
||||
required_device<filter_volume_device> m_filter2;
|
||||
|
||||
@ -2,6 +2,15 @@
|
||||
// copyright-holders:Nicola Salmoria
|
||||
/***************************************************************************
|
||||
|
||||
TC0040IOC
|
||||
---------
|
||||
Taito's first custom I/O interface differs a bit from its successors,
|
||||
being a 64-pin DIP with an address port and a data port. Besides digital
|
||||
inputs, coin-related outputs and an integrated watchdog, this chip also
|
||||
handles steering wheel and trackball input conversion in various games (not
|
||||
emulated here yet).
|
||||
|
||||
|
||||
TC0220IOC
|
||||
---------
|
||||
A simple I/O interface with integrated watchdog in a 80-pin flat package.
|
||||
@ -48,6 +57,150 @@ Newer version of the I/O chip ?
|
||||
#include "machine/taitoio.h"
|
||||
|
||||
|
||||
/***************************************************************************/
|
||||
/* */
|
||||
/* TC0040IOC */
|
||||
/* */
|
||||
/***************************************************************************/
|
||||
|
||||
DEFINE_DEVICE_TYPE(TC0040IOC, tc0040ioc_device, "tc0040ioc", "Taito TC0040IOC")
|
||||
|
||||
tc0040ioc_device::tc0040ioc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
|
||||
device_t(mconfig, TC0040IOC, tag, owner, clock),
|
||||
m_regs{ 0, 0, 0, 0, 0, 0, 0, 0 },
|
||||
m_port(0),
|
||||
m_watchdog(*this, "watchdog"),
|
||||
m_read_0_cb(*this),
|
||||
m_read_1_cb(*this),
|
||||
m_read_2_cb(*this),
|
||||
m_read_3_cb(*this),
|
||||
m_write_4_cb(*this),
|
||||
m_read_7_cb(*this)
|
||||
{
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_start - device-specific startup
|
||||
//-------------------------------------------------
|
||||
|
||||
void tc0040ioc_device::device_start()
|
||||
{
|
||||
m_read_0_cb.resolve_safe(0);
|
||||
m_read_1_cb.resolve_safe(0);
|
||||
m_read_2_cb.resolve_safe(0);
|
||||
m_read_3_cb.resolve_safe(0);
|
||||
m_write_4_cb.resolve_safe();
|
||||
m_read_7_cb.resolve_safe(0);
|
||||
|
||||
save_item(NAME(m_regs));
|
||||
save_item(NAME(m_port));
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_reset - device-specific reset
|
||||
//-------------------------------------------------
|
||||
|
||||
void tc0040ioc_device::device_reset()
|
||||
{
|
||||
m_port = 0;
|
||||
|
||||
for (auto & elem : m_regs)
|
||||
elem = 0;
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_add_mconfig - add device configuration
|
||||
//-------------------------------------------------
|
||||
|
||||
MACHINE_CONFIG_MEMBER( tc0040ioc_device::device_add_mconfig )
|
||||
MCFG_WATCHDOG_ADD("watchdog")
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
/*****************************************************************************
|
||||
DEVICE HANDLERS
|
||||
*****************************************************************************/
|
||||
|
||||
READ8_MEMBER( tc0040ioc_device::read )
|
||||
{
|
||||
if (offset & 1)
|
||||
return watchdog_r(space, 0);
|
||||
else
|
||||
return portreg_r(space, 0);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( tc0040ioc_device::write )
|
||||
{
|
||||
if (offset & 1)
|
||||
port_w(space, 0, data);
|
||||
else
|
||||
portreg_w(space, 0, data);
|
||||
}
|
||||
|
||||
READ8_MEMBER( tc0040ioc_device::watchdog_r )
|
||||
{
|
||||
m_watchdog->watchdog_reset();
|
||||
return 0;
|
||||
}
|
||||
|
||||
// only used now for "input bypass" hacks
|
||||
READ8_MEMBER( tc0040ioc_device::port_r )
|
||||
{
|
||||
return m_port;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( tc0040ioc_device::port_w )
|
||||
{
|
||||
m_port = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( tc0040ioc_device::portreg_r )
|
||||
{
|
||||
switch (m_port)
|
||||
{
|
||||
case 0x00:
|
||||
return m_read_0_cb(0);
|
||||
|
||||
case 0x01:
|
||||
return m_read_1_cb(0);
|
||||
|
||||
case 0x02:
|
||||
return m_read_2_cb(0);
|
||||
|
||||
case 0x03:
|
||||
return m_read_3_cb(0);
|
||||
|
||||
case 0x04: /* coin counters and lockout */
|
||||
return m_regs[4];
|
||||
|
||||
case 0x07:
|
||||
return m_read_7_cb(0);
|
||||
|
||||
default:
|
||||
//logerror("PC %06x: warning - read TC0040IOC address %02x\n",space.device().safe_pc(),m_port);
|
||||
return 0xff;
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( tc0040ioc_device::portreg_w )
|
||||
{
|
||||
m_regs[m_port] = data;
|
||||
switch (m_port)
|
||||
{
|
||||
case 0x04: /* coin counters and lockout, hi nibble irrelevant */
|
||||
m_write_4_cb(data & 0x0f);
|
||||
|
||||
//if (data & 0xf0)
|
||||
//logerror("PC %06x: warning - write %02x to TC0040IOC address %02x\n",space.device().safe_pc(),data,m_port);
|
||||
|
||||
break;
|
||||
|
||||
default:
|
||||
//logerror("PC %06x: warning - write %02x to TC0040IOC address %02x\n",space.device().safe_pc(),data,m_port);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/***************************************************************************/
|
||||
/* */
|
||||
/* TC0220IOC */
|
||||
@ -59,7 +212,6 @@ DEFINE_DEVICE_TYPE(TC0220IOC, tc0220ioc_device, "tc0220ioc", "Taito TC0220IOC")
|
||||
tc0220ioc_device::tc0220ioc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
|
||||
device_t(mconfig, TC0220IOC, tag, owner, clock),
|
||||
m_regs{ 0, 0, 0, 0, 0, 0, 0, 0 },
|
||||
m_port(0),
|
||||
m_watchdog(*this, "watchdog"),
|
||||
m_read_0_cb(*this),
|
||||
m_read_1_cb(*this),
|
||||
@ -86,7 +238,6 @@ void tc0220ioc_device::device_start()
|
||||
m_read_7_cb.resolve_safe(0);
|
||||
|
||||
save_item(NAME(m_regs));
|
||||
save_item(NAME(m_port));
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
@ -95,8 +246,6 @@ void tc0220ioc_device::device_start()
|
||||
|
||||
void tc0220ioc_device::device_reset()
|
||||
{
|
||||
m_port = 0;
|
||||
|
||||
for (auto & elem : m_regs)
|
||||
elem = 0;
|
||||
}
|
||||
@ -168,26 +317,6 @@ WRITE8_MEMBER( tc0220ioc_device::write )
|
||||
}
|
||||
}
|
||||
|
||||
READ8_MEMBER( tc0220ioc_device::port_r )
|
||||
{
|
||||
return m_port;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( tc0220ioc_device::port_w )
|
||||
{
|
||||
m_port = data;
|
||||
}
|
||||
|
||||
READ8_MEMBER( tc0220ioc_device::portreg_r )
|
||||
{
|
||||
return read(space, m_port);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( tc0220ioc_device::portreg_w )
|
||||
{
|
||||
write(space, m_port, data);
|
||||
}
|
||||
|
||||
/***************************************************************************/
|
||||
/* */
|
||||
/* TC0510NIO */
|
||||
|
||||
@ -16,21 +16,21 @@
|
||||
#include "machine/watchdog.h"
|
||||
|
||||
|
||||
class tc0220ioc_device : public device_t
|
||||
class tc0040ioc_device : public device_t
|
||||
{
|
||||
public:
|
||||
tc0220ioc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
tc0040ioc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
template <class Object> static devcb_base &set_read_0_callback(device_t &device, Object &&cb) { return downcast<tc0220ioc_device &>(device).m_read_0_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_read_1_callback(device_t &device, Object &&cb) { return downcast<tc0220ioc_device &>(device).m_read_1_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_read_2_callback(device_t &device, Object &&cb) { return downcast<tc0220ioc_device &>(device).m_read_2_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_read_3_callback(device_t &device, Object &&cb) { return downcast<tc0220ioc_device &>(device).m_read_3_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_write_3_callback(device_t &device, Object &&cb) { return downcast<tc0220ioc_device &>(device).m_write_3_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_write_4_callback(device_t &device, Object &&cb) { return downcast<tc0220ioc_device &>(device).m_write_4_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_read_7_callback(device_t &device, Object &&cb) { return downcast<tc0220ioc_device &>(device).m_read_7_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_read_0_callback(device_t &device, Object &&cb) { return downcast<tc0040ioc_device &>(device).m_read_0_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_read_1_callback(device_t &device, Object &&cb) { return downcast<tc0040ioc_device &>(device).m_read_1_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_read_2_callback(device_t &device, Object &&cb) { return downcast<tc0040ioc_device &>(device).m_read_2_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_read_3_callback(device_t &device, Object &&cb) { return downcast<tc0040ioc_device &>(device).m_read_3_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_write_4_callback(device_t &device, Object &&cb) { return downcast<tc0040ioc_device &>(device).m_write_4_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_read_7_callback(device_t &device, Object &&cb) { return downcast<tc0040ioc_device &>(device).m_read_7_cb.set_callback(std::forward<Object>(cb)); }
|
||||
|
||||
DECLARE_READ8_MEMBER( read );
|
||||
DECLARE_WRITE8_MEMBER( write );
|
||||
DECLARE_READ8_MEMBER( watchdog_r );
|
||||
DECLARE_READ8_MEMBER( port_r );
|
||||
DECLARE_WRITE8_MEMBER( port_w );
|
||||
DECLARE_READ8_MEMBER( portreg_r );
|
||||
@ -49,6 +49,44 @@ private:
|
||||
|
||||
required_device<watchdog_timer_device> m_watchdog;
|
||||
|
||||
devcb_read8 m_read_0_cb;
|
||||
devcb_read8 m_read_1_cb;
|
||||
devcb_read8 m_read_2_cb;
|
||||
devcb_read8 m_read_3_cb;
|
||||
devcb_write8 m_write_4_cb;
|
||||
devcb_read8 m_read_7_cb;
|
||||
};
|
||||
|
||||
DECLARE_DEVICE_TYPE(TC0040IOC, tc0040ioc_device)
|
||||
|
||||
class tc0220ioc_device : public device_t
|
||||
{
|
||||
public:
|
||||
tc0220ioc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
template <class Object> static devcb_base &set_read_0_callback(device_t &device, Object &&cb) { return downcast<tc0220ioc_device &>(device).m_read_0_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_read_1_callback(device_t &device, Object &&cb) { return downcast<tc0220ioc_device &>(device).m_read_1_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_read_2_callback(device_t &device, Object &&cb) { return downcast<tc0220ioc_device &>(device).m_read_2_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_read_3_callback(device_t &device, Object &&cb) { return downcast<tc0220ioc_device &>(device).m_read_3_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_write_3_callback(device_t &device, Object &&cb) { return downcast<tc0220ioc_device &>(device).m_write_3_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_write_4_callback(device_t &device, Object &&cb) { return downcast<tc0220ioc_device &>(device).m_write_4_cb.set_callback(std::forward<Object>(cb)); }
|
||||
template <class Object> static devcb_base &set_read_7_callback(device_t &device, Object &&cb) { return downcast<tc0220ioc_device &>(device).m_read_7_cb.set_callback(std::forward<Object>(cb)); }
|
||||
|
||||
DECLARE_READ8_MEMBER( read );
|
||||
DECLARE_WRITE8_MEMBER( write );
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
virtual void device_add_mconfig(machine_config &config) override;
|
||||
|
||||
private:
|
||||
// internal state
|
||||
uint8_t m_regs[8];
|
||||
|
||||
required_device<watchdog_timer_device> m_watchdog;
|
||||
|
||||
devcb_read8 m_read_0_cb;
|
||||
devcb_read8 m_read_1_cb;
|
||||
devcb_read8 m_read_2_cb;
|
||||
@ -150,6 +188,25 @@ DECLARE_DEVICE_TYPE(TC0640FIO, tc0640fio_device)
|
||||
DEVICE CONFIGURATION MACROS
|
||||
***************************************************************************/
|
||||
|
||||
#define MCFG_TC0040IOC_READ_0_CB(_devcb) \
|
||||
devcb = &tc0040ioc_device::set_read_0_callback(*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_TC0040IOC_READ_1_CB(_devcb) \
|
||||
devcb = &tc0040ioc_device::set_read_1_callback(*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_TC0040IOC_READ_2_CB(_devcb) \
|
||||
devcb = &tc0040ioc_device::set_read_2_callback(*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_TC0040IOC_READ_3_CB(_devcb) \
|
||||
devcb = &tc0040ioc_device::set_read_3_callback(*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_TC0040IOC_WRITE_4_CB(_devcb) \
|
||||
devcb = &tc0040ioc_device::set_write_4_callback(*device, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_TC0040IOC_READ_7_CB(_devcb) \
|
||||
devcb = &tc0040ioc_device::set_read_7_callback(*device, DEVCB_##_devcb);
|
||||
|
||||
|
||||
#define MCFG_TC0220IOC_READ_0_CB(_devcb) \
|
||||
devcb = &tc0220ioc_device::set_read_0_callback(*device, DEVCB_##_devcb);
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user