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https://github.com/holub/mame
synced 2025-06-03 03:16:30 +03:00
dcs: Implemented proper ram bank switch for ADSP2181 systems. (nw)
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780732f563
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@ -246,6 +246,7 @@ enum
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#define DSIO_DM_PG ((m_dsio.reg[2] >> 0) & 0x7ff)
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#define DSIO_BANK_END 0x7ff
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/* these macros are used to reference the DENVER ASIC */
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#define DENV_DSP_SPEED ((m_dsio.reg[1] >> 2) & 3) /* read only: 1=33.33MHz */
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@ -256,6 +257,7 @@ enum
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#define DENV_DM_PG ((m_dsio.reg[2] >> 0) & 0x7ff)
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#define DENV_BANK_END 0xfff
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/*************************************
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*
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@ -384,11 +386,15 @@ ADDRESS_MAP_END
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static ADDRESS_MAP_START( dsio_data_map, AS_DATA, 16, dcs_audio_device )
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x0000, 0x03ff) AM_RAMBANK("databank")
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AM_RANGE(0x0400, 0x3fdf) AM_RAM
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AM_RANGE(0x0000, 0x1fff) AM_DEVICE("data_map_bank", address_map_bank_device, amap16)
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AM_RANGE(0x2000, 0x3fdf) AM_RAM AM_SHARE("dcsint_data")
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AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE(adsp_control_r, adsp_control_w)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( dsio_rambank_map, AS_PROGRAM, 16, dcs_audio_device )
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AM_RANGE(0x0000, 0x1fff) AM_RAM
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AM_RANGE(0x2000, 0x2000 + DSIO_BANK_END) AM_RAMBANK("databank")
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( dsio_io_map, AS_IO, 16, dcs_audio_device )
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ADDRESS_MAP_UNMAP_HIGH
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@ -416,11 +422,16 @@ ADDRESS_MAP_END
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static ADDRESS_MAP_START( denver_data_map, AS_DATA, 16, dcs_audio_device )
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ADDRESS_MAP_UNMAP_HIGH
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AM_RANGE(0x0000, 0x07ff) AM_RAMBANK("databank")
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AM_RANGE(0x0800, 0x3fdf) AM_RAM
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AM_RANGE(0x0000, 0x1fff) AM_DEVICE("data_map_bank", address_map_bank_device, amap16)
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AM_RANGE(0x2000, 0x3fdf) AM_RAM AM_SHARE("dcsint_data")
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AM_RANGE(0x3fe0, 0x3fff) AM_READWRITE(adsp_control_r, adsp_control_w)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START(denver_rambank_map, AS_PROGRAM, 16, dcs_audio_device)
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AM_RANGE(0x0000, 0x1fff) AM_RAM
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AM_RANGE(0x2000, 0x2000 + DENV_BANK_END) AM_RAMBANK("databank")
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( denver_io_map, AS_IO, 16, dcs_audio_device )
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ADDRESS_MAP_UNMAP_HIGH
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@ -528,10 +539,18 @@ MACHINE_CONFIG_FRAGMENT( dcs2_audio_dsio )
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MCFG_CPU_ADD("dsio", ADSP2181, XTAL_32MHz)
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MCFG_ADSP21XX_SPORT_TX_CB(WRITE32(dcs_audio_device, sound_tx_callback)) /* callback for serial transmit */
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MCFG_ADSP21XX_TIMER_FIRED_CB(WRITELINE(dcs_audio_device,timer_enable_callback)) /* callback for timer fired */
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MCFG_ADSP21XX_DMOVLAY_CB(WRITE32(dcs_audio_device, dmovlay_callback)) // callback for adsp 2181 dmovlay instruction
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MCFG_CPU_PROGRAM_MAP(dsio_program_map)
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MCFG_CPU_DATA_MAP(dsio_data_map)
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MCFG_CPU_IO_MAP(dsio_io_map)
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MCFG_DEVICE_ADD("data_map_bank", ADDRESS_MAP_BANK, 0)
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MCFG_DEVICE_PROGRAM_MAP(dsio_rambank_map)
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MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)
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MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16)
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MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(14)
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MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000)
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MCFG_TIMER_DEVICE_ADD("dcs_reg_timer", DEVICE_SELF, dcs_audio_device, dcs_irq)
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MCFG_TIMER_DEVICE_ADD("dcs_int_timer", DEVICE_SELF, dcs_audio_device, internal_timer_callback)
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MCFG_TIMER_DEVICE_ADD("dcs_sport_timer", DEVICE_SELF, dcs_audio_device, sport0_irq) // roadburn needs this to pass harware test
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@ -562,6 +581,13 @@ MACHINE_CONFIG_FRAGMENT( dcs2_audio_denver )
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MCFG_CPU_DATA_MAP(denver_data_map)
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MCFG_CPU_IO_MAP(denver_io_map)
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MCFG_DEVICE_ADD("data_map_bank", ADDRESS_MAP_BANK, 0)
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MCFG_DEVICE_PROGRAM_MAP(denver_rambank_map)
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MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)
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MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(16)
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MCFG_ADDRESS_MAP_BANK_ADDRBUS_WIDTH(14)
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MCFG_ADDRESS_MAP_BANK_STRIDE(0x2000)
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MCFG_TIMER_DEVICE_ADD("dcs_reg_timer", DEVICE_SELF, dcs_audio_device, dcs_irq)
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MCFG_TIMER_DEVICE_ADD("dcs_int_timer", DEVICE_SELF, dcs_audio_device, internal_timer_callback)
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MCFG_TIMER_DEVICE_ADD("dcs_sport_timer", DEVICE_SELF, dcs_audio_device, sport0_irq) // Atlantis driver waits for sport0 rx interrupts
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@ -689,8 +715,6 @@ TIMER_CALLBACK_MEMBER( dcs_audio_device::dcs_reset )
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/* rev 4: reset the Denver ASIC */
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case 4:
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m_dmovlay_val = 0;
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dmovlay_remap_memory();
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denver_reset();
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break;
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}
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@ -822,6 +846,7 @@ dcs_audio_device::dcs_audio_device(const machine_config &mconfig, device_type ty
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m_sounddata_words(0),
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m_sounddata_banks(0),
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m_sounddata_bank(0),
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m_ram_map(*this, "data_map_bank"),
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m_data_bank(*this, "databank"),
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m_rom_page(nullptr),
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m_dram_page(nullptr),
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@ -845,6 +870,7 @@ dcs_audio_device::dcs_audio_device(const machine_config &mconfig, device_type ty
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m_polling_base(nullptr),
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m_internal_program_ram(nullptr),
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m_external_program_ram(nullptr),
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m_internal_data_ram(nullptr),
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m_dram_in_mb(0),
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m_iram(*this, "iram")
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{
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@ -928,6 +954,11 @@ void dcs2_audio_device::device_start()
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{
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m_external_program_ram = (uint32_t *)external_ram->ptr();
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}
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memory_share *internal_data_ram = memshare("dcsint_data");
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if (internal_data_ram != nullptr)
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{
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m_internal_data_ram = (uint32_t *)internal_ram->ptr();
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}
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/* find the DCS CPU and the sound ROMs */
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m_cpu = subdevice<adsp21xx_device>("dcs2");
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@ -937,13 +968,13 @@ void dcs2_audio_device::device_start()
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{
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m_cpu = subdevice<adsp21xx_device>("dsio");
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m_rev = 3;
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soundbank_words = 0x400;
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soundbank_words = DSIO_BANK_END + 1;
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}
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if (m_cpu == nullptr)
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{
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m_cpu = subdevice<adsp21xx_device>("denver");
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m_rev = 4;
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soundbank_words = 0x800;
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soundbank_words = DENV_BANK_END + 1;
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}
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if (m_cpu != nullptr && !m_cpu->started())
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throw device_missing_dependencies();
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@ -965,13 +996,9 @@ void dcs2_audio_device::device_start()
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/* supports both RAM and ROM variants */
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if (m_dram_in_mb != 0)
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{
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uint32_t ramSize = m_dram_in_mb << (20 - 1);
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// Add one extra bank for internal ram in ADSP 2181
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if (m_rev == 4)
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ramSize += soundbank_words;
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m_sounddata = auto_alloc_array(machine(), uint16_t, ramSize);
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save_pointer(NAME(m_sounddata), ramSize);
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m_sounddata_words = (m_dram_in_mb << 20) / 2;
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m_sounddata = auto_alloc_array(machine(), uint16_t, m_sounddata_words);
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save_pointer(NAME(m_sounddata), m_sounddata_words);
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}
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else
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{
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@ -981,7 +1008,9 @@ void dcs2_audio_device::device_start()
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m_sounddata_banks = m_sounddata_words / soundbank_words;
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if (m_rev != 2)
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{
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m_data_bank->configure_entries(0, m_sounddata_banks, m_sounddata, soundbank_words*2);
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if (m_ram_map)
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m_ram_map->set_bank(0);
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m_data_bank->configure_entries(0, m_sounddata_banks, m_sounddata, soundbank_words * 2);
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}
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@ -1303,6 +1332,8 @@ WRITE16_MEMBER( dcs_audio_device::sdrc_w )
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void dcs_audio_device::dsio_reset()
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{
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memset(&m_dsio, 0, sizeof(m_dsio));
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m_dmovlay_val = 0;
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dmovlay_remap_memory();
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}
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@ -1342,7 +1373,7 @@ WRITE16_MEMBER( dcs_audio_device::dsio_w )
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/* offset 2 controls RAM pages */
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case 2:
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dsio.reg[2] = data;
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dmovlay_remap_memory();
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m_data_bank->set_entry(DSIO_DM_PG % m_sounddata_banks);
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break;
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}
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}
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@ -1358,6 +1389,8 @@ WRITE16_MEMBER( dcs_audio_device::dsio_w )
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void dcs_audio_device::denver_reset()
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{
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memset(&m_dsio, 0, sizeof(m_dsio));
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m_dmovlay_val = 0;
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dmovlay_remap_memory();
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}
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@ -1370,6 +1403,7 @@ READ16_MEMBER( dcs_audio_device::denver_r )
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/* returns 1 for DRAM, 2 for EPROM-based */
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result = 0x0001;
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}
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if (LOG_DCS_IO) logerror("denver: denver_r 0x%x = %04x\n", offset, result);
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return result;
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}
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@ -1417,6 +1451,7 @@ WRITE16_MEMBER( dcs_audio_device::denver_w )
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m_fifo_reset_w(1);
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break;
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}
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if (LOG_DCS_IO) logerror("denver: denver_w 0x%x = %04x\n", offset, data);
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}
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@ -1477,11 +1512,9 @@ void dcs_audio_device::dmovlay_remap_memory()
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// Internal ram is bank 0
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int bankSel;
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if (m_dmovlay_val == 0) {
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bankSel = 0;
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m_data_bank->set_entry(bankSel);
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m_ram_map->set_bank(0);
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} else {
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bankSel = 1 + (DSIO_DM_PG % m_sounddata_banks);
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m_data_bank->set_entry(bankSel);
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m_ram_map->set_bank(1);
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}
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if (LOG_DCS_IO)
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logerror("%s dmovlay_remap_memory: Switching data ram location bankSel = %i\n", machine().describe_context(), bankSel);
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@ -11,6 +11,7 @@
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#include "cpu/adsp2100/adsp2100.h"
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#include "sound/dmadac.h"
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#include "machine/bankdev.h"
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#define MCFG_DCS2_AUDIO_DRAM_IN_MB(_dram_in_mb) \
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dcs_audio_device::static_set_dram_in_mb(*device, _dram_in_mb);
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@ -167,6 +168,7 @@ protected:
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uint32_t m_sounddata_banks;
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uint16_t m_sounddata_bank;
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optional_device<address_map_bank_device> m_ram_map;
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optional_memory_bank m_data_bank;
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memory_bank * m_rom_page;
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memory_bank * m_dram_page;
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@ -203,6 +205,7 @@ protected:
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uint16_t *m_polling_base;
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uint32_t *m_internal_program_ram;
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uint32_t *m_external_program_ram;
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uint32_t *m_internal_data_ram;
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int m_dmovlay_val;
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