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ti99/tn_ide: Comment edits, changed default switch setting. (nw)
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Michael Zapf
parent
369b87e1c9
commit
e63f1d6af1
@ -64,6 +64,48 @@
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Once this is done, the bootstrap code must be activated; it will load the
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IDEAL files into the SRAM on each power-up of the system.
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Memory map
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----------
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CRU bit 0 == 1:
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CRU bit 1 == DIP switch setting: (bit 1==0 on power-up, switch==0 when closed)
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RTC65271:
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4000-401F: XRAM (32 bytes of page given in 4080)
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402x: RTC data register (mirrored)
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403x: RTC indirect address register (mirrored)
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408x,409x: Page register for XRAM (mirrored)
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40Ax: mirror of 402x
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40Bx: mirror of 403x
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BQ4842/4852: (switch should be open (1) on power-up)
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4000-403F: not mapped
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4080-40BF: not mapped
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BQ4847:
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4020-403F: Registers (even addresses, mirrored on address+1)
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4040-404E: CS1Fx read (IDE register group 1), mirrored at 40C0-40CE
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4050-405E: CS1Fx write (IDE register group 1), mirrored at 40D0-40DE
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4060-406E: CS3Fx read (IDE register group 2), mirrored at 40E0-40FE
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4070-407E: CS3Fx write (IDE register group 2), mirrored at 40F0-40FE
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4000-40FF: SRAM (CRU bit 1 != DIP switch setting)
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4100-4FFF: SRAM
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6000-7FFF: SRAM (CRU bit 4 == 1) [RAMBO support]
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BQ4842/52: Clock registers are located at upper end of SRAM
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BQ4842: page 0F (mirrored 1F, 2F, 3F)
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BQ4852: page 3F
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Write SRAM:
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CRU bit 2 == 0:
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normal write
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CRU bit 2 == 1:
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Set SRAM page nn/2 (address 40nn, mirrored in 4000-5FFF, 6000-7FFF)
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CRU bit 5 == 1:
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SRAM write protect
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Original version by Raphael Nabet
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Rewritten by Michael Zapf
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@ -183,14 +225,14 @@ READ8Z_MEMBER(nouspikel_ide_card_device::readz)
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if (m_rtctype==RTC47)
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{
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*value = m_rtc47->read((offset & 0x1e)>>1);
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LOGMASKED(LOG_RTC, "rtc reg %02d -> %02x\n", (offset & 0x1e)>>1, *value);
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LOGMASKED(LOG_RTC, "rtc reg %02d (%04x) -> %02x\n", (offset & 0x1e)>>1, offset & 0xffff, *value);
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}
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// No reaction for RTC42, RTC52
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}
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}
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else
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{
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if (m_rtctype==RTC65)
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if (m_rtctype==RTC65) // xram, only for 65271, unmapped for others
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{
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int addr = (offset & 0x1f) | ((offset&0x80)>>2);
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*value = m_rtc65->read(1, addr);
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@ -214,6 +256,7 @@ READ8Z_MEMBER(nouspikel_ide_card_device::readz)
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}
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else
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{
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// The BQ4842/52 offer SRAM by themselves
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if (m_rtctype==RTC42)
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*value = m_rtc42->read(addr);
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else
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@ -324,7 +367,7 @@ void nouspikel_ide_card_device::write(offs_t offset, uint8_t data)
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{
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if (m_rtctype == RTC47)
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{
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LOGMASKED(LOG_RTC, "rtc reg %02d <- %02x\n", (offset & 0x1e)>>1, data);
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LOGMASKED(LOG_RTC, "rtc reg %02d (%04x) <- %02x\n", (offset & 0x1e)>>1, offset & 0xffff, data);
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m_rtc47->write((offset & 0x1e)>>1, data);
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}
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// No reaction for RTC42, RTC52
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@ -441,14 +484,13 @@ void nouspikel_ide_card_device::decode(offs_t offset, bool& mmap, bool& sramsel,
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}
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// mmap = 0x4000 - 0x40ff (if bit 1 == DIP setting)
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// sramsel = 0x4100 - 0x4fff (if bit 0 = 1)
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// sramsel = 0x6000 - 0x7fff (if bit 4 = 1, bit 0 unchecked)
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// sramsel = 0x4100 - 0x4fff (if bit 0 = 1) or 0x6000 - 0x7fff (if bit 4 = 1)
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// A0 is not checked again (subsumed in inspace)
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mmap = ((offset & 0x7f00)==0x4000) && (m_crulatch->q0_r()==1)
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&& ((m_crulatch->q1_r()!=0) == m_srammap) && inspace;
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sramsel = ((((offset & 0x6000)==0x4000) && !mmap && (m_crulatch->q4_r()==0) && (m_crulatch->q0_r()==1))
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sramsel = ((((offset & 0x6000)==0x4000) && !mmap && (m_crulatch->q0_r()==1))
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|| (((offset & 0x6000)==0x6000) && (m_crulatch->q4_r()==1))) && inspace;
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xramsel = false;
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@ -458,7 +500,7 @@ void nouspikel_ide_card_device::decode(offs_t offset, bool& mmap, bool& sramsel,
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if (mmap)
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{
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xramsel = ((offset & 0x60)==0x00); // 4000-401F (only 65271)
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xramsel = ((offset & 0x60)==0x00); // 4000-401F, 4080 (only 65271)
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rtcsel = ((offset & 0x60)==0x20); // 4020-403F (65271 and 4847)
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cs1fx = ((offset & 0x60)==0x40); // 4040-405F
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cs3fx = ((offset & 0x60)==0x60); // 4060-407F
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@ -523,9 +565,40 @@ void nouspikel_ide_card_device::cruwrite(offs_t offset, uint8_t data)
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{
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if ((offset & 0xff00)==m_cru_base)
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{
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LOGMASKED(LOG_CRU, "cru %04x (bit %d) <- %d\n", offset, (offset & 0xff)>>1, data);
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// LOGMASKED(LOG_CRU, "cru %04x (bit %d) <- %d\n", offset, (offset & 0xff)>>1, data);
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int bitnumber = (offset >> 1) & 0x07;
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m_crulatch->write_bit(bitnumber, data&1);
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#if 0
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// Just debugging
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switch (bitnumber)
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{
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case 0:
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LOGMASKED(LOG_CRU, "Turn card %s\n", (data&1)? "on" : "off");
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break;
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case 1:
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LOGMASKED(LOG_CRU, "Map %s at 4000-40FF\n", ((data&1)==m_srammap)? "register" : "SRAM");
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break;
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case 2:
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LOGMASKED(LOG_CRU, "%s SRAM page\n", (data&1)? "Enable switch" : "Fixed");
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break;
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case 3:
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LOGMASKED(LOG_CRU, "%s\n", (data&1)? "Same page at 4000-5FFF" : "Fix page 0 at 4000-4FFF");
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break;
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case 4:
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LOGMASKED(LOG_CRU, "%s RAMBO\n", (data&1)? "Enable" : "Disable");
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break;
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case 5:
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LOGMASKED(LOG_CRU, "Write %s SRAM\n", (data&1)? "protect" : "enable");
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break;
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case 6:
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LOGMASKED(LOG_CRU, "%s IDE interrupt\n", (data&1)? "Enable" : "Disable");
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break;
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case 7:
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LOGMASKED(LOG_CRU, "%s\n", (data&1)? "Reset drives" : "Normal operation");
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break;
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}
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#endif
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}
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}
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@ -604,6 +677,15 @@ void nouspikel_ide_card_device::device_reset()
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m_rtc52->connect_osc(ioport("RTC")->read()==3);
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}
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INPUT_CHANGED_MEMBER( nouspikel_ide_card_device::mode_changed )
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{
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// Card mode changed
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if (param==0)
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m_srammap = (newval != 0);
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else
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m_mode = newval;
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}
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INPUT_PORTS_START( tn_ide )
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PORT_START("RTC")
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@ -613,13 +695,15 @@ INPUT_PORTS_START( tn_ide )
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PORT_CONFSETTING(2, "BQ4842 (128K)")
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PORT_CONFSETTING(3, "BQ4852 (512K)")
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// The switch should be open (1) on powerup for BQ clock chips
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PORT_START("MAPMODE")
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PORT_DIPNAME(0x1, 0, "Map at boot time")
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PORT_DIPNAME(0x1, 1, "Map at boot time") PORT_CHANGED_MEMBER(DEVICE_SELF, nouspikel_ide_card_device, mode_changed, 0)
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PORT_DIPSETTING(0, "RTC")
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PORT_DIPSETTING(1, "SRAM")
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// Set to off as default, because random contents in SRAM may lead to lockup
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PORT_START("MODE")
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PORT_DIPNAME(0x3, MODE_TI, "Card mode")
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PORT_DIPNAME(0x3, MODE_OFF, "Card mode") PORT_CHANGED_MEMBER(DEVICE_SELF, nouspikel_ide_card_device, mode_changed, 1)
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PORT_DIPSETTING(MODE_OFF, "Off")
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PORT_DIPSETTING(MODE_GENEVE, "Geneve")
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PORT_DIPSETTING(MODE_TI, "TI")
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@ -34,6 +34,7 @@ public:
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void write(offs_t offset, uint8_t data) override;
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DECLARE_READ8Z_MEMBER( crureadz ) override;
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void cruwrite(offs_t offset, uint8_t data) override;
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DECLARE_INPUT_CHANGED_MEMBER( mode_changed );
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private:
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void device_start() override;
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