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arm7: handle DP-commands ROR <Rs> case where Rs=32/64, remove few outdated comments

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This commit is contained in:
MetalliC 2017-11-11 17:02:15 +02:00
parent 372f8a9224
commit e64bd14bb0
1 changed files with 13 additions and 11 deletions
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24
src/devices/cpu/arm7/arm7ops.cpp
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@ -66,18 +66,12 @@ uint32_t arm7_cpu_device::decodeShift(uint32_t insn, uint32_t *pCarry)
if ((insn & 0x80) == 0x80) if ((insn & 0x80) == 0x80)
LOG(("%08x: RegShift ERROR (p36)\n", R15)); LOG(("%08x: RegShift ERROR (p36)\n", R15));
#endif #endif
// see p35 for check on this
//k = GetRegister(k >> 1) & 0x1f;
// Keep only the bottom 8 bits for a Register Shift // Keep only the bottom 8 bits for a Register Shift
k = GetRegister(k >> 1) & 0xff; k = GetRegister(k >> 1) & 0xff;
if (k == 0) /* Register shift by 0 is a no-op */ if (k == 0) /* Register shift by 0 is a no-op */
{ {
// LOG(("%08x: NO-OP Regshift\n", R15)); // LOG(("%08x: NO-OP Regshift\n", R15));
/* TODO this is wrong for at least ROR by reg with lower
* 5 bits 0 but lower 8 bits non zero */
if (pCarry) if (pCarry)
*pCarry = GET_CPSR & C_MASK; *pCarry = GET_CPSR & C_MASK;
return rm; return rm;
@ -145,11 +139,19 @@ uint32_t arm7_cpu_device::decodeShift(uint32_t insn, uint32_t *pCarry)
case 3: /* ROR and RRX */ case 3: /* ROR and RRX */
if (k) if (k)
{ {
while (k > 32) k &= 31;
k -= 32; if (k)
if (pCarry) {
*pCarry = rm & (1 << (k - 1)); if (pCarry)
return ROR(rm, k); *pCarry = rm & (1 << (k - 1));
return ROR(rm, k);
}
else
{
if (pCarry)
*pCarry = rm & SIGN_BIT;
return rm;
}
} }
else else
{ {