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arm7: handle DP-commands ROR <Rs> case where Rs=32/64, remove few outdated comments
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@ -66,18 +66,12 @@ uint32_t arm7_cpu_device::decodeShift(uint32_t insn, uint32_t *pCarry)
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if ((insn & 0x80) == 0x80)
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if ((insn & 0x80) == 0x80)
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LOG(("%08x: RegShift ERROR (p36)\n", R15));
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LOG(("%08x: RegShift ERROR (p36)\n", R15));
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#endif
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#endif
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// see p35 for check on this
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//k = GetRegister(k >> 1) & 0x1f;
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// Keep only the bottom 8 bits for a Register Shift
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// Keep only the bottom 8 bits for a Register Shift
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k = GetRegister(k >> 1) & 0xff;
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k = GetRegister(k >> 1) & 0xff;
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if (k == 0) /* Register shift by 0 is a no-op */
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if (k == 0) /* Register shift by 0 is a no-op */
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{
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{
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// LOG(("%08x: NO-OP Regshift\n", R15));
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// LOG(("%08x: NO-OP Regshift\n", R15));
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/* TODO this is wrong for at least ROR by reg with lower
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* 5 bits 0 but lower 8 bits non zero */
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if (pCarry)
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if (pCarry)
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*pCarry = GET_CPSR & C_MASK;
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*pCarry = GET_CPSR & C_MASK;
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return rm;
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return rm;
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@ -145,11 +139,19 @@ uint32_t arm7_cpu_device::decodeShift(uint32_t insn, uint32_t *pCarry)
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case 3: /* ROR and RRX */
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case 3: /* ROR and RRX */
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if (k)
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if (k)
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{
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{
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while (k > 32)
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k &= 31;
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k -= 32;
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if (k)
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if (pCarry)
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{
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*pCarry = rm & (1 << (k - 1));
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if (pCarry)
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return ROR(rm, k);
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*pCarry = rm & (1 << (k - 1));
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return ROR(rm, k);
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}
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else
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{
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if (pCarry)
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*pCarry = rm & SIGN_BIT;
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return rm;
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}
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}
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}
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else
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else
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{
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{
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