mirror of
https://github.com/holub/mame
synced 2025-06-10 14:52:42 +03:00
srcclean and indentation cleanup (nw)
This commit is contained in:
parent
6e87489527
commit
e64edf6c71
@ -96,7 +96,7 @@
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</part>
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</part>
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</software>
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</software>
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<!-- Has 3d geometry bugs on attract mode with SH2 DRC, crashes if you attempt to enter into main menu -->
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<!-- Has 3d geometry bugs on attract mode with SH2 DRC, crashes if you attempt to enter into main menu -->
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<software name="vrdx" supported="no">
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<software name="vrdx" supported="no">
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<description>Virtua Racing Deluxe (Euro)</description>
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<description>Virtua Racing Deluxe (Euro)</description>
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<year>1994</year>
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<year>1994</year>
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@ -2472,7 +2472,7 @@
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</part>
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</part>
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</software>
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</software>
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<!-- black screen after choosing a level, requires SH2 SCI support -->
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<!-- black screen after choosing a level, requires SH2 SCI support -->
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<software name="xmen" supported="no">
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<software name="xmen" supported="no">
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<description>X-Men (USA, Prototype)</description>
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<description>X-Men (USA, Prototype)</description>
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<year>1995</year>
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<year>1995</year>
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@ -830,8 +830,8 @@
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* Support booting disks on Apple //c and IIgs which would otherwise
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* Support booting disks on Apple //c and IIgs which would otherwise
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time out looking for a boot sector (SpiraDisc, some early EA games)
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time out looking for a boot sector (SpiraDisc, some early EA games)
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* Bypass a peripheral scan in some games that would hang on some
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* Bypass a peripheral scan in some games that would hang on some
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peripherals and crash others and require a hardware power cycle in
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peripherals and crash others and require a hardware power cycle in
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order to reboot properly (SpiraDisc)
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order to reboot properly (SpiraDisc)
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* Support multiple versions of "David's Midnight Magic"
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* Support multiple versions of "David's Midnight Magic"
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* Remove "unsupported game" error, always continue booting
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* Remove "unsupported game" error, always continue booting
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* Bypass prompt if launched from hard drive (press the open- or
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* Bypass prompt if launched from hard drive (press the open- or
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@ -8505,7 +8505,7 @@
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<info name="release" value="2019-11-01"/>
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<info name="release" value="2019-11-01"/>
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<sharedfeat name="compatibility" value="A2" />
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<sharedfeat name="compatibility" value="A2" />
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<!-- It requires an Apple ][ with Integer BASIC ROM and at least 32K.
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<!-- It requires an Apple ][ with Integer BASIC ROM and at least 32K.
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Due to reliance on Integer ROM, it will not run on later models. -->
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Due to reliance on Integer ROM, it will not run on later models. -->
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<part name="flop1" interface="floppy_5_25">
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<part name="flop1" interface="floppy_5_25">
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<dataarea name="flop" size="234809">
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<dataarea name="flop" size="234809">
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@ -5327,14 +5327,14 @@
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</software>
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</software>
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<software name="nfs334b" cloneof="nfs334">
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<software name="nfs334b" cloneof="nfs334">
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<description>Acorn NFS 3.34B</description>
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<description>Acorn NFS 3.34B</description>
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<year>198?</year>
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<year>198?</year>
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<publisher>Acorn</publisher>
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<publisher>Acorn</publisher>
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<part name="rom1" interface="bbc_rom">
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<part name="rom1" interface="bbc_rom">
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<dataarea name="rom" size="8192">
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<dataarea name="rom" size="8192">
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<rom name="Acorn-NFS-3.34B.rom" size="8192" crc="9ddc1456" sha1="212cb90ba5e7c96457718ae9d818fb8ece5cc32a"/>
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<rom name="Acorn-NFS-3.34B.rom" size="8192" crc="9ddc1456" sha1="212cb90ba5e7c96457718ae9d818fb8ece5cc32a"/>
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</dataarea>
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</dataarea>
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</part>
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</part>
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</software>
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</software>
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<software name="nfs360">
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<software name="nfs360">
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@ -5741,14 +5741,14 @@
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</software>
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</software>
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<software name="prestelt471" cloneof="prestel" supported="no">
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<software name="prestelt471" cloneof="prestel" supported="no">
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<description>Prestel Trial 4.71r</description>
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<description>Prestel Trial 4.71r</description>
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<year>1984</year>
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<year>1984</year>
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<publisher>Acorn</publisher>
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<publisher>Acorn</publisher>
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<part name="rom1" interface="bbc_rom">
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<part name="rom1" interface="bbc_rom">
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<dataarea name="rom" size="8192">
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<dataarea name="rom" size="8192">
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<rom name="PrestelTrial-4.71r.rom" size="8192" crc="c6067294" sha1="5702b0b895cfabb30ffdcf9fe2718de2276315ef"/>
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<rom name="PrestelTrial-4.71r.rom" size="8192" crc="c6067294" sha1="5702b0b895cfabb30ffdcf9fe2718de2276315ef"/>
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</dataarea>
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</dataarea>
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</part>
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</part>
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</software>
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</software>
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<software name="prestel" supported="no">
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<software name="prestel" supported="no">
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@ -7759,14 +7759,14 @@
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</software>
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</software>
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<software name="tfs031" cloneof="tfs">
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<software name="tfs031" cloneof="tfs">
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<description>Acorn TFS 0.31</description>
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<description>Acorn TFS 0.31</description>
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<year>1982</year>
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<year>1982</year>
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<publisher>Acorn</publisher>
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<publisher>Acorn</publisher>
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<part name="rom1" interface="bbc_rom">
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<part name="rom1" interface="bbc_rom">
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<dataarea name="rom" size="16384">
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<dataarea name="rom" size="16384">
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<rom name="TFS-0.31.rom" size="16384" crc="eb6b9097" sha1="07c54e8afc5fe686a8f86c33d15220327d6c9cc8"/>
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<rom name="TFS-0.31.rom" size="16384" crc="eb6b9097" sha1="07c54e8afc5fe686a8f86c33d15220327d6c9cc8"/>
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</dataarea>
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</dataarea>
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</part>
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</part>
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</software>
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</software>
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<software name="tfs100" cloneof="tfs">
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<software name="tfs100" cloneof="tfs">
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@ -130,9 +130,9 @@
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</software>
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</software>
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<!-- This program was included as an audio track on the record "1984" from the Spanish
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<!-- This program was included as an audio track on the record "1984" from the Spanish
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music group "La Mode". It was present only on the vinyl version (not on the cassette),
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music group "La Mode". It was present only on the vinyl version (not on the cassette),
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as the last track of the B side, titled as "Programa Computado".
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as the last track of the B side, titled as "Programa Computado".
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It was programmed by Mario Gil (one of the "La Mode" group members). -->
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It was programmed by Mario Gil (one of the "La Mode" group members). -->
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<software name="1984lm">
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<software name="1984lm">
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<description>La Mode - 1984 (Programa Computado)</description>
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<description>La Mode - 1984 (Programa Computado)</description>
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<year>1984</year>
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<year>1984</year>
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@ -3,18 +3,18 @@
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<!-- ZX Spectrum MGT Disciple / +D disk images
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<!-- ZX Spectrum MGT Disciple / +D disk images
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images for the "Disciple" and "+D" ZX Spectrum fdd interfaces produced by MGT (Miles Gordan Technology)
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images for the "Disciple" and "+D" ZX Spectrum fdd interfaces produced by MGT (Miles Gordan Technology)
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insert system disk,
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insert system disk,
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'RUN' boots the main DOS from disk
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'RUN' boots the main DOS from disk
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'CAT 1/2' lists disk 1/2 catalogue
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'CAT 1/2' lists disk 1/2 catalogue
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'LOAD Pn' loads program #n
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'LOAD Pn' loads program #n
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more commands listed in devices\bus\spectrum\plusd.cpp or disciple.cpp
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more commands listed in devices\bus\spectrum\plusd.cpp or disciple.cpp
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for disciple, must use matching rom/system disk versions:
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for disciple, must use matching rom/system disk versions:
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v2 rom -> system disk/system tape ver 2, 2b, 2c
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v2 rom -> system disk/system tape ver 2, 2b, 2c
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v3 rom -> system disk/system tape ver 3a, 3b or 3d
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v3 rom -> system disk/system tape ver 3a, 3b or 3d
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-->
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-->
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<softwarelist name="spectrum_mgt_flop" description="ZX Spectrum MGT Disciple/Plus D disks">
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<softwarelist name="spectrum_mgt_flop" description="ZX Spectrum MGT Disciple/Plus D disks">
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@ -62,23 +62,23 @@ project "netlist"
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MAME_DIR .. "src/lib/netlist/plib/pdynlib.h",
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MAME_DIR .. "src/lib/netlist/plib/pdynlib.h",
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MAME_DIR .. "src/lib/netlist/plib/pmain.cpp",
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MAME_DIR .. "src/lib/netlist/plib/pmain.cpp",
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MAME_DIR .. "src/lib/netlist/plib/pmain.h",
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MAME_DIR .. "src/lib/netlist/plib/pmain.h",
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MAME_DIR .. "src/lib/netlist/plib/pmath.h",
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MAME_DIR .. "src/lib/netlist/plib/pmath.h",
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MAME_DIR .. "src/lib/netlist/plib/pmempool.h",
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MAME_DIR .. "src/lib/netlist/plib/pmempool.h",
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MAME_DIR .. "src/lib/netlist/plib/pomp.h",
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MAME_DIR .. "src/lib/netlist/plib/pomp.h",
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MAME_DIR .. "src/lib/netlist/plib/poptions.cpp",
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MAME_DIR .. "src/lib/netlist/plib/poptions.cpp",
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MAME_DIR .. "src/lib/netlist/plib/poptions.h",
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MAME_DIR .. "src/lib/netlist/plib/poptions.h",
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MAME_DIR .. "src/lib/netlist/plib/ppmf.h",
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MAME_DIR .. "src/lib/netlist/plib/ppmf.h",
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MAME_DIR .. "src/lib/netlist/plib/ppreprocessor.cpp",
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MAME_DIR .. "src/lib/netlist/plib/ppreprocessor.cpp",
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MAME_DIR .. "src/lib/netlist/plib/ppreprocessor.h",
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MAME_DIR .. "src/lib/netlist/plib/ppreprocessor.h",
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MAME_DIR .. "src/lib/netlist/plib/pstate.h",
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MAME_DIR .. "src/lib/netlist/plib/pstate.h",
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MAME_DIR .. "src/lib/netlist/plib/pstonum.h",
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MAME_DIR .. "src/lib/netlist/plib/pstonum.h",
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MAME_DIR .. "src/lib/netlist/plib/pstring.cpp",
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MAME_DIR .. "src/lib/netlist/plib/pstring.cpp",
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MAME_DIR .. "src/lib/netlist/plib/pstring.h",
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MAME_DIR .. "src/lib/netlist/plib/pstring.h",
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MAME_DIR .. "src/lib/netlist/plib/pstrutil.h",
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MAME_DIR .. "src/lib/netlist/plib/pstrutil.h",
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MAME_DIR .. "src/lib/netlist/plib/pstream.h",
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MAME_DIR .. "src/lib/netlist/plib/pstream.h",
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MAME_DIR .. "src/lib/netlist/plib/ptime.h",
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MAME_DIR .. "src/lib/netlist/plib/ptime.h",
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MAME_DIR .. "src/lib/netlist/plib/ptokenizer.cpp",
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MAME_DIR .. "src/lib/netlist/plib/ptokenizer.cpp",
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MAME_DIR .. "src/lib/netlist/plib/ptokenizer.h",
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MAME_DIR .. "src/lib/netlist/plib/ptokenizer.h",
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MAME_DIR .. "src/lib/netlist/plib/ptypes.h",
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MAME_DIR .. "src/lib/netlist/plib/ptypes.h",
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MAME_DIR .. "src/lib/netlist/plib/putil.cpp",
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MAME_DIR .. "src/lib/netlist/plib/putil.cpp",
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MAME_DIR .. "src/lib/netlist/plib/putil.h",
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MAME_DIR .. "src/lib/netlist/plib/putil.h",
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@ -294,7 +294,7 @@ uint8_t bbc_ariesb32_device::ram_r(offs_t offset)
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void bbc_ariesb32_device::ram_w(offs_t offset, uint8_t data)
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void bbc_ariesb32_device::ram_w(offs_t offset, uint8_t data)
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{
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{
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//if ((offset & 0xff) == 0x00)
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//if ((offset & 0xff) == 0x00)
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// logerror("ram_w: %04x = %02x\n", offset, data);
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// logerror("ram_w: %04x = %02x\n", offset, data);
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if (m_shadow && offset >= 0x3000)
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if (m_shadow && offset >= 0x3000)
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m_ram[offset - 0x3000] = data;
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m_ram[offset - 0x3000] = data;
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else
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else
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@ -324,7 +324,7 @@ uint8_t bbc_ariesb32_device::paged_r(offs_t offset)
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void bbc_ariesb32_device::paged_w(offs_t offset, uint8_t data)
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void bbc_ariesb32_device::paged_w(offs_t offset, uint8_t data)
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{
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{
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//if ((offset & 0xff) == 0x00)
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//if ((offset & 0xff) == 0x00)
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// logerror("paged_w: %04x = %02x\n", offset | 0x8000, data);
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// logerror("paged_w: %04x = %02x\n", offset | 0x8000, data);
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if (m_rom[m_romsel])
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if (m_rom[m_romsel])
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{
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{
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m_rom[m_romsel]->write(offset, data);
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m_rom[m_romsel]->write(offset, data);
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@ -1,4 +1,4 @@
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// license:BSD-3-Clause
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// license:BSD-3-Clause
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// copyright-holders:Nigel Barnes
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// copyright-holders:Nigel Barnes
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/**********************************************************************
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/**********************************************************************
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@ -169,19 +169,19 @@ uint8_t bbc_integrab_device::romsel_r(offs_t offset)
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void bbc_integrab_device::romsel_w(offs_t offset, uint8_t data)
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void bbc_integrab_device::romsel_w(offs_t offset, uint8_t data)
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{
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{
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/*
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/*
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ROMSEL & ROMID
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ROMSEL & ROMID
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Bits 0,3 ROMNUM Sideways ROM/RAM select bits
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Bits 0,3 ROMNUM Sideways ROM/RAM select bits
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Bits 4,5 Not used
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Bits 4,5 Not used
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Bit 6 PRVEN Private RAM enable
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Bit 6 PRVEN Private RAM enable
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Bit 7 MEMSEL Shadow/Main RAM toggle
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Bit 7 MEMSEL Shadow/Main RAM toggle
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RAMSEL & RAMID
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RAMSEL & RAMID
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Bits 0,1 AUX0,1 Not used but must be preserved
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Bits 0,1 AUX0,1 Not used but must be preserved
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Bits 2,3 Not used
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Bits 2,3 Not used
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Bit 4 PRVS8 Private RAM 8K area select (&9000-&AFFF)
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Bit 4 PRVS8 Private RAM 8K area select (&9000-&AFFF)
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Bit 5 PRVS4 Private RAM 4K area select (&8000-&8FFF)
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Bit 5 PRVS4 Private RAM 4K area select (&8000-&8FFF)
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Bit 6 PRVS1 Private RAM 1K area select (&8000-&83FF)
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Bit 6 PRVS1 Private RAM 1K area select (&8000-&83FF)
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Bit 7 SHEN Shadow RAM enable bit
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Bit 7 SHEN Shadow RAM enable bit
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*/
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*/
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switch (offset & 0x0c)
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switch (offset & 0x0c)
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{
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{
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@ -281,7 +281,7 @@ uint8_t bbc_stl4m32_device::mos_r(offs_t offset)
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//if (BIT(m_shadow, 7) && offset >= 0x2000)
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//if (BIT(m_shadow, 7) && offset >= 0x2000)
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//{
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//{
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// data = m_ram[offset];
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// data = m_ram[offset];
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//}
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//}
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//else
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//else
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//{
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//{
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@ -298,6 +298,6 @@ void bbc_stl4m32_device::mos_w(offs_t offset, uint8_t data)
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//if (BIT(m_romsel, 7) && offset >= 0x2000)
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//if (BIT(m_romsel, 7) && offset >= 0x2000)
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//{
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//{
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// m_ram[offset] = data;
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// m_ram[offset] = data;
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//}
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//}
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}
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}
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@ -82,23 +82,23 @@ protected:
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enum
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enum
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{
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{
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THC_MISC_IRQ_BIT = 4,
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THC_MISC_IRQ_BIT = 4,
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THC_MISC_IRQEN_BIT = 5,
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THC_MISC_IRQEN_BIT = 5,
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THC_MISC_CURRES_BIT = 6,
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THC_MISC_CURRES_BIT = 6,
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THC_MISC_SYNCEN_BIT = 7,
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THC_MISC_SYNCEN_BIT = 7,
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THC_MISC_VSYNC_BIT = 8,
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THC_MISC_VSYNC_BIT = 8,
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THC_MISC_SYNC_BIT = 9,
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THC_MISC_SYNC_BIT = 9,
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THC_MISC_ENVID_BIT = 10,
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THC_MISC_ENVID_BIT = 10,
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THC_MISC_RESET_BIT = 12,
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THC_MISC_RESET_BIT = 12,
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THC_MISC_REV = 0x00010000,
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THC_MISC_REV = 0x00010000,
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THC_MISC_WRITE_MASK = 0x000014ff
|
THC_MISC_WRITE_MASK = 0x000014ff
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};
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};
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enum
|
enum
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{
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{
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FBC_CONFIG_FBID = 0x60000000,
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FBC_CONFIG_FBID = 0x60000000,
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FBC_CONFIG_VERSION = 0x00100000,
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FBC_CONFIG_VERSION = 0x00100000,
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FBC_CONFIG_MASK = 0x000f3fff
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FBC_CONFIG_MASK = 0x000f3fff
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};
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};
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enum
|
enum
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@ -257,7 +257,7 @@ protected:
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|
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enum
|
enum
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{
|
{
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FBC_CONFIG = 0x000/4,
|
FBC_CONFIG = 0x000/4,
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FBC_MISC = 0x004/4,
|
FBC_MISC = 0x004/4,
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FBC_CLIP_CHECK = 0x008/4,
|
FBC_CLIP_CHECK = 0x008/4,
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|
@ -2,80 +2,80 @@
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// copyright-holders:Nigel Barnes
|
// copyright-holders:Nigel Barnes
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/*********************************************************************
|
/*********************************************************************
|
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|
|
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Romantic Robot Multiface One/128/3
|
Romantic Robot Multiface One/128/3
|
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----------------------------------
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----------------------------------
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" MULTI-PURPOSE INTERFACE FOR THE ZX SPECTRUM "
|
" MULTI-PURPOSE INTERFACE FOR THE ZX SPECTRUM "
|
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|
|
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MULTIFACE ONE comprises three interfaces in one box:
|
MULTIFACE ONE comprises three interfaces in one box:
|
||||||
1) Fully universal and 100% automatic SAVE facility for tape, microdrive, wafadrive, Beta,
|
1) Fully universal and 100% automatic SAVE facility for tape, microdrive, wafadrive, Beta,
|
||||||
Discovery and indirectly (via tape) for other disc systems
|
Discovery and indirectly (via tape) for other disc systems
|
||||||
2) Joystick interface – Kempston compatible (IN 31)
|
2) Joystick interface – Kempston compatible (IN 31)
|
||||||
3) 8K RAM extension – fully accessible, usable as a RAM disk, buffer etc. Also used by
|
3) 8K RAM extension – fully accessible, usable as a RAM disk, buffer etc. Also used by
|
||||||
MULTIFACE for MULTI TOOLKIT routines, buffer & other purposes.
|
MULTIFACE for MULTI TOOLKIT routines, buffer & other purposes.
|
||||||
|
|
||||||
© Romantic Robot UK Ltd 1985
|
© Romantic Robot UK Ltd 1985
|
||||||
|
|
||||||
|
|
||||||
Multiface One
|
Multiface One
|
||||||
-------------
|
-------------
|
||||||
Many versions exist, a very good source of info is: https://x128.speccy.cz/multiface/multiface.htm
|
Many versions exist, a very good source of info is: https://x128.speccy.cz/multiface/multiface.htm
|
||||||
|
|
||||||
Summary:
|
Summary:
|
||||||
Earliest version has 2KB of RAM, composite video output, and no toolkit (pokes only).
|
Earliest version has 2KB of RAM, composite video output, and no toolkit (pokes only).
|
||||||
Next version has 8KB of RAM, composite video output, and basic toolkit (including pokes).
|
Next version has 8KB of RAM, composite video output, and basic toolkit (including pokes).
|
||||||
Latest and most common version dropped the composite video output, added an enable/disable switch, and full-featured toolkit.
|
Latest and most common version dropped the composite video output, added an enable/disable switch, and full-featured toolkit.
|
||||||
A special (and rare) version supports the Kempston Disc interface but drops Beta support. (not sold in stores, available only on request).
|
A special (and rare) version supports the Kempston Disc interface but drops Beta support. (not sold in stores, available only on request).
|
||||||
At some point during "early" revisions, the page out port changed from 0x5f to 0x1f.
|
At some point during "early" revisions, the page out port changed from 0x5f to 0x1f.
|
||||||
Various clone/hacked rom versions are known to exist as well.
|
Various clone/hacked rom versions are known to exist as well.
|
||||||
|
|
||||||
Roms:
|
Roms:
|
||||||
The MUxx in the rom name is pcb revision (silkscreen marking).
|
The MUxx in the rom name is pcb revision (silkscreen marking).
|
||||||
The two hex digits are the rom checksum.
|
The two hex digits are the rom checksum.
|
||||||
With the MF menu on-screen, press Symbol Shift + A (STOP) to see checksum, space to return.
|
With the MF menu on-screen, press Symbol Shift + A (STOP) to see checksum, space to return.
|
||||||
|
|
||||||
The enable/disable switch became necessary on later versions as games had started including checks to detect presence of the interface.
|
The enable/disable switch became necessary on later versions as games had started including checks to detect presence of the interface.
|
||||||
eg. Renegade ("The Hit Squad" re-release) whilst loading, reads from 0x9f specifically to cause the MF (if present) to page in and crash the machine.
|
eg. Renegade ("The Hit Squad" re-release) whilst loading, reads from 0x9f specifically to cause the MF (if present) to page in and crash the machine.
|
||||||
Todo: confirm exact operation of disable switch.
|
Todo: confirm exact operation of disable switch.
|
||||||
|
|
||||||
As mentioned in the user instructions, there is a "joystick disable" jumper inside the unit which must be cut to allow Beta disk compatibility.
|
As mentioned in the user instructions, there is a "joystick disable" jumper inside the unit which must be cut to allow Beta disk compatibility.
|
||||||
The joystick is not actually disabled but rather just data bus bits D6 + D7 are held hi-z for any reads of kempston range 0b000xxxxx.
|
The joystick is not actually disabled but rather just data bus bits D6 + D7 are held hi-z for any reads of kempston range 0b000xxxxx.
|
||||||
|
|
||||||
rom maps to 0x0000
|
rom maps to 0x0000
|
||||||
ram maps to 0x2000
|
ram maps to 0x2000
|
||||||
|
|
||||||
I/O R/W early ver late ver
|
I/O R/W early ver late ver
|
||||||
---------+-----+-----------+-----------
|
---------+-----+-----------+-----------
|
||||||
page in R 0x9f 0x9f
|
page in R 0x9f 0x9f
|
||||||
page out R 0x5f 0x1f
|
page out R 0x5f 0x1f
|
||||||
nmi reset W 0x5f 0x1f
|
nmi reset W 0x5f 0x1f
|
||||||
joystick R 0x1f 0x1f
|
joystick R 0x1f 0x1f
|
||||||
|
|
||||||
|
|
||||||
Multiface 128
|
Multiface 128
|
||||||
-------------
|
-------------
|
||||||
128K/+2 support (also works with 48K)
|
128K/+2 support (also works with 48K)
|
||||||
DISCiPLE/Plus D disc support
|
DISCiPLE/Plus D disc support
|
||||||
No joystick port
|
No joystick port
|
||||||
Software enable/disable
|
Software enable/disable
|
||||||
"Hypertape" recording (?)
|
"Hypertape" recording (?)
|
||||||
|
|
||||||
Todo ...
|
Todo ...
|
||||||
|
|
||||||
|
|
||||||
Multiface 3
|
Multiface 3
|
||||||
-----------
|
-----------
|
||||||
+2A/+2B/+3/3B support (doesn't work with 48K/128K/+2)
|
+2A/+2B/+3/3B support (doesn't work with 48K/128K/+2)
|
||||||
+3 disk support
|
+3 disk support
|
||||||
|
|
||||||
Todo ...
|
Todo ...
|
||||||
|
|
||||||
|
|
||||||
Multiprint
|
Multiprint
|
||||||
----------
|
----------
|
||||||
Version ? multiface with Centronics printer interface
|
Version ? multiface with Centronics printer interface
|
||||||
|
|
||||||
Todo ...
|
Todo ...
|
||||||
|
|
||||||
|
|
||||||
*********************************************************************/
|
*********************************************************************/
|
||||||
@ -153,17 +153,17 @@ ROM_END
|
|||||||
|
|
||||||
/* Todo ...
|
/* Todo ...
|
||||||
|
|
||||||
ROM_SYSTEM_BIOS(?, "mu12cb", "MU12 CB") // Very early version, 2KB RAM, page out port 0x5F
|
ROM_SYSTEM_BIOS(?, "mu12cb", "MU12 CB") // Very early version, 2KB RAM, page out port 0x5F
|
||||||
ROMX_LOAD("mf1_12_cb.rom", 0x0000, 0x2000, CRC(c88fbf9f) SHA1(c3018d1b495b8bc0a135038db0987de7091c9d4c), ROM_BIOS(?))
|
ROMX_LOAD("mf1_12_cb.rom", 0x0000, 0x2000, CRC(c88fbf9f) SHA1(c3018d1b495b8bc0a135038db0987de7091c9d4c), ROM_BIOS(?))
|
||||||
|
|
||||||
ROM_SYSTEM_BIOS(?, "mu2023", "MU 2.0 23") // pokes only (no toolkit), page out port 0x5F
|
ROM_SYSTEM_BIOS(?, "mu2023", "MU 2.0 23") // pokes only (no toolkit), page out port 0x5F
|
||||||
ROMX_LOAD("mf1_20_23.rom", 0x0000, 0x2000, CRC(d4ae8953) SHA1(b442eb634a72fb63f1ccbbd0021a7a581152888d), ROM_BIOS(?))
|
ROMX_LOAD("mf1_20_23.rom", 0x0000, 0x2000, CRC(d4ae8953) SHA1(b442eb634a72fb63f1ccbbd0021a7a581152888d), ROM_BIOS(?))
|
||||||
|
|
||||||
ROM_SYSTEM_BIOS(?, "mu2090", "MU 2.0, 90") // pokes only or full toolkit? NO DUMP?
|
ROM_SYSTEM_BIOS(?, "mu2090", "MU 2.0, 90") // pokes only or full toolkit? NO DUMP?
|
||||||
ROMX_LOAD("mf1_20_90.rom", 0x0000, 0x2000, CRC(2eaf8e41) SHA1(?), ROM_BIOS(?))
|
ROMX_LOAD("mf1_20_90.rom", 0x0000, 0x2000, CRC(2eaf8e41) SHA1(?), ROM_BIOS(?))
|
||||||
|
|
||||||
ROM_SYSTEM_BIOS(?, "v24", "MU ?? 93 (Brazilian clone)") // NO DUMP?
|
ROM_SYSTEM_BIOS(?, "v24", "MU ?? 93 (Brazilian clone)") // NO DUMP?
|
||||||
ROMX_LOAD("mf1_bc_fe.rom", 0x0000, 0x2000, CRC(8c17113b) SHA1(?), ROM_BIOS(?))
|
ROMX_LOAD("mf1_bc_fe.rom", 0x0000, 0x2000, CRC(8c17113b) SHA1(?), ROM_BIOS(?))
|
||||||
*/
|
*/
|
||||||
|
|
||||||
ROM_START(mface128)
|
ROM_START(mface128)
|
||||||
|
@ -2,141 +2,141 @@
|
|||||||
// copyright-holders:TwistedTom
|
// copyright-holders:TwistedTom
|
||||||
/**********************************************************************
|
/**********************************************************************
|
||||||
|
|
||||||
DISCiPLE Multi-purpose Interface
|
DISCiPLE Multi-purpose Interface
|
||||||
+D Disk and Printer Interface
|
+D Disk and Printer Interface
|
||||||
|
|
||||||
Miles Gordon Technology, UK, 1986-1990 (also produced the Sam Coupé home computer.)
|
Miles Gordon Technology, UK, 1986-1990 (also produced the Sam Coupé home computer.)
|
||||||
|
|
||||||
DISCiPLE was MGT's first disk interface, a large plastic base that sat under the Spectrum, similar to Sinclair's official Interface 1.
|
DISCiPLE was MGT's first disk interface, a large plastic base that sat under the Spectrum, similar to Sinclair's official Interface 1.
|
||||||
+D was MGT's second (and last) disk interface, a cost and feature reduced version of the Disciple, a small metal-cased,
|
+D was MGT's second (and last) disk interface, a cost and feature reduced version of the Disciple, a small metal-cased,
|
||||||
stand-alone unit which connects to ZX Spectrum's expansion slot via a ribbon cable.
|
stand-alone unit which connects to ZX Spectrum's expansion slot via a ribbon cable.
|
||||||
A second Datel version of the +D exists (following the closure of MGT, it was licensed and produced by Datel.)
|
A second Datel version of the +D exists (following the closure of MGT, it was licensed and produced by Datel.)
|
||||||
Many unofficial versions of +D exist and modern versions are still seen today as DIY-style projects/kits.
|
Many unofficial versions of +D exist and modern versions are still seen today as DIY-style projects/kits.
|
||||||
It's said the device's design and roms were officially released into the public domain at some point?
|
It's said the device's design and roms were officially released into the public domain at some point?
|
||||||
|
|
||||||
DISCiPLE features:
|
DISCiPLE features:
|
||||||
8KB ROM
|
8KB ROM
|
||||||
8KB RAM
|
8KB RAM
|
||||||
single floppy disk interface (2 drives)
|
single floppy disk interface (2 drives)
|
||||||
Centronics parallel printer interface
|
Centronics parallel printer interface
|
||||||
"magic button" style memory snapshot grabber
|
"magic button" style memory snapshot grabber
|
||||||
2 ATARI joystick ports (Sinclair 1/Kempston, Sinclair 2)
|
2 ATARI joystick ports (Sinclair 1/Kempston, Sinclair 2)
|
||||||
2 network connectors (Interface 1 compatible, 3.5mm mono jack)
|
2 network connectors (Interface 1 compatible, 3.5mm mono jack)
|
||||||
inhibit button (to lock out the interface)
|
inhibit button (to lock out the interface)
|
||||||
pass-through expansion connector (to chain other devices)
|
pass-through expansion connector (to chain other devices)
|
||||||
|
|
||||||
+D features:
|
+D features:
|
||||||
same as DISCiPLE
|
same as DISCiPLE
|
||||||
lost the joystick/network ports, inhibit button and pass-through expansion connector
|
lost the joystick/network ports, inhibit button and pass-through expansion connector
|
||||||
|
|
||||||
DISCiPLE's official DOS was "GDOS".
|
DISCiPLE's official DOS was "GDOS".
|
||||||
+D's official DOS was "G+DOS".
|
+D's official DOS was "G+DOS".
|
||||||
Both of these were later superseded by "SAM DOS" (used by MGT's Sam Coupé.)
|
Both of these were later superseded by "SAM DOS" (used by MGT's Sam Coupé.)
|
||||||
A 3rd party company SD Software released an alternative DOS "UNI-DOS" for both interfaces. (consisting of a disk and replacement ROM)
|
A 3rd party company SD Software released an alternative DOS "UNI-DOS" for both interfaces. (consisting of a disk and replacement ROM)
|
||||||
|
|
||||||
FDD support:
|
FDD support:
|
||||||
|
|
||||||
DISCiPLE's manual states any Shugart 400 SD/DD drive should work:
|
DISCiPLE's manual states any Shugart 400 SD/DD drive should work:
|
||||||
"The disciple will accept 5.25" or 3.5" drives, whether they are 40 track or 80 track,
|
"The disciple will accept 5.25" or 3.5" drives, whether they are 40 track or 80 track,
|
||||||
single sided or double sided, single density or double density."
|
single sided or double sided, single density or double density."
|
||||||
|
|
||||||
+D's manual states any Shugart 400 DD drive should work (but not SD)
|
+D's manual states any Shugart 400 DD drive should work (but not SD)
|
||||||
"we recommend 3.5" or 5.25" 80-track double sided and double density drives,
|
"we recommend 3.5" or 5.25" 80-track double sided and double density drives,
|
||||||
which will give you up to 780K of storage per drive. But Shugart
|
which will give you up to 780K of storage per drive. But Shugart
|
||||||
400-type 3" drives will also work."
|
400-type 3" drives will also work."
|
||||||
|
|
||||||
+D only: Pin 26 /DDEN of the WD1772 is tied to ground, so permanent DD mode.
|
+D only: Pin 26 /DDEN of the WD1772 is tied to ground, so permanent DD mode.
|
||||||
DISCiPLE only: /DDEN can be directly controlled via s/w by an IO write to 0x1f, bit 2.
|
DISCiPLE only: /DDEN can be directly controlled via s/w by an IO write to 0x1f, bit 2.
|
||||||
|
|
||||||
Disks use "MGT filesystem".
|
Disks use "MGT filesystem".
|
||||||
A good description available at https://faqwiki.zxnet.co.uk/wiki/MGT_filesystem
|
A good description available at https://faqwiki.zxnet.co.uk/wiki/MGT_filesystem
|
||||||
|
|
||||||
Disk format is 512 bytes/sector, 10 sectors/track
|
Disk format is 512 bytes/sector, 10 sectors/track
|
||||||
40 track, 1 side = 204,800 bytes (512*10*40*1)
|
40 track, 1 side = 204,800 bytes (512*10*40*1)
|
||||||
40 track, 2 side = 409,600 bytes
|
40 track, 2 side = 409,600 bytes
|
||||||
80 track, 1 side = 409,600 bytes
|
80 track, 1 side = 409,600 bytes
|
||||||
80 track, 2 side = 819,200 bytes <-- only this one supported so far
|
80 track, 2 side = 819,200 bytes <-- only this one supported so far
|
||||||
|
|
||||||
.mgt files work ok
|
.mgt files work ok
|
||||||
.img files don't work (not in coupedsk.cpp)
|
.img files don't work (not in coupedsk.cpp)
|
||||||
|
|
||||||
The DOS must be loaded from a "System Disk" which is itself created from "System Tape" which was supplied with the unit.
|
The DOS must be loaded from a "System Disk" which is itself created from "System Tape" which was supplied with the unit.
|
||||||
The ROM provides just the RUN command, which boots the system disk and loads the full DOS.
|
The ROM provides just the RUN command, which boots the system disk and loads the full DOS.
|
||||||
Presumably the unit wasn't supplied with a system disk due to wide range of drives that can be used? (3", 3.5", 5.25")
|
Presumably the unit wasn't supplied with a system disk due to wide range of drives that can be used? (3", 3.5", 5.25")
|
||||||
The DOS survives a reset, so reloading of system disk is only required after full power cycle.
|
The DOS survives a reset, so reloading of system disk is only required after full power cycle.
|
||||||
|
|
||||||
A few useful commands:
|
A few useful commands:
|
||||||
RUN Boots the system
|
RUN Boots the system
|
||||||
CAT 1 Displays catalogue (drive 1)
|
CAT 1 Displays catalogue (drive 1)
|
||||||
CAT 1! Displays shortened catalogue (drive 1)
|
CAT 1! Displays shortened catalogue (drive 1)
|
||||||
SAVE D1 "filename" Saves file
|
SAVE D1 "filename" Saves file
|
||||||
VERIFY D1 "filename" Confirms save has been made
|
VERIFY D1 "filename" Confirms save has been made
|
||||||
LOAD D1 "filename" Loads file (except Snapshot files)
|
LOAD D1 "filename" Loads file (except Snapshot files)
|
||||||
LOAD D1 "filename" S Loads 48K Snapshot file
|
LOAD D1 "filename" S Loads 48K Snapshot file
|
||||||
LOAD D1 "filename" K Loads 128K Snapshot file
|
LOAD D1 "filename" K Loads 128K Snapshot file
|
||||||
LOAD D1 "filename" SCREEN$ Loads screen file
|
LOAD D1 "filename" SCREEN$ Loads screen file
|
||||||
LOAD Pn Loads the program (from its number)
|
LOAD Pn Loads the program (from its number)
|
||||||
ERASE D1 "file" TO "new file" Renames a file
|
ERASE D1 "file" TO "new file" Renames a file
|
||||||
ERASE D1 "filename" Erases a file
|
ERASE D1 "filename" Erases a file
|
||||||
SAVE D1 "file" TO D2 Copies a file from drive1 to drive2
|
SAVE D1 "file" TO D2 Copies a file from drive1 to drive2
|
||||||
FORMAT D1 Formats disc in drive 1
|
FORMAT D1 Formats disc in drive 1
|
||||||
FORMAT D1 TO 2 Formats drive 1; copies from 2 to 1
|
FORMAT D1 TO 2 Formats drive 1; copies from 2 to 1
|
||||||
|
|
||||||
DISCiPLE snapshot button:
|
DISCiPLE snapshot button:
|
||||||
Caps Shift + button system freezes with a multi-coloured border effect
|
Caps Shift + button system freezes with a multi-coloured border effect
|
||||||
then, key 3 save current SCREEN
|
then, key 3 save current SCREEN
|
||||||
4 save 48K PROGRAM
|
4 save 48K PROGRAM
|
||||||
5 save 128K PROGRAM
|
5 save 128K PROGRAM
|
||||||
Caps Shift + number saves to drive 2 (or 1 if running from 2)
|
Caps Shift + number saves to drive 2 (or 1 if running from 2)
|
||||||
|
|
||||||
+D snapshot button:
|
+D snapshot button:
|
||||||
button system freezes with a multi-coloured border effect (don't need to hold caps shift)
|
button system freezes with a multi-coloured border effect (don't need to hold caps shift)
|
||||||
then, key 3 save current SCREEN
|
then, key 3 save current SCREEN
|
||||||
4 save 48K PROGRAM
|
4 save 48K PROGRAM
|
||||||
5 save 128K PROGRAM
|
5 save 128K PROGRAM
|
||||||
X do nothing, return to running program
|
X do nothing, return to running program
|
||||||
Caps Shift + number saves to drive 2 (or 1 if running from 2)
|
Caps Shift + number saves to drive 2 (or 1 if running from 2)
|
||||||
|
|
||||||
DISCiPLE GDOS versions:
|
DISCiPLE GDOS versions:
|
||||||
The rom/system disk versions must match,
|
The rom/system disk versions must match,
|
||||||
v2 rom: use system disk/system tape ver 2, 2b, 2c
|
v2 rom: use system disk/system tape ver 2, 2b, 2c
|
||||||
v3 rom: use system disk/system tape ver 3a, 3b or 3d
|
v3 rom: use system disk/system tape ver 3a, 3b or 3d
|
||||||
|
|
||||||
+D G+DOS versions:
|
+D G+DOS versions:
|
||||||
a v1 (-non a) exists but has yet to be found/dumped,
|
a v1 (-non a) exists but has yet to be found/dumped,
|
||||||
from "pick-poke-it" user manual:
|
from "pick-poke-it" user manual:
|
||||||
"A few PLUS D users are still using Version 1 of the ROM which was used in PLUS D's sold in December 1987-January 1988.
|
"A few PLUS D users are still using Version 1 of the ROM which was used in PLUS D's sold in December 1987-January 1988.
|
||||||
... check the serial number on the bottom of your PLUS D. If it's a 4-figure number commencing with 1,
|
... check the serial number on the bottom of your PLUS D. If it's a 4-figure number commencing with 1,
|
||||||
then you have a PLUS D with the Version 1 ROM."
|
then you have a PLUS D with the Version 1 ROM."
|
||||||
|
|
||||||
DISCiPLE only curiosities:
|
DISCiPLE only curiosities:
|
||||||
The pass-through expansion connector has 4 extra pins (1 top/bottom each end)
|
The pass-through expansion connector has 4 extra pins (1 top/bottom each end)
|
||||||
so 2x30 pins compared to ususal 2x28 of Spectrum expansion slot.
|
so 2x30 pins compared to ususal 2x28 of Spectrum expansion slot.
|
||||||
Presumably this was intended for some unique expansion device that never appeared?
|
Presumably this was intended for some unique expansion device that never appeared?
|
||||||
One of these extra pins can be directly controlled via s/w by an IO write to 0x1f, bit 5.
|
One of these extra pins can be directly controlled via s/w by an IO write to 0x1f, bit 5.
|
||||||
2 other pins appear to be able to override the /ce signal from PAL ic9 to the rom.
|
2 other pins appear to be able to override the /ce signal from PAL ic9 to the rom.
|
||||||
4th pin is unused.
|
4th pin is unused.
|
||||||
|
|
||||||
The design allows for use of a larger 27128 (16KB) rom,
|
The design allows for use of a larger 27128 (16KB) rom,
|
||||||
with the highest address line A13 controllable via s/w by an IO write to 0x1f, bit 3.
|
with the highest address line A13 controllable via s/w by an IO write to 0x1f, bit 3.
|
||||||
No larger roms seem to exist (or perhaps not yet found...?)
|
No larger roms seem to exist (or perhaps not yet found...?)
|
||||||
Some 16KB dumps can be found but these are combined dumps of the 8KB rom and 8KB ram (with the full DOS loaded).
|
Some 16KB dumps can be found but these are combined dumps of the 8KB rom and 8KB ram (with the full DOS loaded).
|
||||||
|
|
||||||
|
|
||||||
Current status:
|
Current status:
|
||||||
--------------
|
--------------
|
||||||
|
|
||||||
DISCiPLE
|
DISCiPLE
|
||||||
GDOS v3: all ok, occassional "no system file" when loading system disk, ok on 2nd attempt
|
GDOS v3: all ok, occassional "no system file" when loading system disk, ok on 2nd attempt
|
||||||
GDOS v2: all ok
|
GDOS v2: all ok
|
||||||
UNIDOS: all ok
|
UNIDOS: all ok
|
||||||
|
|
||||||
+D
|
+D
|
||||||
G+DOS: all ok
|
G+DOS: all ok
|
||||||
UNIDOS: all ok
|
UNIDOS: all ok
|
||||||
|
|
||||||
|
|
||||||
Not working with 128K/+2 yet...
|
Not working with 128K/+2 yet...
|
||||||
|
|
||||||
**********************************************************************/
|
**********************************************************************/
|
||||||
|
|
||||||
|
@ -2,10 +2,10 @@
|
|||||||
// copyright-holders:TwistedTom
|
// copyright-holders:TwistedTom
|
||||||
/**********************************************************************
|
/**********************************************************************
|
||||||
|
|
||||||
DISCiPLE Multi-purpose Interface
|
DISCiPLE Multi-purpose Interface
|
||||||
+D Disk and Printer Interface
|
+D Disk and Printer Interface
|
||||||
|
|
||||||
(Miles Gordon Technology)
|
(Miles Gordon Technology)
|
||||||
|
|
||||||
**********************************************************************/
|
**********************************************************************/
|
||||||
|
|
||||||
|
@ -58,7 +58,7 @@ void v9938_colorbus_device::device_start()
|
|||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|
||||||
device_v9938_colorbus_interface::device_v9938_colorbus_interface(const machine_config &mconfig, device_t &device)
|
device_v9938_colorbus_interface::device_v9938_colorbus_interface(const machine_config &mconfig, device_t &device)
|
||||||
: device_interface(device, "v9938colorbus"),
|
: device_interface(device, "v9938colorbus"),
|
||||||
m_colorbus(nullptr)
|
m_colorbus(nullptr)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
@ -45,7 +45,7 @@ DEFINE_DEVICE_TYPE_NS(TI99_JOYPORT, bus::ti99::joyport, joyport_device, "ti99_jo
|
|||||||
namespace bus { namespace ti99 { namespace joyport {
|
namespace bus { namespace ti99 { namespace joyport {
|
||||||
|
|
||||||
device_ti99_joyport_interface::device_ti99_joyport_interface(const machine_config &config, device_t &device)
|
device_ti99_joyport_interface::device_ti99_joyport_interface(const machine_config &config, device_t &device)
|
||||||
: device_interface(device, "ti99joyport"),
|
: device_interface(device, "ti99joyport"),
|
||||||
m_joyport(nullptr)
|
m_joyport(nullptr)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
@ -334,10 +334,10 @@ enum
|
|||||||
SPARC_PS,
|
SPARC_PS,
|
||||||
|
|
||||||
SPARC_FSR,
|
SPARC_FSR,
|
||||||
SPARC_F0, SPARC_F1, SPARC_F2, SPARC_F3, SPARC_F4, SPARC_F5, SPARC_F6, SPARC_F7,
|
SPARC_F0, SPARC_F1, SPARC_F2, SPARC_F3, SPARC_F4, SPARC_F5, SPARC_F6, SPARC_F7,
|
||||||
SPARC_F8, SPARC_F9, SPARC_F10, SPARC_F11, SPARC_F12, SPARC_F13, SPARC_F14, SPARC_F15,
|
SPARC_F8, SPARC_F9, SPARC_F10, SPARC_F11, SPARC_F12, SPARC_F13, SPARC_F14, SPARC_F15,
|
||||||
SPARC_F16, SPARC_F17, SPARC_F18, SPARC_F19, SPARC_F20, SPARC_F21, SPARC_F22, SPARC_F23,
|
SPARC_F16, SPARC_F17, SPARC_F18, SPARC_F19, SPARC_F20, SPARC_F21, SPARC_F22, SPARC_F23,
|
||||||
SPARC_F24, SPARC_F25, SPARC_F26, SPARC_F27, SPARC_F28, SPARC_F29, SPARC_F30, SPARC_F31,
|
SPARC_F24, SPARC_F25, SPARC_F26, SPARC_F27, SPARC_F28, SPARC_F29, SPARC_F30, SPARC_F31,
|
||||||
|
|
||||||
SPARC_R0, SPARC_R1, SPARC_R2, SPARC_R3, SPARC_R4, SPARC_R5, SPARC_R6, SPARC_R7, SPARC_R8, SPARC_R9, SPARC_R10, SPARC_R11, SPARC_R12, SPARC_R13, SPARC_R14, SPARC_R15,
|
SPARC_R0, SPARC_R1, SPARC_R2, SPARC_R3, SPARC_R4, SPARC_R5, SPARC_R6, SPARC_R7, SPARC_R8, SPARC_R9, SPARC_R10, SPARC_R11, SPARC_R12, SPARC_R13, SPARC_R14, SPARC_R15,
|
||||||
SPARC_R16, SPARC_R17, SPARC_R18, SPARC_R19, SPARC_R20, SPARC_R21, SPARC_R22, SPARC_R23, SPARC_R24, SPARC_R25, SPARC_R26, SPARC_R27, SPARC_R28, SPARC_R29, SPARC_R30, SPARC_R31,
|
SPARC_R16, SPARC_R17, SPARC_R18, SPARC_R19, SPARC_R20, SPARC_R21, SPARC_R22, SPARC_R23, SPARC_R24, SPARC_R25, SPARC_R26, SPARC_R27, SPARC_R28, SPARC_R29, SPARC_R30, SPARC_R31,
|
||||||
|
@ -390,95 +390,95 @@
|
|||||||
#define SDIVCC (OP3 == OP3_SDIVCC)
|
#define SDIVCC (OP3 == OP3_SDIVCC)
|
||||||
|
|
||||||
#define FSR_CEXC_MASK 0x0000001f
|
#define FSR_CEXC_MASK 0x0000001f
|
||||||
#define FSR_CEXC_NXC 0x00000001
|
#define FSR_CEXC_NXC 0x00000001
|
||||||
#define FSR_CEXC_DZC 0x00000002
|
#define FSR_CEXC_DZC 0x00000002
|
||||||
#define FSR_CEXC_UFC 0x00000004
|
#define FSR_CEXC_UFC 0x00000004
|
||||||
#define FSR_CEXC_OFC 0x00000008
|
#define FSR_CEXC_OFC 0x00000008
|
||||||
#define FSR_CEXC_NVC 0x00000010
|
#define FSR_CEXC_NVC 0x00000010
|
||||||
|
|
||||||
#define FSR_AEXC_SHIFT 5
|
#define FSR_AEXC_SHIFT 5
|
||||||
#define FSR_AEXC_MASK 0x000003e0
|
#define FSR_AEXC_MASK 0x000003e0
|
||||||
#define FSR_AEXC_NXA 0x00000020
|
#define FSR_AEXC_NXA 0x00000020
|
||||||
#define FSR_AEXC_DZA 0x00000040
|
#define FSR_AEXC_DZA 0x00000040
|
||||||
#define FSR_AEXC_UFA 0x00000080
|
#define FSR_AEXC_UFA 0x00000080
|
||||||
#define FSR_AEXC_OFA 0x00000100
|
#define FSR_AEXC_OFA 0x00000100
|
||||||
#define FSR_AEXC_NVA 0x00000200
|
#define FSR_AEXC_NVA 0x00000200
|
||||||
|
|
||||||
#define FSR_FCC_SHIFT 10
|
#define FSR_FCC_SHIFT 10
|
||||||
#define FSR_FCC_MASK 0x00000c00
|
#define FSR_FCC_MASK 0x00000c00
|
||||||
#define FSR_FCC_EQ 0x00000000
|
#define FSR_FCC_EQ 0x00000000
|
||||||
#define FSR_FCC_LT 0x00000400
|
#define FSR_FCC_LT 0x00000400
|
||||||
#define FSR_FCC_GT 0x00000800
|
#define FSR_FCC_GT 0x00000800
|
||||||
#define FSR_FCC_UO 0x00000c00
|
#define FSR_FCC_UO 0x00000c00
|
||||||
|
|
||||||
#define FSR_QNE 0x00002000
|
#define FSR_QNE 0x00002000
|
||||||
|
|
||||||
#define FSR_FTT_MASK 0x0001c000
|
#define FSR_FTT_MASK 0x0001c000
|
||||||
#define FSR_FTT_NONE 0x00000000
|
#define FSR_FTT_NONE 0x00000000
|
||||||
#define FSR_FTT_IEEE 0x00004000
|
#define FSR_FTT_IEEE 0x00004000
|
||||||
#define FSR_FTT_UNFIN 0x00008000
|
#define FSR_FTT_UNFIN 0x00008000
|
||||||
#define FSR_FTT_UNIMP 0x0000c000
|
#define FSR_FTT_UNIMP 0x0000c000
|
||||||
#define FSR_FTT_SEQ 0x00010000
|
#define FSR_FTT_SEQ 0x00010000
|
||||||
|
|
||||||
#define FSR_VER 0x00020000
|
#define FSR_VER 0x00020000
|
||||||
|
|
||||||
#define FSR_NS 0x00400000
|
#define FSR_NS 0x00400000
|
||||||
|
|
||||||
#define FSR_TEM_SHIFT 23
|
#define FSR_TEM_SHIFT 23
|
||||||
#define FSR_TEM_MASK 0x0f800000
|
#define FSR_TEM_MASK 0x0f800000
|
||||||
#define FSR_TEM_NXM 0x00800000
|
#define FSR_TEM_NXM 0x00800000
|
||||||
#define FSR_TEM_DZM 0x01000000
|
#define FSR_TEM_DZM 0x01000000
|
||||||
#define FSR_TEM_UFM 0x02000000
|
#define FSR_TEM_UFM 0x02000000
|
||||||
#define FSR_TEM_OFM 0x04000000
|
#define FSR_TEM_OFM 0x04000000
|
||||||
#define FSR_TEM_NVM 0x08000000
|
#define FSR_TEM_NVM 0x08000000
|
||||||
|
|
||||||
#define FSR_RD_SHIFT 30
|
#define FSR_RD_SHIFT 30
|
||||||
#define FSR_RD_MASK 0xc0000000
|
#define FSR_RD_MASK 0xc0000000
|
||||||
#define FSR_RD_NEAR 0x00000000
|
#define FSR_RD_NEAR 0x00000000
|
||||||
#define FSR_RD_ZERO 0x40000000
|
#define FSR_RD_ZERO 0x40000000
|
||||||
#define FSR_RD_UP 0x80000000
|
#define FSR_RD_UP 0x80000000
|
||||||
#define FSR_RD_DOWN 0xc0000000
|
#define FSR_RD_DOWN 0xc0000000
|
||||||
|
|
||||||
#define FSR_RESV_MASK 0x30301000
|
#define FSR_RESV_MASK 0x30301000
|
||||||
|
|
||||||
// FPop1
|
// FPop1
|
||||||
#define FPOP_FMOVS 0x001
|
#define FPOP_FMOVS 0x001
|
||||||
#define FPOP_FNEGS 0x005
|
#define FPOP_FNEGS 0x005
|
||||||
#define FPOP_FABSS 0x009
|
#define FPOP_FABSS 0x009
|
||||||
#define FPOP_FSQRTS 0x029
|
#define FPOP_FSQRTS 0x029
|
||||||
#define FPOP_FSQRTD 0x02a
|
#define FPOP_FSQRTD 0x02a
|
||||||
#define FPOP_FSQRTX 0x02b
|
#define FPOP_FSQRTX 0x02b
|
||||||
#define FPOP_FADDS 0x041
|
#define FPOP_FADDS 0x041
|
||||||
#define FPOP_FADDD 0x042
|
#define FPOP_FADDD 0x042
|
||||||
#define FPOP_FADDX 0x043
|
#define FPOP_FADDX 0x043
|
||||||
#define FPOP_FSUBS 0x045
|
#define FPOP_FSUBS 0x045
|
||||||
#define FPOP_FSUBD 0x046
|
#define FPOP_FSUBD 0x046
|
||||||
#define FPOP_FSUBX 0x047
|
#define FPOP_FSUBX 0x047
|
||||||
#define FPOP_FMULS 0x049
|
#define FPOP_FMULS 0x049
|
||||||
#define FPOP_FMULD 0x04a
|
#define FPOP_FMULD 0x04a
|
||||||
#define FPOP_FMULX 0x04b
|
#define FPOP_FMULX 0x04b
|
||||||
#define FPOP_FDIVS 0x04d
|
#define FPOP_FDIVS 0x04d
|
||||||
#define FPOP_FDIVD 0x04e
|
#define FPOP_FDIVD 0x04e
|
||||||
#define FPOP_FDIVX 0x04f
|
#define FPOP_FDIVX 0x04f
|
||||||
#define FPOP_FITOS 0x0c4
|
#define FPOP_FITOS 0x0c4
|
||||||
#define FPOP_FDTOS 0x0c6
|
#define FPOP_FDTOS 0x0c6
|
||||||
#define FPOP_FXTOS 0x0c7
|
#define FPOP_FXTOS 0x0c7
|
||||||
#define FPOP_FITOD 0x0c8
|
#define FPOP_FITOD 0x0c8
|
||||||
#define FPOP_FSTOD 0x0c9
|
#define FPOP_FSTOD 0x0c9
|
||||||
#define FPOP_FXTOD 0x0cb
|
#define FPOP_FXTOD 0x0cb
|
||||||
#define FPOP_FITOX 0x0cc
|
#define FPOP_FITOX 0x0cc
|
||||||
#define FPOP_FSTOX 0x0cd
|
#define FPOP_FSTOX 0x0cd
|
||||||
#define FPOP_FDTOX 0x0ce
|
#define FPOP_FDTOX 0x0ce
|
||||||
#define FPOP_FSTOI 0x0d1
|
#define FPOP_FSTOI 0x0d1
|
||||||
#define FPOP_FDTOI 0x0d2
|
#define FPOP_FDTOI 0x0d2
|
||||||
#define FPOP_FXTOI 0x0d3
|
#define FPOP_FXTOI 0x0d3
|
||||||
|
|
||||||
// FPop2
|
// FPop2
|
||||||
#define FPOP_FCMPS 0x051
|
#define FPOP_FCMPS 0x051
|
||||||
#define FPOP_FCMPD 0x052
|
#define FPOP_FCMPD 0x052
|
||||||
#define FPOP_FCMPX 0x053
|
#define FPOP_FCMPX 0x053
|
||||||
#define FPOP_FCMPES 0x055
|
#define FPOP_FCMPES 0x055
|
||||||
#define FPOP_FCMPED 0x056
|
#define FPOP_FCMPED 0x056
|
||||||
#define FPOP_FCMPEX 0x057
|
#define FPOP_FCMPEX 0x057
|
||||||
|
|
||||||
#endif // CPU_SPARC_SPARC_DEFS_H
|
#endif // CPU_SPARC_SPARC_DEFS_H
|
||||||
|
@ -13,7 +13,7 @@
|
|||||||
|
|
||||||
IDT71321 is function compatible, but not pin compatible with MB8421
|
IDT71321 is function compatible, but not pin compatible with MB8421
|
||||||
IDT7130 is 1KB variation of IDT71321
|
IDT7130 is 1KB variation of IDT71321
|
||||||
CY7C131 is similar as IDT7130
|
CY7C131 is similar as IDT7130
|
||||||
|
|
||||||
**********************************************************************/
|
**********************************************************************/
|
||||||
|
|
||||||
|
@ -6,9 +6,9 @@
|
|||||||
|
|
||||||
Fujitsu MB8421/22/31/32-90/-90L/-90LL/-12/-12L/-12LL
|
Fujitsu MB8421/22/31/32-90/-90L/-90LL/-12/-12L/-12LL
|
||||||
CMOS 16K-bit (2KB) dual-port SRAM (pinouts : see below)
|
CMOS 16K-bit (2KB) dual-port SRAM (pinouts : see below)
|
||||||
IDT 71321 16K-bit (2Kx8) dual port SRAM
|
IDT 71321 16K-bit (2Kx8) dual port SRAM
|
||||||
IDT 7130 8K-bit (1Kx8) dual port SRAM
|
IDT 7130 8K-bit (1Kx8) dual port SRAM
|
||||||
Cypress CY7C131 8K-bit (1Kx8) dual port SRAM
|
Cypress CY7C131 8K-bit (1Kx8) dual port SRAM
|
||||||
|
|
||||||
***********************************************************************
|
***********************************************************************
|
||||||
_____________
|
_____________
|
||||||
|
@ -233,7 +233,7 @@ public:
|
|||||||
, m_in(*this, "IN")
|
, m_in(*this, "IN")
|
||||||
, m_cpu_device(nullptr)
|
, m_cpu_device(nullptr)
|
||||||
, m_last(*this, "m_last", 0)
|
, m_last(*this, "m_last", 0)
|
||||||
// , m_supply(*this)
|
// , m_supply(*this)
|
||||||
{
|
{
|
||||||
auto *nl = dynamic_cast<netlist_mame_device::netlist_mame_t *>(&state());
|
auto *nl = dynamic_cast<netlist_mame_device::netlist_mame_t *>(&state());
|
||||||
if (nl != nullptr)
|
if (nl != nullptr)
|
||||||
|
@ -121,17 +121,17 @@ in mind that it is an ASCII terminal so try an ISO-8859-1 locale, and also that
|
|||||||
it has no tabs so it needs tab to space translation.
|
it has no tabs so it needs tab to space translation.
|
||||||
|
|
||||||
swtp|ct8212|southwest technical products ct8212,
|
swtp|ct8212|southwest technical products ct8212,
|
||||||
cols#82, lines#24,
|
cols#82, lines#24,
|
||||||
bel=^G, civis=^E, clear=^L, cnorm=^U, cr=\r,
|
bel=^G, civis=^E, clear=^L, cnorm=^U, cr=\r,
|
||||||
cub=^\^D%p1%c, cub1=^D, cud=^\^B%p1%c, cud1=^B,
|
cub=^\^D%p1%c, cub1=^D, cud=^\^B%p1%c, cud1=^B,
|
||||||
cuf1=^R, cup=^K%p2%{32}%+%c%p1%{32}%+%c,
|
cuf1=^R, cup=^K%p2%{32}%+%c%p1%{32}%+%c,
|
||||||
cuu=^\^A%p1%c, cuu1=^A, dch1=^\^H, dl1=^Z, ed=^V, el=^F,
|
cuu=^\^A%p1%c, cuu1=^A, dch1=^\^H, dl1=^Z, ed=^V, el=^F,
|
||||||
el1=^\^F, home=^P, hpa=^\^W%p1%{32}%+%c, ich1=^\^X,
|
el1=^\^F, home=^P, hpa=^\^W%p1%{32}%+%c, ich1=^\^X,
|
||||||
il1=^\^Y, ind=^N,
|
il1=^\^Y, ind=^N,
|
||||||
is2=^_^A$<250>^\^R$<50>^^^D^^^T^_^J\040^^^G^^^O^^^Z^]^W^I^R,
|
is2=^_^A$<250>^\^R$<50>^^^D^^^T^_^J\040^^^G^^^O^^^Z^]^W^I^R,
|
||||||
kbs=^H, kcub1=^B, kcud1=^N, kcuf1=^F, kcuu1=^P, khome=^A,
|
kbs=^H, kcub1=^B, kcud1=^N, kcuf1=^F, kcuu1=^P, khome=^A,
|
||||||
ll=^C, mc4=^]^G, mc5=^]^K, nel=\r\n, ri=^O, rmir=, rmso=^^^F,
|
ll=^C, mc4=^]^G, mc5=^]^K, nel=\r\n, ri=^O, rmir=, rmso=^^^F,
|
||||||
smir=, smso=^^^V, vpa=^\^G%p1%{32}%+%c,
|
smir=, smso=^^^V, vpa=^\^G%p1%{32}%+%c,
|
||||||
|
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
|
@ -23,7 +23,7 @@
|
|||||||
//#define VERBOSE 1
|
//#define VERBOSE 1
|
||||||
#include "logmacro.h"
|
#include "logmacro.h"
|
||||||
|
|
||||||
#define C352_LOG_PCM (0)
|
#define C352_LOG_PCM (0)
|
||||||
|
|
||||||
#if C352_LOG_PCM
|
#if C352_LOG_PCM
|
||||||
#include <map>
|
#include <map>
|
||||||
|
@ -6,20 +6,20 @@
|
|||||||
|
|
||||||
/*
|
/*
|
||||||
Changelog, Hiromitsu Shioya 02/05/2002
|
Changelog, Hiromitsu Shioya 02/05/2002
|
||||||
fixed start address decode timing. (sample loop bug.)
|
fixed start address decode timing. (sample loop bug.)
|
||||||
|
|
||||||
Changelog, Mish, August 1999:
|
Changelog, Mish, August 1999:
|
||||||
Removed interface support for different memory regions per channel.
|
Removed interface support for different memory regions per channel.
|
||||||
Removed interface support for differing channel volume.
|
Removed interface support for differing channel volume.
|
||||||
|
|
||||||
Added bankswitching.
|
Added bankswitching.
|
||||||
Added support for multiple chips.
|
Added support for multiple chips.
|
||||||
|
|
||||||
(NB: Should different memory regions per channel be needed, the bankswitching function can set this up).
|
(NB: Should different memory regions per channel be needed, the bankswitching function can set this up).
|
||||||
|
|
||||||
Chanelog, Nicola, August 1999:
|
Chanelog, Nicola, August 1999:
|
||||||
Added Support for the k007232_VOL() macro.
|
Added Support for the k007232_VOL() macro.
|
||||||
Added external port callback, and functions to set the volume of the channels
|
Added external port callback, and functions to set the volume of the channels
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
@ -27,8 +27,8 @@
|
|||||||
#include "k007232.h"
|
#include "k007232.h"
|
||||||
#include "wavwrite.h"
|
#include "wavwrite.h"
|
||||||
|
|
||||||
#define K007232_LOG_PCM (0)
|
#define K007232_LOG_PCM (0)
|
||||||
#define BASE_SHIFT (12)
|
#define BASE_SHIFT (12)
|
||||||
|
|
||||||
DEFINE_DEVICE_TYPE(K007232, k007232_device, "k007232", "K007232 PCM Controller")
|
DEFINE_DEVICE_TYPE(K007232, k007232_device, "k007232", "K007232 PCM Controller")
|
||||||
|
|
||||||
|
@ -5,7 +5,7 @@
|
|||||||
|
|
||||||
#pragma once
|
#pragma once
|
||||||
|
|
||||||
#define MULTIPCM_LOG_SAMPLES 0
|
#define MULTIPCM_LOG_SAMPLES 0
|
||||||
|
|
||||||
#if MULTIPCM_LOG_SAMPLES
|
#if MULTIPCM_LOG_SAMPLES
|
||||||
#include <map>
|
#include <map>
|
||||||
|
@ -37,7 +37,7 @@
|
|||||||
#include "bt45x.h"
|
#include "bt45x.h"
|
||||||
|
|
||||||
#define LOG_READS (1U << 0)
|
#define LOG_READS (1U << 0)
|
||||||
#define LOG_WRITES (1U << 1)
|
#define LOG_WRITES (1U << 1)
|
||||||
|
|
||||||
#define VERBOSE (0)
|
#define VERBOSE (0)
|
||||||
|
|
||||||
|
@ -19,7 +19,7 @@
|
|||||||
DEFINE_DEVICE_TYPE(PPU_VT03, ppu_vt03_device, "ppu_vt03", "VT03 PPU (NTSC)")
|
DEFINE_DEVICE_TYPE(PPU_VT03, ppu_vt03_device, "ppu_vt03", "VT03 PPU (NTSC)")
|
||||||
DEFINE_DEVICE_TYPE(PPU_VT03PAL, ppu_vt03pal_device, "ppu_vt03pal", "VT03 PPU (PAL)")
|
DEFINE_DEVICE_TYPE(PPU_VT03PAL, ppu_vt03pal_device, "ppu_vt03pal", "VT03 PPU (PAL)")
|
||||||
|
|
||||||
ppu_vt03_device::ppu_vt03_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
|
ppu_vt03_device::ppu_vt03_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
|
||||||
ppu2c0x_device(mconfig, type, tag, owner, clock),
|
ppu2c0x_device(mconfig, type, tag, owner, clock),
|
||||||
m_is_pal(false),
|
m_is_pal(false),
|
||||||
m_is_50hz(false),
|
m_is_50hz(false),
|
||||||
|
@ -1611,13 +1611,13 @@ uint8_t snes_ppu_device::read_object( uint16_t address )
|
|||||||
{
|
{
|
||||||
uint8_t n = (address & 0x1f) << 2;
|
uint8_t n = (address & 0x1f) << 2;
|
||||||
return (BIT(m_objects[n + 0].x, 8) << 0) |
|
return (BIT(m_objects[n + 0].x, 8) << 0) |
|
||||||
(BIT(m_objects[n + 1].x, 8) << 2) |
|
(BIT(m_objects[n + 1].x, 8) << 2) |
|
||||||
(BIT(m_objects[n + 2].x, 8) << 4) |
|
(BIT(m_objects[n + 2].x, 8) << 4) |
|
||||||
(BIT(m_objects[n + 3].x, 8) << 6) |
|
(BIT(m_objects[n + 3].x, 8) << 6) |
|
||||||
(m_objects[n + 0].size << 1) |
|
(m_objects[n + 0].size << 1) |
|
||||||
(m_objects[n + 1].size << 3) |
|
(m_objects[n + 1].size << 3) |
|
||||||
(m_objects[n + 2].size << 5) |
|
(m_objects[n + 2].size << 5) |
|
||||||
(m_objects[n + 3].size << 7);
|
(m_objects[n + 3].size << 7);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1746,7 +1746,7 @@ uint16_t snes_ppu_device::direct_color(uint16_t palette, uint16_t group)
|
|||||||
|
|
||||||
void snes_ppu_device::set_current_vert(uint16_t value)
|
void snes_ppu_device::set_current_vert(uint16_t value)
|
||||||
{
|
{
|
||||||
m_beam.current_vert = value;
|
m_beam.current_vert = value;
|
||||||
}
|
}
|
||||||
|
|
||||||
void snes_ppu_device::cache_background()
|
void snes_ppu_device::cache_background()
|
||||||
|
@ -73,7 +73,7 @@ public:
|
|||||||
m_interlace = 1;
|
m_interlace = 1;
|
||||||
m_oam.interlace = 0;
|
m_oam.interlace = 0;
|
||||||
}
|
}
|
||||||
void set_current_vert(uint16_t value);
|
void set_current_vert(uint16_t value);
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
/* offset-per-tile modes */
|
/* offset-per-tile modes */
|
||||||
|
@ -597,7 +597,7 @@ screen_device::screen_device(const machine_config &mconfig, const char *tag, dev
|
|||||||
|
|
||||||
screen_device::~screen_device()
|
screen_device::~screen_device()
|
||||||
{
|
{
|
||||||
destroy_scan_bitmaps();
|
destroy_scan_bitmaps();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -608,21 +608,21 @@ screen_device::~screen_device()
|
|||||||
|
|
||||||
void screen_device::destroy_scan_bitmaps()
|
void screen_device::destroy_scan_bitmaps()
|
||||||
{
|
{
|
||||||
if (m_video_attributes & VIDEO_VARIABLE_WIDTH)
|
if (m_video_attributes & VIDEO_VARIABLE_WIDTH)
|
||||||
{
|
{
|
||||||
const bool screen16 = !m_screen_update_ind16.isnull();
|
const bool screen16 = !m_screen_update_ind16.isnull();
|
||||||
for (int j = 0; j < 2; j++)
|
for (int j = 0; j < 2; j++)
|
||||||
{
|
{
|
||||||
for (bitmap_t* bitmap : m_scan_bitmaps[j])
|
for (bitmap_t* bitmap : m_scan_bitmaps[j])
|
||||||
{
|
{
|
||||||
if (screen16)
|
if (screen16)
|
||||||
delete (bitmap_ind16*)bitmap;
|
delete (bitmap_ind16*)bitmap;
|
||||||
else
|
else
|
||||||
delete (bitmap_rgb32*)bitmap;
|
delete (bitmap_rgb32*)bitmap;
|
||||||
}
|
}
|
||||||
m_scan_bitmaps[j].clear();
|
m_scan_bitmaps[j].clear();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@ -633,14 +633,14 @@ void screen_device::destroy_scan_bitmaps()
|
|||||||
|
|
||||||
void screen_device::allocate_scan_bitmaps()
|
void screen_device::allocate_scan_bitmaps()
|
||||||
{
|
{
|
||||||
if (m_video_attributes & VIDEO_VARIABLE_WIDTH)
|
if (m_video_attributes & VIDEO_VARIABLE_WIDTH)
|
||||||
{
|
{
|
||||||
const bool screen16 = !m_screen_update_ind16.isnull();
|
const bool screen16 = !m_screen_update_ind16.isnull();
|
||||||
s32 effwidth = std::max(m_max_width, m_visarea.right() + 1);
|
s32 effwidth = std::max(m_max_width, m_visarea.right() + 1);
|
||||||
const s32 old_height = (s32)m_scan_widths.size();
|
const s32 old_height = (s32)m_scan_widths.size();
|
||||||
s32 effheight = std::max(m_height, m_visarea.bottom() + 1);
|
s32 effheight = std::max(m_height, m_visarea.bottom() + 1);
|
||||||
if (old_height < effheight)
|
if (old_height < effheight)
|
||||||
{
|
{
|
||||||
for (int i = old_height; i < effheight; i++)
|
for (int i = old_height; i < effheight; i++)
|
||||||
{
|
{
|
||||||
for (int j = 0; j < 2; j++)
|
for (int j = 0; j < 2; j++)
|
||||||
@ -668,7 +668,7 @@ void screen_device::allocate_scan_bitmaps()
|
|||||||
m_scan_widths.erase(m_scan_widths.begin() + i);
|
m_scan_widths.erase(m_scan_widths.begin() + i);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
//-------------------------------------------------
|
//-------------------------------------------------
|
||||||
@ -1021,8 +1021,8 @@ void screen_device::configure(int width, int height, const rectangle &visarea, a
|
|||||||
m_visarea = visarea;
|
m_visarea = visarea;
|
||||||
|
|
||||||
// reallocate bitmap(s) if necessary
|
// reallocate bitmap(s) if necessary
|
||||||
realloc_screen_bitmaps();
|
realloc_screen_bitmaps();
|
||||||
if (machine().input().code_pressed(KEYCODE_E)) printf("CONFIGURE\n");
|
if (machine().input().code_pressed(KEYCODE_E)) printf("CONFIGURE\n");
|
||||||
|
|
||||||
// compute timing parameters
|
// compute timing parameters
|
||||||
m_frame_period = frame_period;
|
m_frame_period = frame_period;
|
||||||
@ -1094,8 +1094,8 @@ void screen_device::reset_origin(int beamy, int beamx)
|
|||||||
|
|
||||||
void screen_device::update_scan_bitmap_size(int y)
|
void screen_device::update_scan_bitmap_size(int y)
|
||||||
{
|
{
|
||||||
// don't update this line if it exceeds the allocated size, which can happen on initial configuration
|
// don't update this line if it exceeds the allocated size, which can happen on initial configuration
|
||||||
if (y >= m_scan_widths.size())
|
if (y >= m_scan_widths.size())
|
||||||
return;
|
return;
|
||||||
|
|
||||||
// determine effective size to allocate
|
// determine effective size to allocate
|
||||||
@ -1138,7 +1138,7 @@ void screen_device::realloc_screen_bitmaps()
|
|||||||
m_texture[0]->set_bitmap(m_bitmap[0], m_visarea, m_bitmap[0].texformat());
|
m_texture[0]->set_bitmap(m_bitmap[0], m_visarea, m_bitmap[0].texformat());
|
||||||
m_texture[1]->set_bitmap(m_bitmap[1], m_visarea, m_bitmap[1].texformat());
|
m_texture[1]->set_bitmap(m_bitmap[1], m_visarea, m_bitmap[1].texformat());
|
||||||
|
|
||||||
allocate_scan_bitmaps();
|
allocate_scan_bitmaps();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -48,16 +48,16 @@
|
|||||||
|
|
||||||
#include "netlist/nl_setup.h"
|
#include "netlist/nl_setup.h"
|
||||||
|
|
||||||
#define TTL_7442(name, cA, cB, cC, cD) \
|
#define TTL_7442(name, cA, cB, cC, cD) \
|
||||||
NET_REGISTER_DEV(TTL_7442, name) \
|
NET_REGISTER_DEV(TTL_7442, name) \
|
||||||
NET_CONNECT(name, GND, GND) \
|
NET_CONNECT(name, GND, GND) \
|
||||||
NET_CONNECT(name, VCC, VCC) \
|
NET_CONNECT(name, VCC, VCC) \
|
||||||
NET_CONNECT(name, A, cA) \
|
NET_CONNECT(name, A, cA) \
|
||||||
NET_CONNECT(name, B, cB) \
|
NET_CONNECT(name, B, cB) \
|
||||||
NET_CONNECT(name, C, cC) \
|
NET_CONNECT(name, C, cC) \
|
||||||
NET_CONNECT(name, D, cD)
|
NET_CONNECT(name, D, cD)
|
||||||
|
|
||||||
#define TTL_7442_DIP(name) \
|
#define TTL_7442_DIP(name) \
|
||||||
NET_REGISTER_DEV(TTL_7442_DIP, name)
|
NET_REGISTER_DEV(TTL_7442_DIP, name)
|
||||||
|
|
||||||
#endif /* NLD_7442_H_ */
|
#endif /* NLD_7442_H_ */
|
||||||
|
@ -45,8 +45,8 @@
|
|||||||
NET_CONNECT(name, A7, cA7) \
|
NET_CONNECT(name, A7, cA7) \
|
||||||
NET_CONNECT(name, A8, cA8) \
|
NET_CONNECT(name, A8, cA8) \
|
||||||
NET_CONNECT(name, A9, cA9) \
|
NET_CONNECT(name, A9, cA9) \
|
||||||
NET_CONNECT(name, A10, cA10) \
|
NET_CONNECT(name, A10, cA10) \
|
||||||
NET_CONNECT(name, VCC, VCC) \
|
NET_CONNECT(name, VCC, VCC) \
|
||||||
NET_CONNECT(name, GND, GND)
|
NET_CONNECT(name, GND, GND)
|
||||||
|
|
||||||
#define ROM_TMS4800_DIP(name) \
|
#define ROM_TMS4800_DIP(name) \
|
||||||
|
@ -1561,10 +1561,10 @@ namespace netlist
|
|||||||
private:
|
private:
|
||||||
|
|
||||||
void reset();
|
void reset();
|
||||||
nlmempool m_pool; // must be deleted last!
|
nlmempool m_pool; // must be deleted last!
|
||||||
|
|
||||||
pstring m_name;
|
pstring m_name;
|
||||||
unique_pool_ptr<netlist_t> m_netlist;
|
unique_pool_ptr<netlist_t> m_netlist;
|
||||||
plib::unique_ptr<plib::dynlib> m_lib; // external lib needs to be loaded as long as netlist exists
|
plib::unique_ptr<plib::dynlib> m_lib; // external lib needs to be loaded as long as netlist exists
|
||||||
plib::state_manager_t m_state;
|
plib::state_manager_t m_state;
|
||||||
plib::unique_ptr<callbacks_t> m_callbacks;
|
plib::unique_ptr<callbacks_t> m_callbacks;
|
||||||
@ -1694,7 +1694,7 @@ namespace netlist
|
|||||||
template <bool KEEP_STATS>
|
template <bool KEEP_STATS>
|
||||||
void process_queue_stats(netlist_time delta) noexcept;
|
void process_queue_stats(netlist_time delta) noexcept;
|
||||||
|
|
||||||
netlist_state_t & m_state;
|
netlist_state_t & m_state;
|
||||||
devices::NETLIB_NAME(solver) * m_solver;
|
devices::NETLIB_NAME(solver) * m_solver;
|
||||||
|
|
||||||
// mostly rw
|
// mostly rw
|
||||||
|
@ -44,11 +44,11 @@ namespace netlist
|
|||||||
PERRMSGV(MF_UNEXPECTED_NETLIST_END, 0, "Unexpected NETLIST_END")
|
PERRMSGV(MF_UNEXPECTED_NETLIST_END, 0, "Unexpected NETLIST_END")
|
||||||
PERRMSGV(MF_UNEXPECTED_END_OF_FILE, 0, "Unexpected end of file, missing NETLIST_END")
|
PERRMSGV(MF_UNEXPECTED_END_OF_FILE, 0, "Unexpected end of file, missing NETLIST_END")
|
||||||
PERRMSGV(MF_UNEXPECTED_NETLIST_START, 0, "Unexpected NETLIST_START")
|
PERRMSGV(MF_UNEXPECTED_NETLIST_START, 0, "Unexpected NETLIST_START")
|
||||||
PERRMSGV(MF_EXPECTED_IDENTIFIER_GOT_1, 1, "Expected an identifier, but got {1}")
|
PERRMSGV(MF_EXPECTED_IDENTIFIER_GOT_1, 1, "Expected an identifier, but got {1}")
|
||||||
PERRMSGV(MF_EXPECTED_COMMA_OR_RP_1, 1, "Expected comma or right parenthesis but found <{1}>")
|
PERRMSGV(MF_EXPECTED_COMMA_OR_RP_1, 1, "Expected comma or right parenthesis but found <{1}>")
|
||||||
PERRMSGV(MF_DIPPINS_EQUAL_NUMBER_1, 1, "DIPPINS requires equal number of pins to DIPPINS, first pin is {}")
|
PERRMSGV(MF_DIPPINS_EQUAL_NUMBER_1, 1, "DIPPINS requires equal number of pins to DIPPINS, first pin is {}")
|
||||||
PERRMSGV(MF_PARAM_NOT_FP_1, 1, "Parameter value <{1}> not floating point")
|
PERRMSGV(MF_PARAM_NOT_FP_1, 1, "Parameter value <{1}> not floating point")
|
||||||
PERRMSGV(MF_TT_LINE_WITHOUT_HEAD, 0, "TT_LINE found without TT_HEAD")
|
PERRMSGV(MF_TT_LINE_WITHOUT_HEAD, 0, "TT_LINE found without TT_HEAD")
|
||||||
|
|
||||||
// nl_setup.cpp
|
// nl_setup.cpp
|
||||||
|
|
||||||
|
@ -448,7 +448,7 @@ namespace netlist
|
|||||||
devices::nld_netlistparams *m_netlist_params;
|
devices::nld_netlistparams *m_netlist_params;
|
||||||
std::unordered_map<pstring, param_ref_t> m_params;
|
std::unordered_map<pstring, param_ref_t> m_params;
|
||||||
std::unordered_map<detail::core_terminal_t *,
|
std::unordered_map<detail::core_terminal_t *,
|
||||||
devices::nld_base_proxy *> m_proxies;
|
devices::nld_base_proxy *> m_proxies;
|
||||||
|
|
||||||
unsigned m_proxy_cnt;
|
unsigned m_proxy_cnt;
|
||||||
};
|
};
|
||||||
|
@ -13,10 +13,10 @@
|
|||||||
|
|
||||||
#include <exception>
|
#include <exception>
|
||||||
|
|
||||||
#define passert_always(expr) \
|
#define passert_always(expr) \
|
||||||
((expr) ? static_cast<void>(0) : plib::passert_fail (#expr, __FILE__, __LINE__, nullptr))
|
((expr) ? static_cast<void>(0) : plib::passert_fail (#expr, __FILE__, __LINE__, nullptr))
|
||||||
|
|
||||||
#define passert_always_msg(expr, msg) \
|
#define passert_always_msg(expr, msg) \
|
||||||
((expr) ? static_cast<void>(0) : plib::passert_fail (#expr, __FILE__, __LINE__, msg))
|
((expr) ? static_cast<void>(0) : plib::passert_fail (#expr, __FILE__, __LINE__, msg))
|
||||||
|
|
||||||
namespace plib {
|
namespace plib {
|
||||||
|
@ -1423,9 +1423,9 @@ WRITE8_MEMBER( _8080bw_state::darthvdr_08_w )
|
|||||||
#define CANE_SND_EN NODE_05
|
#define CANE_SND_EN NODE_05
|
||||||
|
|
||||||
/* Nodes - Adjusters */
|
/* Nodes - Adjusters */
|
||||||
#define CANE_VR1 NODE_07 // Gain for 76477
|
#define CANE_VR1 NODE_07 // Gain for 76477
|
||||||
#define CANE_VR2 NODE_08 // VR attached to the output of the TOS
|
#define CANE_VR2 NODE_08 // VR attached to the output of the TOS
|
||||||
#define CANE_VR3 NODE_09 // VR for SFX generated by the 555
|
#define CANE_VR3 NODE_09 // VR for SFX generated by the 555
|
||||||
|
|
||||||
/* Nodes - sn76477 Sounds */
|
/* Nodes - sn76477 Sounds */
|
||||||
#define CANE_EXP_STREAM NODE_03
|
#define CANE_EXP_STREAM NODE_03
|
||||||
@ -1512,11 +1512,11 @@ void cane_audio_device::device_start()
|
|||||||
void cane_audio_device::sh_port_1_w(u8 data)
|
void cane_audio_device::sh_port_1_w(u8 data)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
bit 0 - SX0 - Sound enable on mixer
|
bit 0 - SX0 - Sound enable on mixer
|
||||||
bit 1 - SX1 - SN76477 - Mixer select C - pin 27
|
bit 1 - SX1 - SN76477 - Mixer select C - pin 27
|
||||||
bit 2 - SX2 - SN76477 - Mixer select A - pin 26
|
bit 2 - SX2 - SN76477 - Mixer select A - pin 26
|
||||||
bit 3 - SX3 - SN76477 - Mixer select B - pin 25
|
bit 3 - SX3 - SN76477 - Mixer select B - pin 25
|
||||||
bit 4 - SX4 - NE555 - Trigger (Step, high output level for 1.1*RC = 1.1*100K*0.47u = 51.7 ms)
|
bit 4 - SX4 - NE555 - Trigger (Step, high output level for 1.1*RC = 1.1*100K*0.47u = 51.7 ms)
|
||||||
*/
|
*/
|
||||||
|
|
||||||
m_discrete->write(CANE_SND_EN, data & 0x01); // BIT(data, 0) - bit 0 - SX0 - Sound enable on mixer
|
m_discrete->write(CANE_SND_EN, data & 0x01); // BIT(data, 0) - bit 0 - SX0 - Sound enable on mixer
|
||||||
@ -1609,24 +1609,24 @@ DISCRETE_SOUND_START(cane_discrete)
|
|||||||
DISCRETE_ADJUSTMENT(CANE_VR3, 0, 0.33*60000, DISC_LINADJ, "VR3") // VR for SFX generated by the 555
|
DISCRETE_ADJUSTMENT(CANE_VR3, 0, 0.33*60000, DISC_LINADJ, "VR3") // VR for SFX generated by the 555
|
||||||
|
|
||||||
/************************************************/
|
/************************************************/
|
||||||
/* From 555 */
|
/* From 555 */
|
||||||
/************************************************/
|
/************************************************/
|
||||||
/* TODO: find real noise freq and amplitude */
|
/* TODO: find real noise freq and amplitude */
|
||||||
/* width was simulated with ltspice using Claybuster schematic as a source and it's value is about 51ms */
|
/* width was simulated with ltspice using Claybuster schematic as a source and it's value is about 51ms */
|
||||||
DISCRETE_NOISE(CANE_76477_PIN6,
|
DISCRETE_NOISE(CANE_76477_PIN6,
|
||||||
1, /* ENAB */
|
1, /* ENAB */
|
||||||
1280, /* FREQ - Guessed */
|
1280, /* FREQ - Guessed */
|
||||||
1, /* AMP */
|
1, /* AMP */
|
||||||
0) /* BIAS - fake AC is fine*/
|
0) /* BIAS - fake AC is fine*/
|
||||||
DISCRETE_CLAMP(CANE_555_CLAMPED,
|
DISCRETE_CLAMP(CANE_555_CLAMPED,
|
||||||
CANE_76477_PIN6, /* input node */
|
CANE_76477_PIN6, /* input node */
|
||||||
0.0, /* minimum */
|
0.0, /* minimum */
|
||||||
5.0) /* maximum */
|
5.0) /* maximum */
|
||||||
DISCRETE_ONESHOT(CANE_555_ONESHOT,
|
DISCRETE_ONESHOT(CANE_555_ONESHOT,
|
||||||
CANE_555_EN, /* trigger node */
|
CANE_555_EN, /* trigger node */
|
||||||
1, /* amplitude node or static value */
|
1, /* amplitude node or static value */
|
||||||
0.05, /* width (in seconds) node or static value - 50 ms*/
|
0.05, /* width (in seconds) node or static value - 50 ms*/
|
||||||
DISC_ONESHOT_FEDGE | DISC_ONESHOT_RETRIG) /* type of oneshot static value */
|
DISC_ONESHOT_FEDGE | DISC_ONESHOT_RETRIG) /* type of oneshot static value */
|
||||||
|
|
||||||
DISCRETE_MULTIPLY(CANE_TMP_SND, CANE_555_CLAMPED, CANE_555_ONESHOT)
|
DISCRETE_MULTIPLY(CANE_TMP_SND, CANE_555_CLAMPED, CANE_555_ONESHOT)
|
||||||
DISCRETE_MULTIPLY(CANE_SFX_SND, CANE_TMP_SND, CANE_VR3)
|
DISCRETE_MULTIPLY(CANE_SFX_SND, CANE_TMP_SND, CANE_VR3)
|
||||||
@ -1663,13 +1663,13 @@ DISCRETE_SOUND_START(cane_discrete)
|
|||||||
|
|
||||||
//LOG
|
//LOG
|
||||||
/*
|
/*
|
||||||
DISCRETE_WAVLOG1(CANE_EXP_STREAM, 1)
|
DISCRETE_WAVLOG1(CANE_EXP_STREAM, 1)
|
||||||
DISCRETE_WAVLOG1(CANE_EXP_SND, 1)
|
DISCRETE_WAVLOG1(CANE_EXP_SND, 1)
|
||||||
DISCRETE_WAVLOG1(CANE_TMP_SND, 1)
|
DISCRETE_WAVLOG1(CANE_TMP_SND, 1)
|
||||||
DISCRETE_WAVLOG1(CANE_SFX_SND, 1)
|
DISCRETE_WAVLOG1(CANE_SFX_SND, 1)
|
||||||
DISCRETE_WAVLOG1(CANE_MUSIC_NOTE, 1)
|
DISCRETE_WAVLOG1(CANE_MUSIC_NOTE, 1)
|
||||||
DISCRETE_WAVLOG1(CANE_MUSIC_SND, 1)
|
DISCRETE_WAVLOG1(CANE_MUSIC_SND, 1)
|
||||||
DISCRETE_WAVLOG1(CANE_SOUND_OUT, 1)
|
DISCRETE_WAVLOG1(CANE_SOUND_OUT, 1)
|
||||||
*/
|
*/
|
||||||
DISCRETE_SOUND_END
|
DISCRETE_SOUND_END
|
||||||
|
|
||||||
|
@ -3569,20 +3569,20 @@ void _8080bw_state::init_invmulti()
|
|||||||
/* */
|
/* */
|
||||||
/*******************************************************/
|
/*******************************************************/
|
||||||
/***********************************************************************************************************************************
|
/***********************************************************************************************************************************
|
||||||
This game was never released by Model Racing to the public.
|
This game was never released by Model Racing to the public.
|
||||||
|
|
||||||
The assembler source files for this game were extracted from the original floppy disks used by the former Model Racing developer
|
The assembler source files for this game were extracted from the original floppy disks used by the former Model Racing developer
|
||||||
Adolfo Melilli (adolfo@melilli.com).
|
Adolfo Melilli (adolfo@melilli.com).
|
||||||
Those disks were retrieved by Alessandro Bolgia (xadhoom76@gmail.com) and Lorenzo Fongaro (lorenzo.fongaro@virgilio.it) and
|
Those disks were retrieved by Alessandro Bolgia (xadhoom76@gmail.com) and Lorenzo Fongaro (lorenzo.fongaro@virgilio.it) and
|
||||||
dumped by Piero Andreini (pieroandreini@gmail.com) using KryoFlux hardware and software.
|
dumped by Piero Andreini (pieroandreini@gmail.com) using KryoFlux hardware and software.
|
||||||
Subsequently Jean Paul Piccato (j2pguard-spam@yahoo.com) mounted the images and compiled the source files, managed to set up a
|
Subsequently Jean Paul Piccato (j2pguard-spam@yahoo.com) mounted the images and compiled the source files, managed to set up a
|
||||||
romset and wrote a MAME driver that aims to reproduce in the most faithful way the work of Melilli at Model Racing in late '70s.
|
romset and wrote a MAME driver that aims to reproduce in the most faithful way the work of Melilli at Model Racing in late '70s.
|
||||||
|
|
||||||
The game driver is not based on hardware inspection and is solely derived from assumptions I've made looking at the assembler
|
The game driver is not based on hardware inspection and is solely derived from assumptions I've made looking at the assembler
|
||||||
code and comments written into the source files of the game. Several of those hypotheses came following the directions of
|
code and comments written into the source files of the game. Several of those hypotheses came following the directions of
|
||||||
previous yet contemporary Model Racing works (Eg: Claybuster) and were confirmed by Melilli himself.
|
previous yet contemporary Model Racing works (Eg: Claybuster) and were confirmed by Melilli himself.
|
||||||
|
|
||||||
Being unreleased this game lacks an official name, thus the name used in the source files was used instead.
|
Being unreleased this game lacks an official name, thus the name used in the source files was used instead.
|
||||||
|
|
||||||
***********************************************************************************************************************************/
|
***********************************************************************************************************************************/
|
||||||
void cane_state::cane_map(address_map &map)
|
void cane_state::cane_map(address_map &map)
|
||||||
@ -3594,99 +3594,99 @@ void cane_state::cane_map(address_map &map)
|
|||||||
void cane_state::cane_io_map(address_map &map)
|
void cane_state::cane_io_map(address_map &map)
|
||||||
{
|
{
|
||||||
/*********************************************************************************************************************************
|
/*********************************************************************************************************************************
|
||||||
-----------
|
-----------
|
||||||
I/O mapping
|
I/O mapping
|
||||||
-----------
|
-----------
|
||||||
out:
|
out:
|
||||||
$00 - Unknown - Not yet emulated
|
$00 - Unknown - Not yet emulated
|
||||||
$01 - Hardware shift register - Shift count
|
$01 - Hardware shift register - Shift count
|
||||||
$02 - Hardware shift register - Shift data
|
$02 - Hardware shift register - Shift data
|
||||||
$03 - Audio sub-system - D0->sx0, D1->sx1, D2->sx2, D3->sx3, D4->sx4, D5-D7 unused
|
$03 - Audio sub-system - D0->sx0, D1->sx1, D2->sx2, D3->sx3, D4->sx4, D5-D7 unused
|
||||||
sx0 mute/unmute all
|
sx0 mute/unmute all
|
||||||
sx1,sx2,sx3 routed to 76477 mixer select
|
sx1,sx2,sx3 routed to 76477 mixer select
|
||||||
sx4 routed to 555 one-shot trigger
|
sx4 routed to 555 one-shot trigger
|
||||||
$04 - Reset watchdog timer
|
$04 - Reset watchdog timer
|
||||||
$05 - Audio TOS
|
$05 - Audio TOS
|
||||||
|
|
||||||
in:
|
in:
|
||||||
$01 - CPO / coin input port
|
$01 - CPO / coin input port
|
||||||
$03 - Hardware shift register - Shift result
|
$03 - Hardware shift register - Shift result
|
||||||
|
|
||||||
=================================================================================================================
|
=================================================================================================================
|
||||||
------------
|
------------
|
||||||
-- OUT 0 --
|
-- OUT 0 --
|
||||||
Source file: CANE1.ED - Referenced only once in code, in the "rifle routine" (ROUTINE FUCILE)
|
Source file: CANE1.ED - Referenced only once in code, in the "rifle routine" (ROUTINE FUCILE)
|
||||||
|
|
||||||
> ;ROUTINE FUCILE
|
> ;ROUTINE FUCILE
|
||||||
> CALL SPARO
|
> CALL SPARO
|
||||||
> OUT 0
|
> OUT 0
|
||||||
|
|
||||||
------------
|
------------
|
||||||
-- OUT 1 --
|
-- OUT 1 --
|
||||||
Source files: CANE2.ED, MIRINO.ED
|
Source files: CANE2.ED, MIRINO.ED
|
||||||
|
|
||||||
Defined in CANE2.ED
|
Defined in CANE2.ED
|
||||||
|
|
||||||
> PRMTR EQU 1
|
> PRMTR EQU 1
|
||||||
|
|
||||||
and referenced multiple times in CANE2.ED and MIRINO.ED. Eg:
|
and referenced multiple times in CANE2.ED and MIRINO.ED. Eg:
|
||||||
|
|
||||||
> ;PER RISPETTARE POS ORIZZONT. UCCELLO
|
> ;PER RISPETTARE POS ORIZZONT. UCCELLO
|
||||||
> LXI D,TPADEL
|
> LXI D,TPADEL
|
||||||
> XRA A
|
> XRA A
|
||||||
> OUT PRMTR
|
> OUT PRMTR
|
||||||
|
|
||||||
------------
|
------------
|
||||||
-- OUT 2 --
|
-- OUT 2 --
|
||||||
Source files: CANE1.ED, CANE2.ED, MIRINO.ED
|
Source files: CANE1.ED, CANE2.ED, MIRINO.ED
|
||||||
|
|
||||||
Defined in CANE2.ED
|
Defined in CANE2.ED
|
||||||
|
|
||||||
> DATO EQU 2
|
> DATO EQU 2
|
||||||
|
|
||||||
and referenced multiple times in CANE1.ED and MIRINO.ED. Eg:
|
and referenced multiple times in CANE1.ED and MIRINO.ED. Eg:
|
||||||
|
|
||||||
> ZANZ: XRA A
|
> ZANZ: XRA A
|
||||||
> OUT DATO
|
> OUT DATO
|
||||||
|
|
||||||
------------
|
------------
|
||||||
-- OUT 3 --
|
-- OUT 3 --
|
||||||
Source file: CANE2.ED
|
Source file: CANE2.ED
|
||||||
|
|
||||||
The access to port 3 is mediated by the routines SETP3 and RESP3 defined in CANE2.ED
|
The access to port 3 is mediated by the routines SETP3 and RESP3 defined in CANE2.ED
|
||||||
SETP3 -- Port 3 = Port 3 | A
|
SETP3 -- Port 3 = Port 3 | A
|
||||||
|
|
||||||
> SETP3:
|
> SETP3:
|
||||||
> ;SETTA I BITS CONTEN IN REG A NELLA PORTA 3
|
> ;SETTA I BITS CONTEN IN REG A NELLA PORTA 3
|
||||||
|
|
||||||
RESP3 -- Port 3 = Port 3 & A
|
RESP3 -- Port 3 = Port 3 & A
|
||||||
|
|
||||||
> RESP3:
|
> RESP3:
|
||||||
> ;IL CONTRARIO DI SETP3
|
> ;IL CONTRARIO DI SETP3
|
||||||
|
|
||||||
and referenced multiple times in CANE2.ED. Eg:
|
and referenced multiple times in CANE2.ED. Eg:
|
||||||
|
|
||||||
> ;SPENGO IL VOLO UCCELLI
|
> ;SPENGO IL VOLO UCCELLI
|
||||||
> MVI A,0FEH
|
> MVI A,0FEH
|
||||||
> CALL SETP3
|
> CALL SETP3
|
||||||
|
|
||||||
------------
|
------------
|
||||||
-- OUT 4 --
|
-- OUT 4 --
|
||||||
Source file: CANE1.ED, CANE2.ED
|
Source file: CANE1.ED, CANE2.ED
|
||||||
|
|
||||||
Called directly in CANE1.ED
|
Called directly in CANE1.ED
|
||||||
|
|
||||||
> INT8:
|
> INT8:
|
||||||
> OUT 4
|
> OUT 4
|
||||||
> ;PER LAUTORESET
|
> ;PER LAUTORESET
|
||||||
|
|
||||||
Also defined in CANE2.ED
|
Also defined in CANE2.ED
|
||||||
|
|
||||||
> RESET EQU 4
|
> RESET EQU 4
|
||||||
|
|
||||||
and called multiple times in CANE1.ED and CANE2.ED. Eg:
|
and called multiple times in CANE1.ED and CANE2.ED. Eg:
|
||||||
|
|
||||||
> DELAY3: OUT RESET
|
> DELAY3: OUT RESET
|
||||||
|
|
||||||
------------
|
------------
|
||||||
-- OUT 5 --
|
-- OUT 5 --
|
||||||
@ -3697,79 +3697,79 @@ D0-D7 is pushed into a LS273 (Octal D-type Flip-Flop) and its value is used to p
|
|||||||
two, cascaded, LS161 (Synchronous 4-Bit Counters).
|
two, cascaded, LS161 (Synchronous 4-Bit Counters).
|
||||||
The counters drive a J-K Flip-Flop generating a square wave signal driven in frequency by the preloaded value.
|
The counters drive a J-K Flip-Flop generating a square wave signal driven in frequency by the preloaded value.
|
||||||
|
|
||||||
> CANONE:
|
> CANONE:
|
||||||
> ;AZZITTO IL TOS:
|
> ;AZZITTO IL TOS:
|
||||||
> MVI A,255 ; A = 255 ; TIMER spento
|
> MVI A,255 ; A = 255 ; TIMER spento
|
||||||
> OUT 5 ; OUT 5
|
> OUT 5 ; OUT 5
|
||||||
|
|
||||||
The musical notes are defined in a library source file TOS.ED and referenced later by the source files, eg. in CANE2.ED:
|
The musical notes are defined in a library source file TOS.ED and referenced later by the source files, eg. in CANE2.ED:
|
||||||
> CARICA: DB RE,FA,FA,FA,FA,PAU
|
> CARICA: DB RE,FA,FA,FA,FA,PAU
|
||||||
> DB RE,FA,FA,FA,FA,PAU
|
> DB RE,FA,FA,FA,FA,PAU
|
||||||
> DB RE,FA,PAU,RE,FA,PAU
|
> DB RE,FA,PAU,RE,FA,PAU
|
||||||
> DB RE,FA,FA,FA,FA,PAU
|
> DB RE,FA,FA,FA,FA,PAU
|
||||||
> DB FINALE
|
> DB FINALE
|
||||||
> TABSTR: NOP
|
> TABSTR: NOP
|
||||||
> LULUP: DB DO,RE,MI,FA,SOL,LA,SI,DO2
|
> LULUP: DB DO,RE,MI,FA,SOL,LA,SI,DO2
|
||||||
> DB FINALE
|
> DB FINALE
|
||||||
|
|
||||||
> CIPCIP: DB 220,215,210,205,200,FINALE
|
> CIPCIP: DB 220,215,210,205,200,FINALE
|
||||||
|
|
||||||
The notes are defined in TOS.ED:
|
The notes are defined in TOS.ED:
|
||||||
> ; SI PARTE DA UNA FREQUENZA DI CLOCK DI 1 MHZ CIRCA,QUESTA FREQUENZA DIVISA)
|
> ; SI PARTE DA UNA FREQUENZA DI CLOCK DI 1 MHZ CIRCA,QUESTA FREQUENZA DIVISA)
|
||||||
> ; PER UNA SERIE DI PARAMETRI ATTRAVERSO DEI DIVISORI PROGRAMMABILI FORNISCE
|
> ; PER UNA SERIE DI PARAMETRI ATTRAVERSO DEI DIVISORI PROGRAMMABILI FORNISCE
|
||||||
> ; ALL'USCITA DI QUESTI I DODICI SEMITONI DELLA SCALA CROMATICA
|
> ; ALL'USCITA DI QUESTI I DODICI SEMITONI DELLA SCALA CROMATICA
|
||||||
|
|
||||||
Name - Counter - Aprox. frequency
|
Name - Counter - Aprox. frequency
|
||||||
DO 16 - 1000/(255-16) = 4.18 KHz
|
DO 16 - 1000/(255-16) = 4.18 KHz
|
||||||
DOD 30 - 1000/(255-30) = 4.44 KHz
|
DOD 30 - 1000/(255-30) = 4.44 KHz
|
||||||
RE 43 - 1000/(255-43) = 4.72 KHz
|
RE 43 - 1000/(255-43) = 4.72 KHz
|
||||||
RED 55 - 1000/(255-55) = 5 KHz
|
RED 55 - 1000/(255-55) = 5 KHz
|
||||||
MI 66 - 1000/(255-66) = 5.29 KHz
|
MI 66 - 1000/(255-66) = 5.29 KHz
|
||||||
FA 77 - 1000/(255-77) = 5.62 KHz
|
FA 77 - 1000/(255-77) = 5.62 KHz
|
||||||
FAD 87 - 1000/(255-87) = 5.95 KHz
|
FAD 87 - 1000/(255-87) = 5.95 KHz
|
||||||
SOL 96 - 1000/(255-96) = 6.29 KHz
|
SOL 96 - 1000/(255-96) = 6.29 KHz
|
||||||
SOLD 105 - 1000/(255-105) = 6.67 KHz
|
SOLD 105 - 1000/(255-105) = 6.67 KHz
|
||||||
LA 114 - 1000/(255-114) = 7.09 KHz
|
LA 114 - 1000/(255-114) = 7.09 KHz
|
||||||
LAD 122 - 1000/(255-122) = 7.52 KHz
|
LAD 122 - 1000/(255-122) = 7.52 KHz
|
||||||
SI 129 - 1000/(255-129) = 7.94 KHz
|
SI 129 - 1000/(255-129) = 7.94 KHz
|
||||||
|
|
||||||
DO2 136 - 1000/(255-136) = 8.4 KHz
|
DO2 136 - 1000/(255-136) = 8.4 KHz
|
||||||
DOD2 143 - 1000/(255-143) = 8.93 KHz
|
DOD2 143 - 1000/(255-143) = 8.93 KHz
|
||||||
RE2 149.5 - 1000/(255-150) = 9.52 KHz
|
RE2 149.5 - 1000/(255-150) = 9.52 KHz
|
||||||
RED2 155.5 - 1000/(255-156) = 10.1 KHz
|
RED2 155.5 - 1000/(255-156) = 10.1 KHz
|
||||||
MI2 161 - 1000/(255-161) = 10.64 KHz
|
MI2 161 - 1000/(255-161) = 10.64 KHz
|
||||||
FA2 166.5 - 1000/(255-167) = 11.36 KHz
|
FA2 166.5 - 1000/(255-167) = 11.36 KHz
|
||||||
FAD2 171.5 - 1000/(255-172) = 12.05 KHz
|
FAD2 171.5 - 1000/(255-172) = 12.05 KHz
|
||||||
SOL2 176 - 1000/(255-176) = 12.66 KHz
|
SOL2 176 - 1000/(255-176) = 12.66 KHz
|
||||||
SOLD2 180.5 - 1000/(255-181) = 13.51 KHz
|
SOLD2 180.5 - 1000/(255-181) = 13.51 KHz
|
||||||
LA2 185 - 1000/(255-185) = 14.29 KHz
|
LA2 185 - 1000/(255-185) = 14.29 KHz
|
||||||
LAD2 189 - 1000/(255-189) = 15.15 KHz
|
LAD2 189 - 1000/(255-189) = 15.15 KHz
|
||||||
SI2 192.5 - 1000/(255-193) = 16.13 KHz
|
SI2 192.5 - 1000/(255-193) = 16.13 KHz
|
||||||
|
|
||||||
Pause code:
|
Pause code:
|
||||||
PAU EQU 255
|
PAU EQU 255
|
||||||
|
|
||||||
End of note sequence:
|
End of note sequence:
|
||||||
FINALE EQU 254
|
FINALE EQU 254
|
||||||
|
|
||||||
------------
|
------------
|
||||||
-- IN 1 --
|
-- IN 1 --
|
||||||
Source file: CANE2.ED
|
Source file: CANE2.ED
|
||||||
|
|
||||||
Defined in CANE2.ED
|
Defined in CANE2.ED
|
||||||
> PORTAM EQU 1 ;E' LA PORTA DI INPUT DI TUTTI I PULSANTI
|
> PORTAM EQU 1 ;E' LA PORTA DI INPUT DI TUTTI I PULSANTI
|
||||||
|
|
||||||
------------
|
------------
|
||||||
-- IN 3 --
|
-- IN 3 --
|
||||||
Source file: CANE1.ED, CANE2.ED
|
Source file: CANE1.ED, CANE2.ED
|
||||||
Defined in CANE2.ED
|
Defined in CANE2.ED
|
||||||
|
|
||||||
> PRONTO EQU 3
|
> PRONTO EQU 3
|
||||||
|
|
||||||
and referenced in CANE1.ED
|
and referenced in CANE1.ED
|
||||||
|
|
||||||
> OUT LOW DATO
|
> OUT LOW DATO
|
||||||
> IN LOW PRONTO
|
> IN LOW PRONTO
|
||||||
|
|
||||||
**********************************************************************************************************************************/
|
**********************************************************************************************************************************/
|
||||||
map(0x00, 0x00).w(FUNC(cane_state::cane_unknown_port0_w));
|
map(0x00, 0x00).w(FUNC(cane_state::cane_unknown_port0_w));
|
||||||
@ -3785,56 +3785,56 @@ Source file: CANE1.ED, CANE2.ED
|
|||||||
|
|
||||||
static INPUT_PORTS_START( cane )
|
static INPUT_PORTS_START( cane )
|
||||||
/* Source file: CANE2.ED, MIRINO.ED
|
/* Source file: CANE2.ED, MIRINO.ED
|
||||||
Port definition:
|
Port definition:
|
||||||
> PORTAM EQU 1 ;E' LA PORTA DI INPUT DI TUTTI I PULSANTI
|
> PORTAM EQU 1 ;E' LA PORTA DI INPUT DI TUTTI I PULSANTI
|
||||||
|
|
||||||
Bit values:
|
Bit values:
|
||||||
CANE2.ED
|
CANE2.ED
|
||||||
> DITO EQU 80H ;BIT DEL PULSANTE DI SPARO DEL FUCILE
|
> DITO EQU 80H ;BIT DEL PULSANTE DI SPARO DEL FUCILE
|
||||||
|
|
||||||
MIRINO.ED
|
MIRINO.ED
|
||||||
> UPPMIR EQU 20H ;BIT PER MIRINO IN ALTO
|
> UPPMIR EQU 20H ;BIT PER MIRINO IN ALTO
|
||||||
> LOWMIR EQU 40H ;BASSO
|
> LOWMIR EQU 40H ;BASSO
|
||||||
> RIGMIR EQU 8H ;DESTRA
|
> RIGMIR EQU 8H ;DESTRA
|
||||||
> LEFMIR EQU 10H ;SINISTRA
|
> LEFMIR EQU 10H ;SINISTRA
|
||||||
|
|
||||||
Joystick reading routine:
|
Joystick reading routine:
|
||||||
MIRINO.ED
|
MIRINO.ED
|
||||||
> ;ORA LEGGO LA PORTA DELLA CLOCHE
|
> ;ORA LEGGO LA PORTA DELLA CLOCHE
|
||||||
> IN LOW PORTAM
|
> IN LOW PORTAM
|
||||||
> MOV B,A
|
> MOV B,A
|
||||||
> ;A QUESTO PUNTO AGGIORNO LE COORDINATE X E Y A SECONDA DELLO STATO DEI BIT
|
> ;A QUESTO PUNTO AGGIORNO LE COORDINATE X E Y A SECONDA DELLO STATO DEI BIT
|
||||||
> ;DELLA CLOCHE (ATTIVI BASSI)
|
> ;DELLA CLOCHE (ATTIVI BASSI)
|
||||||
> ANI LOWMIR
|
> ANI LOWMIR
|
||||||
> CZ MIRLOW
|
> CZ MIRLOW
|
||||||
> MOV A,B
|
> MOV A,B
|
||||||
> ANI UPPMIR
|
> ANI UPPMIR
|
||||||
> CZ MIRUPP
|
> CZ MIRUPP
|
||||||
> MOV A,B
|
> MOV A,B
|
||||||
> ANI LEFMIR
|
> ANI LEFMIR
|
||||||
> CZ MIRLEF
|
> CZ MIRLEF
|
||||||
> MOV A,B
|
> MOV A,B
|
||||||
> ANI RIGMIR
|
> ANI RIGMIR
|
||||||
> CZ MIRRIG
|
> CZ MIRRIG
|
||||||
|
|
||||||
Shot reading routine:
|
Shot reading routine:
|
||||||
CANE2.ED
|
CANE2.ED
|
||||||
> ;QUI CI VADO SE NESSUNO PREME IL PULSANTE E STO ASPETTANDO UNO SPARO
|
> ;QUI CI VADO SE NESSUNO PREME IL PULSANTE E STO ASPETTANDO UNO SPARO
|
||||||
> ;TEST GRILLETTO
|
> ;TEST GRILLETTO
|
||||||
> IN PORTAM
|
> IN PORTAM
|
||||||
> ANI DITO
|
> ANI DITO
|
||||||
|
|
||||||
Coin reading routine;
|
Coin reading routine;
|
||||||
CANE1.ED
|
CANE1.ED
|
||||||
> ;ACCREDITA
|
> ;ACCREDITA
|
||||||
> SAR9A: IN 1
|
> SAR9A: IN 1
|
||||||
> ANI 4
|
> ANI 4
|
||||||
|
|
||||||
Start game: (Verified by debugging $3C2)
|
Start game: (Verified by debugging $3C2)
|
||||||
CANE1.ED
|
CANE1.ED
|
||||||
> IN 1
|
> IN 1
|
||||||
> ANI 8
|
> ANI 8
|
||||||
> JNZ FONTI
|
> JNZ FONTI
|
||||||
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
@ -3879,21 +3879,21 @@ void cane_state::cane_unknown_port0_w(u8 data)
|
|||||||
/* */
|
/* */
|
||||||
/*******************************************************/
|
/*******************************************************/
|
||||||
/***********************************************************************************************************************************
|
/***********************************************************************************************************************************
|
||||||
This game was never completed and released by Model Racing to the public.
|
This game was never completed and released by Model Racing to the public.
|
||||||
It's in a nearly incomplete form (eg: doesn't have any sound or score routine in the code) and it's barely playable.
|
It's in a nearly incomplete form (eg: doesn't have any sound or score routine in the code) and it's barely playable.
|
||||||
|
|
||||||
The assembler source files for this game were extracted from the original floppy disks used by the former Model Racing developer
|
The assembler source files for this game were extracted from the original floppy disks used by the former Model Racing developer
|
||||||
Adolfo Melilli (adolfo@melilli.com).
|
Adolfo Melilli (adolfo@melilli.com).
|
||||||
Those disks were retrieved by Alessandro Bolgia (xadhoom76@gmail.com) and Lorenzo Fongaro (lorenzo.fongaro@virgilio.it) and
|
Those disks were retrieved by Alessandro Bolgia (xadhoom76@gmail.com) and Lorenzo Fongaro (lorenzo.fongaro@virgilio.it) and
|
||||||
dumped by Piero Andreini (pieroandreini@gmail.com) using KryoFlux hardware and software.
|
dumped by Piero Andreini (pieroandreini@gmail.com) using KryoFlux hardware and software.
|
||||||
Subsequently Jean Paul Piccato (j2pguard-spam@yahoo.com) mounted the images and compiled the source files, managed to set up a
|
Subsequently Jean Paul Piccato (j2pguard-spam@yahoo.com) mounted the images and compiled the source files, managed to set up a
|
||||||
ROMset and wrote a MAME driver that aims to reproduce in the most faithful way the work of Melilli at Model Racing in late '70s.
|
ROMset and wrote a MAME driver that aims to reproduce in the most faithful way the work of Melilli at Model Racing in late '70s.
|
||||||
|
|
||||||
The game driver is not based on hardware inspection and is solely derived from assumptions I've made looking at the assembler
|
The game driver is not based on hardware inspection and is solely derived from assumptions I've made looking at the assembler
|
||||||
code and comments written into the source files of the game. Several of those hypotheses came following the directions of
|
code and comments written into the source files of the game. Several of those hypotheses came following the directions of
|
||||||
previous yet contemporary Model Racing works (Eg: Claybuster) and were confirmed by Melilli himself.
|
previous yet contemporary Model Racing works (Eg: Claybuster) and were confirmed by Melilli himself.
|
||||||
|
|
||||||
Being unreleased this game lacks an official name, thus the name used in the source files was used instead.
|
Being unreleased this game lacks an official name, thus the name used in the source files was used instead.
|
||||||
|
|
||||||
***********************************************************************************************************************************/
|
***********************************************************************************************************************************/
|
||||||
|
|
||||||
|
@ -122,18 +122,18 @@ void alfaskop4110_state::mem_map(address_map &map)
|
|||||||
map(0x8000, 0xefff).ram();
|
map(0x8000, 0xefff).ram();
|
||||||
|
|
||||||
map(0xf600, 0xf6ff).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGNVRAM("nvram_r %04x: %02x\n", offset, 0); return (uint8_t) 0; }),// TODO: Move to MRO board
|
map(0xf600, 0xf6ff).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGNVRAM("nvram_r %04x: %02x\n", offset, 0); return (uint8_t) 0; }),// TODO: Move to MRO board
|
||||||
NAME( [this](offs_t offset, uint8_t data) { LOGNVRAM("nvram_w %04x: %02x\n", offset, data); }));
|
NAME( [this](offs_t offset, uint8_t data) { LOGNVRAM("nvram_w %04x: %02x\n", offset, data); }));
|
||||||
map(0xf7d9, 0xf7d9).mirror(0x06).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGIO("CRTC reg r %04x: %02x\n", offset, 0); return m_crtc->register_r(); }),
|
map(0xf7d9, 0xf7d9).mirror(0x06).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGIO("CRTC reg r %04x: %02x\n", offset, 0); return m_crtc->register_r(); }),
|
||||||
NAME([this](offs_t offset, uint8_t data) { LOGIO("CRTC reg w %04x: %02x\n", offset, data); m_crtc->register_w(data);}));
|
NAME([this](offs_t offset, uint8_t data) { LOGIO("CRTC reg w %04x: %02x\n", offset, data); m_crtc->register_w(data);}));
|
||||||
map(0xf7d8, 0xf7d8).mirror(0x06).lw8(NAME([this](offs_t offset, uint8_t data) { LOGIO("CRTC adr w %04x: %02x\n", offset, data); m_crtc->address_w(data); }));
|
map(0xf7d8, 0xf7d8).mirror(0x06).lw8(NAME([this](offs_t offset, uint8_t data) { LOGIO("CRTC adr w %04x: %02x\n", offset, data); m_crtc->address_w(data); }));
|
||||||
map(0xf7d0, 0xf7d3).mirror(0x04).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGIO("DIA pia_r %04x: %02x\n", offset, 0); return m_diapia->read(offset & 3); }),
|
map(0xf7d0, 0xf7d3).mirror(0x04).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGIO("DIA pia_r %04x: %02x\n", offset, 0); return m_diapia->read(offset & 3); }),
|
||||||
NAME([this](offs_t offset, uint8_t data) { LOGIO("DIA pia_w %04x: %02x\n", offset, data); m_diapia->write(offset & 3, data); }));
|
NAME([this](offs_t offset, uint8_t data) { LOGIO("DIA pia_w %04x: %02x\n", offset, data); m_diapia->write(offset & 3, data); }));
|
||||||
map(0xf7c4, 0xf7c7).mirror(0x00).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGIO("MIC pia_r %04x: %02x\n", offset, 0); return m_micpia->read(offset & 3); }),
|
map(0xf7c4, 0xf7c7).mirror(0x00).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGIO("MIC pia_r %04x: %02x\n", offset, 0); return m_micpia->read(offset & 3); }),
|
||||||
NAME( [this](offs_t offset, uint8_t data) { LOGIO("MIC pia_w %04x: %02x\n", offset, data); m_micpia->write(offset & 3, data); }));
|
NAME( [this](offs_t offset, uint8_t data) { LOGIO("MIC pia_w %04x: %02x\n", offset, data); m_micpia->write(offset & 3, data); }));
|
||||||
map(0xf7c0, 0xf7c1).mirror(0x02).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGIO("KBD acia_r %04x: %02x\n", offset, 0); return m_kbdacia->read(offset & 1); }),
|
map(0xf7c0, 0xf7c1).mirror(0x02).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGIO("KBD acia_r %04x: %02x\n", offset, 0); return m_kbdacia->read(offset & 1); }),
|
||||||
NAME( [this](offs_t offset, uint8_t data) { LOGIO("KBD acia_w %04x: %02x\n", offset, data); m_kbdacia->write(offset & 1, data); }));
|
NAME( [this](offs_t offset, uint8_t data) { LOGIO("KBD acia_w %04x: %02x\n", offset, data); m_kbdacia->write(offset & 1, data); }));
|
||||||
|
|
||||||
map(0xf7fc, 0xf7fc).mirror(0x00).lr8(NAME([this](offs_t offset) -> uint8_t { LOGIO("Address Switch 0-7\n"); return 0; }));
|
map(0xf7fc, 0xf7fc).mirror(0x00).lr8(NAME([this](offs_t offset) -> uint8_t { LOGIO("Address Switch 0-7\n"); return 0; }));
|
||||||
|
|
||||||
map(0xf800, 0xffff).rom().region("roms", 0);
|
map(0xf800, 0xffff).rom().region("roms", 0);
|
||||||
}
|
}
|
||||||
@ -143,11 +143,11 @@ void alfaskop4120_state::mem_map(address_map &map)
|
|||||||
map.unmap_value_high();
|
map.unmap_value_high();
|
||||||
map(0x0000, 0xefff).ram();
|
map(0x0000, 0xefff).ram();
|
||||||
map(0xf600, 0xf6ff).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGNVRAM("nvram_r %04x: %02x\n", offset, 0); return (uint8_t) 0; }), // TODO: Move to MRO board
|
map(0xf600, 0xf6ff).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGNVRAM("nvram_r %04x: %02x\n", offset, 0); return (uint8_t) 0; }), // TODO: Move to MRO board
|
||||||
NAME([this](offs_t offset, uint8_t data) { LOGNVRAM("nvram_w %04x: %02x\n", offset, data); }));
|
NAME([this](offs_t offset, uint8_t data) { LOGNVRAM("nvram_w %04x: %02x\n", offset, data); }));
|
||||||
map(0xf740, 0xf743).mirror(0x0c).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGIO("FDA pia_r %04x: %02x\n", offset, 0); return m_fdapia->read(offset & 3); }),
|
map(0xf740, 0xf743).mirror(0x0c).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGIO("FDA pia_r %04x: %02x\n", offset, 0); return m_fdapia->read(offset & 3); }),
|
||||||
NAME([this](offs_t offset, uint8_t data) { LOGIO("FDA pia_w %04x: %02x\n", offset, data); m_fdapia->write(offset & 3, data); }));
|
NAME([this](offs_t offset, uint8_t data) { LOGIO("FDA pia_w %04x: %02x\n", offset, data); m_fdapia->write(offset & 3, data); }));
|
||||||
map(0xf7c4, 0xf7c7).mirror(0x00).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGIO("MIC pia_r %04x: %02x\n", offset, 0); return m_micpia->read(offset & 3); }),
|
map(0xf7c4, 0xf7c7).mirror(0x00).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGIO("MIC pia_r %04x: %02x\n", offset, 0); return m_micpia->read(offset & 3); }),
|
||||||
NAME([this](offs_t offset, uint8_t data) { LOGIO("MIC pia_w %04x: %02x\n", offset, data); m_micpia->write(offset & 3, data); }));
|
NAME([this](offs_t offset, uint8_t data) { LOGIO("MIC pia_w %04x: %02x\n", offset, data); m_micpia->write(offset & 3, data); }));
|
||||||
map(0xf800, 0xffff).rom().region("roms", 0);
|
map(0xf800, 0xffff).rom().region("roms", 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -156,9 +156,9 @@ void alfaskop4101_state::mem_map(address_map &map)
|
|||||||
map.unmap_value_high();
|
map.unmap_value_high();
|
||||||
map(0x0000, 0xefff).ram();
|
map(0x0000, 0xefff).ram();
|
||||||
map(0xf600, 0xf6ff).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGNVRAM("nvram_r %04x: %02x\n", offset, 0); return (uint8_t) 0; }),
|
map(0xf600, 0xf6ff).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGNVRAM("nvram_r %04x: %02x\n", offset, 0); return (uint8_t) 0; }),
|
||||||
NAME([this](offs_t offset, uint8_t data) { LOGNVRAM("nvram_w %04x: %02x\n", offset, data); }));
|
NAME([this](offs_t offset, uint8_t data) { LOGNVRAM("nvram_w %04x: %02x\n", offset, data); }));
|
||||||
map(0xf7c4, 0xf7c7).mirror(0x00).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGIO("MIC pia_r %04x: %02x\n", offset, 0); return m_micpia->read(offset & 3); }),
|
map(0xf7c4, 0xf7c7).mirror(0x00).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGIO("MIC pia_r %04x: %02x\n", offset, 0); return m_micpia->read(offset & 3); }),
|
||||||
NAME([this](offs_t offset, uint8_t data) { LOGIO("MIC pia_w %04x: %02x\n", offset, data); m_micpia->write(offset & 3, data); }));
|
NAME([this](offs_t offset, uint8_t data) { LOGIO("MIC pia_w %04x: %02x\n", offset, data); m_micpia->write(offset & 3, data); }));
|
||||||
map(0xf800, 0xffff).rom().region("roms", 0);
|
map(0xf800, 0xffff).rom().region("roms", 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -61,10 +61,10 @@
|
|||||||
|
|
||||||
- Dina SG-1000 mode
|
- Dina SG-1000 mode
|
||||||
|
|
||||||
- Bit90:
|
- Bit90:
|
||||||
Add support for memory expansion (documented)
|
Add support for memory expansion (documented)
|
||||||
Add support for printer interface (documented)
|
Add support for printer interface (documented)
|
||||||
Add tape Support
|
Add tape Support
|
||||||
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
@ -175,7 +175,7 @@ void bit90_state::bit90_io_map(address_map &map)
|
|||||||
map(0xc0, 0xc0).mirror(0x1f).r(FUNC(bit90_state::keyboard_r));
|
map(0xc0, 0xc0).mirror(0x1f).r(FUNC(bit90_state::keyboard_r));
|
||||||
map(0xc0, 0xc0).mirror(0x1f).w(FUNC(coleco_state::paddle_on_w));
|
map(0xc0, 0xc0).mirror(0x1f).w(FUNC(coleco_state::paddle_on_w));
|
||||||
map(0xe0, 0xe0).mirror(0x1d).r(FUNC(coleco_state::paddle_1_r));
|
map(0xe0, 0xe0).mirror(0x1d).r(FUNC(coleco_state::paddle_1_r));
|
||||||
map(0xe0, 0xe0).mirror(0x1b).w(FUNC(bit90_state::u32_w)); // bits7-4 for keyscan, (to bcd decoder) and bits1-0 tape out
|
map(0xe0, 0xe0).mirror(0x1b).w(FUNC(bit90_state::u32_w)); // bits7-4 for keyscan, (to bcd decoder) and bits1-0 tape out
|
||||||
map(0xe2, 0xe2).mirror(0x1d).r(FUNC(coleco_state::paddle_2_r)); // also, bit7 is tape read?
|
map(0xe2, 0xe2).mirror(0x1d).r(FUNC(coleco_state::paddle_2_r)); // also, bit7 is tape read?
|
||||||
map(0xe4, 0xe4).mirror(0x1b).w("sn76489a", FUNC(sn76489a_device::write));
|
map(0xe4, 0xe4).mirror(0x1b).w("sn76489a", FUNC(sn76489a_device::write));
|
||||||
|
|
||||||
|
@ -10715,7 +10715,7 @@ ROM_END
|
|||||||
Frequent cause of dead board is u104 (gal/palce20v8) becoming corrupted somehow. Luckily a working unsecured chip was found and dumped :)
|
Frequent cause of dead board is u104 (gal/palce20v8) becoming corrupted somehow. Luckily a working unsecured chip was found and dumped :)
|
||||||
Likely to also work on other similar boards (reference number may vary).
|
Likely to also work on other similar boards (reference number may vary).
|
||||||
|
|
||||||
B/C sets patch pals have different equations but are logically equivalent.
|
B/C sets patch pals have different equations but are logically equivalent.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#define SF2CEMS6_PLD_DEVICES \
|
#define SF2CEMS6_PLD_DEVICES \
|
||||||
@ -13439,22 +13439,22 @@ WRITE16_MEMBER( cps_state::sf2m3_layer_w )
|
|||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
A note reguarding bootlegs:
|
A note reguarding bootlegs:
|
||||||
In order to keep the cps source in some sort of order, the idea is to group similar bootleg hardware into seperate
|
In order to keep the cps source in some sort of order, the idea is to group similar bootleg hardware into seperate
|
||||||
derived classes and source files.
|
derived classes and source files.
|
||||||
|
|
||||||
Rom swaps, hacks etc. (on original Capcom hardware) -> cps1.cpp
|
Rom swaps, hacks etc. (on original Capcom hardware) -> cps1.cpp
|
||||||
Sound: Z80, 2x YM2203, 2x m5205 ("Final Crash" h/w) -> fcrash.cpp
|
Sound: Z80, 2x YM2203, 2x m5205 ("Final Crash" h/w) -> fcrash.cpp
|
||||||
Sound: Z80, 1x YM2151, 2x m5205 -> cps1bl_5205.cpp
|
Sound: Z80, 1x YM2151, 2x m5205 -> cps1bl_5205.cpp
|
||||||
Sound: PIC, 1x M6295 *1 -> cps1bl_pic.cpp
|
Sound: PIC, 1x M6295 *1 -> cps1bl_pic.cpp
|
||||||
Sound: Z80, 1x YM2151, 1x M6295 *2 -> fcrash.cpp (for now...)
|
Sound: Z80, 1x YM2151, 1x M6295 *2 -> fcrash.cpp (for now...)
|
||||||
|
|
||||||
*1 these seem to be only CPS1.5/Q sound games?
|
*1 these seem to be only CPS1.5/Q sound games?
|
||||||
*2 this is original configuration, but non-Capcom (usually single-board) hardware.
|
*2 this is original configuration, but non-Capcom (usually single-board) hardware.
|
||||||
|
|
||||||
|
|
||||||
This file currently contains games in first and last catergories.
|
This file currently contains games in first and last catergories.
|
||||||
Eventually only official/genuine/non-bootleg Capcom-hardware games and those in first catergory will remain here.
|
Eventually only official/genuine/non-bootleg Capcom-hardware games and those in first catergory will remain here.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
@ -2,24 +2,24 @@
|
|||||||
// copyright-holders:David Haywood
|
// copyright-holders:David Haywood
|
||||||
|
|
||||||
/*
|
/*
|
||||||
CPS1 single board bootlegs (thought to be produced by "Playmark")
|
CPS1 single board bootlegs (thought to be produced by "Playmark")
|
||||||
|
|
||||||
sound hardware: Z80, YM2151, 2x oki MSM5205 (instead of oki M6295)
|
sound hardware: Z80, YM2151, 2x oki MSM5205 (instead of oki M6295)
|
||||||
|
|
||||||
Games known to use this h/w:
|
Games known to use this h/w:
|
||||||
Captain Commando 911014 ETC
|
Captain Commando 911014 ETC
|
||||||
Knights of the Round 911127 ETC
|
Knights of the Round 911127 ETC
|
||||||
Street Fighter II: The World Warrior 910204 ETC
|
Street Fighter II: The World Warrior 910204 ETC
|
||||||
Street Fighter II': Champion Edition 920313 ETC * this might be hacked WW (uses WW portraits on character select screen)
|
Street Fighter II': Champion Edition 920313 ETC * this might be hacked WW (uses WW portraits on character select screen)
|
||||||
Street Fighter II': Magic Delta Turbo 920313 ETC
|
Street Fighter II': Magic Delta Turbo 920313 ETC
|
||||||
The King of Dragons ? (No dump)
|
The King of Dragons ? (No dump)
|
||||||
|
|
||||||
Generally the sound quality is quite poor compared to official Capcom hardware (consequence of M6295->2xM5205 conversion).
|
Generally the sound quality is quite poor compared to official Capcom hardware (consequence of M6295->2xM5205 conversion).
|
||||||
Most noticable is missing percussion backing of music tracks and no fade in/out effect.
|
Most noticable is missing percussion backing of music tracks and no fade in/out effect.
|
||||||
Often the 2x M5205 are clocked with a 400KHz xtal (should really be 384KHz) so pitch of samples is slightly out as well.
|
Often the 2x M5205 are clocked with a 400KHz xtal (should really be 384KHz) so pitch of samples is slightly out as well.
|
||||||
The sf2 sets seem to have quite a few missing samples?
|
The sf2 sets seem to have quite a few missing samples?
|
||||||
|
|
||||||
*** see fcrash.cpp for game status ***
|
*** see fcrash.cpp for game status ***
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "emu.h"
|
#include "emu.h"
|
||||||
@ -883,9 +883,9 @@ void captcommb2_state::bootleg_render_sprites( screen_device &screen, bitmap_ind
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* tileno note:
|
/* tileno note:
|
||||||
sets the unused msb for certain tiles eg. middle parts of rocket launcher weapon,
|
sets the unused msb for certain tiles eg. middle parts of rocket launcher weapon,
|
||||||
this means the tile is out of range and therefore transparent,
|
this means the tile is out of range and therefore transparent,
|
||||||
most likely just a bug and the real h/w ignores the unused bit so the effect is not seen.
|
most likely just a bug and the real h/w ignores the unused bit so the effect is not seen.
|
||||||
*/
|
*/
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -893,22 +893,22 @@ void captcommb2_state::bootleg_render_sprites( screen_device &screen, bitmap_ind
|
|||||||
// ************************************************************************* CAPTCOMMB2
|
// ************************************************************************* CAPTCOMMB2
|
||||||
|
|
||||||
/*
|
/*
|
||||||
Captain Commando:
|
Captain Commando:
|
||||||
|
|
||||||
h/w issues compared to original game (captcomm)
|
h/w issues compared to original game (captcomm)
|
||||||
-----------------------------------------------
|
-----------------------------------------------
|
||||||
these are present on the real board so are not emulation issues:
|
these are present on the real board so are not emulation issues:
|
||||||
|
|
||||||
* End sequence row scroll effect doesn't work.
|
* End sequence row scroll effect doesn't work.
|
||||||
* Capcom copyright text missing on title screen, deliberately shifted down out of visible area by bootleggers.
|
* Capcom copyright text missing on title screen, deliberately shifted down out of visible area by bootleggers.
|
||||||
* Capcom logo missing from end sequence, as above.
|
* Capcom logo missing from end sequence, as above.
|
||||||
* Sprite flickering effects eg. when character has invincibility, look a little different to original.
|
* Sprite flickering effects eg. when character has invincibility, look a little different to original.
|
||||||
* Certain static sprites wobble vertically just a pixel or two eg. manhole covers, breakable oil drums etc.
|
* Certain static sprites wobble vertically just a pixel or two eg. manhole covers, breakable oil drums etc.
|
||||||
|
|
||||||
these are present on the real board but are unintentionally "fixed" in emulation:
|
these are present on the real board but are unintentionally "fixed" in emulation:
|
||||||
|
|
||||||
* All '0' characters are missing in test menu eg. sound test, input test etc.
|
* All '0' characters are missing in test menu eg. sound test, input test etc.
|
||||||
* Wrong tile displayed when character select count-down timer reaches zero (superscript '1' with white bar underneath)
|
* Wrong tile displayed when character select count-down timer reaches zero (superscript '1' with white bar underneath)
|
||||||
*/
|
*/
|
||||||
ROM_START( captcommb2 )
|
ROM_START( captcommb2 )
|
||||||
ROM_REGION( CODE_SIZE, "maincpu", 0 ) // = captcommr1 + additional code mapped on top
|
ROM_REGION( CODE_SIZE, "maincpu", 0 ) // = captcommr1 + additional code mapped on top
|
||||||
@ -962,39 +962,39 @@ ROM_END
|
|||||||
// ************************************************************************* KNIGHTSB, KNIGHTSB3
|
// ************************************************************************* KNIGHTSB, KNIGHTSB3
|
||||||
|
|
||||||
/*
|
/*
|
||||||
CPU
|
CPU
|
||||||
1x MC68000P12 ic65 main
|
1x MC68000P12 ic65 main
|
||||||
1x Z0840006PSC ic1 sound
|
1x Z0840006PSC ic1 sound
|
||||||
1x YM2151 ic29 sound
|
1x YM2151 ic29 sound
|
||||||
1x YM3012 ic30 sound
|
1x YM3012 ic30 sound
|
||||||
2x LM324 ic15,ic31 sound
|
2x LM324 ic15,ic31 sound
|
||||||
2x M5205 ic184,ic185 sound
|
2x M5205 ic184,ic185 sound
|
||||||
1x TDA2003 ic14 sound
|
1x TDA2003 ic14 sound
|
||||||
1x oscillator 24.000000MHz (close to main)
|
1x oscillator 24.000000MHz (close to main)
|
||||||
1x oscillator 29.821000MHz (close to sound)
|
1x oscillator 29.821000MHz (close to sound)
|
||||||
|
|
||||||
ROMs
|
ROMs
|
||||||
5x M27C2001 1,2,3,4,5 dumped
|
5x M27C2001 1,2,3,4,5 dumped
|
||||||
4x mask ROM KA,KB,KC,KD not dumped
|
4x mask ROM KA,KB,KC,KD not dumped
|
||||||
|
|
||||||
RAMs
|
RAMs
|
||||||
4x KM62256ALP ic112,ic113,ic168,ic170
|
4x KM62256ALP ic112,ic113,ic168,ic170
|
||||||
1x SYC6116L ic24
|
1x SYC6116L ic24
|
||||||
1x MCM2018AN ic7,ic8,ic51,ic56,ic70,ic71,ic77,ic78
|
1x MCM2018AN ic7,ic8,ic51,ic56,ic70,ic71,ic77,ic78
|
||||||
|
|
||||||
PLDs
|
PLDs
|
||||||
1x TPC1020AFN ic116 read protected
|
1x TPC1020AFN ic116 read protected
|
||||||
3x GAL20V8A ic120,ic121,ic169 read protected
|
3x GAL20V8A ic120,ic121,ic169 read protected
|
||||||
3x GAL16V8A ic7,ic72,ic80 read protected
|
3x GAL16V8A ic7,ic72,ic80 read protected
|
||||||
|
|
||||||
Note
|
Note
|
||||||
1x JAMMA edge connector
|
1x JAMMA edge connector
|
||||||
2x 10 legs connector
|
2x 10 legs connector
|
||||||
1x trimmer (volume)
|
1x trimmer (volume)
|
||||||
3x 8x2 switches DIP
|
3x 8x2 switches DIP
|
||||||
|
|
||||||
FIXME - graphics ROMs are wrong, copied from the other version
|
FIXME - graphics ROMs are wrong, copied from the other version
|
||||||
ROMs missing are KA.IC91 KB.IC92 KC.IC93 KD.IC94
|
ROMs missing are KA.IC91 KB.IC92 KC.IC93 KD.IC94
|
||||||
*/
|
*/
|
||||||
ROM_START( knightsb )
|
ROM_START( knightsb )
|
||||||
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
|
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
|
||||||
@ -1019,17 +1019,17 @@ ROM_START( knightsb )
|
|||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
/*
|
/*
|
||||||
Knights of the Round
|
Knights of the Round
|
||||||
pcb marking: ORD 92032
|
pcb marking: ORD 92032
|
||||||
Very similar to knightsb set:
|
Very similar to knightsb set:
|
||||||
maincpu roms are just 1 byte different, vector 1 (stack pointer init) is ff80d6 instead of ff81d6
|
maincpu roms are just 1 byte different, vector 1 (stack pointer init) is ff80d6 instead of ff81d6
|
||||||
knightsb gfx roms are 4x 1MB (but not dumped), these are 8x 512KB (suspect data is same)
|
knightsb gfx roms are 4x 1MB (but not dumped), these are 8x 512KB (suspect data is same)
|
||||||
Some sound samples are very quiet on real pcb
|
Some sound samples are very quiet on real pcb
|
||||||
Confirmed clocks (measured) are same as captcommb2:
|
Confirmed clocks (measured) are same as captcommb2:
|
||||||
xtals: 30MHz, 24MHz, 400KHz
|
xtals: 30MHz, 24MHz, 400KHz
|
||||||
68k = 12MHz (P10 model, overclocked)
|
68k = 12MHz (P10 model, overclocked)
|
||||||
z80/ym = 3.75MHz
|
z80/ym = 3.75MHz
|
||||||
5202 = 400KHz
|
5202 = 400KHz
|
||||||
*/
|
*/
|
||||||
ROM_START( knightsb3 )
|
ROM_START( knightsb3 )
|
||||||
ROM_REGION( CODE_SIZE, "maincpu", 0 )
|
ROM_REGION( CODE_SIZE, "maincpu", 0 )
|
||||||
@ -1132,28 +1132,28 @@ ROM_END
|
|||||||
// ************************************************************************* SF2MDT, SF2MDTA, SF2MDTB
|
// ************************************************************************* SF2MDT, SF2MDTA, SF2MDTB
|
||||||
|
|
||||||
/*
|
/*
|
||||||
CPU
|
CPU
|
||||||
1x MC68000P12 (main)
|
1x MC68000P12 (main)
|
||||||
1x TPC1020AFN-084C (main)
|
1x TPC1020AFN-084C (main)
|
||||||
1x Z0840006PSC-Z80CPU (sound)
|
1x Z0840006PSC-Z80CPU (sound)
|
||||||
1x YM2151 (sound)
|
1x YM2151 (sound)
|
||||||
1x YM3012 (sound)
|
1x YM3012 (sound)
|
||||||
2x M5205 (sound)
|
2x M5205 (sound)
|
||||||
2x LM324N (sound)
|
2x LM324N (sound)
|
||||||
1x TDA2003 (sound)
|
1x TDA2003 (sound)
|
||||||
1x oscillator 24.000000MHz
|
1x oscillator 24.000000MHz
|
||||||
1x oscillator 30.000MHz
|
1x oscillator 30.000MHz
|
||||||
|
|
||||||
ROMs
|
ROMs
|
||||||
14x AM27C040 (1,3,6,7,8,9,10,11,12,13,14,15,16,17)
|
14x AM27C040 (1,3,6,7,8,9,10,11,12,13,14,15,16,17)
|
||||||
3x TMS27C010A (2,4,5)
|
3x TMS27C010A (2,4,5)
|
||||||
3x PAL 16S20 (ic7,ic72, ic80) (read protected, not dumped)
|
3x PAL 16S20 (ic7,ic72, ic80) (read protected, not dumped)
|
||||||
3x GAL20V8A (ic120, ic121, ic169) (read protected, not dumped)
|
3x GAL20V8A (ic120, ic121, ic169) (read protected, not dumped)
|
||||||
|
|
||||||
Note
|
Note
|
||||||
1x JAMMA edge connector
|
1x JAMMA edge connector
|
||||||
1x trimmer (volume)
|
1x trimmer (volume)
|
||||||
3x 8x2 switches dip
|
3x 8x2 switches dip
|
||||||
*/
|
*/
|
||||||
ROM_START( sf2mdt )
|
ROM_START( sf2mdt )
|
||||||
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
|
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
|
||||||
|
@ -2,25 +2,25 @@
|
|||||||
// copyright-holders:David Haywood
|
// copyright-holders:David Haywood
|
||||||
|
|
||||||
/*
|
/*
|
||||||
CPS1 single board bootlegs
|
CPS1 single board bootlegs
|
||||||
|
|
||||||
sound hardware: PIC16c57, oki M6295 (no z80)
|
sound hardware: PIC16c57, oki M6295 (no z80)
|
||||||
|
|
||||||
Games known to use this h/w:
|
Games known to use this h/w:
|
||||||
Cadillacs and Dinosaurs 930201 ETC
|
Cadillacs and Dinosaurs 930201 ETC
|
||||||
The Punisher 930422 ETC
|
The Punisher 930422 ETC
|
||||||
Saturday Night Slam Masters 930713 ETC
|
Saturday Night Slam Masters 930713 ETC
|
||||||
|
|
||||||
(Note, these are all CPS1.5/Q sound games)
|
(Note, these are all CPS1.5/Q sound games)
|
||||||
|
|
||||||
Generally the sound quality is very poor compared to official Capcom hardware.
|
Generally the sound quality is very poor compared to official Capcom hardware.
|
||||||
Both music and sound effects are produced by just a single M6295.
|
Both music and sound effects are produced by just a single M6295.
|
||||||
Background music consists of short pre-recorded clips which loop continuously.
|
Background music consists of short pre-recorded clips which loop continuously.
|
||||||
Currently all games have no sound emulation due to the PICs being secured/protected.
|
Currently all games have no sound emulation due to the PICs being secured/protected.
|
||||||
Unless any un-protected PIcs ever turn up (unlikely) then "decapping" of working chips is probably the
|
Unless any un-protected PIcs ever turn up (unlikely) then "decapping" of working chips is probably the
|
||||||
only way valid dumps will ever be made.
|
only way valid dumps will ever be made.
|
||||||
|
|
||||||
*** see fcrash.cpp for game status ***
|
*** see fcrash.cpp for game status ***
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include "emu.h"
|
#include "emu.h"
|
||||||
@ -694,12 +694,12 @@ static INPUT_PORTS_START( slampic2 )
|
|||||||
INPUT_PORTS_END
|
INPUT_PORTS_END
|
||||||
|
|
||||||
|
|
||||||
#define DRAWSPRITE(CODE, COLOR, FLIPX, FLIPY, SX, SY) \
|
#define DRAWSPRITE(CODE, COLOR, FLIPX, FLIPY, SX, SY) \
|
||||||
{ \
|
{ \
|
||||||
if (flip_screen()) \
|
if (flip_screen()) \
|
||||||
m_gfxdecode->gfx(2)->prio_transpen(bitmap, cliprect, CODE, COLOR, !(FLIPX), !(FLIPY), 512-16-(SX), 256-16-(SY), screen.priority(), 2, 15); \
|
m_gfxdecode->gfx(2)->prio_transpen(bitmap, cliprect, CODE, COLOR, !(FLIPX), !(FLIPY), 512-16-(SX), 256-16-(SY), screen.priority(), 2, 15); \
|
||||||
else \
|
else \
|
||||||
m_gfxdecode->gfx(2)->prio_transpen(bitmap, cliprect, CODE, COLOR, FLIPX, FLIPY, SX, SY, screen.priority(), 2, 15); \
|
m_gfxdecode->gfx(2)->prio_transpen(bitmap, cliprect, CODE, COLOR, FLIPX, FLIPY, SX, SY, screen.priority(), 2, 15); \
|
||||||
}
|
}
|
||||||
|
|
||||||
void slampic2_state::bootleg_render_sprites( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect )
|
void slampic2_state::bootleg_render_sprites( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect )
|
||||||
@ -917,18 +917,18 @@ ROM_START( dinopic2 )
|
|||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
/*
|
/*
|
||||||
Cadillacs and Dinosaurs
|
Cadillacs and Dinosaurs
|
||||||
pcb marking: 3M05B
|
pcb marking: 3M05B
|
||||||
maincpu roms are same data as dinopic but arranged as 2x 2MB 16-bit mask roms
|
maincpu roms are same data as dinopic but arranged as 2x 2MB 16-bit mask roms
|
||||||
Confirmed clocks (measured):
|
Confirmed clocks (measured):
|
||||||
xtals: 30MHz, 24MHz
|
xtals: 30MHz, 24MHz
|
||||||
68k = 12MHz (P10 model, overclocked)
|
68k = 12MHz (P10 model, overclocked)
|
||||||
pic = 3.75MHz
|
pic = 3.75MHz
|
||||||
oki = 1MHz
|
oki = 1MHz
|
||||||
|
|
||||||
repair note:
|
repair note:
|
||||||
for any gfx issues, check the 9x Harris CD74HC597E shift registers,
|
for any gfx issues, check the 9x Harris CD74HC597E shift registers,
|
||||||
(4 were dead on the board used for this dump!)
|
(4 were dead on the board used for this dump!)
|
||||||
*/
|
*/
|
||||||
ROM_START( dinopic3 )
|
ROM_START( dinopic3 )
|
||||||
ROM_REGION( CODE_SIZE, "maincpu", 0 ) // = dinopic but arranged differently
|
ROM_REGION( CODE_SIZE, "maincpu", 0 ) // = dinopic but arranged differently
|
||||||
@ -953,16 +953,16 @@ ROM_START( dinopic3 )
|
|||||||
ROM_LOAD( "ti-i_27c040.bin", 0x000000, 0x80000, CRC(7d921309) SHA1(d51e60e904d302c2516b734189e141aa171b2b82) ) // = dinopic, dinopic2
|
ROM_LOAD( "ti-i_27c040.bin", 0x000000, 0x80000, CRC(7d921309) SHA1(d51e60e904d302c2516b734189e141aa171b2b82) ) // = dinopic, dinopic2
|
||||||
|
|
||||||
/* pld devices:
|
/* pld devices:
|
||||||
__________________________
|
__________________________
|
||||||
| 6 | (no component reference markings on pcb)
|
| 6 | (no component reference markings on pcb)
|
||||||
| 7 |
|
| 7 |
|
||||||
== 5 |
|
== 5 |
|
||||||
== |
|
== |
|
||||||
== |
|
== |
|
||||||
== |
|
== |
|
||||||
== 4 |
|
== 4 |
|
||||||
| 1 2 3 |
|
| 1 2 3 |
|
||||||
|__________________________|
|
|__________________________|
|
||||||
|
|
||||||
#1 palce20v8 next to main cpu secured = dinopic2 "gal20v8a-1.bin", tested ok
|
#1 palce20v8 next to main cpu secured = dinopic2 "gal20v8a-1.bin", tested ok
|
||||||
#2 palce20v8 below gfx roms, left secured = dinopic2 "gal20v8a-2.bin", tested ok
|
#2 palce20v8 below gfx roms, left secured = dinopic2 "gal20v8a-2.bin", tested ok
|
||||||
@ -1161,79 +1161,79 @@ ROM_START( slampic )
|
|||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
/*
|
/*
|
||||||
Saturday Night Slam Masters: single board bootleg
|
Saturday Night Slam Masters: single board bootleg
|
||||||
|
|
||||||
CPU
|
CPU
|
||||||
1x MC68000P10 main cpu
|
1x MC68000P10 main cpu
|
||||||
|
|
||||||
GFX
|
GFX
|
||||||
1x Custom QFP 160-pin "PLUS-B A37558.6 9325" CPS-B-xx clone?
|
1x Custom QFP 160-pin "PLUS-B A37558.6 9325" CPS-B-xx clone?
|
||||||
|
|
||||||
RAM
|
RAM
|
||||||
2x NEC D431000ACZ-70L main ram 1Mbit (128Kx8) SRAM 70ns
|
2x NEC D431000ACZ-70L main ram 1Mbit (128Kx8) SRAM 70ns
|
||||||
2x SRM20256LM12 gfx? 256Kbit (32Kx8) SRAM 120ns SOP28 (mounted on SOP->DIP adapter pcbs)
|
2x SRM20256LM12 gfx? 256Kbit (32Kx8) SRAM 120ns SOP28 (mounted on SOP->DIP adapter pcbs)
|
||||||
6x T6116S45L gfx? 16Kbit (2Kx8) SRAM 45ns
|
6x T6116S45L gfx? 16Kbit (2Kx8) SRAM 45ns
|
||||||
4x T6116S35L gfx? 16Kbit (2Kx8) SRAM 35ns
|
4x T6116S35L gfx? 16Kbit (2Kx8) SRAM 35ns
|
||||||
|
|
||||||
ROMS
|
ROMS
|
||||||
4x 27C040-15 EPROM main rom 4Mbit (512Kx8)
|
4x 27C040-15 EPROM main rom 4Mbit (512Kx8)
|
||||||
16x MX27C4000PC-15 OTP gfx 4Mbit (512Kx8)
|
16x MX27C4000PC-15 OTP gfx 4Mbit (512Kx8)
|
||||||
1x 27C020-15 EPROM sound 2Mbit (256Kx8)
|
1x 27C020-15 EPROM sound 2Mbit (256Kx8)
|
||||||
2x MX27C4000PC-15 OTP sound 4Mbit (512Kx8)
|
2x MX27C4000PC-15 OTP sound 4Mbit (512Kx8)
|
||||||
1x AM27512DC EPROM ? 512Kbit (64kx8) 1983!
|
1x AM27512DC EPROM ? 512Kbit (64kx8) 1983!
|
||||||
|
|
||||||
PLD
|
PLD
|
||||||
1x TPC1020AFN-084C
|
1x TPC1020AFN-084C
|
||||||
14x PALCE16V8H-25PC/4
|
14x PALCE16V8H-25PC/4
|
||||||
4x PALCE20V8H-25PC/4
|
4x PALCE20V8H-25PC/4
|
||||||
1x PALCE22V10H-25PC/4
|
1x PALCE22V10H-25PC/4
|
||||||
|
|
||||||
SOUND
|
SOUND
|
||||||
1x PIC16C57-XT/P sound cpu
|
1x PIC16C57-XT/P sound cpu
|
||||||
1x TD735 sample player (Oki MSM6295 clone)
|
1x TD735 sample player (Oki MSM6295 clone)
|
||||||
1x NEC uPC1242H power amp
|
1x NEC uPC1242H power amp
|
||||||
1x LM324N op amp
|
1x LM324N op amp
|
||||||
|
|
||||||
MISC
|
MISC
|
||||||
1x 16MHz xtal
|
1x 16MHz xtal
|
||||||
1x 10MHz xtal
|
1x 10MHz xtal
|
||||||
1x PST518A reset generator
|
1x PST518A reset generator
|
||||||
3x 8 pos dipswitch
|
3x 8 pos dipswitch
|
||||||
2x 10-pin connectors player 3 & 4 inputs
|
2x 10-pin connectors player 3 & 4 inputs
|
||||||
No eeprom!
|
No eeprom!
|
||||||
|
|
||||||
INPUTS
|
INPUTS
|
||||||
CN3: Player 3
|
CN3: Player 3
|
||||||
CN4: Player 4
|
CN4: Player 4
|
||||||
|
|
||||||
1 gnd
|
1 gnd
|
||||||
2 nc
|
2 nc
|
||||||
3 right
|
3 right
|
||||||
4 left
|
4 left
|
||||||
5 down
|
5 down
|
||||||
6 up
|
6 up
|
||||||
7 btn 1
|
7 btn 1
|
||||||
8 btn 2
|
8 btn 2
|
||||||
9 coin
|
9 coin
|
||||||
10 start
|
10 start
|
||||||
|
|
||||||
player 3 btn 3: jamma 25 (non-std, player 1 btn 4/neogeo btn D)
|
player 3 btn 3: jamma 25 (non-std, player 1 btn 4/neogeo btn D)
|
||||||
player 4 btn 4: jamma ac (non-std, player 2 btn 4/neogeo btn D)
|
player 4 btn 4: jamma ac (non-std, player 2 btn 4/neogeo btn D)
|
||||||
|
|
||||||
|
|
||||||
h/w issues compared to original game (slammast)
|
h/w issues compared to original game (slammast)
|
||||||
-----------------------------------------------
|
-----------------------------------------------
|
||||||
these are present on the real board so are not emulation issues:
|
these are present on the real board so are not emulation issues:
|
||||||
|
|
||||||
* On the title screen, the blue crystal-like effect behind the main "slammasters" logo is missing.
|
* On the title screen, the blue crystal-like effect behind the main "slammasters" logo is missing.
|
||||||
* The bottom and side crowd animations have missing frames.
|
* The bottom and side crowd animations have missing frames.
|
||||||
* The foreground ropes of the wrestling ring are glitchy and don't always line up properly with the end sections,
|
* The foreground ropes of the wrestling ring are glitchy and don't always line up properly with the end sections,
|
||||||
the original game draws all 3 ropes on scroll2 instead of with sprites when 4 players are on screen,
|
the original game draws all 3 ropes on scroll2 instead of with sprites when 4 players are on screen,
|
||||||
this bootleg draws the top red rope on scroll2 even with 2 players on screen.
|
this bootleg draws the top red rope on scroll2 even with 2 players on screen.
|
||||||
* Player 3/4 inputs don't work in test menu (except both btn 3), seems test menu code hasn't been hacked to use the different ports.
|
* Player 3/4 inputs don't work in test menu (except both btn 3), seems test menu code hasn't been hacked to use the different ports.
|
||||||
* No eeprom on the board, has dipswitches instead.
|
* No eeprom on the board, has dipswitches instead.
|
||||||
* Crashes if "memory test" is attempted in test menu.
|
* Crashes if "memory test" is attempted in test menu.
|
||||||
* Flip screen dipswitch does nothing (but change is shown in test menu).
|
* Flip screen dipswitch does nothing (but change is shown in test menu).
|
||||||
*/
|
*/
|
||||||
ROM_START( slampic2 )
|
ROM_START( slampic2 )
|
||||||
ROM_REGION( CODE_SIZE, "maincpu", 0 )
|
ROM_REGION( CODE_SIZE, "maincpu", 0 )
|
||||||
|
@ -19,29 +19,29 @@
|
|||||||
|
|
||||||
Tetris
|
Tetris
|
||||||
Space Invaders
|
Space Invaders
|
||||||
ABL Air-Blaster Joystick
|
ABL Air-Blaster Joystick
|
||||||
|
|
||||||
---
|
---
|
||||||
XaviX plug and play units almost always have a XaviX logo on the external packaging
|
XaviX plug and play units almost always have a XaviX logo on the external packaging
|
||||||
while the ones for this driver (and SunPlus etc.) don't seem to have any specific
|
while the ones for this driver (and SunPlus etc.) don't seem to have any specific
|
||||||
markings.
|
markings.
|
||||||
|
|
||||||
Notes:
|
Notes:
|
||||||
|
|
||||||
Tetris - RAM 0xa0 and 0xa1 contain the ACD0 and AD1 values and player 2 controls if
|
Tetris - RAM 0xa0 and 0xa1 contain the ACD0 and AD1 values and player 2 controls if
|
||||||
between certain values? probably read via serial (or ADC abuse?)
|
between certain values? probably read via serial (or ADC abuse?)
|
||||||
|
|
||||||
Internal Test Menus:
|
Internal Test Menus:
|
||||||
|
|
||||||
Tetris - hold P1 Down + P1 Anticlockwise (Button 2) on boot
|
Tetris - hold P1 Down + P1 Anticlockwise (Button 2) on boot
|
||||||
Space Invaders - hold P1 Down + P1 Button 1 on boot
|
Space Invaders - hold P1 Down + P1 Button 1 on boot
|
||||||
ABL Air-Blaster - none?
|
ABL Air-Blaster - none?
|
||||||
|
|
||||||
-----------------------------------------------------
|
-----------------------------------------------------
|
||||||
Flaws (NOT emulation bugs, happen on hardware):
|
Flaws (NOT emulation bugs, happen on hardware):
|
||||||
-----------------------------------------------------
|
-----------------------------------------------------
|
||||||
|
|
||||||
rad_sinv:
|
rad_sinv:
|
||||||
|
|
||||||
In QIX the sprites lag behind the line drawing, so you see the line infront of your player until you stop moving
|
In QIX the sprites lag behind the line drawing, so you see the line infront of your player until you stop moving
|
||||||
|
|
||||||
@ -61,35 +61,35 @@
|
|||||||
they don't seem to be used. It's difficult to judge from hardware videos, although it definitely isn't as
|
they don't seem to be used. It's difficult to judge from hardware videos, although it definitely isn't as
|
||||||
white as the menu, so this might also be a non-bug. (Uncertain - to check)
|
white as the menu, so this might also be a non-bug. (Uncertain - to check)
|
||||||
|
|
||||||
-------------------------
|
-------------------------
|
||||||
|
|
||||||
airblasjs:
|
airblasjs:
|
||||||
|
|
||||||
This game is very buggy.
|
This game is very buggy.
|
||||||
|
|
||||||
The 3D stages are prone to softlocking when the refuel jet is meant to appear.
|
The 3D stages are prone to softlocking when the refuel jet is meant to appear.
|
||||||
|
|
||||||
2D stages will zap you of your lives and then continues one by one if you die on a boss meaning if you have
|
2D stages will zap you of your lives and then continues one by one if you die on a boss meaning if you have
|
||||||
2 continues left you'll be offered the continue screen twice while it drains you of your lives before
|
2 continues left you'll be offered the continue screen twice while it drains you of your lives before
|
||||||
actually presenting you with the Game Over screen. The manual claims you can't continue on a boss however
|
actually presenting you with the Game Over screen. The manual claims you can't continue on a boss however
|
||||||
this isn't true for the 3D stages, where the continue feature works as expected. Either way, this is a very
|
this isn't true for the 3D stages, where the continue feature works as expected. Either way, this is a very
|
||||||
crude way of implementing a 'no continue' feature on bosses if it isn't simply a bug in the game code that
|
crude way of implementing a 'no continue' feature on bosses if it isn't simply a bug in the game code that
|
||||||
was explained away as a feature.
|
was explained away as a feature.
|
||||||
|
|
||||||
Sprites clip on / off the top of the screen in parts - if you move your the player helipcopter to the top
|
Sprites clip on / off the top of the screen in parts - if you move your the player helipcopter to the top
|
||||||
of the screen the top 8 pixels clip off too (not currently happening in MAME, probably need to take out
|
of the screen the top 8 pixels clip off too (not currently happening in MAME, probably need to take out
|
||||||
sprite wrapping on y)
|
sprite wrapping on y)
|
||||||
|
|
||||||
Sprites wrap around on X too, if you move to the left edge you can see your shadow on the right etc.
|
Sprites wrap around on X too, if you move to the left edge you can see your shadow on the right etc.
|
||||||
|
|
||||||
Sound sometimes stops working properly / shot changes for no reason.
|
Sound sometimes stops working properly / shot changes for no reason.
|
||||||
|
|
||||||
There's no indication of damage most of the time on bosses, some parts won't take damage until other parts
|
There's no indication of damage most of the time on bosses, some parts won't take damage until other parts
|
||||||
have been destroyed, not always obvious.
|
have been destroyed, not always obvious.
|
||||||
|
|
||||||
Very heavy sprite flicker (not emulated)
|
Very heavy sprite flicker (not emulated)
|
||||||
|
|
||||||
Very heavy slowdown (MAME speed is approximate)
|
Very heavy slowdown (MAME speed is approximate)
|
||||||
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
@ -280,7 +280,7 @@ static INPUT_PORTS_START( airblsjs )
|
|||||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
|
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
|
||||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
|
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
|
||||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Pause")
|
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Pause")
|
||||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start")
|
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start")
|
||||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Trigger")
|
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Trigger")
|
||||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Missile")
|
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Missile")
|
||||||
INPUT_PORTS_END
|
INPUT_PORTS_END
|
||||||
|
@ -4,22 +4,22 @@
|
|||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
A note reguarding other bootlegs:
|
A note reguarding other bootlegs:
|
||||||
In order to keep the cps source in some sort of order, the idea is to group similar bootleg hardware into seperate
|
In order to keep the cps source in some sort of order, the idea is to group similar bootleg hardware into seperate
|
||||||
derived classes and source files.
|
derived classes and source files.
|
||||||
|
|
||||||
Rom swaps, hacks etc. (on original Capcom hardware) -> cps1.cpp
|
Rom swaps, hacks etc. (on original Capcom hardware) -> cps1.cpp
|
||||||
Sound: Z80, 2x YM2203, 2x m5205 ("Final Crash" h/w) -> fcrash.cpp
|
Sound: Z80, 2x YM2203, 2x m5205 ("Final Crash" h/w) -> fcrash.cpp
|
||||||
Sound: Z80, 1x YM2151, 2x m5205 -> cps1bl_5205.cpp
|
Sound: Z80, 1x YM2151, 2x m5205 -> cps1bl_5205.cpp
|
||||||
Sound: PIC, 1x M6295 *1 -> cps1bl_pic.cpp
|
Sound: PIC, 1x M6295 *1 -> cps1bl_pic.cpp
|
||||||
Sound: Z80, 1x YM2151, 1x M6295 *2 -> fcrash.cpp (for now...)
|
Sound: Z80, 1x YM2151, 1x M6295 *2 -> fcrash.cpp (for now...)
|
||||||
|
|
||||||
*1 these seem to be only CPS1.5/Q sound games?
|
*1 these seem to be only CPS1.5/Q sound games?
|
||||||
*2 this is original configuration, but non-Capcom (usually single-board) hardware.
|
*2 this is original configuration, but non-Capcom (usually single-board) hardware.
|
||||||
|
|
||||||
|
|
||||||
As per the above, this file now only contains games in second and last catergories.
|
As per the above, this file now only contains games in second and last catergories.
|
||||||
Eventually only Final Crash, other Final Fight bootlegs and Carrier Air Wing bootlegs will remain here.
|
Eventually only Final Crash, other Final Fight bootlegs and Carrier Air Wing bootlegs will remain here.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
@ -1531,9 +1531,9 @@ ROM_START( ffightbl )
|
|||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
/*
|
/*
|
||||||
this is identical to the Final Crash bootleg but without the modified gfx.
|
this is identical to the Final Crash bootleg but without the modified gfx.
|
||||||
it's less common than Final Crash, but is either the original bootleg, or the bootleggers wanted to restore the
|
it's less common than Final Crash, but is either the original bootleg, or the bootleggers wanted to restore the
|
||||||
original title.
|
original title.
|
||||||
*/
|
*/
|
||||||
ROM_START( ffightbla )
|
ROM_START( ffightbla )
|
||||||
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
|
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
|
||||||
@ -1577,33 +1577,33 @@ ROM_END
|
|||||||
// ************************************************************************* KODB
|
// ************************************************************************* KODB
|
||||||
|
|
||||||
/*
|
/*
|
||||||
CPU
|
CPU
|
||||||
1x TS68000CP12 (main)
|
1x TS68000CP12 (main)
|
||||||
1x TPC1020AFN-084C
|
1x TPC1020AFN-084C
|
||||||
1x Z8400BB1-Z80CPU (sound)
|
1x Z8400BB1-Z80CPU (sound)
|
||||||
1x YM2151 (sound)
|
1x YM2151 (sound)
|
||||||
1x YM3012A (sound)
|
1x YM3012A (sound)
|
||||||
1x OKI-M6295 (sound)
|
1x OKI-M6295 (sound)
|
||||||
2x LM324N (sound)
|
2x LM324N (sound)
|
||||||
1x TDA2003 (sound)
|
1x TDA2003 (sound)
|
||||||
1x oscillator 10.0 MHz
|
1x oscillator 10.0 MHz
|
||||||
1x oscillator 22.1184 MHz
|
1x oscillator 22.1184 MHz
|
||||||
|
|
||||||
ROMs
|
ROMs
|
||||||
1x AM27C512 (1)(sound)
|
1x AM27C512 (1)(sound)
|
||||||
1x AM27C020 (2)(sound)
|
1x AM27C020 (2)(sound)
|
||||||
2x AM27C040 (3,4)(main)
|
2x AM27C040 (3,4)(main)
|
||||||
1x Am27C040 (bp)(gfx)
|
1x Am27C040 (bp)(gfx)
|
||||||
7x mask ROM (ai,bi,ci,di,ap,cp,dp)(gfx)
|
7x mask ROM (ai,bi,ci,di,ap,cp,dp)(gfx)
|
||||||
1x GAL20V8A (not dumped)
|
1x GAL20V8A (not dumped)
|
||||||
3x GAL16V8A (not dumped)
|
3x GAL16V8A (not dumped)
|
||||||
1x PALCE20V8H (not dumped)
|
1x PALCE20V8H (not dumped)
|
||||||
1x GAL20V8S (not dumped)
|
1x GAL20V8S (not dumped)
|
||||||
|
|
||||||
Note
|
Note
|
||||||
1x JAMMA edge connector
|
1x JAMMA edge connector
|
||||||
1x trimmer (volume)
|
1x trimmer (volume)
|
||||||
3x 8 switches dip
|
3x 8 switches dip
|
||||||
*/
|
*/
|
||||||
ROM_START( kodb )
|
ROM_START( kodb )
|
||||||
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
|
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
|
||||||
@ -1716,9 +1716,9 @@ ROM_END
|
|||||||
// ************************************************************************* SGYXZ
|
// ************************************************************************* SGYXZ
|
||||||
|
|
||||||
/*
|
/*
|
||||||
24mhz crystal (maincpu), 28.322 crystal (video), 3.579545 crystal (sound)
|
24mhz crystal (maincpu), 28.322 crystal (video), 3.579545 crystal (sound)
|
||||||
sound cpu is (239 V 249521 VC5006 KABUKI DL-030P-110V) - recycled Kabuki Z80 from genuine Capcom HW?
|
sound cpu is (239 V 249521 VC5006 KABUKI DL-030P-110V) - recycled Kabuki Z80 from genuine Capcom HW?
|
||||||
3x8 dsws
|
3x8 dsws
|
||||||
*/
|
*/
|
||||||
ROM_START( sgyxz )
|
ROM_START( sgyxz )
|
||||||
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 Code */
|
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 Code */
|
||||||
|
@ -719,10 +719,10 @@ TODO:
|
|||||||
|
|
||||||
|
|
||||||
#define STARFIELD_X_OFFSET_GALAGA 16
|
#define STARFIELD_X_OFFSET_GALAGA 16
|
||||||
#define STARFIELD_X_LIMIT_GALAGA 256 + STARFIELD_X_OFFSET_GALAGA
|
#define STARFIELD_X_LIMIT_GALAGA 256 + STARFIELD_X_OFFSET_GALAGA
|
||||||
|
|
||||||
#define STARFIELD_Y_OFFSET_BOSCO 16
|
#define STARFIELD_Y_OFFSET_BOSCO 16
|
||||||
#define STARFIELD_X_LIMIT_BOSCO 224
|
#define STARFIELD_X_LIMIT_BOSCO 224
|
||||||
|
|
||||||
|
|
||||||
READ8_MEMBER(galaga_state::bosco_dsw_r)
|
READ8_MEMBER(galaga_state::bosco_dsw_r)
|
||||||
|
@ -2,9 +2,9 @@
|
|||||||
// copyright-holders:Luca Elia
|
// copyright-holders:Luca Elia
|
||||||
/***************************************************************************
|
/***************************************************************************
|
||||||
|
|
||||||
-= Gals Panic II =-
|
-= Gals Panic II =-
|
||||||
|
|
||||||
driver by Luca Elia (l.elia@tin.it)
|
driver by Luca Elia (l.elia@tin.it)
|
||||||
|
|
||||||
CPU : 2 x 68000 + MCU
|
CPU : 2 x 68000 + MCU
|
||||||
SOUND : 2 x OKIM6295
|
SOUND : 2 x OKIM6295
|
||||||
@ -14,8 +14,8 @@ CUSTOM : ?
|
|||||||
To Do:
|
To Do:
|
||||||
|
|
||||||
- Simulation of the MCU: it sits between the 2 68000's and passes
|
- Simulation of the MCU: it sits between the 2 68000's and passes
|
||||||
messages along. It is currently incomplete, thus no backgrounds
|
messages along. It is currently incomplete, thus no backgrounds
|
||||||
and the game is unplayable
|
and the game is unplayable
|
||||||
|
|
||||||
- The layers are offset
|
- The layers are offset
|
||||||
|
|
||||||
@ -63,18 +63,18 @@ Z04G2-004
|
|||||||
| 6116 6116 G003K5.U63 |------| |
|
| 6116 6116 G003K5.U63 |------| |
|
||||||
|--------------------------------------------------------------------|
|
|--------------------------------------------------------------------|
|
||||||
Notes:
|
Notes:
|
||||||
* - These ROMs not populated. Korean-specific ROMs have a K as part of the label text
|
* - These ROMs not populated. Korean-specific ROMs have a K as part of the label text
|
||||||
68000 - Clock 13.500MHz [27/2]
|
68000 - Clock 13.500MHz [27/2]
|
||||||
M6295 - Clock 2.000MHz [16/8]. Pin 7 HIGH
|
M6295 - Clock 2.000MHz [16/8]. Pin 7 HIGH
|
||||||
V-080D - Custom Kaneko RGB DAC
|
V-080D - Custom Kaneko RGB DAC
|
||||||
MC-1091 - Custom Kaneko I/O module
|
MC-1091 - Custom Kaneko I/O module
|
||||||
LFP-6K - Custom Kaneko sound filter/DAC
|
LFP-6K - Custom Kaneko sound filter/DAC
|
||||||
PX4460 - Custom Kaneko sound filter/DAC
|
PX4460 - Custom Kaneko sound filter/DAC
|
||||||
PISCES - NEC uPD78324 series MCU with 32k internal rom. Clock 13.500MHz [27/2] on pins 51 & 52
|
PISCES - NEC uPD78324 series MCU with 32k internal rom. Clock 13.500MHz [27/2] on pins 51 & 52
|
||||||
VSync - 59.1856Hz
|
VSync - 59.1856Hz
|
||||||
HSync - 15.625kHz
|
HSync - 15.625kHz
|
||||||
|
|
||||||
(TODO: VTOTAL = 264, HTOTAL = 432, pixel clock 27 MHz / 4)
|
(TODO: VTOTAL = 264, HTOTAL = 432, pixel clock 27 MHz / 4)
|
||||||
|
|
||||||
***************************************************************************/
|
***************************************************************************/
|
||||||
|
|
||||||
|
@ -3637,7 +3637,7 @@ void gnw_mariotj_state::gnw_mariotj(machine_config &config)
|
|||||||
// roms
|
// roms
|
||||||
|
|
||||||
ROM_START( gnw_mariotj )
|
ROM_START( gnw_mariotj )
|
||||||
ROM_REGION( 0x1000, "maincpu", 0 )
|
ROM_REGION( 0x1000, "maincpu", 0 )
|
||||||
ROM_LOAD( "mb-108.program", 0x0000, 0x1000, CRC(f7118bb4) SHA1(c3117fd009e4686a149f85fb65786ddffc091eeb) )
|
ROM_LOAD( "mb-108.program", 0x0000, 0x1000, CRC(f7118bb4) SHA1(c3117fd009e4686a149f85fb65786ddffc091eeb) )
|
||||||
|
|
||||||
ROM_REGION( 0x100, "maincpu:melody", 0 )
|
ROM_REGION( 0x100, "maincpu:melody", 0 )
|
||||||
|
@ -93,12 +93,12 @@ Notes:
|
|||||||
JP13-15: connectors, not used
|
JP13-15: connectors, not used
|
||||||
JP16: Power connector
|
JP16: Power connector
|
||||||
P1: DB9 RS-232 port to computer
|
P1: DB9 RS-232 port to computer
|
||||||
Q2: ULN2064B Darlington Transistor
|
Q2: ULN2064B Darlington Transistor
|
||||||
S1: Dip Switches (8).
|
S1: Dip Switches (8).
|
||||||
S1-3: *Off: Game Mode, On: Test Mode
|
S1-3: *Off: Game Mode, On: Test Mode
|
||||||
S1-4: *Off: 25" Cabinet, On: 39" Cabinet
|
S1-4: *Off: 25" Cabinet, On: 39" Cabinet
|
||||||
S1-8: Off: Watchdog Disabled, *On: Watchdog Enabled
|
S1-8: Off: Watchdog Disabled, *On: Watchdog Enabled
|
||||||
U1: Texas Instruments LS85A Logic Gate
|
U1: Texas Instruments LS85A Logic Gate
|
||||||
U2-3: EL244CS Amplifier
|
U2-3: EL244CS Amplifier
|
||||||
U4: 109B Instrumentation Amplifier
|
U4: 109B Instrumentation Amplifier
|
||||||
U5: PC16550DV UART Interface IC
|
U5: PC16550DV UART Interface IC
|
||||||
@ -160,12 +160,12 @@ Notes:
|
|||||||
JP23: Alternate RS232 port
|
JP23: Alternate RS232 port
|
||||||
JP24: connector, not used
|
JP24: connector, not used
|
||||||
P1: DB9 RS-232 port to computer
|
P1: DB9 RS-232 port to computer
|
||||||
Q4: ULN2064B Darlington Transistor
|
Q4: ULN2064B Darlington Transistor
|
||||||
S1: Dip Switches (8)
|
S1: Dip Switches (8)
|
||||||
S1-7: *Off: UART, On: USB
|
S1-7: *Off: UART, On: USB
|
||||||
S1-8: Off: Watchdog Disabled, *On: Watchdog Enabled
|
S1-8: Off: Watchdog Disabled, *On: Watchdog Enabled
|
||||||
S2: Dip Switches (8), all set to "off"
|
S2: Dip Switches (8), all set to "off"
|
||||||
U1: LS85A Logic Gate
|
U1: LS85A Logic Gate
|
||||||
U2-3: EL244CS Amplifier
|
U2-3: EL244CS Amplifier
|
||||||
U5: MAX707CSA Supervisory Circuit
|
U5: MAX707CSA Supervisory Circuit
|
||||||
U6: Motorola MC74HC273A Octal D Flip-Flop (LS273 based)
|
U6: Motorola MC74HC273A Octal D Flip-Flop (LS273 based)
|
||||||
@ -226,11 +226,11 @@ Notes:
|
|||||||
JP23: Alternate RS232 port
|
JP23: Alternate RS232 port
|
||||||
JP24: connector, not used
|
JP24: connector, not used
|
||||||
P1: DB9 RS-232 port to computer
|
P1: DB9 RS-232 port to computer
|
||||||
S1: Dip Switches (8)
|
S1: Dip Switches (8)
|
||||||
S1: Dip Switches (8)
|
S1: Dip Switches (8)
|
||||||
S1-7: *Off: UART, On: USB
|
S1-7: *Off: UART, On: USB
|
||||||
S1-8: Off: Watchdog Disabled, *On: Watchdog Enabled
|
S1-8: Off: Watchdog Disabled, *On: Watchdog Enabled
|
||||||
S2: Dip Switches (8)
|
S2: Dip Switches (8)
|
||||||
U4-5: MC74HC273A Octal D Flip-Flop (LS273 based)
|
U4-5: MC74HC273A Octal D Flip-Flop (LS273 based)
|
||||||
U6: Not known yet
|
U6: Not known yet
|
||||||
U7/U11: Atmel 24C01A Serial EEPROM
|
U7/U11: Atmel 24C01A Serial EEPROM
|
||||||
@ -238,7 +238,7 @@ Notes:
|
|||||||
U12-19: HC541 Octal Buffer
|
U12-19: HC541 Octal Buffer
|
||||||
U20: Philips P87C51/2 8-bit Microcontroller
|
U20: Philips P87C51/2 8-bit Microcontroller
|
||||||
U21: DS14185WM RS-232 Interface IC
|
U21: DS14185WM RS-232 Interface IC
|
||||||
U22-24: ULN2064B Darlington Transistor
|
U22-24: ULN2064B Darlington Transistor
|
||||||
U25: Not known yet
|
U25: Not known yet
|
||||||
Y2: FS14.74 Crystal/Oscilator
|
Y2: FS14.74 Crystal/Oscilator
|
||||||
|
|
||||||
|
@ -95,40 +95,40 @@ void qvt70_state::mem_map(address_map &map)
|
|||||||
void qvt70_state::io_map(address_map &map)
|
void qvt70_state::io_map(address_map &map)
|
||||||
{
|
{
|
||||||
map.global_mask(0xff);
|
map.global_mask(0xff);
|
||||||
// map(0x07, 0x07) // ? (set to 0x5d)
|
// map(0x07, 0x07) // ? (set to 0x5d)
|
||||||
// map(0x08, 0x08) // ? (set to 0x00)
|
// map(0x08, 0x08) // ? (set to 0x00)
|
||||||
// map(0x09, 0x09) // ? (set to 0x00)
|
// map(0x09, 0x09) // ? (set to 0x00)
|
||||||
map(0x0a, 0x0a).w(FUNC(qvt70_state::voffset_lsb_w));
|
map(0x0a, 0x0a).w(FUNC(qvt70_state::voffset_lsb_w));
|
||||||
map(0x0b, 0x0b).w(FUNC(qvt70_state::voffset_msb_w));
|
map(0x0b, 0x0b).w(FUNC(qvt70_state::voffset_msb_w));
|
||||||
// map(0x0c, 0x0c) // ? (set to 0x5e then 0x67)
|
// map(0x0c, 0x0c) // ? (set to 0x5e then 0x67)
|
||||||
// map(0x0d, 0x0d) // ? (set to 0x0c then 0x04)
|
// map(0x0d, 0x0d) // ? (set to 0x0c then 0x04)
|
||||||
// map(0x0e, 0x0e) // ? (set to 0x0f then 0x07)
|
// map(0x0e, 0x0e) // ? (set to 0x0f then 0x07)
|
||||||
// map(0x0f, 0x0f) // ? (set to 0x06 then 0x07)
|
// map(0x0f, 0x0f) // ? (set to 0x06 then 0x07)
|
||||||
// map(0x10, 0x10) // columns? (set to 0x50 = 80)
|
// map(0x10, 0x10) // columns? (set to 0x50 = 80)
|
||||||
// map(0x11, 0x11) // columns? (set to 0x84 = 132)
|
// map(0x11, 0x11) // columns? (set to 0x84 = 132)
|
||||||
// map(0x12, 0x12) // ? (set to 0x31 = 49)
|
// map(0x12, 0x12) // ? (set to 0x31 = 49)
|
||||||
// map(0x13, 0x13) // rows? (set to 0x19 = 25)
|
// map(0x13, 0x13) // rows? (set to 0x19 = 25)
|
||||||
// map(0x14, 0x14) // ? (set to 0x39 = 57)
|
// map(0x14, 0x14) // ? (set to 0x39 = 57)
|
||||||
// map(0x15, 0x15) // ? (set to 0x60 = 96)
|
// map(0x15, 0x15) // ? (set to 0x60 = 96)
|
||||||
// map(0x16, 0x16) // ? (set to 0x39 = 57)
|
// map(0x16, 0x16) // ? (set to 0x39 = 57)
|
||||||
// map(0x17, 0x17) // debug output? (used during memtest)
|
// map(0x17, 0x17) // debug output? (used during memtest)
|
||||||
// map(0x18, 0x18) // ? (set to 0x20 = 32)
|
// map(0x18, 0x18) // ? (set to 0x20 = 32)
|
||||||
// map(0x19, 0x19) // ? (set to 0x0f = 15)
|
// map(0x19, 0x19) // ? (set to 0x0f = 15)
|
||||||
// map(0x1a, 0x1a) // ? (set to 0x00 then 0xff)
|
// map(0x1a, 0x1a) // ? (set to 0x00 then 0xff)
|
||||||
// map(0x1b, 0x1b) // ? (set to 0x20 = 32)
|
// map(0x1b, 0x1b) // ? (set to 0x20 = 32)
|
||||||
// map(0x1c, 0x1c) // ? (set to 0x50 then 0xff)
|
// map(0x1c, 0x1c) // ? (set to 0x50 then 0xff)
|
||||||
map(0x1d, 0x1d).rw(FUNC(qvt70_state::unk_1d_r), FUNC(qvt70_state::unk_1d_w)); // ram banking? status?
|
map(0x1d, 0x1d).rw(FUNC(qvt70_state::unk_1d_r), FUNC(qvt70_state::unk_1d_w)); // ram banking? status?
|
||||||
map(0x1e, 0x1e).rw(FUNC(qvt70_state::unk_1e_r), FUNC(qvt70_state::unk_1e_w)); // ram banking?
|
map(0x1e, 0x1e).rw(FUNC(qvt70_state::unk_1e_r), FUNC(qvt70_state::unk_1e_w)); // ram banking?
|
||||||
map(0x1f, 0x1f).w(FUNC(qvt70_state::unk_1f_w));
|
map(0x1f, 0x1f).w(FUNC(qvt70_state::unk_1f_w));
|
||||||
// map(0x20, 0x20) // ? (set to 0x00)
|
// map(0x20, 0x20) // ? (set to 0x00)
|
||||||
// map(0x21, 0x21) // ? (set to 0x00)
|
// map(0x21, 0x21) // ? (set to 0x00)
|
||||||
// map(0x22, 0x22) // ? (set to 0x00)
|
// map(0x22, 0x22) // ? (set to 0x00)
|
||||||
// map(0x23, 0x23) // ? (set to 0x00)
|
// map(0x23, 0x23) // ? (set to 0x00)
|
||||||
// map(0x24, 0x24) // ? (set to 0x00)
|
// map(0x24, 0x24) // ? (set to 0x00)
|
||||||
// map(0x25, 0x25) // ? (set to 0xa0)
|
// map(0x25, 0x25) // ? (set to 0xa0)
|
||||||
// map(0x26, 0x26) // ? (set to 0xff)
|
// map(0x26, 0x26) // ? (set to 0xff)
|
||||||
// map(0x27, 0x27) // ? (set to 0x80)
|
// map(0x27, 0x27) // ? (set to 0x80)
|
||||||
// map(0x28, 0x28) // ? (set to 0x9f)
|
// map(0x28, 0x28) // ? (set to 0x9f)
|
||||||
// 29-31
|
// 29-31
|
||||||
map(0x32, 0x32).r(FUNC(qvt70_state::unk_32_r)); // keyboard data?
|
map(0x32, 0x32).r(FUNC(qvt70_state::unk_32_r)); // keyboard data?
|
||||||
// 33-41
|
// 33-41
|
||||||
@ -249,7 +249,7 @@ uint8_t qvt70_state::unk_1d_r()
|
|||||||
|
|
||||||
uint8_t val = 0;
|
uint8_t val = 0;
|
||||||
val = ioport("1d")->read();
|
val = ioport("1d")->read();
|
||||||
// val = machine().rand();
|
// val = machine().rand();
|
||||||
logerror("1d read: %02x\n", val);
|
logerror("1d read: %02x\n", val);
|
||||||
|
|
||||||
return val;
|
return val;
|
||||||
@ -289,7 +289,7 @@ uint8_t qvt70_state::unk_1e_r()
|
|||||||
{
|
{
|
||||||
uint8_t val = 0;
|
uint8_t val = 0;
|
||||||
val = ioport("1e")->read();
|
val = ioport("1e")->read();
|
||||||
// val = machine().rand();
|
// val = machine().rand();
|
||||||
logerror("1e read: %02x\n", val);
|
logerror("1e read: %02x\n", val);
|
||||||
|
|
||||||
return val;
|
return val;
|
||||||
@ -311,7 +311,7 @@ uint8_t qvt70_state::unk_32_r()
|
|||||||
{
|
{
|
||||||
uint8_t val = 0;
|
uint8_t val = 0;
|
||||||
val = ioport("32")->read();
|
val = ioport("32")->read();
|
||||||
// val = machine().rand();
|
// val = machine().rand();
|
||||||
logerror("32 read: %02x\n", val);
|
logerror("32 read: %02x\n", val);
|
||||||
|
|
||||||
return val;
|
return val;
|
||||||
@ -326,12 +326,12 @@ void qvt70_state::unk_42_w(uint8_t data)
|
|||||||
void qvt70_state::unk_60_w(uint8_t data)
|
void qvt70_state::unk_60_w(uint8_t data)
|
||||||
{
|
{
|
||||||
logerror("60 = %02x\n", data);
|
logerror("60 = %02x\n", data);
|
||||||
// m_nmi_enable = bool(BIT(data, 7));
|
// m_nmi_enable = bool(BIT(data, 7));
|
||||||
}
|
}
|
||||||
|
|
||||||
void qvt70_state::rombank_w(uint8_t data)
|
void qvt70_state::rombank_w(uint8_t data)
|
||||||
{
|
{
|
||||||
// logerror("rombank_w: %02x\n", data);
|
// logerror("rombank_w: %02x\n", data);
|
||||||
|
|
||||||
// 765----- unknown
|
// 765----- unknown
|
||||||
// ---43--- bankswitching
|
// ---43--- bankswitching
|
||||||
|
@ -247,19 +247,19 @@ static INPUT_PORTS_START( cm32p )
|
|||||||
PORT_START("A7")
|
PORT_START("A7")
|
||||||
PORT_BIT(0x03ff, 0x0000, IPT_DIAL) PORT_NAME("Knob") PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CODE_DEC(KEYCODE_DOWN) PORT_CODE_INC(KEYCODE_UP)
|
PORT_BIT(0x03ff, 0x0000, IPT_DIAL) PORT_NAME("Knob") PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CODE_DEC(KEYCODE_DOWN) PORT_CODE_INC(KEYCODE_UP)
|
||||||
|
|
||||||
PORT_START("SERVICE") // connected to Port 0 of the P8098 CPU.
|
PORT_START("SERVICE") // connected to Port 0 of the P8098 CPU.
|
||||||
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test Switch") PORT_TOGGLE PORT_CODE(KEYCODE_F2) // SW A (checked during boot)
|
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test Switch") PORT_TOGGLE PORT_CODE(KEYCODE_F2) // SW A (checked during boot)
|
||||||
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: Check/Tune") PORT_CODE(KEYCODE_B) // SW B
|
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: Check/Tune") PORT_CODE(KEYCODE_B) // SW B
|
||||||
|
|
||||||
PORT_START("SW") // test switches, accessed by reading from address 0x1300
|
PORT_START("SW") // test switches, accessed by reading from address 0x1300
|
||||||
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: MSB Adj.") PORT_CODE(KEYCODE_1) // SW 1
|
PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: MSB Adj.") PORT_CODE(KEYCODE_1) // SW 1
|
||||||
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: THD Check") PORT_CODE(KEYCODE_2) // SW 2
|
PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: THD Check") PORT_CODE(KEYCODE_2) // SW 2
|
||||||
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM Out: String 1") PORT_CODE(KEYCODE_3) // SW 3
|
PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM Out: String 1") PORT_CODE(KEYCODE_3) // SW 3
|
||||||
PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM Out: Sax 1") PORT_CODE(KEYCODE_4) // SW 4
|
PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM Out: Sax 1") PORT_CODE(KEYCODE_4) // SW 4
|
||||||
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM + Long Reverb") PORT_CODE(KEYCODE_5) // SW 5
|
PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM + Long Reverb") PORT_CODE(KEYCODE_5) // SW 5
|
||||||
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM + Short Reverb") PORT_CODE(KEYCODE_6) // SW 6
|
PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM + Short Reverb") PORT_CODE(KEYCODE_6) // SW 6
|
||||||
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: VCA Down Check") PORT_CODE(KEYCODE_7) // SW 7
|
PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: VCA Down Check") PORT_CODE(KEYCODE_7) // SW 7
|
||||||
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: VCA Up Check") PORT_CODE(KEYCODE_8) // SW 8
|
PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: VCA Up Check") PORT_CODE(KEYCODE_8) // SW 8
|
||||||
INPUT_PORTS_END
|
INPUT_PORTS_END
|
||||||
|
|
||||||
class cm32p_state : public driver_device
|
class cm32p_state : public driver_device
|
||||||
@ -360,10 +360,10 @@ void cm32p_state::machine_start()
|
|||||||
|
|
||||||
// TODO: The IC8 gate array has an "LCD INT" line that needs to be emulated. Then, the hack can be removed.
|
// TODO: The IC8 gate array has an "LCD INT" line that needs to be emulated. Then, the hack can be removed.
|
||||||
// Note: The hack is not necessary when *not* using test mode.
|
// Note: The hack is not necessary when *not* using test mode.
|
||||||
rom[0xBB2D] = 0x03; // hack to make test mode not freeze when displaying the LCD text
|
rom[0xBB2D] = 0x03; // hack to make test mode not freeze when displaying the LCD text
|
||||||
|
|
||||||
// TODO: remove this hack
|
// TODO: remove this hack
|
||||||
rom[0x7D80] = 0x00; // hack to exit some loop waiting for interrupt #8
|
rom[0x7D80] = 0x00; // hack to exit some loop waiting for interrupt #8
|
||||||
}
|
}
|
||||||
|
|
||||||
void cm32p_state::machine_reset()
|
void cm32p_state::machine_reset()
|
||||||
@ -511,15 +511,15 @@ void cm32p_state::mt32_palette(palette_device &palette) const
|
|||||||
|
|
||||||
void cm32p_state::cm32p_map(address_map &map)
|
void cm32p_state::cm32p_map(address_map &map)
|
||||||
{
|
{
|
||||||
map(0x1080, 0x10ff).rw(FUNC(cm32p_state::dsp_io_r), FUNC(cm32p_state::dsp_io_w)); // DSP area (writes to 1080..82/86/8C/8D)
|
map(0x1080, 0x10ff).rw(FUNC(cm32p_state::dsp_io_r), FUNC(cm32p_state::dsp_io_w)); // DSP area (writes to 1080..82/86/8C/8D)
|
||||||
map(0x1100, 0x1100).rw(FUNC(cm32p_state::lcd_ctrl_r), FUNC(cm32p_state::lcd_ctrl_w));
|
map(0x1100, 0x1100).rw(FUNC(cm32p_state::lcd_ctrl_r), FUNC(cm32p_state::lcd_ctrl_w));
|
||||||
map(0x1102, 0x1102).w(FUNC(cm32p_state::lcd_data_w));
|
map(0x1102, 0x1102).w(FUNC(cm32p_state::lcd_data_w));
|
||||||
map(0x1300, 0x1300).r(FUNC(cm32p_state::test_sw_r)); // test switch state
|
map(0x1300, 0x1300).r(FUNC(cm32p_state::test_sw_r)); // test switch state
|
||||||
map(0x1400, 0x14ff).rw(FUNC(cm32p_state::snd_io_r), FUNC(cm32p_state::snd_io_w)); // sound chip area
|
map(0x1400, 0x14ff).rw(FUNC(cm32p_state::snd_io_r), FUNC(cm32p_state::snd_io_w)); // sound chip area
|
||||||
map(0x2000, 0x20ff).rom().region("maincpu", 0x2000); // init vector @ 2080
|
map(0x2000, 0x20ff).rom().region("maincpu", 0x2000); // init vector @ 2080
|
||||||
map(0x2100, 0x3fff).ram(); // main RAM
|
map(0x2100, 0x3fff).ram(); // main RAM
|
||||||
map(0x4000, 0xbfff).rom().region("maincpu", 0x4000);
|
map(0x4000, 0xbfff).rom().region("maincpu", 0x4000);
|
||||||
map(0xc000, 0xffff).r(FUNC(cm32p_state::pcmrom_r)); // show descrambled PCM ROM (for debugging)
|
map(0xc000, 0xffff).r(FUNC(cm32p_state::pcmrom_r)); // show descrambled PCM ROM (for debugging)
|
||||||
}
|
}
|
||||||
|
|
||||||
void cm32p_state::cm32p(machine_config &config)
|
void cm32p_state::cm32p(machine_config &config)
|
||||||
|
@ -800,7 +800,7 @@ ROM_START( spdheat )
|
|||||||
ROM_REGION( 0x10000, "audiocpu", 0 )
|
ROM_REGION( 0x10000, "audiocpu", 0 )
|
||||||
ROM_LOAD( "a55-17.ic11", 0x00000, 0x08000, CRC(43c2318f) SHA1(472e9cc68bb8ff3c5c3d4ec475491ad1a97261e7) )
|
ROM_LOAD( "a55-17.ic11", 0x00000, 0x08000, CRC(43c2318f) SHA1(472e9cc68bb8ff3c5c3d4ec475491ad1a97261e7) )
|
||||||
|
|
||||||
ROM_REGION( 0x10000, "subcpu", 0 ) // TODO: What are the correct labels for these?
|
ROM_REGION( 0x10000, "subcpu", 0 ) // TODO: What are the correct labels for these?
|
||||||
ROM_LOAD( "a55-15.ic5", 0x00000, 0x08000, CRC(c43b85ee) SHA1(7d7ed6b5f3e48a38b3e387f2dbc2f2bb0662db94) )
|
ROM_LOAD( "a55-15.ic5", 0x00000, 0x08000, CRC(c43b85ee) SHA1(7d7ed6b5f3e48a38b3e387f2dbc2f2bb0662db94) )
|
||||||
ROM_LOAD( "a55-16.ic6", 0x08000, 0x08000, CRC(8f45edbd) SHA1(29a696691bd199b6fff0fe0e9fd9241cec9f3fbe) )
|
ROM_LOAD( "a55-16.ic6", 0x08000, 0x08000, CRC(8f45edbd) SHA1(29a696691bd199b6fff0fe0e9fd9241cec9f3fbe) )
|
||||||
|
|
||||||
|
@ -11,43 +11,43 @@
|
|||||||
*/
|
*/
|
||||||
|
|
||||||
/*
|
/*
|
||||||
UNIMPLEMENTED / TODO
|
UNIMPLEMENTED / TODO
|
||||||
|
|
||||||
General VT1862:
|
General VT1862:
|
||||||
|
|
||||||
Sound Quality (currently crackles)
|
Sound Quality (currently crackles)
|
||||||
Verify timer enable / disable behavior
|
Verify timer enable / disable behavior
|
||||||
Line Modes, High Colour Line Mode
|
Line Modes, High Colour Line Mode
|
||||||
Tile rowscroll modes
|
Tile rowscroll modes
|
||||||
0x8000 bit in palette is 'cut through' mode, which isn't the same as transpen, some kind of palette manipulation
|
0x8000 bit in palette is 'cut through' mode, which isn't the same as transpen, some kind of palette manipulation
|
||||||
**DONE** It seems Pal1 and Pal2 should actually be separate render buffers for each palette, on which layers / sprites can be enabled, that are mixed later and can be output independently to LCD and TV?
|
**DONE** It seems Pal1 and Pal2 should actually be separate render buffers for each palette, on which layers / sprites can be enabled, that are mixed later and can be output independently to LCD and TV?
|
||||||
(how does this work with high colour line mode?)
|
(how does this work with high colour line mode?)
|
||||||
CCIR effects (only apply to 'palette 2'?)
|
CCIR effects (only apply to 'palette 2'?)
|
||||||
LCD Control registers
|
LCD Control registers
|
||||||
Internal to External DMA (glitchy)
|
Internal to External DMA (glitchy)
|
||||||
Sprite limits
|
Sprite limits
|
||||||
Other hardware limits (video DMA should be delayed until Vblank, some registers only take effect at Hblank)
|
Other hardware limits (video DMA should be delayed until Vblank, some registers only take effect at Hblank)
|
||||||
Verify raster timing (might be off by a line)
|
Verify raster timing (might be off by a line)
|
||||||
Hardware glitches (scroll layers + sprites get offset under specific conditions, sprites sometimes missing in 2 rightmost column, bk sometimes missing in rightmost column during scroll)
|
Hardware glitches (scroll layers + sprites get offset under specific conditions, sprites sometimes missing in 2 rightmost column, bk sometimes missing in rightmost column during scroll)
|
||||||
Sleep functionality on sound cpu (broken on hardware?)
|
Sleep functionality on sound cpu (broken on hardware?)
|
||||||
Interrupt controller / proper interrupt support (currently a bit hacky, only main timer and sub-timer a supported)
|
Interrupt controller / proper interrupt support (currently a bit hacky, only main timer and sub-timer a supported)
|
||||||
Proper IO support (enables / disables) UART, I2C etc.
|
Proper IO support (enables / disables) UART, I2C etc.
|
||||||
'Capture' mode
|
'Capture' mode
|
||||||
Gain (zoom) for Tilemaps
|
Gain (zoom) for Tilemaps
|
||||||
|
|
||||||
Refactor into a device
|
Refactor into a device
|
||||||
|
|
||||||
+ more
|
+ more
|
||||||
|
|
||||||
Intec InterAct:
|
Intec InterAct:
|
||||||
|
|
||||||
Is there meant to be a 2nd player? (many games prompt a 2nd player to start, but inputs don't appear to be read?)
|
Is there meant to be a 2nd player? (many games prompt a 2nd player to start, but inputs don't appear to be read?)
|
||||||
Verify that internal ROM is blank (it isn't used)
|
Verify that internal ROM is blank (it isn't used)
|
||||||
|
|
||||||
Zone 40:
|
Zone 40:
|
||||||
|
|
||||||
Decrypt, verify it's a good dump, verify that it's 6502 code, see how close the architecture is to 1682 (many games are the same)
|
Decrypt, verify it's a good dump, verify that it's 6502 code, see how close the architecture is to 1682 (many games are the same)
|
||||||
If it has an internal ROM dump it (I don't see any obvious encrypted boot vectors in current dump)
|
If it has an internal ROM dump it (I don't see any obvious encrypted boot vectors in current dump)
|
||||||
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
@ -4686,10 +4686,10 @@ void vt_vt1682_state::draw_layer(int which, int opaque, const rectangle& cliprec
|
|||||||
does this come down to pal1/pal2 output mixing rather than specific layers?
|
does this come down to pal1/pal2 output mixing rather than specific layers?
|
||||||
*/
|
*/
|
||||||
//if (which == 0)
|
//if (which == 0)
|
||||||
// xscroll += 1;
|
// xscroll += 1;
|
||||||
|
|
||||||
//if (which == 1)
|
//if (which == 1)
|
||||||
// xscroll += 1;
|
// xscroll += 1;
|
||||||
|
|
||||||
int segment = m_segment_7_0_bk[which];
|
int segment = m_segment_7_0_bk[which];
|
||||||
segment |= m_segment_11_8_bk[which] << 8;
|
segment |= m_segment_11_8_bk[which] << 8;
|
||||||
@ -4770,7 +4770,7 @@ void vt_vt1682_state::draw_layer(int which, int opaque, const rectangle& cliprec
|
|||||||
{
|
{
|
||||||
// this mode isn't tested, not seen it used
|
// this mode isn't tested, not seen it used
|
||||||
//if (bk_paldepth_mode)
|
//if (bk_paldepth_mode)
|
||||||
// popmessage("bk_paldepth_mode set\n");
|
// popmessage("bk_paldepth_mode set\n");
|
||||||
realdepth = pal & 0x03;
|
realdepth = pal & 0x03;
|
||||||
|
|
||||||
// depth might instead be the high 2 bits in 4bpp mode
|
// depth might instead be the high 2 bits in 4bpp mode
|
||||||
@ -4855,7 +4855,7 @@ void vt_vt1682_state::draw_sprites(const rectangle& cliprect)
|
|||||||
|
|
||||||
// guess! Maze Pac needs sprites shifted left by 1, but actual conditions might be more complex
|
// guess! Maze Pac needs sprites shifted left by 1, but actual conditions might be more complex
|
||||||
//if ((!sp_size & 0x01))
|
//if ((!sp_size & 0x01))
|
||||||
// x -= 1;
|
// x -= 1;
|
||||||
|
|
||||||
int palselect = 0;
|
int palselect = 0;
|
||||||
if (sp_pal_sel)
|
if (sp_pal_sel)
|
||||||
|
@ -9,15 +9,15 @@
|
|||||||
|
|
||||||
TODO:
|
TODO:
|
||||||
- clean-ups, split components into devices if necessary and maybe separate turbo/turboz features into specific file(s);
|
- clean-ups, split components into devices if necessary and maybe separate turbo/turboz features into specific file(s);
|
||||||
- refactor base video into a true scanline renderer, expect it to break 6845 drawing delegation support badly;
|
- refactor base video into a true scanline renderer, expect it to break 6845 drawing delegation support badly;
|
||||||
- support extended x1turboz video features (need more test cases?);
|
- support extended x1turboz video features (need more test cases?);
|
||||||
- Rewrite keyboard input hook-up and decap/dump the keyboard MCU if possible;
|
- Rewrite keyboard input hook-up and decap/dump the keyboard MCU if possible;
|
||||||
- Fix the 0xe80/0xe83 kanji ROM readback;
|
- Fix the 0xe80/0xe83 kanji ROM readback;
|
||||||
- x1turbo keyboard inputs are currently broken, use x1turbo40 for now;
|
- x1turbo keyboard inputs are currently broken, use x1turbo40 for now;
|
||||||
- Hook-up remaining .tap image formats;
|
- Hook-up remaining .tap image formats;
|
||||||
- Implement APSS tape commands;
|
- Implement APSS tape commands;
|
||||||
- Sort out / redump the BIOS gfx roms, and understand if TurboZ really have same BIOS as
|
- Sort out / redump the BIOS gfx roms, and understand if TurboZ really have same BIOS as
|
||||||
vanilla Turbo like Jp emulators seems to suggest;
|
vanilla Turbo like Jp emulators seems to suggest;
|
||||||
- X1Turbo: Implement SIO.
|
- X1Turbo: Implement SIO.
|
||||||
- Implement true 400 lines mode (i.e. Chatnoir no Mahjong v2.1, Casablanca)
|
- Implement true 400 lines mode (i.e. Chatnoir no Mahjong v2.1, Casablanca)
|
||||||
- Implement SASI HDD interface;
|
- Implement SASI HDD interface;
|
||||||
|
@ -164,7 +164,7 @@ WRITE8_MEMBER( sega_315_5649_device::write )
|
|||||||
case 0x03:
|
case 0x03:
|
||||||
case 0x04:
|
case 0x04:
|
||||||
case 0x05:
|
case 0x05:
|
||||||
case 0x06: // when in counter mode, bit 7 - 0 reset counters (not implemented)
|
case 0x06: // when in counter mode, bit 7 - 0 reset counters (not implemented)
|
||||||
m_port_value[offset] = data;
|
m_port_value[offset] = data;
|
||||||
m_out_port_cb[offset](data);
|
m_out_port_cb[offset](data);
|
||||||
break;
|
break;
|
||||||
|
@ -5,20 +5,20 @@
|
|||||||
#include "elan_eu3a05commonsys.h"
|
#include "elan_eu3a05commonsys.h"
|
||||||
|
|
||||||
/*
|
/*
|
||||||
Both the Elan EU3A05 and EU3A14 CPU types implement some kind of custom interrupt handling
|
Both the Elan EU3A05 and EU3A14 CPU types implement some kind of custom interrupt handling
|
||||||
|
|
||||||
It isn't clear if this is a completely new addition to the CPU, or just an interface / controller
|
It isn't clear if this is a completely new addition to the CPU, or just an interface / controller
|
||||||
sitting on top of the existing NMI or IRQ support in the core providing custom vectors.
|
sitting on top of the existing NMI or IRQ support in the core providing custom vectors.
|
||||||
|
|
||||||
The interrupt handlers are 16 4-byte entries starting at 0xffb0 in memory space
|
The interrupt handlers are 16 4-byte entries starting at 0xffb0 in memory space
|
||||||
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
-----------------------
|
-----------------------
|
||||||
Custom Interrupt purposes
|
Custom Interrupt purposes
|
||||||
-----------------------
|
-----------------------
|
||||||
|
|
||||||
TETRIS (enables 5007 : 0a, 5008: 0f)
|
TETRIS (enables 5007 : 0a, 5008: 0f)
|
||||||
|
|
||||||
@ -48,7 +48,7 @@
|
|||||||
ffdc (enabled) - probably P2 input related? ADC interrupt?
|
ffdc (enabled) - probably P2 input related? ADC interrupt?
|
||||||
accesses 501d / 501b
|
accesses 501d / 501b
|
||||||
|
|
||||||
-----------------------
|
-----------------------
|
||||||
|
|
||||||
SPACE INVADERS
|
SPACE INVADERS
|
||||||
|
|
||||||
@ -105,63 +105,63 @@
|
|||||||
ffec
|
ffec
|
||||||
dead loop
|
dead loop
|
||||||
|
|
||||||
-----------------------
|
-----------------------
|
||||||
|
|
||||||
AIR BLASTER JOYSTICK
|
AIR BLASTER JOYSTICK
|
||||||
|
|
||||||
all these 60xx jumps expect bank 00 or 0e or 3a or 7d to be active, so IRQs must be masked
|
all these 60xx jumps expect bank 00 or 0e or 3a or 7d to be active, so IRQs must be masked
|
||||||
|
|
||||||
ffb0: jmp to 6000 (ends up jumping to pointer from RAM)
|
ffb0: jmp to 6000 (ends up jumping to pointer from RAM)
|
||||||
ffb4: jmp to e08e (stuff with 500c/500d/506e etc.)
|
ffb4: jmp to e08e (stuff with 500c/500d/506e etc.)
|
||||||
ffb8: jmp to 601c (stub handler) (has function in bank 0e - writes 00 then 01 to 50a5)
|
ffb8: jmp to 601c (stub handler) (has function in bank 0e - writes 00 then 01 to 50a5)
|
||||||
ffbc: jmp to 602a (stub handler)
|
ffbc: jmp to 602a (stub handler)
|
||||||
ffc0: jmp to 6038 (stub handler)
|
ffc0: jmp to 6038 (stub handler)
|
||||||
ffc4: jmp to 6046 (stub handler)
|
ffc4: jmp to 6046 (stub handler)
|
||||||
ffc8: jmp to 6054 (stub handler)
|
ffc8: jmp to 6054 (stub handler)
|
||||||
ffcc: jmp to 6062 (stub handler)
|
ffcc: jmp to 6062 (stub handler)
|
||||||
ffd0: jmp to 6070 (stub handler)
|
ffd0: jmp to 6070 (stub handler)
|
||||||
ffd4: jmp to 607e (valid code - main IRQ?)
|
ffd4: jmp to 607e (valid code - main IRQ?)
|
||||||
ffd8: jmp to 608c (stub handler)
|
ffd8: jmp to 608c (stub handler)
|
||||||
ffdc: jmp to 609a (stub handler)
|
ffdc: jmp to 609a (stub handler)
|
||||||
ffe0: jmp to 60a8 (stub handler)
|
ffe0: jmp to 60a8 (stub handler)
|
||||||
ffe4: jmp to 60b6 (stub handler)
|
ffe4: jmp to 60b6 (stub handler)
|
||||||
ffe8: jmp to 60c4 (stub handler)
|
ffe8: jmp to 60c4 (stub handler)
|
||||||
ffec: jmp to 60d2 (stub handler)
|
ffec: jmp to 60d2 (stub handler)
|
||||||
|
|
||||||
fff0: 7d
|
fff0: 7d
|
||||||
|
|
||||||
fffa: e0 60 (60e0 vector) (stub handler)
|
fffa: e0 60 (60e0 vector) (stub handler)
|
||||||
fffc: 88 e1 (e188 startup vector)
|
fffc: 88 e1 (e188 startup vector)
|
||||||
fffe: 02 e0 (e002 vector)
|
fffe: 02 e0 (e002 vector)
|
||||||
|
|
||||||
|
|
||||||
-----------------------
|
-----------------------
|
||||||
|
|
||||||
GOLDEN TEE HOME
|
GOLDEN TEE HOME
|
||||||
|
|
||||||
ffb0 rti
|
ffb0 rti
|
||||||
ffb4 rti
|
ffb4 rti
|
||||||
ffb8 rti
|
ffb8 rti
|
||||||
ffbc rti
|
ffbc rti
|
||||||
|
|
||||||
ffc0 rti
|
ffc0 rti
|
||||||
ffc4 rti
|
ffc4 rti
|
||||||
ffc8 rti
|
ffc8 rti
|
||||||
ffcc rti
|
ffcc rti
|
||||||
|
|
||||||
ffd0 rti
|
ffd0 rti
|
||||||
ffd4 main irq?
|
ffd4 main irq?
|
||||||
ffd8 rti
|
ffd8 rti
|
||||||
ffdc rti
|
ffdc rti
|
||||||
|
|
||||||
ffe0 something with 5045 bit 0x08 and 9d in ram (increase or decrease) (ADC interrupt)
|
ffe0 something with 5045 bit 0x08 and 9d in ram (increase or decrease) (ADC interrupt)
|
||||||
ffe4 something with 5045 bit 0x20 and 9c in ram (increase of decrease) (ADC interrupt)
|
ffe4 something with 5045 bit 0x20 and 9c in ram (increase of decrease) (ADC interrupt)
|
||||||
|
|
||||||
ffe8 rti
|
ffe8 rti
|
||||||
ffec rti
|
ffec rti
|
||||||
|
|
||||||
regular NMI (e3f0 - jump to ($19e2) which seems to point to rti, but could move..)
|
regular NMI (e3f0 - jump to ($19e2) which seems to point to rti, but could move..)
|
||||||
regular IRQ (e3f3 - points to rti)
|
regular IRQ (e3f3 - points to rti)
|
||||||
|
|
||||||
*/
|
*/
|
||||||
|
|
||||||
@ -291,9 +291,9 @@ WRITE8_MEMBER(elan_eu3a05commonsys_device::intmask_w)
|
|||||||
void elan_eu3a05commonsys_device::generate_custom_interrupt(int level)
|
void elan_eu3a05commonsys_device::generate_custom_interrupt(int level)
|
||||||
{
|
{
|
||||||
// Air Blaster uses brk in the code, which is problematic for custom IRQs
|
// Air Blaster uses brk in the code, which is problematic for custom IRQs
|
||||||
// m_custom_irq = 1;
|
// m_custom_irq = 1;
|
||||||
// m_custom_irq_vector = 0xffd4;
|
// m_custom_irq_vector = 0xffd4;
|
||||||
// m_maincpu->set_input_line(INPUT_LINE_IRQ0,HOLD_LINE);
|
// m_maincpu->set_input_line(INPUT_LINE_IRQ0,HOLD_LINE);
|
||||||
|
|
||||||
// 5007 5008
|
// 5007 5008
|
||||||
// --ee --v- ssss ss-t
|
// --ee --v- ssss ss-t
|
||||||
|
@ -23,7 +23,7 @@ DEFINE_DEVICE_TYPE(HP80_OPTROM, hp80_optrom_device, "hp80_optrom", "HP80 optiona
|
|||||||
// +------------------+
|
// +------------------+
|
||||||
hp80_optrom_device::hp80_optrom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
|
hp80_optrom_device::hp80_optrom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
|
||||||
device_t(mconfig, HP80_OPTROM, tag, owner, clock),
|
device_t(mconfig, HP80_OPTROM, tag, owner, clock),
|
||||||
device_image_interface(mconfig, *this),
|
device_image_interface(mconfig, *this),
|
||||||
m_select_code(0)
|
m_select_code(0)
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
@ -7,9 +7,9 @@
|
|||||||
6502 with instruction scrambling
|
6502 with instruction scrambling
|
||||||
|
|
||||||
This form of scrambling is used in the VRT VT1682
|
This form of scrambling is used in the VRT VT1682
|
||||||
(it's used for the MiWi2 and InterAct consoles).
|
(it's used for the MiWi2 and InterAct consoles).
|
||||||
|
|
||||||
This is simpler, permanently activated and consists of swapping opcode bits
|
This is simpler, permanently activated and consists of swapping opcode bits
|
||||||
7 and 2.
|
7 and 2.
|
||||||
|
|
||||||
***************************************************************************/
|
***************************************************************************/
|
||||||
|
@ -5,7 +5,7 @@
|
|||||||
#include "elan_eu3a05commonvid.h"
|
#include "elan_eu3a05commonvid.h"
|
||||||
|
|
||||||
/*
|
/*
|
||||||
Common video functions shared by Elan EU3A05 and EU3A14 CPU types
|
Common video functions shared by Elan EU3A05 and EU3A14 CPU types
|
||||||
*/
|
*/
|
||||||
|
|
||||||
DEFINE_DEVICE_TYPE(ELAN_EU3A05_COMMONVID, elan_eu3a05commonvid_device, "elan_eu3a05commonvid", "Elan EU3A05/EU3A14 Common Video")
|
DEFINE_DEVICE_TYPE(ELAN_EU3A05_COMMONVID, elan_eu3a05commonvid_device, "elan_eu3a05commonvid", "Elan EU3A05/EU3A14 Common Video")
|
||||||
|
@ -125,8 +125,8 @@ void elan_eu3a05vid_device::draw_sprites(screen_device &screen, bitmap_ind16 &bi
|
|||||||
|
|
||||||
FF = flags ( e-dD fFsS )
|
FF = flags ( e-dD fFsS )
|
||||||
e = enable
|
e = enable
|
||||||
D = ZoomX to double size (boss explosions on Air Blaster)
|
D = ZoomX to double size (boss explosions on Air Blaster)
|
||||||
d = ZoomY to double size (boss explosions on Air Blaster)
|
d = ZoomY to double size (boss explosions on Air Blaster)
|
||||||
S = SizeX
|
S = SizeX
|
||||||
s = SizeY
|
s = SizeY
|
||||||
F = FlipX
|
F = FlipX
|
||||||
@ -283,7 +283,7 @@ bool elan_eu3a05vid_device::get_tile_data(int base, int drawpri, int& tile, int
|
|||||||
void elan_eu3a05vid_device::draw_tilemaps(screen_device& screen, bitmap_ind16& bitmap, const rectangle& cliprect, int drawpri)
|
void elan_eu3a05vid_device::draw_tilemaps(screen_device& screen, bitmap_ind16& bitmap, const rectangle& cliprect, int drawpri)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
this doesn't handle 8x8 4bpp (not used by anything yet)
|
this doesn't handle 8x8 4bpp (not used by anything yet)
|
||||||
*/
|
*/
|
||||||
|
|
||||||
int scroll = get_scroll(1);
|
int scroll = get_scroll(1);
|
||||||
@ -574,19 +574,19 @@ WRITE8_MEMBER(elan_eu3a05vid_device::elan_eu3a05_vidctrl_w)
|
|||||||
e3 4bpp 16x16 1110 0011
|
e3 4bpp 16x16 1110 0011
|
||||||
83 8bpp 8x8 1000 0011 air blaster logo
|
83 8bpp 8x8 1000 0011 air blaster logo
|
||||||
02 8bpp 8x8 (phoenix) 0000 0010 air blaster 2d normal
|
02 8bpp 8x8 (phoenix) 0000 0010 air blaster 2d normal
|
||||||
03 8bpp 8x8 0000 0011 air blaster 2d bosses
|
03 8bpp 8x8 0000 0011 air blaster 2d bosses
|
||||||
00 0000 0000 air blaster 3d stages
|
00 0000 0000 air blaster 3d stages
|
||||||
|
|
||||||
?tb- --wh
|
?tb- --wh
|
||||||
|
|
||||||
? = unknown
|
? = unknown
|
||||||
t = tile size (1 = 16x16, 0 = 8x8)
|
t = tile size (1 = 16x16, 0 = 8x8)
|
||||||
b = bpp (0 = 8bpp, 1 = 4bpp)
|
b = bpp (0 = 8bpp, 1 = 4bpp)
|
||||||
- = haven't seen used
|
- = haven't seen used
|
||||||
h = tilemap height? (0 = double height)
|
h = tilemap height? (0 = double height)
|
||||||
w = tilemap width? (0 = double width)
|
w = tilemap width? (0 = double width)
|
||||||
|
|
||||||
space invaders test mode doesn't initialize this
|
space invaders test mode doesn't initialize this
|
||||||
|
|
||||||
*/
|
*/
|
||||||
m_vidctrl = data;
|
m_vidctrl = data;
|
||||||
|
@ -56,7 +56,7 @@ void elan_eu3a14vid_device::map(address_map &map)
|
|||||||
map(0x1a, 0x1e).rw(FUNC(elan_eu3a14vid_device::rowscrollsplit_r), FUNC(elan_eu3a14vid_device::rowscrollsplit_w));
|
map(0x1a, 0x1e).rw(FUNC(elan_eu3a14vid_device::rowscrollsplit_r), FUNC(elan_eu3a14vid_device::rowscrollsplit_w));
|
||||||
// 0x1f
|
// 0x1f
|
||||||
// 0x20
|
// 0x20
|
||||||
map(0x21, 0x24).rw(FUNC(elan_eu3a14vid_device::scrollregs_r), FUNC(elan_eu3a14vid_device::scrollregs_w)); // 0x21,0x22 = scroll reg 1, 0x23,0x24 = scroll reg 2
|
map(0x21, 0x24).rw(FUNC(elan_eu3a14vid_device::scrollregs_r), FUNC(elan_eu3a14vid_device::scrollregs_w)); // 0x21,0x22 = scroll reg 1, 0x23,0x24 = scroll reg 2
|
||||||
map(0x25, 0x2c).rw(FUNC(elan_eu3a14vid_device::rowscrollregs_r), FUNC(elan_eu3a14vid_device::rowscrollregs_w)); // 0x25,0x26 = rowscroll reg 1, 0x27,0x28 = rowscroll reg 2, 0x29,0x2a = rowscroll reg 3, 0x2b,0x2c = rowscroll reg 3
|
map(0x25, 0x2c).rw(FUNC(elan_eu3a14vid_device::rowscrollregs_r), FUNC(elan_eu3a14vid_device::rowscrollregs_w)); // 0x25,0x26 = rowscroll reg 1, 0x27,0x28 = rowscroll reg 2, 0x29,0x2a = rowscroll reg 3, 0x2b,0x2c = rowscroll reg 3
|
||||||
// 0x2d
|
// 0x2d
|
||||||
// 0x2e
|
// 0x2e
|
||||||
@ -80,7 +80,7 @@ void elan_eu3a14vid_device::map(address_map &map)
|
|||||||
map(0x40, 0x45).rw(FUNC(elan_eu3a14vid_device::ramtilecfg_r), FUNC(elan_eu3a14vid_device::ramtilecfg_w));
|
map(0x40, 0x45).rw(FUNC(elan_eu3a14vid_device::ramtilecfg_r), FUNC(elan_eu3a14vid_device::ramtilecfg_w));
|
||||||
// 0x46
|
// 0x46
|
||||||
// 0x47
|
// 0x47
|
||||||
map(0x48, 0x4b).ram(); // hnt3 (always 0 tho?)
|
map(0x48, 0x4b).ram(); // hnt3 (always 0 tho?)
|
||||||
// 0x4c
|
// 0x4c
|
||||||
// 0x4d
|
// 0x4d
|
||||||
// 0x4e
|
// 0x4e
|
||||||
|
@ -47,11 +47,11 @@
|
|||||||
|
|
||||||
system11 left the following comment on mametesters:
|
system11 left the following comment on mametesters:
|
||||||
|
|
||||||
Worth noting that there are at least 3 different types of picture output
|
Worth noting that there are at least 3 different types of picture output
|
||||||
for this game - and it will be difficult to make it match 'everything' out there.
|
for this game - and it will be difficult to make it match 'everything' out there.
|
||||||
1) Normal Nintendo board - inverted video output
|
1) Normal Nintendo board - inverted video output
|
||||||
2) Normal Nintendo board with non-inverted video output - has potentiometers to adjust R/G/B
|
2) Normal Nintendo board with non-inverted video output - has potentiometers to adjust R/G/B
|
||||||
3) Bootleg board, non inverted non adjustable output
|
3) Bootleg board, non inverted non adjustable output
|
||||||
|
|
||||||
Additional note: Output for 1) is also adjusted by potentiometers which adjust
|
Additional note: Output for 1) is also adjusted by potentiometers which adjust
|
||||||
RGB. With today's bgfx hlsl filters it is easy to individually adjust
|
RGB. With today's bgfx hlsl filters it is easy to individually adjust
|
||||||
|
@ -93,33 +93,33 @@
|
|||||||
the starfield scrolling. SCROLL_X2, SCROLL_X1, and
|
the starfield scrolling. SCROLL_X2, SCROLL_X1, and
|
||||||
SCROLL_X0 map to scroll speed as follows:
|
SCROLL_X0 map to scroll speed as follows:
|
||||||
|
|
||||||
SCROLL_X2 SCROLL_X1 SCROLL_X0 speed and direction
|
SCROLL_X2 SCROLL_X1 SCROLL_X0 speed and direction
|
||||||
--------- --------- --------- -------------------
|
--------- --------- --------- -------------------
|
||||||
low low low 1 pixels per frame reverse (-X)
|
low low low 1 pixels per frame reverse (-X)
|
||||||
low low high 2 pixels per frame reverse (-X)
|
low low high 2 pixels per frame reverse (-X)
|
||||||
low high low 3 pixels per frame reverse (-X)
|
low high low 3 pixels per frame reverse (-X)
|
||||||
low high high 4 pixels per frame reverse (-X)
|
low high high 4 pixels per frame reverse (-X)
|
||||||
|
|
||||||
high low low 3 pixels per frame forward (+X)
|
high low low 3 pixels per frame forward (+X)
|
||||||
high low high 2 pixels per frame forward (+X)
|
high low high 2 pixels per frame forward (+X)
|
||||||
high high low 1 pixels per frame forward (+X)
|
high high low 1 pixels per frame forward (+X)
|
||||||
high high high 0 pixels per frame stationary
|
high high high 0 pixels per frame stationary
|
||||||
|
|
||||||
Pins 16-18 (SCROLL_Y): These 3 lines control the vertical speed and direction of the
|
Pins 16-18 (SCROLL_Y): These 3 lines control the vertical speed and direction of the
|
||||||
starfield scrolling. SCROLL_Y2, SCROLL_Y1, and SCROLL_Y0 map to
|
starfield scrolling. SCROLL_Y2, SCROLL_Y1, and SCROLL_Y0 map to
|
||||||
scroll speed as follows:
|
scroll speed as follows:
|
||||||
|
|
||||||
SCROLL_Y2 SCROLL_Y1 SCROLL_Y0 speed
|
SCROLL_Y2 SCROLL_Y1 SCROLL_Y0 speed
|
||||||
--------- --------- --------- -----
|
--------- --------- --------- -----
|
||||||
low low low 0 lines per frame stationary
|
low low low 0 lines per frame stationary
|
||||||
low low high 1 lines per frame reverse (-Y)
|
low low high 1 lines per frame reverse (-Y)
|
||||||
low high low 2 lines per frame reverse (-Y)
|
low high low 2 lines per frame reverse (-Y)
|
||||||
low high high 3 lines per frame reverse (-Y)
|
low high high 3 lines per frame reverse (-Y)
|
||||||
|
|
||||||
high low low 4 lines per frame forward (+Y)
|
high low low 4 lines per frame forward (+Y)
|
||||||
high low high 3 lines per frame forward (+Y)
|
high low high 3 lines per frame forward (+Y)
|
||||||
high high low 2 lines per frame forward (+Y)
|
high high low 2 lines per frame forward (+Y)
|
||||||
high high high 1 lines per frame forward (+Y)
|
high high high 1 lines per frame forward (+Y)
|
||||||
|
|
||||||
Pin 19 (_STARCLR): Gates the LFSR_RUN signal when active, stopping the LFSR from
|
Pin 19 (_STARCLR): Gates the LFSR_RUN signal when active, stopping the LFSR from
|
||||||
running which effectively stops the starfield from being drawn.
|
running which effectively stops the starfield from being drawn.
|
||||||
@ -128,12 +128,12 @@
|
|||||||
Pins 22-23 (SF): These two lines control which of the 4 star sets are currently being
|
Pins 22-23 (SF): These two lines control which of the 4 star sets are currently being
|
||||||
displayed on screen. SF1 and SF0 map to the star sets as follows:
|
displayed on screen. SF1 and SF0 map to the star sets as follows:
|
||||||
|
|
||||||
SF1 SF0 Star sets
|
SF1 SF0 Star sets
|
||||||
--- --- ---------
|
--- --- ---------
|
||||||
low low 0 and 2
|
low low 0 and 2
|
||||||
low high 1 and 2
|
low high 1 and 2
|
||||||
high high 1 and 3
|
high high 1 and 3
|
||||||
High low 0 and 3
|
High low 0 and 3
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@ -146,9 +146,9 @@
|
|||||||
that indicates a star should be generated at this point.
|
that indicates a star should be generated at this point.
|
||||||
Together they form a 6-bit RGB color value as follows:
|
Together they form a 6-bit RGB color value as follows:
|
||||||
|
|
||||||
Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
|
Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
|
||||||
---- ---- ---- ---- ---- ----
|
---- ---- ---- ---- ---- ----
|
||||||
BLUE_HI BLUE_LO GREEN_HI GREEN_LO RED_HI RED_LO
|
BLUE_HI BLUE_LO GREEN_HI GREEN_LO RED_HI RED_LO
|
||||||
|
|
||||||
Pin 20 (OE_CHAIN): This signal (chained output enable) is high for 1 CLK cycle every
|
Pin 20 (OE_CHAIN): This signal (chained output enable) is high for 1 CLK cycle every
|
||||||
time the LFSR has a "hit" that indicates a star should be generated
|
time the LFSR has a "hit" that indicates a star should be generated
|
||||||
@ -593,15 +593,15 @@ void starfield_05xx_device::set_starfield_config(uint16_t off_x, uint16_t off_y,
|
|||||||
|
|
||||||
uint16_t starfield_05xx_device::get_next_lfsr_state(uint16_t lfsr)
|
uint16_t starfield_05xx_device::get_next_lfsr_state(uint16_t lfsr)
|
||||||
{
|
{
|
||||||
uint16_t bit;
|
uint16_t bit;
|
||||||
|
|
||||||
// 16-bit FIBONACCI-style LFSR with taps at 16,13,11, and 6
|
// 16-bit FIBONACCI-style LFSR with taps at 16,13,11, and 6
|
||||||
// These taps produce a maximal sequence of 65,535 steps.
|
// These taps produce a maximal sequence of 65,535 steps.
|
||||||
|
|
||||||
bit = ((lfsr >> 0) ^ (lfsr >> 3) ^ (lfsr >> 5) ^ (lfsr >> 10));
|
bit = ((lfsr >> 0) ^ (lfsr >> 3) ^ (lfsr >> 5) ^ (lfsr >> 10));
|
||||||
lfsr = (lfsr >> 1) | (bit << 15);
|
lfsr = (lfsr >> 1) | (bit << 15);
|
||||||
|
|
||||||
return lfsr;
|
return lfsr;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -45,28 +45,28 @@ const bgfx::Memory* bgfx_util::mame_texture_data_to_argb32(uint32_t src_format,
|
|||||||
|
|
||||||
for (int y = 0; y < height; y++)
|
for (int y = 0; y < height; y++)
|
||||||
{
|
{
|
||||||
switch (src_format)
|
switch (src_format)
|
||||||
{
|
{
|
||||||
case PRIMFLAG_TEXFORMAT(TEXFORMAT_PALETTE16):
|
case PRIMFLAG_TEXFORMAT(TEXFORMAT_PALETTE16):
|
||||||
copy_util::copyline_palette16(dst, src16, width, palette);
|
copy_util::copyline_palette16(dst, src16, width, palette);
|
||||||
src16 += rowpixels;
|
src16 += rowpixels;
|
||||||
break;
|
break;
|
||||||
case PRIMFLAG_TEXFORMAT(TEXFORMAT_YUY16):
|
case PRIMFLAG_TEXFORMAT(TEXFORMAT_YUY16):
|
||||||
copy_util::copyline_yuy16_to_argb(dst, src16, width, palette, 1);
|
copy_util::copyline_yuy16_to_argb(dst, src16, width, palette, 1);
|
||||||
src16 += rowpixels;
|
src16 += rowpixels;
|
||||||
break;
|
break;
|
||||||
case PRIMFLAG_TEXFORMAT(TEXFORMAT_ARGB32):
|
case PRIMFLAG_TEXFORMAT(TEXFORMAT_ARGB32):
|
||||||
copy_util::copyline_argb32(dst, src32, width, palette);
|
copy_util::copyline_argb32(dst, src32, width, palette);
|
||||||
src32 += rowpixels;
|
src32 += rowpixels;
|
||||||
break;
|
break;
|
||||||
case PRIMFLAG_TEXFORMAT(TEXFORMAT_RGB32):
|
case PRIMFLAG_TEXFORMAT(TEXFORMAT_RGB32):
|
||||||
copy_util::copyline_rgb32(dst, src32, width, palette);
|
copy_util::copyline_rgb32(dst, src32, width, palette);
|
||||||
src32 += rowpixels;
|
src32 += rowpixels;
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
dst += width;
|
dst += width;
|
||||||
}
|
}
|
||||||
return mem;
|
return mem;
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user