srcclean and indentation cleanup (nw)

hash/32x.xml

@@ -96,7 +96,7 @@
 		</part>
 	</software>
 
-    <!-- Has 3d geometry bugs on attract mode with SH2 DRC, crashes if you attempt to enter into main menu -->
+	<!-- Has 3d geometry bugs on attract mode with SH2 DRC, crashes if you attempt to enter into main menu -->
 	<software name="vrdx" supported="no">
 		<description>Virtua Racing Deluxe (Euro)</description>
 		<year>1994</year>
@@ -2472,7 +2472,7 @@
 		</part>
 	</software>
 
-    <!-- black screen after choosing a level, requires SH2 SCI support -->
+	<!-- black screen after choosing a level, requires SH2 SCI support -->
 	<software name="xmen" supported="no">
 		<description>X-Men (USA, Prototype)</description>
 		<year>1995</year>

hash/apple2_flop_misc.xml

@@ -825,13 +825,13 @@
 		<publisher>4AM</publisher>
 		<info name="usage" value="Defective disk image format, but is worked around by MAME's detection." />
 		<info name="release" value="2019-03-16"/>
-		<!-- 
+		<!--
 		* Support booting 13-sector disks
 		* Support booting disks on Apple //c and IIgs which would otherwise
 		time out looking for a boot sector (SpiraDisc, some early EA games)
 		* Bypass a peripheral scan in some games that would hang on some
-		peripherals	and crash others and require a hardware power cycle in
+		peripherals and crash others and require a hardware power cycle in
-		order to reboot	properly (SpiraDisc)
+		order to reboot properly (SpiraDisc)
 		* Support multiple versions of "David's Midnight Magic"
 		* Remove "unsupported game" error, always continue booting
 		* Bypass prompt if launched from hard drive (press the open- or
@@ -924,7 +924,7 @@
 		<publisher>4AM</publisher>
 		<info name="release" value="2019-11-09"/>
 		<!--
-		* Support Personal Software 13-sector disks 
+		* Support Personal Software 13-sector disks
 		("MicroChess 2.0," "Checker King," "Gammon Gambler")
 		-->
 
@@ -6725,8 +6725,8 @@
 		language card (which is a 16K RAM card) and a firmware card. When it
 		finds the language card, it assumes both BASICs are present and tries to
 		use both, which fails.
-		
+
-		Additionally, newer Apples cannot directly book 13-sector disks, 
+		Additionally, newer Apples cannot directly book 13-sector disks,
 		so this patch converts the program to a 16-sector disk and patches the
 		program to ignore a blank language card while preserving the ability to
 		utilize both BASICs. -->

hash/apple2_flop_orig.xml

@@ -8505,7 +8505,7 @@
 		<info name="release" value="2019-11-01"/>
 		<sharedfeat name="compatibility" value="A2" />
 		<!-- It requires an Apple ][ with Integer BASIC ROM and at least 32K.
-        Due to reliance on Integer ROM, it will not run on later models. -->
+		Due to reliance on Integer ROM, it will not run on later models. -->
 
 		<part name="flop1" interface="floppy_5_25">
 			<dataarea name="flop" size="234809">
@@ -8628,7 +8628,7 @@
 		<publisher>Stoneware</publisher>
 		<info name="release" value="2019-11-12"/>
 		<sharedfeat name="compatibility" value="A2" />
-		<!-- It requires an original Apple ][ with 48K and Integer BASIC 
+		<!-- It requires an original Apple ][ with 48K and Integer BASIC
 		in ROM. -->
 		<part name="flop1" interface="floppy_5_25">
 			<dataarea name="flop" size="234791">
@@ -8643,7 +8643,7 @@
 		<publisher>MUSE Software</publisher>
 		<info name="release" value="2019-11-12"/>
 		<sharedfeat name="compatibility" value="A2" />
-		<!-- It requires an original Apple ][ with 32K and Integer BASIC 
+		<!-- It requires an original Apple ][ with 32K and Integer BASIC
 		in ROM. -->
 		<part name="flop1" interface="floppy_5_25">
 			<dataarea name="flop" size="234802">

hash/bbc_rom.xml

@@ -5327,14 +5327,14 @@
 	</software>
 
   <software name="nfs334b" cloneof="nfs334">
-    <description>Acorn NFS 3.34B</description>
+	<description>Acorn NFS 3.34B</description>
-    <year>198?</year>
+	<year>198?</year>
-    <publisher>Acorn</publisher>
+	<publisher>Acorn</publisher>
-    <part name="rom1" interface="bbc_rom">
+	<part name="rom1" interface="bbc_rom">
-      <dataarea name="rom" size="8192">
+		<dataarea name="rom" size="8192">
-        <rom name="Acorn-NFS-3.34B.rom" size="8192" crc="9ddc1456" sha1="212cb90ba5e7c96457718ae9d818fb8ece5cc32a"/>
+			<rom name="Acorn-NFS-3.34B.rom" size="8192" crc="9ddc1456" sha1="212cb90ba5e7c96457718ae9d818fb8ece5cc32a"/>
-      </dataarea>
+		</dataarea>
-    </part>
+	</part>
   </software>
 
 	<software name="nfs360">
@@ -5741,14 +5741,14 @@
 	</software>
 
   <software name="prestelt471" cloneof="prestel" supported="no">
-    <description>Prestel Trial 4.71r</description>
+	<description>Prestel Trial 4.71r</description>
-    <year>1984</year>
+	<year>1984</year>
-    <publisher>Acorn</publisher>
+	<publisher>Acorn</publisher>
-    <part name="rom1" interface="bbc_rom">
+	<part name="rom1" interface="bbc_rom">
-      <dataarea name="rom" size="8192">
+		<dataarea name="rom" size="8192">
-        <rom name="PrestelTrial-4.71r.rom" size="8192" crc="c6067294" sha1="5702b0b895cfabb30ffdcf9fe2718de2276315ef"/>
+			<rom name="PrestelTrial-4.71r.rom" size="8192" crc="c6067294" sha1="5702b0b895cfabb30ffdcf9fe2718de2276315ef"/>
-      </dataarea>
+		</dataarea>
-    </part>
+	</part>
   </software>
 
 	<software name="prestel" supported="no">
@@ -7759,14 +7759,14 @@
 	</software>
 
   <software name="tfs031" cloneof="tfs">
-    <description>Acorn TFS 0.31</description>
+	<description>Acorn TFS 0.31</description>
-    <year>1982</year>
+	<year>1982</year>
-    <publisher>Acorn</publisher>
+	<publisher>Acorn</publisher>
-    <part name="rom1" interface="bbc_rom">
+	<part name="rom1" interface="bbc_rom">
-      <dataarea name="rom" size="16384">
+		<dataarea name="rom" size="16384">
-        <rom name="TFS-0.31.rom" size="16384" crc="eb6b9097" sha1="07c54e8afc5fe686a8f86c33d15220327d6c9cc8"/>
+			<rom name="TFS-0.31.rom" size="16384" crc="eb6b9097" sha1="07c54e8afc5fe686a8f86c33d15220327d6c9cc8"/>
-      </dataarea>
+		</dataarea>
-    </part>
+	</part>
   </software>
 
 	<software name="tfs100" cloneof="tfs">

hash/gameking.xml

@@ -458,7 +458,7 @@ S1: is on some carts directly connected to VCC
 			</dataarea>
 		</part>
 	</software>
-		
+
 	<software name="mc_4szlh" supported="partial"> <!-- no specific Volume # marked -->
 		<description>4 in 1 - S.Z.L.H + Colo + F1-2004 + Popper</description>
 		<year>200?</year>
@@ -468,6 +468,6 @@ S1: is on some carts directly connected to VCC
 				<rom name="4in1 - szlh, colo, f12004, popper.bin" size="0x100000" crc="0316eb98" sha1="71a3a4f2fc49c4e19c016d036aba63d8437489a0"/>
 			</dataarea>
 		</part>
-	</software>	
+	</software>
 
 </softwarelist>

hash/ibm5170.xml

@@ -11026,7 +11026,7 @@
 			</dataarea>
 		</part>
 	</software>
-	
+
 	<software name="kilo1">
 		<description>Kiloblaster: Death of a Starship (Shareware, B&amp;N)</description>
 		<year>1994</year>
@@ -12156,7 +12156,7 @@
 			</dataarea>
 		</part>
 	</software>
-	
+
 	<software name="sserv2">
 		<!-- Dumped via Kryoflux, shows as good and unmodified -->
 		<description>Silent Service II (Version 457.01)</description>
@@ -12730,7 +12730,7 @@
 			</dataarea>
 		</part>
 	</software>
-	
+
 	<software name="thndrhwk">
 		<description>Thunderhawk AH-73M</description>
 		<year>1991</year>

hash/spectrum_cass.xml

@@ -130,9 +130,9 @@
 	</software>
 
 	<!-- This program was included as an audio track on the record "1984" from the Spanish
-             music group "La Mode". It was present only on the vinyl version (not on the cassette),
+	         music group "La Mode". It was present only on the vinyl version (not on the cassette),
-             as the last track of the B side, titled as "Programa Computado".
+	         as the last track of the B side, titled as "Programa Computado".
-             It was programmed by Mario Gil (one of the "La Mode" group members). -->
+	         It was programmed by Mario Gil (one of the "La Mode" group members). -->
 	<software name="1984lm">
 		<description>La Mode - 1984 (Programa Computado)</description>
 		<year>1984</year>
@@ -142,7 +142,7 @@
 				<rom name="lamode_1984_programa_computado.tzx" size="13378" crc="2cf24932" sha1="0dbe31463fb5ddaddbd6e53ae489b92f32fc22e9"/>
 			</dataarea>
 		</part>
-	</software>	
+	</software>
 
 	<!-- NC128 -->
 	<software name="3dstarfi">
@@ -60656,7 +60656,7 @@
 			</dataarea>
 		</part>
 	</software>
-	
+
 	<software name="disciple_d" cloneof="disciple">
 		<description>DISCiPLE System Tape v3b</description>
 		<year>1987</year>

hash/spectrum_mgt_flop.xml

@@ -2,19 +2,19 @@
 <!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
 
 <!-- ZX Spectrum MGT Disciple / +D disk images
-    
+
-	images for the "Disciple" and "+D" ZX Spectrum fdd interfaces produced by MGT (Miles Gordan Technology)
+    images for the "Disciple" and "+D" ZX Spectrum fdd interfaces produced by MGT (Miles Gordan Technology)
-	
+
-	insert system disk,
+    insert system disk,
-	'RUN'      boots the main DOS from disk
+    'RUN'      boots the main DOS from disk
-	'CAT 1/2'  lists disk 1/2 catalogue
+    'CAT 1/2'  lists disk 1/2 catalogue
-	'LOAD Pn'  loads program #n
+    'LOAD Pn'  loads program #n
-	
+
-	more commands listed in devices\bus\spectrum\plusd.cpp or disciple.cpp
+    more commands listed in devices\bus\spectrum\plusd.cpp or disciple.cpp
-	
+
-	for disciple, must use matching rom/system disk versions:
+    for disciple, must use matching rom/system disk versions:
-	v2 rom -> system disk/system tape ver 2, 2b, 2c
+    v2 rom -> system disk/system tape ver 2, 2b, 2c
-	v3 rom -> system disk/system tape ver 3a, 3b or 3d
+    v3 rom -> system disk/system tape ver 3a, 3b or 3d
 -->
 
 <softwarelist name="spectrum_mgt_flop" description="ZX Spectrum MGT Disciple/Plus D disks">

scripts/src/netlist.lua

@@ -62,23 +62,23 @@ project "netlist"
 		MAME_DIR .. "src/lib/netlist/plib/pdynlib.h",
 		MAME_DIR .. "src/lib/netlist/plib/pmain.cpp",
 		MAME_DIR .. "src/lib/netlist/plib/pmain.h",
-    MAME_DIR .. "src/lib/netlist/plib/pmath.h",
+		MAME_DIR .. "src/lib/netlist/plib/pmath.h",
 		MAME_DIR .. "src/lib/netlist/plib/pmempool.h",
 		MAME_DIR .. "src/lib/netlist/plib/pomp.h",
 		MAME_DIR .. "src/lib/netlist/plib/poptions.cpp",
 		MAME_DIR .. "src/lib/netlist/plib/poptions.h",
 		MAME_DIR .. "src/lib/netlist/plib/ppmf.h",
-    MAME_DIR .. "src/lib/netlist/plib/ppreprocessor.cpp",
+		MAME_DIR .. "src/lib/netlist/plib/ppreprocessor.cpp",
-    MAME_DIR .. "src/lib/netlist/plib/ppreprocessor.h",
+		MAME_DIR .. "src/lib/netlist/plib/ppreprocessor.h",
-    MAME_DIR .. "src/lib/netlist/plib/pstate.h",
+		MAME_DIR .. "src/lib/netlist/plib/pstate.h",
 		MAME_DIR .. "src/lib/netlist/plib/pstonum.h",
 		MAME_DIR .. "src/lib/netlist/plib/pstring.cpp",
 		MAME_DIR .. "src/lib/netlist/plib/pstring.h",
 		MAME_DIR .. "src/lib/netlist/plib/pstrutil.h",
 		MAME_DIR .. "src/lib/netlist/plib/pstream.h",
 		MAME_DIR .. "src/lib/netlist/plib/ptime.h",
-    MAME_DIR .. "src/lib/netlist/plib/ptokenizer.cpp",
+		MAME_DIR .. "src/lib/netlist/plib/ptokenizer.cpp",
-    MAME_DIR .. "src/lib/netlist/plib/ptokenizer.h",
+		MAME_DIR .. "src/lib/netlist/plib/ptokenizer.h",
 		MAME_DIR .. "src/lib/netlist/plib/ptypes.h",
 		MAME_DIR .. "src/lib/netlist/plib/putil.cpp",
 		MAME_DIR .. "src/lib/netlist/plib/putil.h",

src/devices/bus/bbc/exp/autocue.cpp

@@ -97,4 +97,4 @@ void bbc_autocue_device::jim_w(offs_t offset, uint8_t data)
 	{
 		m_ram[(m_ram_page << 8) | offset] = data;
 	}
-}
+}

src/devices/bus/bbc/internal/aries.cpp

@@ -294,7 +294,7 @@ uint8_t bbc_ariesb32_device::ram_r(offs_t offset)
 void bbc_ariesb32_device::ram_w(offs_t offset, uint8_t data)
 {
 	//if ((offset & 0xff) == 0x00)
-	//	logerror("ram_w: %04x = %02x\n", offset, data);
+	//  logerror("ram_w: %04x = %02x\n", offset, data);
 	if (m_shadow && offset >= 0x3000)
 		m_ram[offset - 0x3000] = data;
 	else
@@ -324,7 +324,7 @@ uint8_t bbc_ariesb32_device::paged_r(offs_t offset)
 void bbc_ariesb32_device::paged_w(offs_t offset, uint8_t data)
 {
 	//if ((offset & 0xff) == 0x00)
-	//	logerror("paged_w: %04x = %02x\n", offset | 0x8000, data);
+	//  logerror("paged_w: %04x = %02x\n", offset | 0x8000, data);
 	if (m_rom[m_romsel])
 	{
 		m_rom[m_romsel]->write(offset, data);

src/devices/bus/bbc/internal/integrab.cpp

@@ -1,4 +1,4 @@
-// license:BSD-3-Clause
+// license:BSD-3-Clause
 // copyright-holders:Nigel Barnes
 /**********************************************************************
 
@@ -169,19 +169,19 @@ uint8_t bbc_integrab_device::romsel_r(offs_t offset)
 void bbc_integrab_device::romsel_w(offs_t offset, uint8_t data)
 {
 	/*
-     ROMSEL & ROMID
+	 ROMSEL & ROMID
-      Bits 0,3 ROMNUM Sideways ROM/RAM select bits
+	  Bits 0,3 ROMNUM Sideways ROM/RAM select bits
-      Bits 4,5        Not used
+	  Bits 4,5        Not used
-      Bit 6    PRVEN  Private RAM enable
+	  Bit 6    PRVEN  Private RAM enable
-      Bit 7    MEMSEL Shadow/Main RAM toggle
+	  Bit 7    MEMSEL Shadow/Main RAM toggle
 
-     RAMSEL & RAMID
+	 RAMSEL & RAMID
-      Bits 0,1 AUX0,1 Not used but must be preserved
+	  Bits 0,1 AUX0,1 Not used but must be preserved
-      Bits 2,3        Not used
+	  Bits 2,3        Not used
-      Bit 4    PRVS8  Private RAM 8K area select (&9000-&AFFF)
+	  Bit 4    PRVS8  Private RAM 8K area select (&9000-&AFFF)
-      Bit 5    PRVS4  Private RAM 4K area select (&8000-&8FFF)
+	  Bit 5    PRVS4  Private RAM 4K area select (&8000-&8FFF)
-      Bit 6    PRVS1  Private RAM 1K area select (&8000-&83FF)
+	  Bit 6    PRVS1  Private RAM 1K area select (&8000-&83FF)
-      Bit 7    SHEN   Shadow RAM enable bit
+	  Bit 7    SHEN   Shadow RAM enable bit
 	*/
 	switch (offset & 0x0c)
 	{

src/devices/bus/bbc/internal/stl4m32.cpp

@@ -281,7 +281,7 @@ uint8_t bbc_stl4m32_device::mos_r(offs_t offset)
 
 	//if (BIT(m_shadow, 7) && offset >= 0x2000)
 	//{
-	//	data = m_ram[offset];
+	//  data = m_ram[offset];
 	//}
 	//else
 	//{
@@ -298,6 +298,6 @@ void bbc_stl4m32_device::mos_w(offs_t offset, uint8_t data)
 
 	//if (BIT(m_romsel, 7) && offset >= 0x2000)
 	//{
-	//	m_ram[offset] = data;
+	//  m_ram[offset] = data;
 	//}
-}
+}

src/devices/bus/isa/eis_hgb107x.h

@@ -75,7 +75,7 @@ private:
 		ATTR_FOREG = 0x07,
 		ATTR_ULINE = 0x01,
 	};
-	
+
 	required_device<mc6845_device> m_crtc;
 	MC6845_UPDATE_ROW( crtc_update_row );
 

src/devices/bus/isa/eis_twib.cpp

@@ -36,7 +36,7 @@
  |     IC4        IC3       Resistor DIL     IC6          ooooo      o5     o5 IC9    P2|| |- BNC(3270)
  |    74LS00     74LS00   1234567890        74LS86        ooooo   1o o4  1o o4 74LS245  ||---
  |                          SW1 DIP                               2o o3  2o o3       ____|
- +----------------------------------------------------------------------------------|o___|   
+ +----------------------------------------------------------------------------------|o___|
                                                            |||||||||||||||||||||||||     |
  Notes                                                                                   |
  ------------------------------------------------------------------------------          |
@@ -49,7 +49,7 @@
  -------------------
  This is a passive ISA8 board that should be fitted into an Ericsson PC (epc) and
  driven by suitable software. It was replaced by the ISA16 SAD8852 intelligent TWIB
- board for WS286 and higher a few years later. 
+ board for WS286 and higher a few years later.
 
  */
 
@@ -246,7 +246,7 @@ void isa8_eistwib_device::device_reset()
 	int base = m_sw1->read();
 	if (!m_installed)
 	{
-		LOG("Installing twib device at %04x\n", base); 
+		LOG("Installing twib device at %04x\n", base);
 		m_isa->install_device(
 				base, base + 0x0f,
 				read8_delegate(*this, FUNC( isa8_eistwib_device::twib_r )),

src/devices/bus/sbus/cgsix.h

@@ -82,23 +82,23 @@ protected:
 
 	enum
 	{
-		THC_MISC_IRQ_BIT	= 4,
+		THC_MISC_IRQ_BIT    = 4,
-		THC_MISC_IRQEN_BIT	= 5,
+		THC_MISC_IRQEN_BIT  = 5,
-		THC_MISC_CURRES_BIT	= 6,
+		THC_MISC_CURRES_BIT = 6,
-		THC_MISC_SYNCEN_BIT	= 7,
+		THC_MISC_SYNCEN_BIT = 7,
-		THC_MISC_VSYNC_BIT	= 8,
+		THC_MISC_VSYNC_BIT  = 8,
-		THC_MISC_SYNC_BIT	= 9,
+		THC_MISC_SYNC_BIT   = 9,
-		THC_MISC_ENVID_BIT	= 10,
+		THC_MISC_ENVID_BIT  = 10,
-		THC_MISC_RESET_BIT	= 12,
+		THC_MISC_RESET_BIT  = 12,
 		THC_MISC_REV        = 0x00010000,
-		THC_MISC_WRITE_MASK	= 0x000014ff
+		THC_MISC_WRITE_MASK = 0x000014ff
 	};
 
 	enum
 	{
-		FBC_CONFIG_FBID		= 0x60000000,
+		FBC_CONFIG_FBID     = 0x60000000,
-		FBC_CONFIG_VERSION	= 0x00100000,
+		FBC_CONFIG_VERSION  = 0x00100000,
-		FBC_CONFIG_MASK		= 0x000f3fff
+		FBC_CONFIG_MASK     = 0x000f3fff
 	};
 
 	enum
@@ -257,7 +257,7 @@ protected:
 
 	enum
 	{
-		FBC_CONFIG		= 0x000/4,
+		FBC_CONFIG      = 0x000/4,
 		FBC_MISC        = 0x004/4,
 		FBC_CLIP_CHECK  = 0x008/4,
 

src/devices/bus/spectrum/exp.h

@@ -8,7 +8,7 @@
 
     Pinout:
 
-             48K                          128K/+2                          +2A/+2B/+3/3B     
+             48K                          128K/+2                          +2A/+2B/+3/3B
 
          A         B                    A         B                         A         B
         A15   1   A14                  A15   1   A14                       A15   1   A14

src/devices/bus/spectrum/mface.cpp

@@ -2,81 +2,81 @@
 // copyright-holders:Nigel Barnes
 /*********************************************************************
 
-	Romantic Robot Multiface One/128/3
+    Romantic Robot Multiface One/128/3
-	----------------------------------
+    ----------------------------------
-	
+
-	" MULTI-PURPOSE INTERFACE FOR THE ZX SPECTRUM "
+    " MULTI-PURPOSE INTERFACE FOR THE ZX SPECTRUM "
-	
+
-	MULTIFACE ONE comprises three interfaces in one box:
+    MULTIFACE ONE comprises three interfaces in one box:
-	1) Fully  universal  and  100%  automatic  SAVE  facility  for  tape,  microdrive,  wafadrive,  Beta,
+    1) Fully  universal  and  100%  automatic  SAVE  facility  for  tape,  microdrive,  wafadrive,  Beta,
-	   Discovery and indirectly (via tape) for other disc systems
+       Discovery and indirectly (via tape) for other disc systems
-	2) Joystick interface – Kempston compatible (IN 31)
+    2) Joystick interface – Kempston compatible (IN 31)
-	3) 8K  RAM  extension  –  fully  accessible,  usable  as a  RAM  disk,  buffer  etc.  Also  used  by
+    3) 8K  RAM  extension  –  fully  accessible,  usable  as a  RAM  disk,  buffer  etc.  Also  used  by
-	   MULTIFACE for MULTI TOOLKIT routines, buffer & other purposes.
+       MULTIFACE for MULTI TOOLKIT routines, buffer & other purposes.
-	   
+
-	© Romantic Robot UK Ltd 1985 
+    © Romantic Robot UK Ltd 1985
-	
+
-	
+
-	Multiface One
+    Multiface One
-	-------------
+    -------------
-	Many versions exist, a very good source of info is:  https://x128.speccy.cz/multiface/multiface.htm
+    Many versions exist, a very good source of info is:  https://x128.speccy.cz/multiface/multiface.htm
-	
+
-	Summary:
+    Summary:
-	Earliest version has 2KB of RAM, composite video output, and no toolkit (pokes only).
+    Earliest version has 2KB of RAM, composite video output, and no toolkit (pokes only).
-	Next version has 8KB of RAM, composite video output, and basic toolkit (including pokes).
+    Next version has 8KB of RAM, composite video output, and basic toolkit (including pokes).
-	Latest and most common version dropped the composite video output, added an enable/disable switch, and full-featured toolkit.
+    Latest and most common version dropped the composite video output, added an enable/disable switch, and full-featured toolkit.
-	A special (and rare) version supports the Kempston Disc interface but drops Beta support. (not sold in stores, available only on request).
+    A special (and rare) version supports the Kempston Disc interface but drops Beta support. (not sold in stores, available only on request).
-	At some point during "early" revisions, the page out port changed from 0x5f to 0x1f.
+    At some point during "early" revisions, the page out port changed from 0x5f to 0x1f.
-	Various clone/hacked rom versions are known to exist as well.
+    Various clone/hacked rom versions are known to exist as well.
+
+    Roms:
+    The MUxx in the rom name is pcb revision (silkscreen marking).
+    The two hex digits are the rom checksum.
+    With the MF menu on-screen, press Symbol Shift + A (STOP) to see checksum, space to return.
+
+    The enable/disable switch became necessary on later versions as games had started including checks to detect presence of the interface.
+    eg. Renegade ("The Hit Squad" re-release) whilst loading, reads from 0x9f specifically to cause the MF (if present) to page in and crash the machine.
+    Todo: confirm exact operation of disable switch.
+
+    As mentioned in the user instructions, there is a "joystick disable" jumper inside the unit which must be cut to allow Beta disk compatibility.
+    The joystick is not actually disabled but rather just data bus bits D6 + D7 are held hi-z for any reads of kempston range 0b000xxxxx.
+
+    rom maps to 0x0000
+    ram maps to 0x2000
+
+    I/O        R/W   early ver   late ver
+    ---------+-----+-----------+-----------
+    page in     R      0x9f        0x9f
+    page out    R      0x5f        0x1f
+    nmi reset   W      0x5f        0x1f
+    joystick    R      0x1f        0x1f
+
+
+    Multiface 128
+    -------------
+    128K/+2 support (also works with 48K)
+    DISCiPLE/Plus D disc support
+    No joystick port
+    Software enable/disable
+    "Hypertape" recording (?)
+
+    Todo ...
+
+
+    Multiface 3
+    -----------
+    +2A/+2B/+3/3B support (doesn't work with 48K/128K/+2)
+    +3 disk support
+
+    Todo ...
+
+
+    Multiprint
+    ----------
+    Version ? multiface with Centronics printer interface
+
+    Todo ...
 
-	Roms:
-	The MUxx in the rom name is pcb revision (silkscreen marking).
-	The two hex digits are the rom checksum.
-	With the MF menu on-screen, press Symbol Shift + A (STOP) to see checksum, space to return.
-	
-	The enable/disable switch became necessary on later versions as games had started including checks to detect presence of the interface.
-	eg. Renegade ("The Hit Squad" re-release) whilst loading, reads from 0x9f specifically to cause the MF (if present) to page in and crash the machine.
-	Todo: confirm exact operation of disable switch.
-	
-	As mentioned in the user instructions, there is a "joystick disable" jumper inside the unit which must be cut to allow Beta disk compatibility.
-	The joystick is not actually disabled but rather just data bus bits D6 + D7 are held hi-z for any reads of kempston range 0b000xxxxx.
-	
-	rom maps to 0x0000
-	ram maps to 0x2000
-	
-	I/O        R/W   early ver   late ver
-	---------+-----+-----------+-----------
-	page in     R      0x9f        0x9f
-	page out    R      0x5f        0x1f
-	nmi reset   W      0x5f        0x1f
-	joystick    R      0x1f        0x1f
-	
-	
-	Multiface 128
-	-------------
-	128K/+2 support (also works with 48K)
-	DISCiPLE/Plus D disc support
-	No joystick port
-	Software enable/disable
-	"Hypertape" recording (?)
-	
-	Todo ...
-	
-	
-	Multiface 3
-	-----------
-	+2A/+2B/+3/3B support (doesn't work with 48K/128K/+2)
-	+3 disk support
-	
-	Todo ...
-	
-	
-	Multiprint
-	----------
-	Version ? multiface with Centronics printer interface
-	
-	Todo ...
-	
 
 *********************************************************************/
 
@@ -105,13 +105,13 @@ INPUT_PORTS_END
 
 INPUT_PORTS_START( mface1 )
 	PORT_INCLUDE( mface )
-	
+
 	PORT_START("CONFIG")
 	PORT_CONFNAME(0x01, 0x00, "Joystick Enable Jumper")
 	PORT_CONFSETTING(0x00, "Closed")
 	PORT_CONFSETTING(0x01, "Open")
 	PORT_BIT(0xfe, IP_ACTIVE_LOW, IPT_UNUSED)
-	
+
 	PORT_START("JOY")
 	PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT) PORT_8WAY
 	PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT)  PORT_8WAY
@@ -153,17 +153,17 @@ ROM_END
 
 /* Todo ...
 
-	ROM_SYSTEM_BIOS(?, "mu12cb", "MU12 CB")  // Very early version, 2KB RAM, page out port 0x5F
+    ROM_SYSTEM_BIOS(?, "mu12cb", "MU12 CB")  // Very early version, 2KB RAM, page out port 0x5F
-	ROMX_LOAD("mf1_12_cb.rom", 0x0000, 0x2000, CRC(c88fbf9f) SHA1(c3018d1b495b8bc0a135038db0987de7091c9d4c), ROM_BIOS(?))
+    ROMX_LOAD("mf1_12_cb.rom", 0x0000, 0x2000, CRC(c88fbf9f) SHA1(c3018d1b495b8bc0a135038db0987de7091c9d4c), ROM_BIOS(?))
 
-	ROM_SYSTEM_BIOS(?, "mu2023", "MU 2.0 23")  // pokes only (no toolkit), page out port 0x5F
+    ROM_SYSTEM_BIOS(?, "mu2023", "MU 2.0 23")  // pokes only (no toolkit), page out port 0x5F
-	ROMX_LOAD("mf1_20_23.rom", 0x0000, 0x2000, CRC(d4ae8953) SHA1(b442eb634a72fb63f1ccbbd0021a7a581152888d), ROM_BIOS(?))
+    ROMX_LOAD("mf1_20_23.rom", 0x0000, 0x2000, CRC(d4ae8953) SHA1(b442eb634a72fb63f1ccbbd0021a7a581152888d), ROM_BIOS(?))
 
-	ROM_SYSTEM_BIOS(?, "mu2090", "MU 2.0, 90")  // pokes only or full toolkit?       NO DUMP?
+    ROM_SYSTEM_BIOS(?, "mu2090", "MU 2.0, 90")  // pokes only or full toolkit?       NO DUMP?
-	ROMX_LOAD("mf1_20_90.rom", 0x0000, 0x2000, CRC(2eaf8e41) SHA1(?), ROM_BIOS(?))
+    ROMX_LOAD("mf1_20_90.rom", 0x0000, 0x2000, CRC(2eaf8e41) SHA1(?), ROM_BIOS(?))
 
-	ROM_SYSTEM_BIOS(?, "v24", "MU ?? 93 (Brazilian clone)")  //                      NO DUMP?
+    ROM_SYSTEM_BIOS(?, "v24", "MU ?? 93 (Brazilian clone)")  //                      NO DUMP?
-	ROMX_LOAD("mf1_bc_fe.rom", 0x0000, 0x2000, CRC(8c17113b) SHA1(?), ROM_BIOS(?))
+    ROMX_LOAD("mf1_bc_fe.rom", 0x0000, 0x2000, CRC(8c17113b) SHA1(?), ROM_BIOS(?))
 */
 
 ROM_START(mface128)
@@ -304,7 +304,7 @@ void spectrum_mface_base_device::pre_opcode_fetch(offs_t offset)
 uint8_t spectrum_mface1_device::iorq_r(offs_t offset)
 {
 	uint8_t data = m_exp->iorq_r(offset);
-	
+
 	if (!machine().side_effects_disabled())
 	{
 		switch (offset & 0xff)
@@ -392,7 +392,7 @@ void spectrum_mface1_device::iorq_w(offs_t offset, uint8_t data)
 		m_slot->nmi_w(CLEAR_LINE);
 		break;
 	}
-	
+
 	m_exp->iorq_w(offset, data);
 }
 
@@ -451,7 +451,7 @@ INPUT_CHANGED_MEMBER(spectrum_mface1_device::magic_button)
 {
 	if (newval && !oldval)  // key released
 	{
-		
+
 	}
 	else  // key pressed
 	{

src/devices/bus/spectrum/mface.h

@@ -54,7 +54,7 @@ class spectrum_mface1_device : public spectrum_mface_base_device
 {
 public:
 	spectrum_mface1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-	
+
 	DECLARE_INPUT_CHANGED_MEMBER(magic_button) override;
 
 protected:
@@ -64,7 +64,7 @@ protected:
 
 	virtual uint8_t iorq_r(offs_t offset) override;
 	virtual void iorq_w(offs_t offset, uint8_t data) override;
-	
+
 private:
 	required_ioport m_joy;
 	required_ioport m_hwconfig;

src/devices/bus/spectrum/mgt.cpp

@@ -2,141 +2,141 @@
 // copyright-holders:TwistedTom
 /**********************************************************************
 
-	DISCiPLE Multi-purpose Interface
+    DISCiPLE Multi-purpose Interface
-	+D Disk and Printer Interface
+    +D Disk and Printer Interface
-	
+
-	Miles Gordon Technology, UK, 1986-1990 (also produced the Sam Coupé home computer.)
+    Miles Gordon Technology, UK, 1986-1990 (also produced the Sam Coupé home computer.)
-	
+
-	DISCiPLE was MGT's first disk interface, a large plastic base that sat under the Spectrum, similar to Sinclair's official Interface 1.
+    DISCiPLE was MGT's first disk interface, a large plastic base that sat under the Spectrum, similar to Sinclair's official Interface 1.
-	+D was MGT's second (and last) disk interface, a cost and feature reduced version of the Disciple, a small metal-cased,
+    +D was MGT's second (and last) disk interface, a cost and feature reduced version of the Disciple, a small metal-cased,
-	stand-alone unit which connects to ZX Spectrum's expansion slot via a ribbon cable.
+    stand-alone unit which connects to ZX Spectrum's expansion slot via a ribbon cable.
-	A second Datel version of the +D exists (following the closure of MGT, it was licensed and produced by Datel.)
+    A second Datel version of the +D exists (following the closure of MGT, it was licensed and produced by Datel.)
-	Many unofficial versions of +D exist and modern versions are still seen today as DIY-style projects/kits.
+    Many unofficial versions of +D exist and modern versions are still seen today as DIY-style projects/kits.
-	It's said the device's design and roms were officially released into the public domain at some point?
+    It's said the device's design and roms were officially released into the public domain at some point?
-	
+
-	DISCiPLE features:
+    DISCiPLE features:
-	8KB ROM
+    8KB ROM
-	8KB RAM
+    8KB RAM
-	single floppy disk interface (2 drives)
+    single floppy disk interface (2 drives)
-	Centronics parallel printer interface
+    Centronics parallel printer interface
-	"magic button" style memory snapshot grabber
+    "magic button" style memory snapshot grabber
-	2 ATARI joystick ports (Sinclair 1/Kempston, Sinclair 2)
+    2 ATARI joystick ports (Sinclair 1/Kempston, Sinclair 2)
-	2 network connectors (Interface 1 compatible, 3.5mm mono jack)
+    2 network connectors (Interface 1 compatible, 3.5mm mono jack)
-	inhibit button (to lock out the interface)
+    inhibit button (to lock out the interface)
-	pass-through expansion connector (to chain other devices)
+    pass-through expansion connector (to chain other devices)
-	
+
-	+D features:
+    +D features:
-	same as DISCiPLE
+    same as DISCiPLE
-	lost the joystick/network ports, inhibit button and pass-through expansion connector
+    lost the joystick/network ports, inhibit button and pass-through expansion connector
-	
+
-	DISCiPLE's official DOS was "GDOS".
+    DISCiPLE's official DOS was "GDOS".
-	+D's official DOS was "G+DOS".
+    +D's official DOS was "G+DOS".
-	Both of these were later superseded by "SAM DOS" (used by MGT's Sam Coupé.)
+    Both of these were later superseded by "SAM DOS" (used by MGT's Sam Coupé.)
-	A 3rd party company SD Software released an alternative DOS "UNI-DOS" for both interfaces. (consisting of a disk and replacement ROM)
+    A 3rd party company SD Software released an alternative DOS "UNI-DOS" for both interfaces. (consisting of a disk and replacement ROM)
-	
+
-	FDD support:
+    FDD support:
-	
+
-	DISCiPLE's manual states any Shugart 400 SD/DD drive should work:
+    DISCiPLE's manual states any Shugart 400 SD/DD drive should work:
-	"The disciple will accept 5.25" or 3.5" drives, whether they are 40 track or 80 track,
+    "The disciple will accept 5.25" or 3.5" drives, whether they are 40 track or 80 track,
-	 single sided or double sided, single density or double density."
+     single sided or double sided, single density or double density."
-	 
+
-	+D's manual states any Shugart 400 DD drive should work (but not SD)
+    +D's manual states any Shugart 400 DD drive should work (but not SD)
-	"we recommend 3.5" or 5.25" 80-track double sided and double density drives,
+    "we recommend 3.5" or 5.25" 80-track double sided and double density drives,
-	 which will give you up to 780K of storage per drive. But Shugart
+     which will give you up to 780K of storage per drive. But Shugart
-	 400-type 3" drives will also work."
+     400-type 3" drives will also work."
-	
+
-	+D only: Pin 26 /DDEN of the WD1772 is tied to ground, so permanent DD mode.
+    +D only: Pin 26 /DDEN of the WD1772 is tied to ground, so permanent DD mode.
-	DISCiPLE only: /DDEN can be directly controlled via s/w by an IO write to 0x1f, bit 2.
+    DISCiPLE only: /DDEN can be directly controlled via s/w by an IO write to 0x1f, bit 2.
-	
+
-	Disks use "MGT filesystem".
+    Disks use "MGT filesystem".
-	A good description available at https://faqwiki.zxnet.co.uk/wiki/MGT_filesystem
+    A good description available at https://faqwiki.zxnet.co.uk/wiki/MGT_filesystem
-	
+
-	Disk format is 512 bytes/sector, 10 sectors/track
+    Disk format is 512 bytes/sector, 10 sectors/track
-	40 track, 1 side = 204,800 bytes (512*10*40*1)
+    40 track, 1 side = 204,800 bytes (512*10*40*1)
-	40 track, 2 side = 409,600 bytes
+    40 track, 2 side = 409,600 bytes
-	80 track, 1 side = 409,600 bytes
+    80 track, 1 side = 409,600 bytes
-	80 track, 2 side = 819,200 bytes  <-- only this one supported so far
+    80 track, 2 side = 819,200 bytes  <-- only this one supported so far
-	
+
-	.mgt files work ok
+    .mgt files work ok
-	.img files don't work (not in coupedsk.cpp)
+    .img files don't work (not in coupedsk.cpp)
-	
+
-	The DOS must be loaded from a "System Disk" which is itself created from "System Tape" which was supplied with the unit.
+    The DOS must be loaded from a "System Disk" which is itself created from "System Tape" which was supplied with the unit.
-	The ROM provides just the RUN command, which boots the system disk and loads the full DOS.
+    The ROM provides just the RUN command, which boots the system disk and loads the full DOS.
-	Presumably the unit wasn't supplied with a system disk due to wide range of drives that can be used? (3", 3.5", 5.25")
+    Presumably the unit wasn't supplied with a system disk due to wide range of drives that can be used? (3", 3.5", 5.25")
-	The DOS survives a reset, so reloading of system disk is only required after full power cycle.
+    The DOS survives a reset, so reloading of system disk is only required after full power cycle.
-	
+
-	A few useful commands:
+    A few useful commands:
-	RUN                            Boots the system
+    RUN                            Boots the system
-	CAT 1                          Displays catalogue (drive 1)
+    CAT 1                          Displays catalogue (drive 1)
-	CAT 1!                         Displays shortened catalogue (drive 1)
+    CAT 1!                         Displays shortened catalogue (drive 1)
-	SAVE D1 "filename"             Saves file
+    SAVE D1 "filename"             Saves file
-	VERIFY D1 "filename"           Confirms save has been made
+    VERIFY D1 "filename"           Confirms save has been made
-	LOAD D1 "filename"             Loads file (except Snapshot files)
+    LOAD D1 "filename"             Loads file (except Snapshot files)
-	LOAD D1 "filename" S           Loads 48K Snapshot file
+    LOAD D1 "filename" S           Loads 48K Snapshot file
-	LOAD D1 "filename" K           Loads 128K Snapshot file
+    LOAD D1 "filename" K           Loads 128K Snapshot file
-	LOAD D1 "filename" SCREEN$     Loads screen file
+    LOAD D1 "filename" SCREEN$     Loads screen file
-	LOAD Pn                        Loads the program (from its number)
+    LOAD Pn                        Loads the program (from its number)
-	ERASE D1 "file" TO "new file"  Renames a file
+    ERASE D1 "file" TO "new file"  Renames a file
-	ERASE D1 "filename"            Erases a file
+    ERASE D1 "filename"            Erases a file
-	SAVE D1 "file" TO D2           Copies a file from drive1 to drive2
+    SAVE D1 "file" TO D2           Copies a file from drive1 to drive2
-	FORMAT D1                      Formats disc in drive 1
+    FORMAT D1                      Formats disc in drive 1
-	FORMAT D1 TO 2                 Formats drive 1; copies from 2 to 1
+    FORMAT D1 TO 2                 Formats drive 1; copies from 2 to 1
-	
+
-	DISCiPLE snapshot button:
+    DISCiPLE snapshot button:
-	Caps Shift + button   system freezes with a multi-coloured border effect
+    Caps Shift + button   system freezes with a multi-coloured border effect
-	then, key 3           save current SCREEN
+    then, key 3           save current SCREEN
-	          4           save 48K PROGRAM
+              4           save 48K PROGRAM
-	          5           save 128K PROGRAM
+              5           save 128K PROGRAM
-	Caps Shift + number saves to drive 2 (or 1 if running from 2)
+    Caps Shift + number saves to drive 2 (or 1 if running from 2)
-	
+
-	+D snapshot button:
+    +D snapshot button:
-	button           system freezes with a multi-coloured border effect  (don't need to hold caps shift)
+    button           system freezes with a multi-coloured border effect  (don't need to hold caps shift)
-	then, key 3      save current SCREEN
+    then, key 3      save current SCREEN
-	          4      save 48K PROGRAM
+              4      save 48K PROGRAM
-	          5      save 128K PROGRAM
+              5      save 128K PROGRAM
-	          X      do nothing, return to running program
+              X      do nothing, return to running program
-	Caps Shift + number saves to drive 2 (or 1 if running from 2)
+    Caps Shift + number saves to drive 2 (or 1 if running from 2)
-	
+
-	DISCiPLE GDOS versions:
+    DISCiPLE GDOS versions:
-	The rom/system disk versions must match,
+    The rom/system disk versions must match,
-	v2 rom: use system disk/system tape ver 2, 2b, 2c
+    v2 rom: use system disk/system tape ver 2, 2b, 2c
-	v3 rom: use system disk/system tape ver 3a, 3b or 3d
+    v3 rom: use system disk/system tape ver 3a, 3b or 3d
-	
+
-	+D G+DOS versions:
+    +D G+DOS versions:
-	a v1 (-non a) exists but has yet to be found/dumped,
+    a v1 (-non a) exists but has yet to be found/dumped,
-	from "pick-poke-it" user manual:
+    from "pick-poke-it" user manual:
-	 "A few PLUS D users are still using Version 1 of the ROM which was used in PLUS D's sold in December 1987-January 1988.
+     "A few PLUS D users are still using Version 1 of the ROM which was used in PLUS D's sold in December 1987-January 1988.
-	  ... check the serial number on the bottom of your PLUS D. If it's a 4-figure number commencing with 1,
+      ... check the serial number on the bottom of your PLUS D. If it's a 4-figure number commencing with 1,
-	  then you have a PLUS D with the Version 1 ROM."
+      then you have a PLUS D with the Version 1 ROM."
-	
+
-	DISCiPLE only curiosities:
+    DISCiPLE only curiosities:
-	The pass-through expansion connector has 4 extra pins (1 top/bottom each end)
+    The pass-through expansion connector has 4 extra pins (1 top/bottom each end)
-	so 2x30 pins compared to ususal 2x28 of Spectrum expansion slot.
+    so 2x30 pins compared to ususal 2x28 of Spectrum expansion slot.
-	Presumably this was intended for some unique expansion device that never appeared?
+    Presumably this was intended for some unique expansion device that never appeared?
-	One of these extra pins can be directly controlled via s/w by an IO write to 0x1f, bit 5.
+    One of these extra pins can be directly controlled via s/w by an IO write to 0x1f, bit 5.
-	2 other pins appear to be able to override the /ce signal from PAL ic9 to the rom.
+    2 other pins appear to be able to override the /ce signal from PAL ic9 to the rom.
-	4th pin is unused.
+    4th pin is unused.
-	
+
-	The design allows for use of a larger 27128 (16KB) rom,
+    The design allows for use of a larger 27128 (16KB) rom,
-	with the highest address line A13 controllable via s/w by an IO write to 0x1f, bit 3.
+    with the highest address line A13 controllable via s/w by an IO write to 0x1f, bit 3.
-	No larger roms seem to exist (or perhaps not yet found...?)
+    No larger roms seem to exist (or perhaps not yet found...?)
-	Some 16KB dumps can be found but these are combined dumps of the 8KB rom and 8KB ram (with the full DOS loaded). 
+    Some 16KB dumps can be found but these are combined dumps of the 8KB rom and 8KB ram (with the full DOS loaded).
-	
+
-	
+
-	Current status:
+    Current status:
-	--------------
+    --------------
-	
+
-	DISCiPLE
+    DISCiPLE
-	GDOS v3: all ok, occassional "no system file" when loading system disk, ok on 2nd attempt
+    GDOS v3: all ok, occassional "no system file" when loading system disk, ok on 2nd attempt
-	GDOS v2: all ok
+    GDOS v2: all ok
-	UNIDOS:  all ok
+    UNIDOS:  all ok
-	
+
-	+D
+    +D
-	G+DOS:  all ok
+    G+DOS:  all ok
-	UNIDOS: all ok
+    UNIDOS: all ok
-	
+
-	
+
-	Not working with 128K/+2 yet...
+    Not working with 128K/+2 yet...
 
 **********************************************************************/
 
@@ -167,17 +167,17 @@ INPUT_PORTS_END
 
 INPUT_PORTS_START(disciple)
 	PORT_INCLUDE(plusd)
-	
+
 	// Joystick 1 (right-hand) is both Kempston (port 0x1f) and Sinclair 1 (keys 6,7,8,9,0)
 	// Joystick 2 (left-hand) is Sinclair 2 (keys 1,2,3,4,5)
-	
+
 	PORT_START("JOY1") /* Sinclair 1 (keys 6,7,8,9,0) 0xeffe , Kempston 0x1f */
 	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_BUTTON1)                  PORT_PLAYER(1) PORT_NAME("Kempston\\Sinclair P1 Button 1")
 	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_UP)    PORT_8WAY PORT_PLAYER(1) PORT_NAME("Kempston\\Sinclair P1 Up")
 	PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN)  PORT_8WAY PORT_PLAYER(1) PORT_NAME("Kempston\\Sinclair P1 Down")
 	PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT) PORT_8WAY PORT_PLAYER(1) PORT_NAME("Kempston\\Sinclair P1 Right")
 	PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT)  PORT_8WAY PORT_PLAYER(1) PORT_NAME("Kempston\\Sinclair P1 Left")
-	
+
 	PORT_START("JOY2") /* Sinclair 2 (keys 1,2,3,4,5) 0xf7fe */
 	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT)  PORT_8WAY PORT_PLAYER(2) PORT_NAME("Sinclair P2 Left")     PORT_CODE(KEYCODE_4_PAD)
 	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT) PORT_8WAY PORT_PLAYER(2) PORT_NAME("Sinclair P2 Right")    PORT_CODE(KEYCODE_6_PAD)
@@ -223,15 +223,15 @@ FLOPPY_FORMATS_END
 
 ROM_START(plusd)
 	ROM_REGION(0x2000, "rom", 0)
-	
+
 	ROM_DEFAULT_BIOS("gdos")
-	
+
 	ROM_SYSTEM_BIOS(0, "gdos", "G+DOS v1a")
 	ROMX_LOAD("plusd_g.rom", 0x0000, 0x2000, CRC(569f7e55) SHA1(6b841dc5797ef7eb219ad455cd1e434ca3b9d30d), ROM_BIOS(0))
-	
+
 	ROM_SYSTEM_BIOS(1, "unidos", "UNI-DOS v2")
 	ROMX_LOAD("plusd_uni.rom", 0x0000, 0x2000, CRC(60920496) SHA1(399c8c7c8335bc59849a2182c32347603fd0288a), ROM_BIOS(1))
-	
+
 	ROM_REGION( 0x200, "plds", 0 )
 	ROM_LOAD( "alice_pal20l8.ic4", 0x000, 0x144, CRC(60135856) SHA1(41273f13a3680b29ba84ae1e85829482c783c55e) )
 ROM_END
@@ -242,18 +242,18 @@ ROM_END
 
 ROM_START(disciple)
 	ROM_REGION(0x2000, "rom", 0)
-	
+
 	ROM_DEFAULT_BIOS("gdos")
-	
+
 	ROM_SYSTEM_BIOS(0, "gdos", "GDOS v3")
 	ROMX_LOAD("disciple_g.rom", 0x0000, 0x2000, CRC(82047489) SHA1(9a75ed4b293f968985be4c9aa893cd88276d1ced), ROM_BIOS(0))
-	
+
 	ROM_SYSTEM_BIOS(1, "gdos2", "GDOS v2")
 	ROMX_LOAD("disciple_g2.rom", 0x0000, 0x2000, CRC(9d971781) SHA1(a03e67e4ee275a85153843f42269fa980875d551), ROM_BIOS(1))
-	
+
 	ROM_SYSTEM_BIOS(2, "unidos", "UNI-DOS v2")
 	ROMX_LOAD("disciple_uni.rom", 0x0000, 0x2000, CRC(1fe7f4fa) SHA1(6277abe6358c99ab894795536a1eb9393f25b9b1), ROM_BIOS(2))
-	
+
 	ROM_REGION( 0x400, "plds", 0 )
 	ROM_LOAD( "pal20l8.ic8", 0x000, 0x144, CRC(e53b2fcc) SHA1(85ce9634890d41be37cd9e0252698e5350a4c9c9) )
 	ROM_LOAD( "pal20l8.ic9", 0x200, 0x144, CRC(43ff2e38) SHA1(b872377ea9f91b29a811b0d484699ffe87bdf9fd) )
@@ -268,11 +268,11 @@ void spectrum_plusd_device::device_add_mconfig(machine_config &config)
 	WD1772(config, m_fdc, 8_MHz_XTAL);
 	FLOPPY_CONNECTOR(config, "fdc:0", plusd_floppies, "35dd", spectrum_plusd_device::floppy_formats).enable_sound(true);
 	FLOPPY_CONNECTOR(config, "fdc:1", plusd_floppies, "35dd", spectrum_plusd_device::floppy_formats).enable_sound(true);
-	
+
 	/* printer port */
 	CENTRONICS(config, m_centronics, centronics_devices, "printer");
 	m_centronics->busy_handler().set(FUNC(spectrum_plusd_device::busy_w));
-	
+
 	/* software list */
 	SOFTWARE_LIST(config, "flop_list").set_original("spectrum_mgt_flop");
 }
@@ -280,7 +280,7 @@ void spectrum_plusd_device::device_add_mconfig(machine_config &config)
 void spectrum_disciple_device::device_add_mconfig(machine_config &config)
 {
 	spectrum_plusd_device::device_add_mconfig(config);
-	
+
 	/* pass-through */
 	SPECTRUM_EXPANSION_SLOT(config, m_exp, spectrum_expansion_devices, nullptr);
 	m_exp->irq_handler().set(DEVICE_SELF_OWNER, FUNC(spectrum_expansion_slot_device::irq_w));
@@ -411,7 +411,7 @@ uint8_t spectrum_plusd_device::iorq_r(offs_t offset)
 		data = m_centronics_busy ? 0x80 : 0x00;
 		break;
 	}
-	
+
 	return data;
 }
 
@@ -512,7 +512,7 @@ READ_LINE_MEMBER(spectrum_disciple_device::romcs)
 void spectrum_disciple_device::pre_opcode_fetch(offs_t offset)
 {
 	m_exp->pre_opcode_fetch(offset);
-	
+
 	if (!machine().side_effects_disabled())
 	{
 		switch (offset)
@@ -559,7 +559,7 @@ uint8_t spectrum_disciple_device::iorq_r(offs_t offset)
 			data = m_joy2->read() | (0xff ^ 0x1f);
 		break;
 	}
-	
+
 	return data;
 }
 
@@ -606,7 +606,7 @@ void spectrum_disciple_device::iorq_w(offs_t offset, uint8_t data)
 		m_centronics->write_data7(BIT(data, 7));
 		break;
 	}
-	
+
 	m_exp->iorq_w(offset, data);
 }
 
@@ -641,7 +641,7 @@ uint8_t spectrum_disciple_device::mreq_r(offs_t offset)
 			}
 		}
 	}
-	
+
 	if (m_exp->romcs())
 		data &= m_exp->mreq_r(offset);
 
@@ -671,7 +671,7 @@ void spectrum_disciple_device::mreq_w(offs_t offset, uint8_t data)
 			}
 		}
 	}
-	
+
 	if (m_exp->romcs())
 		m_exp->mreq_w(offset, data);
 }

src/devices/bus/spectrum/mgt.h

@@ -2,10 +2,10 @@
 // copyright-holders:TwistedTom
 /**********************************************************************
 
-	DISCiPLE Multi-purpose Interface
+    DISCiPLE Multi-purpose Interface
-	+D Disk and Printer Interface
+    +D Disk and Printer Interface
-	
+
-	(Miles Gordon Technology)
+    (Miles Gordon Technology)
 
 **********************************************************************/
 
@@ -30,7 +30,7 @@ class spectrum_plusd_device: public device_t, public device_spectrum_expansion_i
 public:
 	// construction/destruction
 	spectrum_plusd_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-	
+
 	DECLARE_FLOPPY_FORMATS(floppy_formats);
 	DECLARE_INPUT_CHANGED_MEMBER(snapshot_button);
 

src/devices/bus/ti99/colorbus/colorbus.cpp

@@ -58,7 +58,7 @@ void v9938_colorbus_device::device_start()
 /*****************************************************************************/
 
 device_v9938_colorbus_interface::device_v9938_colorbus_interface(const machine_config &mconfig, device_t &device)
-	:	device_interface(device, "v9938colorbus"),
+	:   device_interface(device, "v9938colorbus"),
 		m_colorbus(nullptr)
 {
 }

src/devices/bus/ti99/joyport/joyport.cpp

@@ -45,7 +45,7 @@ DEFINE_DEVICE_TYPE_NS(TI99_JOYPORT, bus::ti99::joyport, joyport_device, "ti99_jo
 namespace bus { namespace ti99 { namespace joyport {
 
 device_ti99_joyport_interface::device_ti99_joyport_interface(const machine_config &config, device_t &device)
-	:	device_interface(device, "ti99joyport"),
+	:   device_interface(device, "ti99joyport"),
 		m_joyport(nullptr)
 {
 }

src/devices/cpu/sparc/sparc.h

@@ -334,10 +334,10 @@ enum
 	SPARC_PS,
 
 	SPARC_FSR,
-	SPARC_F0,	SPARC_F1,	SPARC_F2,	SPARC_F3,	SPARC_F4,	SPARC_F5,	SPARC_F6,	SPARC_F7,
+	SPARC_F0,   SPARC_F1,   SPARC_F2,   SPARC_F3,   SPARC_F4,   SPARC_F5,   SPARC_F6,   SPARC_F7,
-	SPARC_F8,	SPARC_F9,	SPARC_F10,	SPARC_F11,	SPARC_F12,	SPARC_F13,	SPARC_F14,	SPARC_F15,
+	SPARC_F8,   SPARC_F9,   SPARC_F10,  SPARC_F11,  SPARC_F12,  SPARC_F13,  SPARC_F14,  SPARC_F15,
-	SPARC_F16,	SPARC_F17,	SPARC_F18,	SPARC_F19,	SPARC_F20,	SPARC_F21,	SPARC_F22,	SPARC_F23,
+	SPARC_F16,  SPARC_F17,  SPARC_F18,  SPARC_F19,  SPARC_F20,  SPARC_F21,  SPARC_F22,  SPARC_F23,
-	SPARC_F24,	SPARC_F25,	SPARC_F26,	SPARC_F27,	SPARC_F28,	SPARC_F29,	SPARC_F30,	SPARC_F31,
+	SPARC_F24,  SPARC_F25,  SPARC_F26,  SPARC_F27,  SPARC_F28,  SPARC_F29,  SPARC_F30,  SPARC_F31,
 
 	SPARC_R0,   SPARC_R1,   SPARC_R2,   SPARC_R3,   SPARC_R4,   SPARC_R5,   SPARC_R6,   SPARC_R7,   SPARC_R8,   SPARC_R9,   SPARC_R10,  SPARC_R11,  SPARC_R12,  SPARC_R13,  SPARC_R14,  SPARC_R15,
 	SPARC_R16,  SPARC_R17,  SPARC_R18,  SPARC_R19,  SPARC_R20,  SPARC_R21,  SPARC_R22,  SPARC_R23,  SPARC_R24,  SPARC_R25,  SPARC_R26,  SPARC_R27,  SPARC_R28,  SPARC_R29,  SPARC_R30,  SPARC_R31,

src/devices/cpu/sparc/sparcdefs.h

@@ -390,95 +390,95 @@
 #define SDIVCC  (OP3 == OP3_SDIVCC)
 
 #define FSR_CEXC_MASK       0x0000001f
-#define FSR_CEXC_NXC       	0x00000001
+#define FSR_CEXC_NXC        0x00000001
-#define FSR_CEXC_DZC       	0x00000002
+#define FSR_CEXC_DZC        0x00000002
-#define FSR_CEXC_UFC       	0x00000004
+#define FSR_CEXC_UFC        0x00000004
-#define FSR_CEXC_OFC       	0x00000008
+#define FSR_CEXC_OFC        0x00000008
-#define FSR_CEXC_NVC       	0x00000010
+#define FSR_CEXC_NVC        0x00000010
 
-#define FSR_AEXC_SHIFT		5
+#define FSR_AEXC_SHIFT      5
 #define FSR_AEXC_MASK       0x000003e0
-#define FSR_AEXC_NXA       	0x00000020
+#define FSR_AEXC_NXA        0x00000020
-#define FSR_AEXC_DZA       	0x00000040
+#define FSR_AEXC_DZA        0x00000040
-#define FSR_AEXC_UFA       	0x00000080
+#define FSR_AEXC_UFA        0x00000080
-#define FSR_AEXC_OFA       	0x00000100
+#define FSR_AEXC_OFA        0x00000100
-#define FSR_AEXC_NVA       	0x00000200
+#define FSR_AEXC_NVA        0x00000200
 
-#define FSR_FCC_SHIFT		10
+#define FSR_FCC_SHIFT       10
-#define FSR_FCC_MASK		0x00000c00
+#define FSR_FCC_MASK        0x00000c00
-#define FSR_FCC_EQ			0x00000000
+#define FSR_FCC_EQ          0x00000000
-#define FSR_FCC_LT			0x00000400
+#define FSR_FCC_LT          0x00000400
-#define FSR_FCC_GT			0x00000800
+#define FSR_FCC_GT          0x00000800
-#define FSR_FCC_UO			0x00000c00
+#define FSR_FCC_UO          0x00000c00
 
-#define FSR_QNE				0x00002000
+#define FSR_QNE             0x00002000
 
-#define FSR_FTT_MASK		0x0001c000
+#define FSR_FTT_MASK        0x0001c000
-#define FSR_FTT_NONE		0x00000000
+#define FSR_FTT_NONE        0x00000000
-#define FSR_FTT_IEEE		0x00004000
+#define FSR_FTT_IEEE        0x00004000
-#define FSR_FTT_UNFIN		0x00008000
+#define FSR_FTT_UNFIN       0x00008000
-#define FSR_FTT_UNIMP		0x0000c000
+#define FSR_FTT_UNIMP       0x0000c000
-#define FSR_FTT_SEQ			0x00010000
+#define FSR_FTT_SEQ         0x00010000
 
-#define FSR_VER				0x00020000
+#define FSR_VER             0x00020000
 
-#define FSR_NS				0x00400000
+#define FSR_NS              0x00400000
 
-#define FSR_TEM_SHIFT		23
+#define FSR_TEM_SHIFT       23
-#define FSR_TEM_MASK		0x0f800000
+#define FSR_TEM_MASK        0x0f800000
-#define FSR_TEM_NXM			0x00800000
+#define FSR_TEM_NXM         0x00800000
-#define FSR_TEM_DZM			0x01000000
+#define FSR_TEM_DZM         0x01000000
-#define FSR_TEM_UFM			0x02000000
+#define FSR_TEM_UFM         0x02000000
-#define FSR_TEM_OFM			0x04000000
+#define FSR_TEM_OFM         0x04000000
-#define FSR_TEM_NVM			0x08000000
+#define FSR_TEM_NVM         0x08000000
 
-#define FSR_RD_SHIFT		30
+#define FSR_RD_SHIFT        30
-#define FSR_RD_MASK			0xc0000000
+#define FSR_RD_MASK         0xc0000000
-#define FSR_RD_NEAR			0x00000000
+#define FSR_RD_NEAR         0x00000000
-#define FSR_RD_ZERO			0x40000000
+#define FSR_RD_ZERO         0x40000000
-#define FSR_RD_UP			0x80000000
+#define FSR_RD_UP           0x80000000
-#define FSR_RD_DOWN			0xc0000000
+#define FSR_RD_DOWN         0xc0000000
 
-#define FSR_RESV_MASK		0x30301000
+#define FSR_RESV_MASK       0x30301000
 
 // FPop1
-#define FPOP_FMOVS			0x001
+#define FPOP_FMOVS          0x001
-#define FPOP_FNEGS			0x005
+#define FPOP_FNEGS          0x005
-#define FPOP_FABSS			0x009
+#define FPOP_FABSS          0x009
-#define FPOP_FSQRTS			0x029
+#define FPOP_FSQRTS         0x029
-#define FPOP_FSQRTD			0x02a
+#define FPOP_FSQRTD         0x02a
-#define FPOP_FSQRTX			0x02b
+#define FPOP_FSQRTX         0x02b
-#define FPOP_FADDS			0x041
+#define FPOP_FADDS          0x041
-#define FPOP_FADDD			0x042
+#define FPOP_FADDD          0x042
-#define FPOP_FADDX			0x043
+#define FPOP_FADDX          0x043
-#define FPOP_FSUBS			0x045
+#define FPOP_FSUBS          0x045
-#define FPOP_FSUBD			0x046
+#define FPOP_FSUBD          0x046
-#define FPOP_FSUBX			0x047
+#define FPOP_FSUBX          0x047
-#define FPOP_FMULS			0x049
+#define FPOP_FMULS          0x049
-#define FPOP_FMULD			0x04a
+#define FPOP_FMULD          0x04a
-#define FPOP_FMULX			0x04b
+#define FPOP_FMULX          0x04b
-#define FPOP_FDIVS			0x04d
+#define FPOP_FDIVS          0x04d
-#define FPOP_FDIVD			0x04e
+#define FPOP_FDIVD          0x04e
-#define FPOP_FDIVX			0x04f
+#define FPOP_FDIVX          0x04f
-#define FPOP_FITOS			0x0c4
+#define FPOP_FITOS          0x0c4
-#define FPOP_FDTOS			0x0c6
+#define FPOP_FDTOS          0x0c6
-#define FPOP_FXTOS			0x0c7
+#define FPOP_FXTOS          0x0c7
-#define FPOP_FITOD			0x0c8
+#define FPOP_FITOD          0x0c8
-#define FPOP_FSTOD			0x0c9
+#define FPOP_FSTOD          0x0c9
-#define FPOP_FXTOD			0x0cb
+#define FPOP_FXTOD          0x0cb
-#define FPOP_FITOX			0x0cc
+#define FPOP_FITOX          0x0cc
-#define FPOP_FSTOX			0x0cd
+#define FPOP_FSTOX          0x0cd
-#define FPOP_FDTOX			0x0ce
+#define FPOP_FDTOX          0x0ce
-#define FPOP_FSTOI			0x0d1
+#define FPOP_FSTOI          0x0d1
-#define FPOP_FDTOI			0x0d2
+#define FPOP_FDTOI          0x0d2
-#define FPOP_FXTOI			0x0d3
+#define FPOP_FXTOI          0x0d3
 
 // FPop2
-#define FPOP_FCMPS			0x051
+#define FPOP_FCMPS          0x051
-#define FPOP_FCMPD			0x052
+#define FPOP_FCMPD          0x052
-#define FPOP_FCMPX			0x053
+#define FPOP_FCMPX          0x053
-#define FPOP_FCMPES			0x055
+#define FPOP_FCMPES         0x055
-#define FPOP_FCMPED			0x056
+#define FPOP_FCMPED         0x056
-#define FPOP_FCMPEX			0x057
+#define FPOP_FCMPEX         0x057
 
 #endif // CPU_SPARC_SPARC_DEFS_H

src/devices/machine/mb8421.cpp

@@ -13,7 +13,7 @@
 
     IDT71321 is function compatible, but not pin compatible with MB8421
     IDT7130 is 1KB variation of IDT71321
-	CY7C131 is similar as IDT7130
+    CY7C131 is similar as IDT7130
 
 **********************************************************************/
 

src/devices/machine/mb8421.h

@@ -6,9 +6,9 @@
 
     Fujitsu MB8421/22/31/32-90/-90L/-90LL/-12/-12L/-12LL
     CMOS 16K-bit (2KB) dual-port SRAM (pinouts : see below)
-	IDT 71321 16K-bit (2Kx8) dual port SRAM
+    IDT 71321 16K-bit (2Kx8) dual port SRAM
-	IDT 7130 8K-bit (1Kx8) dual port SRAM
+    IDT 7130 8K-bit (1Kx8) dual port SRAM
-	Cypress CY7C131 8K-bit (1Kx8) dual port SRAM
+    Cypress CY7C131 8K-bit (1Kx8) dual port SRAM
 
 ***********************************************************************
                             _____________

src/devices/machine/netlist.cpp

@@ -233,7 +233,7 @@ public:
 		, m_in(*this, "IN")
 		, m_cpu_device(nullptr)
 		, m_last(*this, "m_last", 0)
-//		, m_supply(*this)
+//      , m_supply(*this)
 	{
 		auto *nl = dynamic_cast<netlist_mame_device::netlist_mame_t *>(&state());
 		if (nl != nullptr)

src/devices/machine/swtpc8212.cpp

@@ -121,17 +121,17 @@ in mind that it is an ASCII terminal so try an ISO-8859-1 locale, and also that
 it has no tabs so it needs tab to space translation.
 
 swtp|ct8212|southwest technical products ct8212,
-	cols#82, lines#24,
+    cols#82, lines#24,
-	bel=^G, civis=^E, clear=^L, cnorm=^U, cr=\r,
+    bel=^G, civis=^E, clear=^L, cnorm=^U, cr=\r,
-	cub=^\^D%p1%c, cub1=^D, cud=^\^B%p1%c, cud1=^B,
+    cub=^\^D%p1%c, cub1=^D, cud=^\^B%p1%c, cud1=^B,
-	cuf1=^R, cup=^K%p2%{32}%+%c%p1%{32}%+%c,
+    cuf1=^R, cup=^K%p2%{32}%+%c%p1%{32}%+%c,
-	cuu=^\^A%p1%c, cuu1=^A, dch1=^\^H, dl1=^Z, ed=^V, el=^F,
+    cuu=^\^A%p1%c, cuu1=^A, dch1=^\^H, dl1=^Z, ed=^V, el=^F,
-	el1=^\^F, home=^P, hpa=^\^W%p1%{32}%+%c, ich1=^\^X,
+    el1=^\^F, home=^P, hpa=^\^W%p1%{32}%+%c, ich1=^\^X,
-	il1=^\^Y, ind=^N,
+    il1=^\^Y, ind=^N,
-	is2=^_^A$<250>^\^R$<50>^^^D^^^T^_^J\040^^^G^^^O^^^Z^]^W^I^R,
+    is2=^_^A$<250>^\^R$<50>^^^D^^^T^_^J\040^^^G^^^O^^^Z^]^W^I^R,
-	kbs=^H, kcub1=^B, kcud1=^N, kcuf1=^F, kcuu1=^P, khome=^A,
+    kbs=^H, kcub1=^B, kcud1=^N, kcuf1=^F, kcuu1=^P, khome=^A,
-	ll=^C, mc4=^]^G, mc5=^]^K, nel=\r\n, ri=^O, rmir=, rmso=^^^F,
+    ll=^C, mc4=^]^G, mc5=^]^K, nel=\r\n, ri=^O, rmir=, rmso=^^^F,
-	smir=, smso=^^^V, vpa=^\^G%p1%{32}%+%c,
+    smir=, smso=^^^V, vpa=^\^G%p1%{32}%+%c,
 
 ****************************************************************************/
 

src/devices/machine/wd_fdc.cpp

@@ -2898,7 +2898,7 @@ wd1772_device::wd1772_device(const machine_config &mconfig, const char *tag, dev
 	head_control = false;
 	motor_control = true;
 	ready_hooked = false;
-	
+
 	/* Sam Coupe/+D/Disciple expect a 0xd0 force interrupt command to cause a spin-up.
 	   eg. +D issues 2x 0xd0, then waits for index pulses to start, bails out with no disk error if that doesn't happen.
 	   Not sure if other chips should do this too? */

src/devices/sound/c352.cpp

@@ -23,7 +23,7 @@
 //#define VERBOSE 1
 #include "logmacro.h"
 
-#define C352_LOG_PCM	(0)
+#define C352_LOG_PCM    (0)
 
 #if C352_LOG_PCM
 #include <map>

src/devices/sound/k007232.cpp

@@ -6,20 +6,20 @@
 
 /*
   Changelog, Hiromitsu Shioya 02/05/2002
-	fixed start address decode timing. (sample loop bug.)
+    fixed start address decode timing. (sample loop bug.)
 
   Changelog, Mish, August 1999:
-	Removed interface support for different memory regions per channel.
+    Removed interface support for different memory regions per channel.
-	Removed interface support for differing channel volume.
+    Removed interface support for differing channel volume.
 
-	Added bankswitching.
+    Added bankswitching.
-	Added support for multiple chips.
+    Added support for multiple chips.
 
-	(NB: Should different memory regions per channel be needed, the bankswitching function can set this up).
+    (NB: Should different memory regions per channel be needed, the bankswitching function can set this up).
 
   Chanelog, Nicola, August 1999:
-	Added Support for the k007232_VOL() macro.
+    Added Support for the k007232_VOL() macro.
-	Added external port callback, and functions to set the volume of the channels
+    Added external port callback, and functions to set the volume of the channels
 */
 
 
@@ -27,8 +27,8 @@
 #include "k007232.h"
 #include "wavwrite.h"
 
-#define	K007232_LOG_PCM	(0)
+#define K007232_LOG_PCM (0)
-#define	BASE_SHIFT    	(12)
+#define BASE_SHIFT      (12)
 
 DEFINE_DEVICE_TYPE(K007232, k007232_device, "k007232", "K007232 PCM Controller")
 

src/devices/sound/multipcm.h

@@ -5,7 +5,7 @@
 
 #pragma once
 
-#define MULTIPCM_LOG_SAMPLES	0
+#define MULTIPCM_LOG_SAMPLES    0
 
 #if MULTIPCM_LOG_SAMPLES
 #include <map>

src/devices/video/bt45x.cpp

@@ -37,7 +37,7 @@
 #include "bt45x.h"
 
 #define LOG_READS   (1U << 0)
-#define LOG_WRITES	(1U << 1)
+#define LOG_WRITES  (1U << 1)
 
 #define VERBOSE (0)
 

src/devices/video/ppu2c0x_vt.cpp

@@ -19,7 +19,7 @@
 DEFINE_DEVICE_TYPE(PPU_VT03, ppu_vt03_device, "ppu_vt03", "VT03 PPU (NTSC)")
 DEFINE_DEVICE_TYPE(PPU_VT03PAL, ppu_vt03pal_device, "ppu_vt03pal", "VT03 PPU (PAL)")
 
-ppu_vt03_device::ppu_vt03_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)	:
+ppu_vt03_device::ppu_vt03_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
 	ppu2c0x_device(mconfig, type, tag, owner, clock),
 	m_is_pal(false),
 	m_is_50hz(false),

src/devices/video/snes_ppu.cpp

@@ -1611,13 +1611,13 @@ uint8_t snes_ppu_device::read_object( uint16_t address )
 	{
 		uint8_t n = (address & 0x1f) << 2;
 		return (BIT(m_objects[n + 0].x, 8) << 0) |
-		       (BIT(m_objects[n + 1].x, 8) << 2) |
+			   (BIT(m_objects[n + 1].x, 8) << 2) |
-		       (BIT(m_objects[n + 2].x, 8) << 4) |
+			   (BIT(m_objects[n + 2].x, 8) << 4) |
-		       (BIT(m_objects[n + 3].x, 8) << 6) |
+			   (BIT(m_objects[n + 3].x, 8) << 6) |
-		       (m_objects[n + 0].size << 1) |
+			   (m_objects[n + 0].size << 1) |
-		       (m_objects[n + 1].size << 3) |
+			   (m_objects[n + 1].size << 3) |
-		       (m_objects[n + 2].size << 5) |
+			   (m_objects[n + 2].size << 5) |
-		       (m_objects[n + 3].size << 7);
+			   (m_objects[n + 3].size << 7);
 	}
 }
 
@@ -1746,7 +1746,7 @@ uint16_t snes_ppu_device::direct_color(uint16_t palette, uint16_t group)
 
 void snes_ppu_device::set_current_vert(uint16_t value)
 {
-    m_beam.current_vert = value;
+	m_beam.current_vert = value;
 }
 
 void snes_ppu_device::cache_background()

src/devices/video/snes_ppu.h

@@ -73,7 +73,7 @@ public:
 		m_interlace = 1;
 		m_oam.interlace = 0;
 	}
-    void set_current_vert(uint16_t value);
+	void set_current_vert(uint16_t value);
 
 protected:
 	/* offset-per-tile modes */

src/emu/debug/textbuf.cpp

@@ -69,7 +69,7 @@ struct text_buffer
 	    buffer_space - return the number of bytes
 	    available in the buffer
 	-------------------------------------------------*/
-	
+
 	s32 buffer_space() const noexcept
 	{
 		return bufsize - buffer_used();

src/emu/screen.cpp

@@ -597,7 +597,7 @@ screen_device::screen_device(const machine_config &mconfig, const char *tag, dev
 
 screen_device::~screen_device()
 {
-    destroy_scan_bitmaps();
+	destroy_scan_bitmaps();
 }
 
 
@@ -608,21 +608,21 @@ screen_device::~screen_device()
 
 void screen_device::destroy_scan_bitmaps()
 {
-    if (m_video_attributes & VIDEO_VARIABLE_WIDTH)
+	if (m_video_attributes & VIDEO_VARIABLE_WIDTH)
-    {
+	{
-        const bool screen16 = !m_screen_update_ind16.isnull();
+		const bool screen16 = !m_screen_update_ind16.isnull();
-        for (int j = 0; j < 2; j++)
+		for (int j = 0; j < 2; j++)
-        {
+		{
-            for (bitmap_t* bitmap : m_scan_bitmaps[j])
+			for (bitmap_t* bitmap : m_scan_bitmaps[j])
-            {
+			{
-                if (screen16)
+				if (screen16)
-                    delete (bitmap_ind16*)bitmap;
+					delete (bitmap_ind16*)bitmap;
-                else
+				else
-                    delete (bitmap_rgb32*)bitmap;
+					delete (bitmap_rgb32*)bitmap;
-            }
+			}
-            m_scan_bitmaps[j].clear();
+			m_scan_bitmaps[j].clear();
-        }
+		}
-    }
+	}
 }
 
 
@@ -633,14 +633,14 @@ void screen_device::destroy_scan_bitmaps()
 
 void screen_device::allocate_scan_bitmaps()
 {
-    if (m_video_attributes & VIDEO_VARIABLE_WIDTH)
+	if (m_video_attributes & VIDEO_VARIABLE_WIDTH)
-    {
+	{
-        const bool screen16 = !m_screen_update_ind16.isnull();
+		const bool screen16 = !m_screen_update_ind16.isnull();
-        s32 effwidth = std::max(m_max_width, m_visarea.right() + 1);
+		s32 effwidth = std::max(m_max_width, m_visarea.right() + 1);
-        const s32 old_height = (s32)m_scan_widths.size();
+		const s32 old_height = (s32)m_scan_widths.size();
-        s32 effheight = std::max(m_height, m_visarea.bottom() + 1);
+		s32 effheight = std::max(m_height, m_visarea.bottom() + 1);
-        if (old_height < effheight)
+		if (old_height < effheight)
-        {
+		{
 			for (int i = old_height; i < effheight; i++)
 			{
 				for (int j = 0; j < 2; j++)
@@ -668,7 +668,7 @@ void screen_device::allocate_scan_bitmaps()
 				m_scan_widths.erase(m_scan_widths.begin() + i);
 			}
 		}
-    }
+	}
 }
 
 //-------------------------------------------------
@@ -1021,8 +1021,8 @@ void screen_device::configure(int width, int height, const rectangle &visarea, a
 	m_visarea = visarea;
 
 	// reallocate bitmap(s) if necessary
-    realloc_screen_bitmaps();
+	realloc_screen_bitmaps();
-    if (machine().input().code_pressed(KEYCODE_E)) printf("CONFIGURE\n");
+	if (machine().input().code_pressed(KEYCODE_E)) printf("CONFIGURE\n");
 
 	// compute timing parameters
 	m_frame_period = frame_period;
@@ -1094,8 +1094,8 @@ void screen_device::reset_origin(int beamy, int beamx)
 
 void screen_device::update_scan_bitmap_size(int y)
 {
-    // don't update this line if it exceeds the allocated size, which can happen on initial configuration
+	// don't update this line if it exceeds the allocated size, which can happen on initial configuration
-    if (y >= m_scan_widths.size())
+	if (y >= m_scan_widths.size())
 		return;
 
 	// determine effective size to allocate
@@ -1138,7 +1138,7 @@ void screen_device::realloc_screen_bitmaps()
 	m_texture[0]->set_bitmap(m_bitmap[0], m_visarea, m_bitmap[0].texformat());
 	m_texture[1]->set_bitmap(m_bitmap[1], m_visarea, m_bitmap[1].texformat());
 
-    allocate_scan_bitmaps();
+	allocate_scan_bitmaps();
 }
 
 

src/lib/netlist/devices/nld_7442.h

@@ -48,16 +48,16 @@
 
 #include "netlist/nl_setup.h"
 
-#define TTL_7442(name, cA, cB, cC, cD)							\
+#define TTL_7442(name, cA, cB, cC, cD)                          \
-		NET_REGISTER_DEV(TTL_7442, name)						\
+		NET_REGISTER_DEV(TTL_7442, name)                        \
-		NET_CONNECT(name, GND, GND)								\
+		NET_CONNECT(name, GND, GND)                             \
-		NET_CONNECT(name, VCC, VCC)								\
+		NET_CONNECT(name, VCC, VCC)                             \
-		NET_CONNECT(name, A, cA)								\
+		NET_CONNECT(name, A, cA)                                \
-		NET_CONNECT(name, B, cB)								\
+		NET_CONNECT(name, B, cB)                                \
-		NET_CONNECT(name, C, cC)								\
+		NET_CONNECT(name, C, cC)                                \
 		NET_CONNECT(name, D, cD)
 
-#define TTL_7442_DIP(name)										\
+#define TTL_7442_DIP(name)                                      \
 		NET_REGISTER_DEV(TTL_7442_DIP, name)
 
 #endif /* NLD_7442_H_ */

src/lib/netlist/devices/nld_tms4800.h

@@ -45,8 +45,8 @@
 		NET_CONNECT(name, A7,  cA7)     \
 		NET_CONNECT(name, A8,  cA8)     \
 		NET_CONNECT(name, A9,  cA9)     \
-		NET_CONNECT(name, A10, cA10)	\
+		NET_CONNECT(name, A10, cA10)    \
-		NET_CONNECT(name, VCC, VCC)		\
+		NET_CONNECT(name, VCC, VCC)     \
 		NET_CONNECT(name, GND, GND)
 
 #define ROM_TMS4800_DIP(name)                                 \

src/lib/netlist/nl_base.h

@@ -1561,10 +1561,10 @@ namespace netlist
 	private:
 
 		void reset();
-		nlmempool							m_pool; // must be deleted last!
+		nlmempool                           m_pool; // must be deleted last!
 
 		pstring                             m_name;
-		unique_pool_ptr<netlist_t>			m_netlist;
+		unique_pool_ptr<netlist_t>          m_netlist;
 		plib::unique_ptr<plib::dynlib>      m_lib; // external lib needs to be loaded as long as netlist exists
 		plib::state_manager_t               m_state;
 		plib::unique_ptr<callbacks_t>       m_callbacks;
@@ -1694,7 +1694,7 @@ namespace netlist
 		template <bool KEEP_STATS>
 		void process_queue_stats(netlist_time delta) noexcept;
 
-		netlist_state_t	&				    m_state;
+		netlist_state_t &                   m_state;
 		devices::NETLIB_NAME(solver) *      m_solver;
 
 		// mostly rw

src/lib/netlist/nl_errstr.h

@@ -44,11 +44,11 @@ namespace netlist
 	PERRMSGV(MF_UNEXPECTED_NETLIST_END,             0, "Unexpected NETLIST_END")
 	PERRMSGV(MF_UNEXPECTED_END_OF_FILE,             0, "Unexpected end of file, missing NETLIST_END")
 	PERRMSGV(MF_UNEXPECTED_NETLIST_START,           0, "Unexpected NETLIST_START")
-	PERRMSGV(MF_EXPECTED_IDENTIFIER_GOT_1,			1, "Expected an identifier, but got {1}")
+	PERRMSGV(MF_EXPECTED_IDENTIFIER_GOT_1,          1, "Expected an identifier, but got {1}")
-	PERRMSGV(MF_EXPECTED_COMMA_OR_RP_1,				1, "Expected comma or right parenthesis but found <{1}>")
+	PERRMSGV(MF_EXPECTED_COMMA_OR_RP_1,             1, "Expected comma or right parenthesis but found <{1}>")
-	PERRMSGV(MF_DIPPINS_EQUAL_NUMBER_1,				1, "DIPPINS requires equal number of pins to DIPPINS, first pin is {}")
+	PERRMSGV(MF_DIPPINS_EQUAL_NUMBER_1,             1, "DIPPINS requires equal number of pins to DIPPINS, first pin is {}")
-	PERRMSGV(MF_PARAM_NOT_FP_1,						1, "Parameter value <{1}> not floating point")
+	PERRMSGV(MF_PARAM_NOT_FP_1,                     1, "Parameter value <{1}> not floating point")
-	PERRMSGV(MF_TT_LINE_WITHOUT_HEAD,				0, "TT_LINE found without TT_HEAD")
+	PERRMSGV(MF_TT_LINE_WITHOUT_HEAD,               0, "TT_LINE found without TT_HEAD")
 
 	// nl_setup.cpp
 

src/lib/netlist/nl_setup.h

@@ -448,7 +448,7 @@ namespace netlist
 		devices::nld_netlistparams                  *m_netlist_params;
 		std::unordered_map<pstring, param_ref_t>    m_params;
 		std::unordered_map<detail::core_terminal_t *,
-			devices::nld_base_proxy *>				m_proxies;
+			devices::nld_base_proxy *>              m_proxies;
 
 		unsigned m_proxy_cnt;
 	};

src/lib/netlist/plib/pexception.h

@@ -13,10 +13,10 @@
 
 #include <exception>
 
-#define passert_always(expr)							\
+#define passert_always(expr)                            \
   ((expr) ? static_cast<void>(0) : plib::passert_fail (#expr, __FILE__, __LINE__, nullptr))
 
-#define passert_always_msg(expr, msg)							\
+#define passert_always_msg(expr, msg)                           \
   ((expr) ? static_cast<void>(0) : plib::passert_fail (#expr, __FILE__, __LINE__, msg))
 
 namespace plib {

src/mame/audio/8080bw.cpp

@@ -1423,9 +1423,9 @@ WRITE8_MEMBER( _8080bw_state::darthvdr_08_w )
 #define CANE_SND_EN        NODE_05
 
 /* Nodes - Adjusters */
-#define CANE_VR1           NODE_07	// Gain for 76477
+#define CANE_VR1           NODE_07  // Gain for 76477
-#define CANE_VR2           NODE_08	// VR attached to the output of the TOS
+#define CANE_VR2           NODE_08  // VR attached to the output of the TOS
-#define CANE_VR3           NODE_09	// VR for SFX generated by the 555
+#define CANE_VR3           NODE_09  // VR for SFX generated by the 555
 
 /* Nodes - sn76477 Sounds */
 #define CANE_EXP_STREAM    NODE_03
@@ -1512,11 +1512,11 @@ void cane_audio_device::device_start()
 void cane_audio_device::sh_port_1_w(u8 data)
 {
 	/*
-		bit 0 - SX0 - Sound enable on mixer
+	    bit 0 - SX0 - Sound enable on mixer
-		bit 1 - SX1 - SN76477 - Mixer select C - pin 27
+	    bit 1 - SX1 - SN76477 - Mixer select C - pin 27
-		bit 2 - SX2 - SN76477 - Mixer select A - pin 26
+	    bit 2 - SX2 - SN76477 - Mixer select A - pin 26
-		bit 3 - SX3 - SN76477 - Mixer select B - pin 25
+	    bit 3 - SX3 - SN76477 - Mixer select B - pin 25
-		bit 4 - SX4 - NE555 - Trigger (Step, high output level for 1.1*RC = 1.1*100K*0.47u = 51.7 ms)
+	    bit 4 - SX4 - NE555 - Trigger (Step, high output level for 1.1*RC = 1.1*100K*0.47u = 51.7 ms)
 	*/
 
 	m_discrete->write(CANE_SND_EN, data & 0x01); // BIT(data, 0) - bit 0 - SX0 - Sound enable on mixer
@@ -1609,24 +1609,24 @@ DISCRETE_SOUND_START(cane_discrete)
 	DISCRETE_ADJUSTMENT(CANE_VR3, 0, 0.33*60000, DISC_LINADJ, "VR3")  // VR for SFX generated by the 555
 
 	/************************************************/
-	/* From 555 				                    */
+	/* From 555                                     */
 	/************************************************/
 	/* TODO: find real noise freq and amplitude */
 	/* width was simulated with ltspice using Claybuster schematic as a source and it's value is about 51ms */
 	DISCRETE_NOISE(CANE_76477_PIN6,
-				1,                  	    /* ENAB */
+				1,                          /* ENAB */
 				1280,                       /* FREQ - Guessed */
-				1,		                    /* AMP  */
+				1,                          /* AMP  */
 				0)                          /* BIAS - fake AC is fine*/
 	DISCRETE_CLAMP(CANE_555_CLAMPED,
-				CANE_76477_PIN6,			/* input node */
+				CANE_76477_PIN6,            /* input node */
-				0.0,				 		/* minimum */
+				0.0,                        /* minimum */
-				5.0)						/* maximum */
+				5.0)                        /* maximum */
 	DISCRETE_ONESHOT(CANE_555_ONESHOT,
-					 CANE_555_EN,			/* trigger node */
+					 CANE_555_EN,           /* trigger node */
-					 1,						/* amplitude node or static value */
+					 1,                     /* amplitude node or static value */
-					 0.05,					/* width (in seconds) node or static value - 50 ms*/
+					 0.05,                  /* width (in seconds) node or static value - 50 ms*/
-					 DISC_ONESHOT_FEDGE | DISC_ONESHOT_RETRIG)	/* type of oneshot static value */
+					 DISC_ONESHOT_FEDGE | DISC_ONESHOT_RETRIG)  /* type of oneshot static value */
 
 	DISCRETE_MULTIPLY(CANE_TMP_SND, CANE_555_CLAMPED, CANE_555_ONESHOT)
 	DISCRETE_MULTIPLY(CANE_SFX_SND, CANE_TMP_SND, CANE_VR3)
@@ -1663,13 +1663,13 @@ DISCRETE_SOUND_START(cane_discrete)
 
 //LOG
 /*
-	DISCRETE_WAVLOG1(CANE_EXP_STREAM, 1)
+    DISCRETE_WAVLOG1(CANE_EXP_STREAM, 1)
-	DISCRETE_WAVLOG1(CANE_EXP_SND, 1)
+    DISCRETE_WAVLOG1(CANE_EXP_SND, 1)
-	DISCRETE_WAVLOG1(CANE_TMP_SND, 1)
+    DISCRETE_WAVLOG1(CANE_TMP_SND, 1)
-	DISCRETE_WAVLOG1(CANE_SFX_SND, 1)
+    DISCRETE_WAVLOG1(CANE_SFX_SND, 1)
-	DISCRETE_WAVLOG1(CANE_MUSIC_NOTE, 1)
+    DISCRETE_WAVLOG1(CANE_MUSIC_NOTE, 1)
-	DISCRETE_WAVLOG1(CANE_MUSIC_SND, 1)
+    DISCRETE_WAVLOG1(CANE_MUSIC_SND, 1)
-	DISCRETE_WAVLOG1(CANE_SOUND_OUT, 1)
+    DISCRETE_WAVLOG1(CANE_SOUND_OUT, 1)
 */
 DISCRETE_SOUND_END
 

src/mame/audio/elan_eu3a05.h

@@ -19,7 +19,7 @@ public:
 	auto space_read_callback() { return m_space_read_cb.bind(); }
 
 	template <unsigned N> auto sound_end_cb() { return m_sound_end_cb[N].bind(); }
-	
+
 	void map(address_map& map);
 
 

src/mame/drivers/8080bw.cpp

@@ -3569,20 +3569,20 @@ void _8080bw_state::init_invmulti()
 /*                                                     */
 /*******************************************************/
 /***********************************************************************************************************************************
-	This game was never released by Model Racing to the public.
+    This game was never released by Model Racing to the public.
 
-	The assembler source files for this game were extracted from the original floppy disks used by the former Model Racing developer
+    The assembler source files for this game were extracted from the original floppy disks used by the former Model Racing developer
-	Adolfo Melilli (adolfo@melilli.com).
+    Adolfo Melilli (adolfo@melilli.com).
-	Those disks were retrieved by Alessandro Bolgia (xadhoom76@gmail.com) and Lorenzo Fongaro (lorenzo.fongaro@virgilio.it) and
+    Those disks were retrieved by Alessandro Bolgia (xadhoom76@gmail.com) and Lorenzo Fongaro (lorenzo.fongaro@virgilio.it) and
-	dumped by Piero Andreini (pieroandreini@gmail.com) using KryoFlux hardware and software.
+    dumped by Piero Andreini (pieroandreini@gmail.com) using KryoFlux hardware and software.
-	Subsequently Jean Paul Piccato (j2pguard-spam@yahoo.com) mounted the images and compiled the source files, managed to set up a
+    Subsequently Jean Paul Piccato (j2pguard-spam@yahoo.com) mounted the images and compiled the source files, managed to set up a
-	romset and wrote a MAME driver that aims to reproduce in the most faithful way the work of Melilli at Model Racing in late '70s.
+    romset and wrote a MAME driver that aims to reproduce in the most faithful way the work of Melilli at Model Racing in late '70s.
 
-	The game driver is not based on hardware inspection and is solely derived from assumptions I've made looking at the assembler
+    The game driver is not based on hardware inspection and is solely derived from assumptions I've made looking at the assembler
-	code and comments written into the source files of the game. Several of those hypotheses came following the directions of
+    code and comments written into the source files of the game. Several of those hypotheses came following the directions of
-	previous yet contemporary Model Racing works (Eg: Claybuster) and were confirmed by Melilli himself.
+    previous yet contemporary Model Racing works (Eg: Claybuster) and were confirmed by Melilli himself.
 
-	Being unreleased this game lacks an official name, thus the name used in the source files was used instead.
+    Being unreleased this game lacks an official name, thus the name used in the source files was used instead.
 
 ***********************************************************************************************************************************/
 void cane_state::cane_map(address_map &map)
@@ -3594,99 +3594,99 @@ void cane_state::cane_map(address_map &map)
 void cane_state::cane_io_map(address_map &map)
 {
 /*********************************************************************************************************************************
-	-----------
+    -----------
-	I/O mapping
+    I/O mapping
-	-----------
+    -----------
-	out:
+    out:
-	$00 - Unknown - Not yet emulated
+    $00 - Unknown - Not yet emulated
-	$01 - Hardware shift register - Shift count
+    $01 - Hardware shift register - Shift count
-	$02 - Hardware shift register - Shift data
+    $02 - Hardware shift register - Shift data
-	$03 - Audio sub-system - D0->sx0, D1->sx1, D2->sx2, D3->sx3, D4->sx4, D5-D7 unused
+    $03 - Audio sub-system - D0->sx0, D1->sx1, D2->sx2, D3->sx3, D4->sx4, D5-D7 unused
-													 sx0 mute/unmute all
+                                                     sx0 mute/unmute all
-													 sx1,sx2,sx3 routed to 76477 mixer select
+                                                     sx1,sx2,sx3 routed to 76477 mixer select
-													 sx4 routed to 555 one-shot trigger
+                                                     sx4 routed to 555 one-shot trigger
-	$04 - Reset watchdog timer
+    $04 - Reset watchdog timer
-	$05 - Audio TOS
+    $05 - Audio TOS
 
-	in:
+    in:
-	$01 - CPO / coin input port
+    $01 - CPO / coin input port
-	$03 - Hardware shift register - Shift result
+    $03 - Hardware shift register - Shift result
 
 =================================================================================================================
 ------------
 -- OUT 0 --
 Source file: CANE1.ED - Referenced only once in code, in the "rifle routine" (ROUTINE FUCILE)
 
-	> ;ROUTINE FUCILE
+    > ;ROUTINE FUCILE
-	>   CALL  SPARO
+    >   CALL  SPARO
-	>   OUT 0
+    >   OUT 0
 
 ------------
 -- OUT 1 --
 Source files: CANE2.ED, MIRINO.ED
 
-	Defined in CANE2.ED
+    Defined in CANE2.ED
 
-	> PRMTR EQU 1
+    > PRMTR EQU 1
 
-	and referenced multiple times in CANE2.ED and MIRINO.ED. Eg:
+    and referenced multiple times in CANE2.ED and MIRINO.ED. Eg:
 
-	> ;PER RISPETTARE POS ORIZZONT. UCCELLO
+    > ;PER RISPETTARE POS ORIZZONT. UCCELLO
-	>   LXI D,TPADEL
+    >   LXI D,TPADEL
-	>   XRA A
+    >   XRA A
-	>   OUT PRMTR
+    >   OUT PRMTR
 
 ------------
 -- OUT 2 --
 Source files: CANE1.ED, CANE2.ED, MIRINO.ED
 
-	Defined in CANE2.ED
+    Defined in CANE2.ED
 
-	> DATO  EQU 2
+    > DATO  EQU 2
 
-	and referenced multiple times in CANE1.ED and MIRINO.ED. Eg:
+    and referenced multiple times in CANE1.ED and MIRINO.ED. Eg:
 
-	> ZANZ: XRA A
+    > ZANZ: XRA A
-	>   OUT DATO
+    >   OUT DATO
 
 ------------
 -- OUT 3 --
 Source file: CANE2.ED
 
-	The access to port 3 is mediated by the routines SETP3 and RESP3 defined in CANE2.ED
+    The access to port 3 is mediated by the routines SETP3 and RESP3 defined in CANE2.ED
-	SETP3 -- Port 3 = Port 3 | A
+    SETP3 -- Port 3 = Port 3 | A
 
-	> SETP3:
+    > SETP3:
-	> ;SETTA I BITS CONTEN IN REG A NELLA PORTA 3
+    > ;SETTA I BITS CONTEN IN REG A NELLA PORTA 3
 
-	RESP3 -- Port 3 = Port 3 & A
+    RESP3 -- Port 3 = Port 3 & A
 
-	> RESP3:
+    > RESP3:
-	> ;IL CONTRARIO DI SETP3
+    > ;IL CONTRARIO DI SETP3
 
-	and referenced multiple times in CANE2.ED. Eg:
+    and referenced multiple times in CANE2.ED. Eg:
 
-	> ;SPENGO IL VOLO UCCELLI
+    > ;SPENGO IL VOLO UCCELLI
-	> MVI A,0FEH
+    > MVI A,0FEH
-	> CALL  SETP3
+    > CALL  SETP3
 
 ------------
 -- OUT 4 --
 Source file: CANE1.ED, CANE2.ED
 
-	Called directly in CANE1.ED
+    Called directly in CANE1.ED
 
-	> INT8:
+    > INT8:
-	>   OUT 4
+    >   OUT 4
-	> ;PER LAUTORESET
+    > ;PER LAUTORESET
 
-	Also defined in CANE2.ED
+    Also defined in CANE2.ED
 
-	> RESET EQU 4
+    > RESET EQU 4
 
-	and called multiple times in CANE1.ED and CANE2.ED. Eg:
+    and called multiple times in CANE1.ED and CANE2.ED. Eg:
 
-	> DELAY3: OUT RESET
+    > DELAY3: OUT RESET
 
 ------------
 -- OUT 5 --
@@ -3697,79 +3697,79 @@ D0-D7 is pushed into a LS273 (Octal D-type Flip-Flop) and its value is used to p
 two, cascaded, LS161 (Synchronous 4-Bit Counters).
 The counters drive a J-K Flip-Flop generating a square wave signal driven in frequency by the preloaded value.
 
-	> CANONE:
+    > CANONE:
-	> ;AZZITTO IL TOS:
+    > ;AZZITTO IL TOS:
-	>   MVI A,255   ; A = 255       ; TIMER spento
+    >   MVI A,255   ; A = 255       ; TIMER spento
-	>   OUT 5       ; OUT 5
+    >   OUT 5       ; OUT 5
 
 The musical notes are defined in a library source file TOS.ED and referenced later by the source files, eg. in CANE2.ED:
-	> CARICA: DB  RE,FA,FA,FA,FA,PAU
+    > CARICA: DB  RE,FA,FA,FA,FA,PAU
-	>   DB  RE,FA,FA,FA,FA,PAU
+    >   DB  RE,FA,FA,FA,FA,PAU
-	>   DB  RE,FA,PAU,RE,FA,PAU
+    >   DB  RE,FA,PAU,RE,FA,PAU
-	>   DB  RE,FA,FA,FA,FA,PAU
+    >   DB  RE,FA,FA,FA,FA,PAU
-	>   DB  FINALE
+    >   DB  FINALE
-	> TABSTR: NOP
+    > TABSTR: NOP
-	> LULUP:  DB  DO,RE,MI,FA,SOL,LA,SI,DO2
+    > LULUP:  DB  DO,RE,MI,FA,SOL,LA,SI,DO2
-	>   DB  FINALE
+    >   DB  FINALE
 
-	> CIPCIP: DB  220,215,210,205,200,FINALE
+    > CIPCIP: DB  220,215,210,205,200,FINALE
 
-	The notes are defined in TOS.ED:
+    The notes are defined in TOS.ED:
-	> ; SI PARTE DA UNA FREQUENZA DI CLOCK DI 1 MHZ CIRCA,QUESTA FREQUENZA DIVISA)
+    > ; SI PARTE DA UNA FREQUENZA DI CLOCK DI 1 MHZ CIRCA,QUESTA FREQUENZA DIVISA)
-	> ; PER UNA SERIE DI PARAMETRI ATTRAVERSO DEI DIVISORI PROGRAMMABILI FORNISCE
+    > ; PER UNA SERIE DI PARAMETRI ATTRAVERSO DEI DIVISORI PROGRAMMABILI FORNISCE
-	> ; ALL'USCITA DI QUESTI I DODICI SEMITONI DELLA SCALA CROMATICA
+    > ; ALL'USCITA DI QUESTI I DODICI SEMITONI DELLA SCALA CROMATICA
 
-	Name - Counter - Aprox. frequency
+    Name - Counter - Aprox. frequency
-	DO    16    - 1000/(255-16)  = 4.18 KHz
+    DO    16    - 1000/(255-16)  = 4.18 KHz
-	DOD   30    - 1000/(255-30)  = 4.44 KHz
+    DOD   30    - 1000/(255-30)  = 4.44 KHz
-	RE    43    - 1000/(255-43)  = 4.72 KHz
+    RE    43    - 1000/(255-43)  = 4.72 KHz
-	RED   55    - 1000/(255-55)  = 5    KHz
+    RED   55    - 1000/(255-55)  = 5    KHz
-	MI    66    - 1000/(255-66)  = 5.29 KHz
+    MI    66    - 1000/(255-66)  = 5.29 KHz
-	FA    77    - 1000/(255-77)  = 5.62 KHz
+    FA    77    - 1000/(255-77)  = 5.62 KHz
-	FAD   87    - 1000/(255-87)  = 5.95 KHz
+    FAD   87    - 1000/(255-87)  = 5.95 KHz
-	SOL   96    - 1000/(255-96)  = 6.29 KHz
+    SOL   96    - 1000/(255-96)  = 6.29 KHz
-	SOLD  105   - 1000/(255-105) = 6.67 KHz
+    SOLD  105   - 1000/(255-105) = 6.67 KHz
-	LA    114   - 1000/(255-114) = 7.09 KHz
+    LA    114   - 1000/(255-114) = 7.09 KHz
-	LAD   122   - 1000/(255-122) = 7.52 KHz
+    LAD   122   - 1000/(255-122) = 7.52 KHz
-	SI    129   - 1000/(255-129) = 7.94 KHz
+    SI    129   - 1000/(255-129) = 7.94 KHz
 
-	DO2   136   - 1000/(255-136) = 8.4  KHz
+    DO2   136   - 1000/(255-136) = 8.4  KHz
-	DOD2  143   - 1000/(255-143) = 8.93 KHz
+    DOD2  143   - 1000/(255-143) = 8.93 KHz
-	RE2   149.5 - 1000/(255-150) = 9.52 KHz
+    RE2   149.5 - 1000/(255-150) = 9.52 KHz
-	RED2  155.5 - 1000/(255-156) = 10.1 KHz
+    RED2  155.5 - 1000/(255-156) = 10.1 KHz
-	MI2   161   - 1000/(255-161) = 10.64 KHz
+    MI2   161   - 1000/(255-161) = 10.64 KHz
-	FA2   166.5 - 1000/(255-167) = 11.36 KHz
+    FA2   166.5 - 1000/(255-167) = 11.36 KHz
-	FAD2  171.5 - 1000/(255-172) = 12.05 KHz
+    FAD2  171.5 - 1000/(255-172) = 12.05 KHz
-	SOL2  176   - 1000/(255-176) = 12.66 KHz
+    SOL2  176   - 1000/(255-176) = 12.66 KHz
-	SOLD2 180.5   - 1000/(255-181) = 13.51 KHz
+    SOLD2 180.5   - 1000/(255-181) = 13.51 KHz
-	LA2   185   - 1000/(255-185) = 14.29 KHz
+    LA2   185   - 1000/(255-185) = 14.29 KHz
-	LAD2  189   - 1000/(255-189) = 15.15 KHz
+    LAD2  189   - 1000/(255-189) = 15.15 KHz
-	SI2   192.5 - 1000/(255-193) = 16.13 KHz
+    SI2   192.5 - 1000/(255-193) = 16.13 KHz
 
-	Pause code:
+    Pause code:
-	PAU EQU 255
+    PAU EQU 255
 
-	End of note sequence:
+    End of note sequence:
-	FINALE  EQU 254
+    FINALE  EQU 254
 
 ------------
 -- IN 1 --
 Source file: CANE2.ED
 
-	Defined in CANE2.ED
+    Defined in CANE2.ED
-	> PORTAM  EQU 1 ;E' LA PORTA DI INPUT DI TUTTI I PULSANTI
+    > PORTAM  EQU 1 ;E' LA PORTA DI INPUT DI TUTTI I PULSANTI
 
 ------------
 -- IN 3 --
 Source file: CANE1.ED, CANE2.ED
-	Defined in CANE2.ED
+    Defined in CANE2.ED
 
-	> PRONTO  EQU 3
+    > PRONTO  EQU 3
 
-	and referenced in CANE1.ED
+    and referenced in CANE1.ED
 
-	> OUT LOW DATO
+    > OUT LOW DATO
-	> IN  LOW PRONTO
+    > IN  LOW PRONTO
 
 **********************************************************************************************************************************/
 	map(0x00, 0x00).w(FUNC(cane_state::cane_unknown_port0_w));
@@ -3785,56 +3785,56 @@ Source file: CANE1.ED, CANE2.ED
 
 static INPUT_PORTS_START( cane )
 /* Source file: CANE2.ED, MIRINO.ED
-	Port definition:
+    Port definition:
-	> PORTAM  EQU 1 ;E' LA PORTA DI INPUT DI TUTTI I PULSANTI
+    > PORTAM  EQU 1 ;E' LA PORTA DI INPUT DI TUTTI I PULSANTI
 
-	Bit values:
+    Bit values:
-	CANE2.ED
+    CANE2.ED
-	> DITO  EQU 80H ;BIT DEL PULSANTE DI SPARO DEL FUCILE
+    > DITO  EQU 80H ;BIT DEL PULSANTE DI SPARO DEL FUCILE
 
-	MIRINO.ED
+    MIRINO.ED
-	> UPPMIR  EQU 20H ;BIT PER MIRINO IN ALTO
+    > UPPMIR  EQU 20H ;BIT PER MIRINO IN ALTO
-	> LOWMIR  EQU 40H ;BASSO
+    > LOWMIR  EQU 40H ;BASSO
-	> RIGMIR  EQU 8H  ;DESTRA
+    > RIGMIR  EQU 8H  ;DESTRA
-	> LEFMIR  EQU 10H ;SINISTRA
+    > LEFMIR  EQU 10H ;SINISTRA
 
-	Joystick reading routine:
+    Joystick reading routine:
-	MIRINO.ED
+    MIRINO.ED
-	> ;ORA LEGGO LA PORTA DELLA CLOCHE
+    > ;ORA LEGGO LA PORTA DELLA CLOCHE
-	>   IN  LOW PORTAM
+    >   IN  LOW PORTAM
-	>   MOV B,A
+    >   MOV B,A
-	> ;A QUESTO PUNTO AGGIORNO LE COORDINATE X E Y A SECONDA DELLO STATO DEI BIT
+    > ;A QUESTO PUNTO AGGIORNO LE COORDINATE X E Y A SECONDA DELLO STATO DEI BIT
-	> ;DELLA CLOCHE (ATTIVI BASSI)
+    > ;DELLA CLOCHE (ATTIVI BASSI)
-	>   ANI LOWMIR
+    >   ANI LOWMIR
-	>   CZ  MIRLOW
+    >   CZ  MIRLOW
-	>   MOV A,B
+    >   MOV A,B
-	>   ANI UPPMIR
+    >   ANI UPPMIR
-	>   CZ  MIRUPP
+    >   CZ  MIRUPP
-	>   MOV A,B
+    >   MOV A,B
-	>   ANI LEFMIR
+    >   ANI LEFMIR
-	>   CZ  MIRLEF
+    >   CZ  MIRLEF
-	>   MOV A,B
+    >   MOV A,B
-	>   ANI RIGMIR
+    >   ANI RIGMIR
-	>   CZ  MIRRIG
+    >   CZ  MIRRIG
 
-	Shot reading routine:
+    Shot reading routine:
-	CANE2.ED
+    CANE2.ED
-	> ;QUI CI VADO SE NESSUNO PREME IL PULSANTE E STO ASPETTANDO UNO SPARO
+    > ;QUI CI VADO SE NESSUNO PREME IL PULSANTE E STO ASPETTANDO UNO SPARO
-	> ;TEST GRILLETTO
+    > ;TEST GRILLETTO
-	>     IN  PORTAM
+    >     IN  PORTAM
-	>     ANI DITO
+    >     ANI DITO
 
-	Coin reading routine;
+    Coin reading routine;
-	CANE1.ED
+    CANE1.ED
-	> ;ACCREDITA
+    > ;ACCREDITA
-	> SAR9A:  IN  1
+    > SAR9A:  IN  1
-	>   ANI 4
+    >   ANI 4
 
-	Start game: (Verified by debugging $3C2)
+    Start game: (Verified by debugging $3C2)
-	CANE1.ED
+    CANE1.ED
-	> IN  1
+    > IN  1
-	> ANI 8
+    > ANI 8
-	> JNZ FONTI
+    > JNZ FONTI
 
 */
 
@@ -3879,21 +3879,21 @@ void cane_state::cane_unknown_port0_w(u8 data)
 /*                                                     */
 /*******************************************************/
 /***********************************************************************************************************************************
-	This game was never completed and released by Model Racing to the public.
+    This game was never completed and released by Model Racing to the public.
-	It's in a nearly incomplete form (eg: doesn't have any sound or score routine in the code) and it's barely playable.
+    It's in a nearly incomplete form (eg: doesn't have any sound or score routine in the code) and it's barely playable.
 
-	The assembler source files for this game were extracted from the original floppy disks used by the former Model Racing developer
+    The assembler source files for this game were extracted from the original floppy disks used by the former Model Racing developer
-	Adolfo Melilli (adolfo@melilli.com).
+    Adolfo Melilli (adolfo@melilli.com).
-	Those disks were retrieved by Alessandro Bolgia (xadhoom76@gmail.com) and Lorenzo Fongaro (lorenzo.fongaro@virgilio.it) and
+    Those disks were retrieved by Alessandro Bolgia (xadhoom76@gmail.com) and Lorenzo Fongaro (lorenzo.fongaro@virgilio.it) and
-	dumped by Piero Andreini (pieroandreini@gmail.com) using KryoFlux hardware and software.
+    dumped by Piero Andreini (pieroandreini@gmail.com) using KryoFlux hardware and software.
-	Subsequently Jean Paul Piccato (j2pguard-spam@yahoo.com) mounted the images and compiled the source files, managed to set up a
+    Subsequently Jean Paul Piccato (j2pguard-spam@yahoo.com) mounted the images and compiled the source files, managed to set up a
-	ROMset and wrote a MAME driver that aims to reproduce in the most faithful way the work of Melilli at Model Racing in late '70s.
+    ROMset and wrote a MAME driver that aims to reproduce in the most faithful way the work of Melilli at Model Racing in late '70s.
 
-	The game driver is not based on hardware inspection and is solely derived from assumptions I've made looking at the assembler
+    The game driver is not based on hardware inspection and is solely derived from assumptions I've made looking at the assembler
-	code and comments written into the source files of the game. Several of those hypotheses came following the directions of
+    code and comments written into the source files of the game. Several of those hypotheses came following the directions of
-	previous yet contemporary Model Racing works (Eg: Claybuster) and were confirmed by Melilli himself.
+    previous yet contemporary Model Racing works (Eg: Claybuster) and were confirmed by Melilli himself.
 
-	Being unreleased this game lacks an official name, thus the name used in the source files was used instead.
+    Being unreleased this game lacks an official name, thus the name used in the source files was used instead.
 
 ***********************************************************************************************************************************/
 

src/mame/drivers/alfaskop41xx.cpp

@@ -7,8 +7,8 @@ Alfaskop 41 series
 This driver is a part of a revivel project for Alfaskop 41 series where
 no known working system exists today because of the distributed nature.
 All parts network boots over SS3 (SDLC) from a Floppy Disk unit and nothing
-works unless there is a floppy in that unit. These floppies are rare and 
+works unless there is a floppy in that unit. These floppies are rare and
-many parts have been discarded because they are useless stand alone. 
+many parts have been discarded because they are useless stand alone.
 
 The goal is to emulate missing parts so a full system can be demonstrated again.
 
@@ -122,18 +122,18 @@ void alfaskop4110_state::mem_map(address_map &map)
 	map(0x8000, 0xefff).ram();
 
 	map(0xf600, 0xf6ff).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGNVRAM("nvram_r %04x: %02x\n", offset, 0); return (uint8_t) 0; }),// TODO: Move to MRO board
-				 NAME( [this](offs_t offset, uint8_t data) {	LOGNVRAM("nvram_w %04x: %02x\n", offset, data);	}));
+				 NAME( [this](offs_t offset, uint8_t data) {    LOGNVRAM("nvram_w %04x: %02x\n", offset, data); }));
 	map(0xf7d9, 0xf7d9).mirror(0x06).lrw8(NAME([this](offs_t offset) -> uint8_t    { LOGIO("CRTC reg r %04x: %02x\n", offset, 0); return m_crtc->register_r(); }),
-					      NAME([this](offs_t offset, uint8_t data) { LOGIO("CRTC reg w %04x: %02x\n", offset, data); m_crtc->register_w(data);}));
+						  NAME([this](offs_t offset, uint8_t data) { LOGIO("CRTC reg w %04x: %02x\n", offset, data); m_crtc->register_w(data);}));
 	map(0xf7d8, 0xf7d8).mirror(0x06).lw8(NAME([this](offs_t offset, uint8_t data) { LOGIO("CRTC adr w %04x: %02x\n", offset, data); m_crtc->address_w(data); }));
 	map(0xf7d0, 0xf7d3).mirror(0x04).lrw8(NAME([this](offs_t offset) -> uint8_t    { LOGIO("DIA pia_r %04x: %02x\n", offset, 0); return m_diapia->read(offset & 3); }),
-					      NAME([this](offs_t offset, uint8_t data) { LOGIO("DIA pia_w %04x: %02x\n", offset, data); m_diapia->write(offset & 3, data); }));
+						  NAME([this](offs_t offset, uint8_t data) { LOGIO("DIA pia_w %04x: %02x\n", offset, data); m_diapia->write(offset & 3, data); }));
 	map(0xf7c4, 0xf7c7).mirror(0x00).lrw8(NAME([this](offs_t offset) -> uint8_t    { LOGIO("MIC pia_r %04x: %02x\n", offset, 0); return m_micpia->read(offset & 3); }),
-					      NAME( [this](offs_t offset, uint8_t data) { LOGIO("MIC pia_w %04x: %02x\n", offset, data); m_micpia->write(offset & 3, data); }));
+						  NAME( [this](offs_t offset, uint8_t data) { LOGIO("MIC pia_w %04x: %02x\n", offset, data); m_micpia->write(offset & 3, data); }));
 	map(0xf7c0, 0xf7c1).mirror(0x02).lrw8(NAME([this](offs_t offset) -> uint8_t    { LOGIO("KBD acia_r %04x: %02x\n", offset, 0); return m_kbdacia->read(offset & 1); }),
-					      NAME( [this](offs_t offset, uint8_t data) { LOGIO("KBD acia_w %04x: %02x\n", offset, data); m_kbdacia->write(offset & 1, data); }));
+						  NAME( [this](offs_t offset, uint8_t data) { LOGIO("KBD acia_w %04x: %02x\n", offset, data); m_kbdacia->write(offset & 1, data); }));
 
-       	map(0xf7fc, 0xf7fc).mirror(0x00).lr8(NAME([this](offs_t offset) -> uint8_t { LOGIO("Address Switch 0-7\n"); return 0; }));
+		map(0xf7fc, 0xf7fc).mirror(0x00).lr8(NAME([this](offs_t offset) -> uint8_t { LOGIO("Address Switch 0-7\n"); return 0; }));
 
 	map(0xf800, 0xffff).rom().region("roms", 0);
 }
@@ -143,11 +143,11 @@ void alfaskop4120_state::mem_map(address_map &map)
 	map.unmap_value_high();
 	map(0x0000, 0xefff).ram();
 	map(0xf600, 0xf6ff).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGNVRAM("nvram_r %04x: %02x\n", offset, 0); return (uint8_t) 0; }), // TODO: Move to MRO board
-				 NAME([this](offs_t offset, uint8_t data) {	LOGNVRAM("nvram_w %04x: %02x\n", offset, data);	}));
+				 NAME([this](offs_t offset, uint8_t data) { LOGNVRAM("nvram_w %04x: %02x\n", offset, data); }));
 	map(0xf740, 0xf743).mirror(0x0c).lrw8(NAME([this](offs_t offset) -> uint8_t    { LOGIO("FDA pia_r %04x: %02x\n", offset, 0); return m_fdapia->read(offset & 3); }),
-					      NAME([this](offs_t offset, uint8_t data) { LOGIO("FDA pia_w %04x: %02x\n", offset, data); m_fdapia->write(offset & 3, data); }));
+						  NAME([this](offs_t offset, uint8_t data) { LOGIO("FDA pia_w %04x: %02x\n", offset, data); m_fdapia->write(offset & 3, data); }));
 	map(0xf7c4, 0xf7c7).mirror(0x00).lrw8(NAME([this](offs_t offset) -> uint8_t    { LOGIO("MIC pia_r %04x: %02x\n", offset, 0); return m_micpia->read(offset & 3); }),
-					      NAME([this](offs_t offset, uint8_t data) { LOGIO("MIC pia_w %04x: %02x\n", offset, data); m_micpia->write(offset & 3, data); }));
+						  NAME([this](offs_t offset, uint8_t data) { LOGIO("MIC pia_w %04x: %02x\n", offset, data); m_micpia->write(offset & 3, data); }));
 	map(0xf800, 0xffff).rom().region("roms", 0);
 }
 
@@ -156,9 +156,9 @@ void alfaskop4101_state::mem_map(address_map &map)
 	map.unmap_value_high();
 	map(0x0000, 0xefff).ram();
 	map(0xf600, 0xf6ff).lrw8(NAME([this](offs_t offset) -> uint8_t { LOGNVRAM("nvram_r %04x: %02x\n", offset, 0); return (uint8_t) 0; }),
-				 NAME([this](offs_t offset, uint8_t data) {	LOGNVRAM("nvram_w %04x: %02x\n", offset, data);	}));
+				 NAME([this](offs_t offset, uint8_t data) { LOGNVRAM("nvram_w %04x: %02x\n", offset, data); }));
 	map(0xf7c4, 0xf7c7).mirror(0x00).lrw8(NAME([this](offs_t offset) -> uint8_t    { LOGIO("MIC pia_r %04x: %02x\n", offset, 0); return m_micpia->read(offset & 3); }),
-					      NAME([this](offs_t offset, uint8_t data) { LOGIO("MIC pia_w %04x: %02x\n", offset, data); m_micpia->write(offset & 3, data); }));
+						  NAME([this](offs_t offset, uint8_t data) { LOGIO("MIC pia_w %04x: %02x\n", offset, data); m_micpia->write(offset & 3, data); }));
 	map(0xf800, 0xffff).rom().region("roms", 0);
 }
 
@@ -196,7 +196,7 @@ void alfaskop4110_state::alfaskop4110(machine_config &config)
 	/* basic machine hardware */
 	M6800(config, m_maincpu, XTAL(19'170'000) / 18); // Verified from service manual
 	m_maincpu->set_addrmap(AS_PROGRAM, &alfaskop4110_state::mem_map);
-	
+
 	MC6845(config, m_crtc, XTAL(19'170'000) / 9);
 	m_crtc->set_screen("screen");
 	m_crtc->set_show_border_area(false);
@@ -246,12 +246,12 @@ void alfaskop4101_state::alfaskop4101(machine_config &config)
 	/* basic machine hardware */
 	M6800(config, m_maincpu, XTAL(19'170'000) / 18); // Verified from service manual
 	m_maincpu->set_addrmap(AS_PROGRAM, &alfaskop4101_state::mem_map);
-	
+
 	PIA6821(config, m_micpia, 0); // Main board PIA
 }
 
 /* ROM definitions */
-ROM_START( alfaskop4110 ) // Display Unit 
+ROM_START( alfaskop4110 ) // Display Unit
 	ROM_REGION( 0x800, "roms", ROMREGION_ERASEFF )
 	ROM_LOAD( "e3405870205201.bin", 0x0000, 0x0800, CRC(23f20f7f) SHA1(6ed008e309473ab966c6b0d42a4f87c76a7b1d6e))
 	ROM_REGION( 0x800, "chargen", ROMREGION_ERASEFF )

src/mame/drivers/cedar_magnet.cpp

@@ -116,7 +116,7 @@ SOUND BOARD
    |                 |HCF40105BE   |AY-3-8910A          |    ____________   _| 5
    |                  __________   |____________________|   |_SS74HC241E|   _| 0
    |  __________     |_MC74HC74|                             ____________   _|
-   | |_TC4066BP|      __________    _____________________   |_MC74HC374_|   _| P 
+   | |_TC4066BP|      __________    _____________________   |_MC74HC374_|   _| P
    |                 |MC74HC138|   |AY-3-8910A          |    ____________   _| I
    |                  __________   |____________________|   |_MC74HC245_|   _| N
    |                 |TC4013BP_|    _____________________    ____________   _|

src/mame/drivers/coleco.cpp

@@ -61,10 +61,10 @@
 
     - Dina SG-1000 mode
 
-	- Bit90:
+    - Bit90:
-		Add support for memory expansion (documented)
+        Add support for memory expansion (documented)
-		Add support for printer interface (documented)
+        Add support for printer interface (documented)
-		Add tape Support
+        Add tape Support
 
 */
 
@@ -175,7 +175,7 @@ void bit90_state::bit90_io_map(address_map &map)
 	map(0xc0, 0xc0).mirror(0x1f).r(FUNC(bit90_state::keyboard_r));
 	map(0xc0, 0xc0).mirror(0x1f).w(FUNC(coleco_state::paddle_on_w));
 	map(0xe0, 0xe0).mirror(0x1d).r(FUNC(coleco_state::paddle_1_r));
-	map(0xe0, 0xe0).mirror(0x1b).w(FUNC(bit90_state::u32_w));  	     // bits7-4 for keyscan, (to bcd decoder) and bits1-0 tape out
+	map(0xe0, 0xe0).mirror(0x1b).w(FUNC(bit90_state::u32_w));        // bits7-4 for keyscan, (to bcd decoder) and bits1-0 tape out
 	map(0xe2, 0xe2).mirror(0x1d).r(FUNC(coleco_state::paddle_2_r));  // also, bit7 is tape read?
 	map(0xe4, 0xe4).mirror(0x1b).w("sn76489a", FUNC(sn76489a_device::write));
 

src/mame/drivers/cps1.cpp

@@ -1956,11 +1956,11 @@ static INPUT_PORTS_START( sf2amf )
 	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 INPUT_PORTS_END
-	
+
 /* SWB.6 enables turbo mode, SWB.4 and SWB.5 sets the speed */
 static INPUT_PORTS_START( sf2amfx )
 	PORT_INCLUDE( sf2hack )
-	
+
 	PORT_MODIFY("DSWB")
 	PORT_DIPNAME( 0x18, 0x18, "Game Speed" )   PORT_DIPLOCATION("SW(B):4,5")
 	PORT_DIPSETTING(    0x18, "Normal" )
@@ -10714,8 +10714,8 @@ ROM_END
     MSTREET-6 repair info:
     Frequent cause of dead board is u104 (gal/palce20v8) becoming corrupted somehow. Luckily a working unsecured chip was found and dumped :)
     Likely to also work on other similar boards (reference number may vary).
-	
+
-	B/C sets patch pals have different equations but are logically equivalent.
+    B/C sets patch pals have different equations but are logically equivalent.
 */
 
 #define SF2CEMS6_PLD_DEVICES \
@@ -13439,22 +13439,22 @@ WRITE16_MEMBER( cps_state::sf2m3_layer_w )
 
 
 /*
-	A note reguarding bootlegs:
+    A note reguarding bootlegs:
-	In order to keep the cps source in some sort of order, the idea is to group similar bootleg hardware into seperate
+    In order to keep the cps source in some sort of order, the idea is to group similar bootleg hardware into seperate
-	derived classes and source files.
+    derived classes and source files.
 
-	Rom swaps, hacks etc.  (on original Capcom hardware)  ->  cps1.cpp
+    Rom swaps, hacks etc.  (on original Capcom hardware)  ->  cps1.cpp
-	Sound: Z80, 2x YM2203, 2x m5205 ("Final Crash" h/w)   ->  fcrash.cpp
+    Sound: Z80, 2x YM2203, 2x m5205 ("Final Crash" h/w)   ->  fcrash.cpp
-	Sound: Z80, 1x YM2151, 2x m5205                       ->  cps1bl_5205.cpp
+    Sound: Z80, 1x YM2151, 2x m5205                       ->  cps1bl_5205.cpp
-	Sound: PIC, 1x M6295            *1                    ->  cps1bl_pic.cpp
+    Sound: PIC, 1x M6295            *1                    ->  cps1bl_pic.cpp
-	Sound: Z80, 1x YM2151, 1x M6295 *2                    ->  fcrash.cpp      (for now...)
+    Sound: Z80, 1x YM2151, 1x M6295 *2                    ->  fcrash.cpp      (for now...)
 
-	*1 these seem to be only CPS1.5/Q sound games?
+    *1 these seem to be only CPS1.5/Q sound games?
-	*2 this is original configuration, but non-Capcom (usually single-board) hardware.
+    *2 this is original configuration, but non-Capcom (usually single-board) hardware.
-	
+
-	
+
-	This file currently contains games in first and last catergories.
+    This file currently contains games in first and last catergories.
-	Eventually only official/genuine/non-bootleg Capcom-hardware games and those in first catergory will remain here.
+    Eventually only official/genuine/non-bootleg Capcom-hardware games and those in first catergory will remain here.
 */
 
 

src/mame/drivers/cps1bl_5205.cpp

@@ -2,24 +2,24 @@
 // copyright-holders:David Haywood
 
 /*
-	CPS1 single board bootlegs (thought to be produced by "Playmark")
+    CPS1 single board bootlegs (thought to be produced by "Playmark")
-	
+
-	sound hardware: Z80, YM2151, 2x oki MSM5205 (instead of oki M6295)
+    sound hardware: Z80, YM2151, 2x oki MSM5205 (instead of oki M6295)
-	
+
-	Games known to use this h/w:
+    Games known to use this h/w:
-	Captain Commando                       911014 ETC
+    Captain Commando                       911014 ETC
-	Knights of the Round                   911127 ETC
+    Knights of the Round                   911127 ETC
-	Street Fighter II: The World Warrior   910204 ETC
+    Street Fighter II: The World Warrior   910204 ETC
-	Street Fighter II': Champion Edition   920313 ETC    * this might be hacked WW (uses WW portraits on character select screen)
+    Street Fighter II': Champion Edition   920313 ETC    * this might be hacked WW (uses WW portraits on character select screen)
-	Street Fighter II': Magic Delta Turbo  920313 ETC
+    Street Fighter II': Magic Delta Turbo  920313 ETC
-	The King of Dragons                    ?  (No dump)
+    The King of Dragons                    ?  (No dump)
-	
+
-	Generally the sound quality is quite poor compared to official Capcom hardware (consequence of M6295->2xM5205 conversion).
+    Generally the sound quality is quite poor compared to official Capcom hardware (consequence of M6295->2xM5205 conversion).
-	Most noticable is missing percussion backing of music tracks and no fade in/out effect.
+    Most noticable is missing percussion backing of music tracks and no fade in/out effect.
-	Often the 2x M5205 are clocked with a 400KHz xtal (should really be 384KHz) so pitch of samples is slightly out as well.
+    Often the 2x M5205 are clocked with a 400KHz xtal (should really be 384KHz) so pitch of samples is slightly out as well.
-	The sf2 sets seem to have quite a few missing samples?
+    The sf2 sets seem to have quite a few missing samples?
-	
+
-	*** see fcrash.cpp for game status ***
+    *** see fcrash.cpp for game status ***
 */
 
 #include "emu.h"
@@ -43,23 +43,23 @@ public:
 		: fcrash_state(mconfig, type, tag)
 		, m_msm_mux(*this, "msm_mux%u", 1)
 	{ }
-	
+
 	void captcommb2(machine_config &config);
 	void sf2b(machine_config &config);
 	void sf2mdt(machine_config &config);
-	
+
 	void init_captcommb2();
 	void init_knightsb();
 	void init_sf2b();
 	void init_sf2mdt();
 	void init_sf2mdta();
 	void init_sf2mdtb();
-	
+
 private:
 	DECLARE_MACHINE_START(captcommb2);
 	DECLARE_MACHINE_RESET(captcommb2);
 	DECLARE_MACHINE_START(sf2mdt);
-	
+
 	DECLARE_WRITE16_MEMBER(captcommb2_layer_w);
 	DECLARE_WRITE16_MEMBER(captcommb2_soundlatch_w);
 	DECLARE_READ8_MEMBER(captcommb2_soundlatch_r);
@@ -70,14 +70,14 @@ private:
 	DECLARE_WRITE16_MEMBER(sf2mdt_layer_w);
 	DECLARE_WRITE16_MEMBER(sf2mdt_soundlatch_w);
 	DECLARE_WRITE16_MEMBER(sf2mdta_layer_w);
-	
+
 	void captcommb2_map(address_map &map);
 	void sf2b_map(address_map &map);
 	void sf2mdt_map(address_map &map);
 	void captcommb2_z80map(address_map &map);
-	
+
 	bool m_captcommb2_mux_toggle;
-	
+
 	optional_device_array<ls157_device, 2> m_msm_mux;
 };
 
@@ -87,7 +87,7 @@ public:
 	captcommb2_state(const machine_config &mconfig, device_type type, const char *tag)
 		: cps1bl_5205_state(mconfig, type, tag)
 	{ }
-	
+
 private:
 	void bootleg_render_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) override;
 };
@@ -346,13 +346,13 @@ void cps1bl_5205_state::captcommb2(machine_config &config)
 	m_maincpu->set_addrmap(AS_PROGRAM, &cps1bl_5205_state::captcommb2_map);
 	m_maincpu->set_vblank_int("screen", FUNC(cps1bl_5205_state::cps1_interrupt));
 	m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &cps1bl_5205_state::cpu_space_map);
-	
+
 	Z80(config, m_audiocpu, 30000000 / 8);  // 3.75MHz measured on pcb
 	m_audiocpu->set_addrmap(AS_PROGRAM, &cps1bl_5205_state::captcommb2_z80map);
-	
+
 	MCFG_MACHINE_START_OVERRIDE(cps1bl_5205_state, captcommb2)
 	MCFG_MACHINE_RESET_OVERRIDE(cps1bl_5205_state, captcommb2)
-	
+
 	SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
 	m_screen->set_raw(CPS_PIXEL_CLOCK, CPS_HTOTAL, CPS_HBEND, CPS_HBSTART, CPS_VTOTAL, CPS_VBEND, CPS_VBSTART);
 	m_screen->set_screen_update(FUNC(cps1bl_5205_state::screen_update_fcrash));
@@ -364,18 +364,18 @@ void cps1bl_5205_state::captcommb2(machine_config &config)
 
 	SPEAKER(config, "mono").front_center();
 	GENERIC_LATCH_8(config, m_soundlatch);
-	
+
 	ym2151_device &ym2151(YM2151(config, "2151", 30000000 / 8));  // 3.75MHz measured on pcb
 	// IRQ pin not used
 	ym2151.add_route(0, "mono", 0.35);
 	ym2151.add_route(1, "mono", 0.35);
-	
+
 	LS157(config, m_msm_mux[0], 0);
 	m_msm_mux[0]->out_callback().set("msm1", FUNC(msm5205_device::data_w));
 
 	LS157(config, m_msm_mux[1], 0);
 	m_msm_mux[1]->out_callback().set("msm2", FUNC(msm5205_device::data_w));
-	
+
 	MSM5205(config, m_msm_1, 400000);  // 400kHz measured on pcb
 	m_msm_1->vck_callback().set(FUNC(cps1bl_5205_state::captcommb2_mux_select_w));
 	m_msm_1->vck_callback().append(m_msm_2, FUNC(msm5205_device::vclk_w));
@@ -428,7 +428,7 @@ void cps1bl_5205_state::sf2mdt(machine_config &config)
 
 	LS157(config, m_msm_mux[1], 0);
 	m_msm_mux[1]->out_callback().set("msm2", FUNC(msm5205_device::data_w));
-	
+
 	MSM5205(config, m_msm_1, 400000);  // 400kHz ?
 	m_msm_1->vck_callback().set(FUNC(cps1bl_5205_state::captcommb2_mux_select_w));
 	m_msm_1->vck_callback().append(m_msm_2, FUNC(msm5205_device::vclk_w));
@@ -505,7 +505,7 @@ void cps1bl_5205_state::sf2mdt_map(address_map &map)
  *  138 pin 10  E000-E3FF W     latch bank and 5202 reset lines
  *  138 pin 9   E400-E7FF W     master 5205
  *  138 pin 7   EC00-EFFF W     ?  pin not used
- *  
+ *
  *  gal pin 15  0000-BFFF R     rom
  */
 void cps1bl_5205_state::captcommb2_z80map(address_map &map)
@@ -536,7 +536,7 @@ MACHINE_START_MEMBER(cps1bl_5205_state, captcommb2)
 	//m_sprite_base = 0x1000;
 	m_sprite_list_end_marker = 0x8000;
 	m_sprite_x_offset = 0;
-	
+
 	save_item(NAME(m_captcommb2_mux_toggle));
 }
 
@@ -574,9 +574,9 @@ void cps1bl_5205_state::init_captcommb2()
 		uint8_t x = gfx[i];
 		gfx[i] = bitswap(x, 7, 6 ,5, 2, 3, 4, 1, 0);
 	}
-	
+
 	init_mtwinsb();
-	
+
 	// patch - fix invisible test screen at start
 	uint8_t *rom = memregion("maincpu")->base();
 	rom[0x65c] = 0x68;
@@ -606,11 +606,11 @@ void cps1bl_5205_state::init_sf2b()
 void cps1bl_5205_state::init_sf2mdt()
 {
 	m_maincpu->space(AS_PROGRAM).install_write_handler(0x708100, 0x7081ff, write16_delegate(*this, FUNC(cps1bl_5205_state::sf2mdt_layer_w)));
-	
+
 	/* extra work ram */
 	m_bootleg_work_ram = std::make_unique<uint16_t[]>(0x8000);
 	m_maincpu->space(AS_PROGRAM).install_ram(0xfc0000, 0xfcffff, m_bootleg_work_ram.get());
-	
+
 	init_sf2mdtb();
 }
 
@@ -636,7 +636,7 @@ void cps1bl_5205_state::init_sf2mdtb()
 		rom[i + 3] = rom[i + 6];
 		rom[i + 6] = tmp;
 	}
-	
+
 	init_sf2b();
 }
 
@@ -674,7 +674,7 @@ void cps1bl_5205_state::init_sf2mdtb()
 
 static INPUT_PORTS_START( captcommb2 )
 	PORT_INCLUDE(captcomm)
-	
+
 	PORT_MODIFY("IN3")
 	PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
 
@@ -812,7 +812,7 @@ static INPUT_PORTS_START( sf2mdtb )
 	PORT_DIPSETTING( 0x00, DEF_STR( On ) )
 	// debug mode? depending on other DSW setting get different "game" mode, autoplay, bonus round, etc...
 	PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW(A):8" )
-	
+
 	PORT_START("DSWB")
 	CPS1_DIFFICULTY_1("SW(B)")
 	PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW(B):4" )
@@ -853,7 +853,7 @@ void captcommb2_state::bootleg_render_sprites( screen_device &screen, bitmap_ind
 	bool flipx, flipy;
 	uint16_t *sprite_ram = m_bootleg_sprite_ram.get();
 	int base = (sprite_ram[0] ? 0x3000 : 0x1000) / 2;  // writes sprite buffer flip here instead of obj_base register
-	
+
 	// end of sprite table marker is 0x8000
 	// 1st sprite always 0x100e/0x300e
 	// sprites are: [ypos][tile#][color][xpos]
@@ -881,11 +881,11 @@ void captcommb2_state::bootleg_render_sprites( screen_device &screen, bitmap_ind
 		else
 			m_gfxdecode->gfx(2)->prio_transpen(bitmap, cliprect, tileno, colour, flipx, flipy, xpos, ypos, screen.priority(), 2, 15);
 	}
-	
+
 	/* tileno note:
-		sets the unused msb for certain tiles eg. middle parts of rocket launcher weapon,
+	    sets the unused msb for certain tiles eg. middle parts of rocket launcher weapon,
-		this means the tile is out of range and therefore transparent,
+	    this means the tile is out of range and therefore transparent,
-		most likely just a bug and the real h/w ignores the unused bit so the effect is not seen.
+	    most likely just a bug and the real h/w ignores the unused bit so the effect is not seen.
 	*/
 }
 
@@ -893,22 +893,22 @@ void captcommb2_state::bootleg_render_sprites( screen_device &screen, bitmap_ind
 // ************************************************************************* CAPTCOMMB2
 
 /*
-	Captain Commando:
+    Captain Commando:
-	
+
-	h/w issues compared to original game (captcomm)
+    h/w issues compared to original game (captcomm)
-	-----------------------------------------------
+    -----------------------------------------------
-	these are present on the real board so are not emulation issues:
+    these are present on the real board so are not emulation issues:
-	
+
-	* End sequence row scroll effect doesn't work.
+    * End sequence row scroll effect doesn't work.
-	* Capcom copyright text missing on title screen, deliberately shifted down out of visible area by bootleggers.
+    * Capcom copyright text missing on title screen, deliberately shifted down out of visible area by bootleggers.
-	* Capcom logo missing from end sequence, as above.
+    * Capcom logo missing from end sequence, as above.
-	* Sprite flickering effects eg. when character has invincibility, look a little different to original.
+    * Sprite flickering effects eg. when character has invincibility, look a little different to original.
-	* Certain static sprites wobble vertically just a pixel or two  eg. manhole covers, breakable oil drums etc.
+    * Certain static sprites wobble vertically just a pixel or two  eg. manhole covers, breakable oil drums etc.
-	
+
-	these are present on the real board but are unintentionally "fixed" in emulation:
+    these are present on the real board but are unintentionally "fixed" in emulation:
-	
+
-	* All '0' characters are missing in test menu eg. sound test, input test etc.
+    * All '0' characters are missing in test menu eg. sound test, input test etc.
-	* Wrong tile displayed when character select count-down timer reaches zero (superscript '1' with white bar underneath)
+    * Wrong tile displayed when character select count-down timer reaches zero (superscript '1' with white bar underneath)
 */
 ROM_START( captcommb2 )
 	ROM_REGION( CODE_SIZE, "maincpu", 0 ) // = captcommr1 + additional code mapped on top
@@ -922,7 +922,7 @@ ROM_START( captcommb2 )
 	ROM_CONTINUE(             0x000001, 0x04000)
 	ROM_CONTINUE(             0x018001, 0x04000)
 	ROM_IGNORE(                         0x18000)
-	
+
 	ROM_REGION( 0x400000, "gfx", 0 ) // some data bits are swapped, see init()
 	ROM_LOAD64_BYTE( "bnh-01.bin", 0x000000, 0x40000, CRC(ffbc3bdd) SHA1(fcee1befd8279d41a81689394a562e2344191e2a) )
 	ROM_CONTINUE(                  0x000004, 0x40000)
@@ -940,11 +940,11 @@ ROM_START( captcommb2 )
 	ROM_CONTINUE(                  0x200006, 0x40000)
 	ROM_LOAD64_BYTE( "bnh-08.bin", 0x200003, 0x40000, CRC(327b8da8) SHA1(4bcc6fd637d382ce35b9387568c53d89a55e8ed2) )
 	ROM_CONTINUE(                  0x200007, 0x40000)
-	
+
 	ROM_REGION( 0x50000, "audiocpu", 0 )
 	ROM_LOAD( "1.bin", 0x00000, 0x40000, CRC(aed2f4bd) SHA1(3bd567dc350bf6ac3a349548790ad49eb5bd8307) )
 	ROM_RELOAD(        0x10000, 0x40000 )
-	
+
 	/* pld devices:
 	#1   IC169   gal20v8           secured
 	#2   IC7     gal16v8           secured, bruteforce ok
@@ -962,39 +962,39 @@ ROM_END
 // ************************************************************************* KNIGHTSB, KNIGHTSB3
 
 /*
-	CPU
+    CPU
-	1x MC68000P12 ic65 main
+    1x MC68000P12 ic65 main
-	1x Z0840006PSC ic1 sound
+    1x Z0840006PSC ic1 sound
-	1x YM2151 ic29 sound
+    1x YM2151 ic29 sound
-	1x YM3012 ic30 sound
+    1x YM3012 ic30 sound
-	2x LM324 ic15,ic31 sound
+    2x LM324 ic15,ic31 sound
-	2x M5205 ic184,ic185 sound
+    2x M5205 ic184,ic185 sound
-	1x TDA2003 ic14 sound
+    1x TDA2003 ic14 sound
-	1x oscillator 24.000000MHz (close to main)
+    1x oscillator 24.000000MHz (close to main)
-	1x oscillator 29.821000MHz (close to sound)
+    1x oscillator 29.821000MHz (close to sound)
 
-	ROMs
+    ROMs
-	5x M27C2001 1,2,3,4,5 dumped
+    5x M27C2001 1,2,3,4,5 dumped
-	4x mask ROM KA,KB,KC,KD not dumped
+    4x mask ROM KA,KB,KC,KD not dumped
 
-	RAMs
+    RAMs
-	4x KM62256ALP ic112,ic113,ic168,ic170
+    4x KM62256ALP ic112,ic113,ic168,ic170
-	1x SYC6116L ic24
+    1x SYC6116L ic24
-	1x MCM2018AN ic7,ic8,ic51,ic56,ic70,ic71,ic77,ic78
+    1x MCM2018AN ic7,ic8,ic51,ic56,ic70,ic71,ic77,ic78
 
-	PLDs
+    PLDs
-	1x TPC1020AFN ic116 read protected
+    1x TPC1020AFN ic116 read protected
-	3x GAL20V8A ic120,ic121,ic169 read protected
+    3x GAL20V8A ic120,ic121,ic169 read protected
-	3x GAL16V8A ic7,ic72,ic80 read protected
+    3x GAL16V8A ic7,ic72,ic80 read protected
 
-	Note
+    Note
-	1x JAMMA edge connector
+    1x JAMMA edge connector
-	2x 10 legs connector
+    2x 10 legs connector
-	1x trimmer (volume)
+    1x trimmer (volume)
-	3x 8x2 switches DIP
+    3x 8x2 switches DIP
 
-	FIXME - graphics ROMs are wrong, copied from the other version 
+    FIXME - graphics ROMs are wrong, copied from the other version
-	ROMs missing are KA.IC91 KB.IC92 KC.IC93 KD.IC94
+    ROMs missing are KA.IC91 KB.IC92 KC.IC93 KD.IC94
 */
 ROM_START( knightsb )
 	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
@@ -1019,17 +1019,17 @@ ROM_START( knightsb )
 ROM_END
 
 /*
-	Knights of the Round
+    Knights of the Round
-	pcb marking: ORD 92032
+    pcb marking: ORD 92032
-	Very similar to knightsb set:
+    Very similar to knightsb set:
-	 maincpu roms are just 1 byte different, vector 1 (stack pointer init) is ff80d6 instead of ff81d6
+     maincpu roms are just 1 byte different, vector 1 (stack pointer init) is ff80d6 instead of ff81d6
-	 knightsb gfx roms are 4x 1MB (but not dumped), these are 8x 512KB (suspect data is same)
+     knightsb gfx roms are 4x 1MB (but not dumped), these are 8x 512KB (suspect data is same)
-	Some sound samples are very quiet on real pcb
+    Some sound samples are very quiet on real pcb
-	Confirmed clocks (measured) are same as captcommb2:
+    Confirmed clocks (measured) are same as captcommb2:
-	 xtals: 30MHz, 24MHz, 400KHz
+     xtals: 30MHz, 24MHz, 400KHz
-	 68k = 12MHz (P10 model, overclocked)
+     68k = 12MHz (P10 model, overclocked)
-	 z80/ym = 3.75MHz
+     z80/ym = 3.75MHz
-	 5202 = 400KHz
+     5202 = 400KHz
 */
 ROM_START( knightsb3 )
 	ROM_REGION( CODE_SIZE, "maincpu", 0 )
@@ -1132,28 +1132,28 @@ ROM_END
 // ************************************************************************* SF2MDT, SF2MDTA, SF2MDTB
 
 /*
-	CPU
+    CPU
-	1x MC68000P12 (main)
+    1x MC68000P12 (main)
-	1x TPC1020AFN-084C (main)
+    1x TPC1020AFN-084C (main)
-	1x Z0840006PSC-Z80CPU (sound)
+    1x Z0840006PSC-Z80CPU (sound)
-	1x YM2151 (sound)
+    1x YM2151 (sound)
-	1x YM3012 (sound)
+    1x YM3012 (sound)
-	2x M5205 (sound)
+    2x M5205 (sound)
-	2x LM324N (sound)
+    2x LM324N (sound)
-	1x TDA2003 (sound)
+    1x TDA2003 (sound)
-	1x oscillator 24.000000MHz
+    1x oscillator 24.000000MHz
-	1x oscillator 30.000MHz
+    1x oscillator 30.000MHz
 
-	ROMs
+    ROMs
-	14x AM27C040 (1,3,6,7,8,9,10,11,12,13,14,15,16,17)
+    14x AM27C040 (1,3,6,7,8,9,10,11,12,13,14,15,16,17)
-	3x TMS27C010A (2,4,5)
+    3x TMS27C010A (2,4,5)
-	3x PAL 16S20 (ic7,ic72, ic80) (read protected, not dumped)
+    3x PAL 16S20 (ic7,ic72, ic80) (read protected, not dumped)
-	3x GAL20V8A (ic120, ic121, ic169) (read protected, not dumped)
+    3x GAL20V8A (ic120, ic121, ic169) (read protected, not dumped)
 
-	Note
+    Note
-	1x JAMMA edge connector
+    1x JAMMA edge connector
-	1x trimmer (volume)
+    1x trimmer (volume)
-	3x 8x2 switches dip
+    3x 8x2 switches dip
 */
 ROM_START( sf2mdt )
 	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */

src/mame/drivers/cps1bl_pic.cpp

@@ -2,25 +2,25 @@
 // copyright-holders:David Haywood
 
 /*
-	CPS1 single board bootlegs
+    CPS1 single board bootlegs
-	
+
-	sound hardware: PIC16c57, oki M6295 (no z80)
+    sound hardware: PIC16c57, oki M6295 (no z80)
-	
+
-	Games known to use this h/w:
+    Games known to use this h/w:
-	Cadillacs and Dinosaurs         930201 ETC
+    Cadillacs and Dinosaurs         930201 ETC
-	The Punisher                    930422 ETC
+    The Punisher                    930422 ETC
-	Saturday Night Slam Masters     930713 ETC
+    Saturday Night Slam Masters     930713 ETC
-	
+
-	(Note, these are all CPS1.5/Q sound games)
+    (Note, these are all CPS1.5/Q sound games)
-	
+
-	Generally the sound quality is very poor compared to official Capcom hardware.
+    Generally the sound quality is very poor compared to official Capcom hardware.
-	Both music and sound effects are produced by just a single M6295.
+    Both music and sound effects are produced by just a single M6295.
-	Background music consists of short pre-recorded clips which loop continuously.
+    Background music consists of short pre-recorded clips which loop continuously.
-	Currently all games have no sound emulation due to the PICs being secured/protected.
+    Currently all games have no sound emulation due to the PICs being secured/protected.
-	Unless any un-protected PIcs ever turn up (unlikely) then "decapping" of working chips is probably the
+    Unless any un-protected PIcs ever turn up (unlikely) then "decapping" of working chips is probably the
-	only way valid dumps will ever be made.
+    only way valid dumps will ever be made.
-	
+
-	*** see fcrash.cpp for game status ***
+    *** see fcrash.cpp for game status ***
 */
 
 #include "emu.h"
@@ -43,24 +43,24 @@ public:
 	cps1bl_pic_state(const machine_config &mconfig, device_type type, const char *tag)
 		: fcrash_state(mconfig, type, tag)
 	{ }
-	
+
 	void dinopic(machine_config &config);
 	void punipic(machine_config &config);
 	void slampic(machine_config &config);
 	void slampic2(machine_config &config);
-	
+
 	void init_dinopic();
 	void init_punipic();
 	void init_punipic3();
 	void init_slampic();
 	void init_slampic2();
-	
+
 private:
 	DECLARE_MACHINE_START(dinopic);
 	DECLARE_MACHINE_START(punipic);
 	DECLARE_MACHINE_START(slampic);
 	DECLARE_MACHINE_START(slampic2);
-	
+
 	DECLARE_WRITE16_MEMBER(dinopic_layer_w);
 	DECLARE_WRITE16_MEMBER(dinopic_layer2_w);
 	DECLARE_WRITE16_MEMBER(punipic_layer_w);
@@ -69,7 +69,7 @@ private:
 	DECLARE_READ16_MEMBER(slampic2_cps_a_r);
 	DECLARE_WRITE16_MEMBER(slampic2_sound_w);
 	DECLARE_WRITE16_MEMBER(slampic2_sound2_w);
-	
+
 	void dinopic_map(address_map &map);
 	void punipic_map(address_map &map);
 	void slampic_map(address_map &map);
@@ -82,7 +82,7 @@ public:
 	slampic2_state(const machine_config &mconfig, device_type type, const char *tag)
 		: cps1bl_pic_state(mconfig, type, tag)
 	{ }
-	
+
 private:
 	void bootleg_render_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) override;
 };
@@ -193,7 +193,7 @@ WRITE16_MEMBER(cps1bl_pic_state::slampic_layer_w)
 WRITE16_MEMBER(cps1bl_pic_state::slampic_layer2_w)
 {
 	COMBINE_DATA(&m_cps_a_regs[offset]);
-	
+
 	if (offset == 0x22 / 2)
 	{
 		// doesn't seem to write anywhere outside mainram?
@@ -335,12 +335,12 @@ void cps1bl_pic_state::slampic2(machine_config &config)
 	m_maincpu->set_addrmap(AS_PROGRAM, &cps1bl_pic_state::slampic2_map);
 	m_maincpu->set_vblank_int("screen", FUNC(cps1bl_pic_state::cps1_interrupt));
 	m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &cps1bl_pic_state::cpu_space_map);
-	
+
 	PIC16C57(config, m_audiocpu, 4000000);  // measured
 	//m_audiocpu->set_disable();
 
 	MCFG_MACHINE_START_OVERRIDE(cps1bl_pic_state, slampic2)
-	
+
 	SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
 	m_screen->set_raw(CPS_PIXEL_CLOCK, CPS_HTOTAL, CPS_HBEND, CPS_HBSTART, CPS_VTOTAL, CPS_VBEND, CPS_VBSTART);
 	m_screen->set_screen_update(FUNC(cps1bl_pic_state::screen_update_fcrash));
@@ -349,7 +349,7 @@ void cps1bl_pic_state::slampic2(machine_config &config)
 
 	GFXDECODE(config, m_gfxdecode, m_palette, gfx_cps1);
 	PALETTE(config, m_palette, palette_device::BLACK).set_entries(0xc00);
-	
+
 	SPEAKER(config, "mono").front_center();
 	//GENERIC_LATCH_8(config, m_soundlatch);
 	//GENERIC_LATCH_8(config, m_soundlatch2);
@@ -437,17 +437,17 @@ void cps1bl_pic_state::slampic2_map(address_map &map)
 	//  0xfc0000, 0xfeffff  gfxram
 	//  0xff0000, 0xff3fff  spriteram
 	map(0xff4000, 0xffffff).ram().share("mainram");
-	
+
 	/*
 	                  slammast        slampic2
 	sprite table 1    900000-9007ff   ff2000-ff27ff
 	                                  ff2800-ff2fff  ?
 	sprite table 2    904000-9047ff   ff3000-ff37ff
 	                                  ff3800-ff3fff  ?
-									  
+
 	gfxram            900000-91bfff   900000-91bfff
 	                  91c000-92ffff   fdc000-feffff
-	
+
 	test menu reads 3p + 4p controls at original ports f1c000-f1c003
 	start-up check tests f00000-f40000 region
 	start-up check tests 930000-934000 region but ignores any failure found, mirrored with sprite table region?
@@ -548,17 +548,17 @@ void cps1bl_pic_state::init_slampic2()
 	m_bootleg_sprite_ram = std::make_unique<uint16_t[]>(0x2000);
 	m_maincpu->space(AS_PROGRAM).install_ram(0x930000, 0x933fff, m_bootleg_sprite_ram.get());
 	m_maincpu->space(AS_PROGRAM).install_ram(0xff0000, 0xff3fff, m_bootleg_sprite_ram.get());
-	
+
 	m_bootleg_work_ram = std::make_unique<uint16_t[]>(0x20000);
 	m_maincpu->space(AS_PROGRAM).install_ram(0xf00000, 0xf3ffff, m_bootleg_work_ram.get());
-	
+
 	init_cps1();
 }
 
 
 static INPUT_PORTS_START( slampic )
 	PORT_INCLUDE(slammast)
-	
+
 	PORT_MODIFY("IN2")  // players 3 + 4  (player 4 doesn't work in test menu but ok in game)
 	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(3)
 	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(3)
@@ -576,7 +576,7 @@ static INPUT_PORTS_START( slampic )
 	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(4)
 	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_COIN4 )
 	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_START4 )
-	
+
 	PORT_MODIFY("IN3")
 	PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
 INPUT_PORTS_END
@@ -592,7 +592,7 @@ static INPUT_PORTS_START( slampic2 )
 	//PORT_SERVICE( 0x40, IP_ACTIVE_LOW )
 	PORT_SERVICE_NO_TOGGLE( 0x40, IP_ACTIVE_LOW )
 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
-	
+
 	PORT_START("DSWA")
 	PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW(A):1,2,3")
 	PORT_DIPSETTING( 0x07, DEF_STR( 1C_1C ) )
@@ -612,7 +612,7 @@ static INPUT_PORTS_START( slampic2 )
 	PORT_DIPNAME( 0x80, 0x80, "Chuter" ) PORT_DIPLOCATION("SW(A):8")
 	PORT_DIPSETTING( 0x80, "Single Chuter" )
 	PORT_DIPSETTING( 0x00, "Multi Chuters" )
-	
+
 	PORT_START("DSWB")
 	PORT_DIPNAME( 0x07, 0x04, "Game Difficulty" ) PORT_DIPLOCATION("SW(B):1,2,3")
 	PORT_DIPSETTING( 0x07, "(0) Extra Easy" )
@@ -633,7 +633,7 @@ static INPUT_PORTS_START( slampic2 )
 	//PORT_DIPSETTING( 0x80, "Invalid" )              // only coin 1 works, credits both player 1 and 2
 	PORT_DIPSETTING( 0x40, "4 Players Cabinet" )
 	PORT_DIPSETTING( 0x00, "2x2 Players Cabinet" )  // only coins 1,3 work, 1 credits 1+2, 2 credits 3+4
-	
+
 	PORT_START("DSWC")
 	PORT_DIPUNUSED_DIPLOC( 0x01, 0x01, "SW(C):1" )
 	PORT_DIPNAME( 0x02, 0x02, "Game Mode" ) PORT_DIPLOCATION("SW(C):2")
@@ -673,7 +673,7 @@ static INPUT_PORTS_START( slampic2 )
 	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
 	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
 	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(4)
-	
+
 	PORT_START("IN2")
 	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(4)
 	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(4)
@@ -694,12 +694,12 @@ static INPUT_PORTS_START( slampic2 )
 INPUT_PORTS_END
 
 
-#define DRAWSPRITE(CODE, COLOR, FLIPX, FLIPY, SX, SY)																								\
+#define DRAWSPRITE(CODE, COLOR, FLIPX, FLIPY, SX, SY)                                                                                               \
-{																																					\
+{                                                                                                                                                   \
-	if (flip_screen())																																\
+	if (flip_screen())                                                                                                                              \
-		m_gfxdecode->gfx(2)->prio_transpen(bitmap, cliprect, CODE, COLOR, !(FLIPX), !(FLIPY), 512-16-(SX), 256-16-(SY), screen.priority(), 2, 15);	\
+		m_gfxdecode->gfx(2)->prio_transpen(bitmap, cliprect, CODE, COLOR, !(FLIPX), !(FLIPY), 512-16-(SX), 256-16-(SY), screen.priority(), 2, 15);  \
-	else																																			\
+	else                                                                                                                                            \
-		m_gfxdecode->gfx(2)->prio_transpen(bitmap, cliprect, CODE, COLOR, FLIPX, FLIPY, SX, SY, screen.priority(), 2, 15);							\
+		m_gfxdecode->gfx(2)->prio_transpen(bitmap, cliprect, CODE, COLOR, FLIPX, FLIPY, SX, SY, screen.priority(), 2, 15);                          \
 }
 
 void slampic2_state::bootleg_render_sprites( screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect )
@@ -709,7 +709,7 @@ void slampic2_state::bootleg_render_sprites( screen_device &screen, bitmap_ind16
 	uint16_t tileno, colour, xpos, ypos;
 	uint16_t obj_base = m_cps_a_regs[0];
 	uint16_t *sprite_ram = m_bootleg_sprite_ram.get();
-	
+
 	switch (obj_base)
 	{
 	case 0x9000:
@@ -722,14 +722,14 @@ void slampic2_state::bootleg_render_sprites( screen_device &screen, bitmap_ind16
 		logerror("Unknown sprite table location: %04x\n", obj_base);
 		sprite_ram += m_sprite_base;  // ff2000
 	}
-	
+
 	while (last_sprite_offset < m_obj_size / 2)
 	{
 		if (sprite_ram[last_sprite_offset + 3] == m_sprite_list_end_marker)
 			break;
 		last_sprite_offset += 4;
 	}
-	
+
 	for (i = last_sprite_offset; i > 0; i -= 4)
 	{
 		xpos   = sprite_ram[j];
@@ -802,7 +802,7 @@ void slampic2_state::bootleg_render_sprites( screen_device &screen, bitmap_ind16
 		}
 		else
 			DRAWSPRITE(tileno, (colour & 0x1f), (colour & 0x20), (colour & 0x40), (xpos & 0x1ff), (ypos & 0x1ff));
-		
+
 		j += 4;
 	}
 }
@@ -917,24 +917,24 @@ ROM_START( dinopic2 )
 ROM_END
 
 /*
-	Cadillacs and Dinosaurs
+    Cadillacs and Dinosaurs
-	pcb marking: 3M05B
+    pcb marking: 3M05B
-	maincpu roms are same data as dinopic but arranged as 2x 2MB 16-bit mask roms
+    maincpu roms are same data as dinopic but arranged as 2x 2MB 16-bit mask roms
-	Confirmed clocks (measured):
+    Confirmed clocks (measured):
-	 xtals: 30MHz, 24MHz
+     xtals: 30MHz, 24MHz
-	 68k = 12MHz (P10 model, overclocked)
+     68k = 12MHz (P10 model, overclocked)
-	 pic = 3.75MHz
+     pic = 3.75MHz
-	 oki = 1MHz
+     oki = 1MHz
-	
+
-	repair note:
+    repair note:
-	for any gfx issues, check the 9x Harris CD74HC597E shift registers,
+    for any gfx issues, check the 9x Harris CD74HC597E shift registers,
-	(4 were dead on the board used for this dump!)
+    (4 were dead on the board used for this dump!)
 */
 ROM_START( dinopic3 )
 	ROM_REGION( CODE_SIZE, "maincpu", 0 ) // = dinopic but arranged differently
 	ROM_LOAD16_WORD_SWAP( "tk1-305_27c800.bin", 0x000000, 0x100000, CRC(aa468337) SHA1(496df3bd62cdea0b104f96a7988ad21c94a70c2b) )
 	ROM_LOAD16_WORD_SWAP( "tk1-204_27c800.bin", 0x100000, 0x100000, CRC(0efd1ddb) SHA1(093cf7906eda36533c7021329c629ba5a995c5ee) )
-	
+
 	ROM_REGION( 0x400000, "gfx", 0 ) // = dino but arranged differently
 	ROM_LOAD64_WORD("tb416-02_27c160.bin", 0x000000, 0x80000, CRC(bfd01d21) SHA1(945f2764b0ca7f9e1569a591363c70207e8efbd0) )
 	ROM_CONTINUE( 0x200000, 0x80000 )
@@ -944,26 +944,26 @@ ROM_START( dinopic3 )
 	ROM_CONTINUE( 0x200002, 0x80000 )
 	ROM_CONTINUE( 0x000006, 0x80000 )
 	ROM_CONTINUE( 0x200006, 0x80000 )
-	
+
 	// no markings, assume pic16c57, secured
 	//ROM_REGION( 0x2000, "audiocpu", 0 )
 	//ROM_LOAD( "pic_t1.bin", 0x0000, 0x1007, NO_DUMP )
 
 	ROM_REGION( 0x80000, "oki", 0 )
 	ROM_LOAD( "ti-i_27c040.bin", 0x000000, 0x80000, CRC(7d921309) SHA1(d51e60e904d302c2516b734189e141aa171b2b82) )  // = dinopic, dinopic2
-	
+
 	/* pld devices:
-		 __________________________
+	     __________________________
-		|                  6       |      (no component reference markings on pcb)
+	    |                  6       |      (no component reference markings on pcb)
-		|                      7   |
+	    |                      7   |
 	  ==            5              |
 	  ==                           |
 	  ==                           |
 	  ==                           |
 	  ==                         4 |
-		|     1            2  3    |
+	    |     1            2  3    |
-		|__________________________|
+	    |__________________________|
-	
+
 	#1   palce20v8   next to main cpu        secured                 = dinopic2 "gal20v8a-1.bin", tested ok
 	#2   palce20v8   below gfx roms, left    secured                 = dinopic2 "gal20v8a-2.bin", tested ok
 	#3   palce20v8   below gfx roms, middle  secured                 = dinopic2 "gal20v8a-3.bin", tested ok
@@ -1161,79 +1161,79 @@ ROM_START( slampic )
 ROM_END
 
 /*
-	Saturday Night Slam Masters: single board bootleg
+    Saturday Night Slam Masters: single board bootleg
-	
+
-	CPU
+    CPU
-	1x  MC68000P10           main cpu
+    1x  MC68000P10           main cpu
-	
+
-	GFX
+    GFX
-	1x  Custom QFP 160-pin   "PLUS-B A37558.6 9325"   CPS-B-xx clone?
+    1x  Custom QFP 160-pin   "PLUS-B A37558.6 9325"   CPS-B-xx clone?
-	
+
-	RAM
+    RAM
-	2x  NEC D431000ACZ-70L   main ram   1Mbit (128Kx8) SRAM 70ns
+    2x  NEC D431000ACZ-70L   main ram   1Mbit (128Kx8) SRAM 70ns
-	2x  SRM20256LM12         gfx?       256Kbit (32Kx8) SRAM 120ns SOP28   (mounted on SOP->DIP adapter pcbs)
+    2x  SRM20256LM12         gfx?       256Kbit (32Kx8) SRAM 120ns SOP28   (mounted on SOP->DIP adapter pcbs)
-	6x  T6116S45L            gfx?       16Kbit (2Kx8) SRAM 45ns
+    6x  T6116S45L            gfx?       16Kbit (2Kx8) SRAM 45ns
-	4x  T6116S35L            gfx?       16Kbit (2Kx8) SRAM 35ns
+    4x  T6116S35L            gfx?       16Kbit (2Kx8) SRAM 35ns
-	
+
-	ROMS
+    ROMS
-	4x   27C040-15 EPROM      main rom   4Mbit (512Kx8)
+    4x   27C040-15 EPROM      main rom   4Mbit (512Kx8)
-	16x  MX27C4000PC-15 OTP   gfx        4Mbit (512Kx8)
+    16x  MX27C4000PC-15 OTP   gfx        4Mbit (512Kx8)
-	1x   27C020-15 EPROM      sound      2Mbit (256Kx8)
+    1x   27C020-15 EPROM      sound      2Mbit (256Kx8)
-	2x   MX27C4000PC-15 OTP   sound      4Mbit (512Kx8)
+    2x   MX27C4000PC-15 OTP   sound      4Mbit (512Kx8)
-	1x   AM27512DC EPROM      ?          512Kbit (64kx8)  1983!
+    1x   AM27512DC EPROM      ?          512Kbit (64kx8)  1983!
-	
+
-	PLD
+    PLD
-	1x   TPC1020AFN-084C
+    1x   TPC1020AFN-084C
-	14x  PALCE16V8H-25PC/4
+    14x  PALCE16V8H-25PC/4
-	4x   PALCE20V8H-25PC/4
+    4x   PALCE20V8H-25PC/4
-	1x   PALCE22V10H-25PC/4
+    1x   PALCE22V10H-25PC/4
-	
+
-	SOUND
+    SOUND
-	1x  PIC16C57-XT/P     sound cpu
+    1x  PIC16C57-XT/P     sound cpu
-	1x  TD735             sample player  (Oki MSM6295 clone)
+    1x  TD735             sample player  (Oki MSM6295 clone)
-	1x  NEC uPC1242H      power amp
+    1x  NEC uPC1242H      power amp
-	1x  LM324N            op amp
+    1x  LM324N            op amp
-	
+
-	MISC
+    MISC
-	1x  16MHz xtal
+    1x  16MHz xtal
-	1x  10MHz xtal
+    1x  10MHz xtal
-	1x  PST518A             reset generator
+    1x  PST518A             reset generator
-	3x  8 pos dipswitch
+    3x  8 pos dipswitch
-	2x  10-pin connectors   player 3 & 4 inputs
+    2x  10-pin connectors   player 3 & 4 inputs
-	No eeprom!
+    No eeprom!
-	
+
-	INPUTS
+    INPUTS
-	CN3: Player 3
+    CN3: Player 3
-	CN4: Player 4
+    CN4: Player 4
-	
+
-	1   gnd
+    1   gnd
-	2   nc
+    2   nc
-	3   right
+    3   right
-	4   left
+    4   left
-	5   down
+    5   down
-	6   up
+    6   up
-	7   btn 1
+    7   btn 1
-	8   btn 2
+    8   btn 2
-	9   coin
+    9   coin
-	10  start
+    10  start
-	
+
-	player 3 btn 3:  jamma 25  (non-std, player 1 btn 4/neogeo btn D)
+    player 3 btn 3:  jamma 25  (non-std, player 1 btn 4/neogeo btn D)
-	player 4 btn 4:  jamma ac  (non-std, player 2 btn 4/neogeo btn D)
+    player 4 btn 4:  jamma ac  (non-std, player 2 btn 4/neogeo btn D)
-	
+
-	
+
-	h/w issues compared to original game (slammast)
+    h/w issues compared to original game (slammast)
-	-----------------------------------------------
+    -----------------------------------------------
-	these are present on the real board so are not emulation issues:
+    these are present on the real board so are not emulation issues:
-	
+
-	* On the title screen, the blue crystal-like effect behind the main "slammasters" logo is missing.
+    * On the title screen, the blue crystal-like effect behind the main "slammasters" logo is missing.
-	* The bottom and side crowd animations have missing frames.
+    * The bottom and side crowd animations have missing frames.
-	* The foreground ropes of the wrestling ring are glitchy and don't always line up properly with the end sections,
+    * The foreground ropes of the wrestling ring are glitchy and don't always line up properly with the end sections,
-		the original game draws all 3 ropes on scroll2 instead of with sprites when 4 players are on screen,
+        the original game draws all 3 ropes on scroll2 instead of with sprites when 4 players are on screen,
-		this bootleg draws the top red rope on scroll2 even with 2 players on screen.
+        this bootleg draws the top red rope on scroll2 even with 2 players on screen.
-	* Player 3/4 inputs don't work in test menu (except both btn 3), seems test menu code hasn't been hacked to use the different ports.
+    * Player 3/4 inputs don't work in test menu (except both btn 3), seems test menu code hasn't been hacked to use the different ports.
-	* No eeprom on the board, has dipswitches instead.
+    * No eeprom on the board, has dipswitches instead.
-	* Crashes if "memory test" is attempted in test menu.
+    * Crashes if "memory test" is attempted in test menu.
-	* Flip screen dipswitch does nothing (but change is shown in test menu).
+    * Flip screen dipswitch does nothing (but change is shown in test menu).
 */
 ROM_START( slampic2 )
 	ROM_REGION( CODE_SIZE, "maincpu", 0 )
@@ -1267,7 +1267,7 @@ ROM_START( slampic2 )
 	ROM_CONTINUE(                 0x400006, 0x40000)
 	ROM_LOAD64_BYTE( "rom14.bin", 0x400003, 0x40000, CRC(f538e620) SHA1(354cd0548b067dfc8782bbe13b0a9c2083dbd290) )  // = slampic 10.bin
 	ROM_CONTINUE(                 0x400007, 0x40000)
-	
+
 	// this region contains first 0x40000 bytes of 1st 0x200000 region (rom7/8/5/6.bin)
 	//   then,              last 0x1c0000 bytes of 3rd 0x200000 region (rom15/16/13/14.bin)
 	// game doesn't seem to need it ???
@@ -1282,15 +1282,15 @@ ROM_START( slampic2 )
 
 	ROM_REGION( 0x2000, "audiocpu", 0 ) // NO DUMP  -  protected PIC
 	ROM_LOAD( "pic_u33.bin", 0x0000, 0x1007, BAD_DUMP CRC(6dba4094) SHA1(ca3362de83205fc6563d16a59b8e6e4bb7ebf4a6) )
-	
+
 	ROM_REGION( 0x140000, "oki", 0 )
 	ROM_LOAD( "v1.bin", 0x000000, 0x40000,  CRC(8962b469) SHA1(91dc12610a0b780ee2b314cd346182d97279c175) )  // 27c020 w/ sticker "7"
 	ROM_LOAD( "v2.bin", 0x040000, 0x80000,  CRC(6687df38) SHA1(d1015ae089fab5c5b4d1ab51b20f3aa6b77ed348) )  // 27c4000
 	ROM_LOAD( "v3.bin", 0x0c0000, 0x80000,  CRC(5782baee) SHA1(c01f8cd08d0c7b78c010ce3f1567383b7435de9f) )  // 27c4000
-	
+
 	ROM_REGION( 0x10000, "user1", 0 )
 	ROM_LOAD( "24.bin", 0x00000, 0x10000, CRC(13ea1c44) SHA1(5b05fe4c3920e33d94fac5f59e09ff14b3e427fe) )  // = various sf2 bootlegs (sf2ebbl etc.) "unknown (bootleg priority?)"
-	
+
 	/* pld devices:
 	#1    P7    palce16V8        todo...
 	#2    P1    palce16V8        secured, bruteforce ok

src/mame/drivers/eispc.cpp

@@ -27,7 +27,7 @@
  * - Complete the Ericsson 1070 MDA ISA board and test all the graphics modes including 640x400 (aka HR)
  * - Add the Ericsson 1065 HDC and boot from a hard drive
  * - Add softlist
- * - Pass the diagnostics software system test at EPC2.IMD, it currently hangs the keyboard. 
+ * - Pass the diagnostics software system test at EPC2.IMD, it currently hangs the keyboard.
  *   A later version of the test on EPC5.IMD works though so need to verify EPC2.IMD on real hardware first.
  *
  * CREDITS  The driver code is inspired from m24.cpp, myb3k.cpp and genpc.cpp. Information about the EPC has
@@ -540,7 +540,7 @@ TIMER_CALLBACK_MEMBER(epc_state::rxtxclk_w)
 	// The EPC PCB has an option to support a custom receive clock for the INS8250 apart from the TX clock through a mux controlled
 	// by the DTR pin of the I8251. The ins8250 device doesn't support RCLK as it is considerd implicitly as the same as BAUDOUT
 	// First attempt to support this in INS8250 by lifting out the BRG from deserial was reverted due to lots of regressions.
-	// We probably need to remove diserial dependencies completely from ins8250 or implement BRG hooks in diserial.cpp.  
+	// We probably need to remove diserial dependencies completely from ins8250 or implement BRG hooks in diserial.cpp.
 	// if (!m_8251dtr_state) m_uart->rclk_w(m_8251rxtx_clk_state); // TODO: fix RCLK support in INS8250
 
 	m_8251rxtx_clk_state = !m_8251rxtx_clk_state;

src/mame/drivers/elan_eu3a05.cpp

@@ -19,29 +19,29 @@
 
     Tetris
     Space Invaders
-	ABL Air-Blaster Joystick
+    ABL Air-Blaster Joystick
 
     ---
     XaviX plug and play units almost always have a XaviX logo on the external packaging
-	while the ones for this driver (and SunPlus etc.) don't seem to have any specific
+    while the ones for this driver (and SunPlus etc.) don't seem to have any specific
-	markings.
+    markings.
 
     Notes:
-    
-	Tetris - RAM 0xa0 and 0xa1 contain the ACD0 and AD1 values and player 2 controls if
-	between certain values? probably read via serial (or ADC abuse?)
 
-	Internal Test Menus:
+    Tetris - RAM 0xa0 and 0xa1 contain the ACD0 and AD1 values and player 2 controls if
-	
+    between certain values? probably read via serial (or ADC abuse?)
-	Tetris - hold P1 Down + P1 Anticlockwise (Button 2) on boot
+
+    Internal Test Menus:
+
+    Tetris - hold P1 Down + P1 Anticlockwise (Button 2) on boot
     Space Invaders - hold P1 Down + P1 Button 1 on boot
-	ABL Air-Blaster - none?
+    ABL Air-Blaster - none?
 
-	-----------------------------------------------------
+    -----------------------------------------------------
     Flaws (NOT emulation bugs, happen on hardware):
-	-----------------------------------------------------
+    -----------------------------------------------------
 
-	rad_sinv:
+    rad_sinv:
 
     In QIX the sprites lag behind the line drawing, so you see the line infront of your player until you stop moving
 
@@ -61,35 +61,35 @@
     they don't seem to be used.  It's difficult to judge from hardware videos, although it definitely isn't as
     white as the menu, so this might also be a non-bug. (Uncertain - to check)
 
-	-------------------------
+    -------------------------
 
-	airblasjs:
+    airblasjs:
 
-	This game is very buggy.
+    This game is very buggy.
 
-	The 3D stages are prone to softlocking when the refuel jet is meant to appear.
+    The 3D stages are prone to softlocking when the refuel jet is meant to appear.
 
-	2D stages will zap you of your lives and then continues one by one if you die on a boss meaning if you have
+    2D stages will zap you of your lives and then continues one by one if you die on a boss meaning if you have
-	2 continues left you'll be offered the continue screen twice while it drains you of your lives before
+    2 continues left you'll be offered the continue screen twice while it drains you of your lives before
-	actually presenting you with the Game Over screen.  The manual claims you can't continue on a boss however
+    actually presenting you with the Game Over screen.  The manual claims you can't continue on a boss however
-	this isn't true for the 3D stages, where the continue feature works as expected.  Either way, this is a very
+    this isn't true for the 3D stages, where the continue feature works as expected.  Either way, this is a very
-	crude way of implementing a 'no continue' feature on bosses if it isn't simply a bug in the game code that
+    crude way of implementing a 'no continue' feature on bosses if it isn't simply a bug in the game code that
-	was explained away as a feature.
+    was explained away as a feature.
 
-	Sprites clip on / off the top of the screen in parts - if you move your the player helipcopter to the top
+    Sprites clip on / off the top of the screen in parts - if you move your the player helipcopter to the top
-	of the screen the top 8 pixels clip off too (not currently happening in MAME, probably need to take out
+    of the screen the top 8 pixels clip off too (not currently happening in MAME, probably need to take out
-	sprite wrapping on y)
+    sprite wrapping on y)
 
-	Sprites wrap around on X too, if you move to the left edge you can see your shadow on the right etc.
+    Sprites wrap around on X too, if you move to the left edge you can see your shadow on the right etc.
 
-	Sound sometimes stops working properly / shot changes for no reason.
+    Sound sometimes stops working properly / shot changes for no reason.
 
-	There's no indication of damage most of the time on bosses, some parts won't take damage until other parts
+    There's no indication of damage most of the time on bosses, some parts won't take damage until other parts
-	have been destroyed, not always obvious.
+    have been destroyed, not always obvious.
 
-	Very heavy sprite flicker (not emulated)
+    Very heavy sprite flicker (not emulated)
 
-	Very heavy slowdown (MAME speed is approximate)
+    Very heavy slowdown (MAME speed is approximate)
 
 */
 
@@ -280,7 +280,7 @@ static INPUT_PORTS_START( airblsjs )
 	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
 	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
 	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Pause")
-	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 )	PORT_NAME("Start")
+	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Start")
 	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Trigger")
 	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Missile")
 INPUT_PORTS_END
@@ -390,7 +390,7 @@ INTERRUPT_GEN_MEMBER(elan_eu3a05_state::interrupt)
    at most to match hardware) - a divider of 8 gives something close to original hardware
    it is unclear exactly what limits the clock speed (maybe video / sound causes waitstates? - dma in progress could also slow / stop the CPU
    and is not going to be 'instant' on hardware)
-  
+
    using a low clock speed also helps with the badly programmed controls in Tetris as that likewise seems to run the game logic 'as fast as possible'
    there don't appear to be any kind of blanking bits being checked.
 */

src/mame/drivers/fcrash.cpp

@@ -4,22 +4,22 @@
 
 
 /*
-	A note reguarding other bootlegs:
+    A note reguarding other bootlegs:
-	In order to keep the cps source in some sort of order, the idea is to group similar bootleg hardware into seperate
+    In order to keep the cps source in some sort of order, the idea is to group similar bootleg hardware into seperate
-	derived classes and source files.
+    derived classes and source files.
 
-	Rom swaps, hacks etc.  (on original Capcom hardware)  ->  cps1.cpp
+    Rom swaps, hacks etc.  (on original Capcom hardware)  ->  cps1.cpp
-	Sound: Z80, 2x YM2203, 2x m5205 ("Final Crash" h/w)   ->  fcrash.cpp
+    Sound: Z80, 2x YM2203, 2x m5205 ("Final Crash" h/w)   ->  fcrash.cpp
-	Sound: Z80, 1x YM2151, 2x m5205                       ->  cps1bl_5205.cpp
+    Sound: Z80, 1x YM2151, 2x m5205                       ->  cps1bl_5205.cpp
-	Sound: PIC, 1x M6295            *1                    ->  cps1bl_pic.cpp
+    Sound: PIC, 1x M6295            *1                    ->  cps1bl_pic.cpp
-	Sound: Z80, 1x YM2151, 1x M6295 *2                    ->  fcrash.cpp      (for now...)
+    Sound: Z80, 1x YM2151, 1x M6295 *2                    ->  fcrash.cpp      (for now...)
 
-	*1 these seem to be only CPS1.5/Q sound games?
+    *1 these seem to be only CPS1.5/Q sound games?
-	*2 this is original configuration, but non-Capcom (usually single-board) hardware.
+    *2 this is original configuration, but non-Capcom (usually single-board) hardware.
-	
+
-	
+
-	As per the above, this file now only contains games in second and last catergories.
+    As per the above, this file now only contains games in second and last catergories.
-	Eventually only Final Crash, other Final Fight bootlegs and Carrier Air Wing bootlegs will remain here.
+    Eventually only Final Crash, other Final Fight bootlegs and Carrier Air Wing bootlegs will remain here.
 */
 
 
@@ -1531,9 +1531,9 @@ ROM_START( ffightbl )
 ROM_END
 
 /*
-	this is identical to the Final Crash bootleg but without the modified gfx.
+    this is identical to the Final Crash bootleg but without the modified gfx.
-	it's less common than Final Crash, but is either the original bootleg, or the bootleggers wanted to restore the
+    it's less common than Final Crash, but is either the original bootleg, or the bootleggers wanted to restore the
-	original title.
+    original title.
 */
 ROM_START( ffightbla )
 	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
@@ -1577,33 +1577,33 @@ ROM_END
 // ************************************************************************* KODB
 
 /*
-	CPU
+    CPU
-	1x TS68000CP12 (main)
+    1x TS68000CP12 (main)
-	1x TPC1020AFN-084C
+    1x TPC1020AFN-084C
-	1x Z8400BB1-Z80CPU (sound)
+    1x Z8400BB1-Z80CPU (sound)
-	1x YM2151 (sound)
+    1x YM2151 (sound)
-	1x YM3012A (sound)
+    1x YM3012A (sound)
-	1x OKI-M6295 (sound)
+    1x OKI-M6295 (sound)
-	2x LM324N (sound)
+    2x LM324N (sound)
-	1x TDA2003 (sound)
+    1x TDA2003 (sound)
-	1x oscillator 10.0 MHz
+    1x oscillator 10.0 MHz
-	1x oscillator 22.1184 MHz
+    1x oscillator 22.1184 MHz
-	
+
-	ROMs
+    ROMs
-	1x AM27C512 (1)(sound)
+    1x AM27C512 (1)(sound)
-	1x AM27C020 (2)(sound)
+    1x AM27C020 (2)(sound)
-	2x AM27C040 (3,4)(main)
+    2x AM27C040 (3,4)(main)
-	1x Am27C040 (bp)(gfx)
+    1x Am27C040 (bp)(gfx)
-	7x mask ROM (ai,bi,ci,di,ap,cp,dp)(gfx)
+    7x mask ROM (ai,bi,ci,di,ap,cp,dp)(gfx)
-	1x GAL20V8A (not dumped)
+    1x GAL20V8A (not dumped)
-	3x GAL16V8A (not dumped)
+    3x GAL16V8A (not dumped)
-	1x PALCE20V8H (not dumped)
+    1x PALCE20V8H (not dumped)
-	1x GAL20V8S (not dumped)
+    1x GAL20V8S (not dumped)
-	
+
-	Note
+    Note
-	1x JAMMA edge connector
+    1x JAMMA edge connector
-	1x trimmer (volume)
+    1x trimmer (volume)
-	3x 8 switches dip
+    3x 8 switches dip
 */
 ROM_START( kodb )
 	ROM_REGION( CODE_SIZE, "maincpu", 0 )      /* 68000 code */
@@ -1716,9 +1716,9 @@ ROM_END
 // ************************************************************************* SGYXZ
 
 /*
-	24mhz crystal (maincpu), 28.322 crystal (video), 3.579545 crystal (sound)
+    24mhz crystal (maincpu), 28.322 crystal (video), 3.579545 crystal (sound)
-	sound cpu is (239 V 249521 VC5006 KABUKI DL-030P-110V) - recycled Kabuki Z80 from genuine Capcom HW?
+    sound cpu is (239 V 249521 VC5006 KABUKI DL-030P-110V) - recycled Kabuki Z80 from genuine Capcom HW?
-	3x8 dsws
+    3x8 dsws
 */
 ROM_START( sgyxz )
 	ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 Code */

src/mame/drivers/galaga.cpp

@@ -719,10 +719,10 @@ TODO:
 
 
 #define STARFIELD_X_OFFSET_GALAGA       16
-#define STARFIELD_X_LIMIT_GALAGA 	256 + STARFIELD_X_OFFSET_GALAGA
+#define STARFIELD_X_LIMIT_GALAGA    256 + STARFIELD_X_OFFSET_GALAGA
 
 #define STARFIELD_Y_OFFSET_BOSCO        16
-#define STARFIELD_X_LIMIT_BOSCO		224
+#define STARFIELD_X_LIMIT_BOSCO     224
 
 
 READ8_MEMBER(galaga_state::bosco_dsw_r)

src/mame/drivers/galpani2.cpp

@@ -2,9 +2,9 @@
 // copyright-holders:Luca Elia
 /***************************************************************************
 
-	                        -= Gals Panic II =-
+                            -= Gals Panic II =-
 
-	                driver by   Luca Elia (l.elia@tin.it)
+                    driver by   Luca Elia (l.elia@tin.it)
 
 CPU     :   2 x 68000  +  MCU
 SOUND   :   2 x OKIM6295
@@ -14,8 +14,8 @@ CUSTOM  :   ?
 To Do:
 
 - Simulation of the MCU: it sits between the 2 68000's and passes
-	messages along. It is currently incomplete, thus no backgrounds
+    messages along. It is currently incomplete, thus no backgrounds
-	and the game is unplayable
+    and the game is unplayable
 
 - The layers are offset
 
@@ -63,18 +63,18 @@ Z04G2-004
 |          6116 6116    G003K5.U63         |------|                  |
 |--------------------------------------------------------------------|
 Notes:
-	       * - These ROMs not populated. Korean-specific ROMs have a K as part of the label text
+           * - These ROMs not populated. Korean-specific ROMs have a K as part of the label text
-	   68000 - Clock 13.500MHz [27/2]
+       68000 - Clock 13.500MHz [27/2]
-	   M6295 - Clock 2.000MHz [16/8]. Pin 7 HIGH
+       M6295 - Clock 2.000MHz [16/8]. Pin 7 HIGH
-	  V-080D - Custom Kaneko RGB DAC
+      V-080D - Custom Kaneko RGB DAC
-	 MC-1091 - Custom Kaneko I/O module
+     MC-1091 - Custom Kaneko I/O module
-	  LFP-6K - Custom Kaneko sound filter/DAC
+      LFP-6K - Custom Kaneko sound filter/DAC
-	  PX4460 - Custom Kaneko sound filter/DAC
+      PX4460 - Custom Kaneko sound filter/DAC
-	  PISCES - NEC uPD78324 series MCU with 32k internal rom. Clock 13.500MHz [27/2] on pins 51 & 52
+      PISCES - NEC uPD78324 series MCU with 32k internal rom. Clock 13.500MHz [27/2] on pins 51 & 52
-	   VSync - 59.1856Hz
+       VSync - 59.1856Hz
-	   HSync - 15.625kHz
+       HSync - 15.625kHz
 
-	   (TODO: VTOTAL = 264, HTOTAL = 432, pixel clock 27 MHz / 4)
+       (TODO: VTOTAL = 264, HTOTAL = 432, pixel clock 27 MHz / 4)
 
 ***************************************************************************/
 

src/mame/drivers/gp32.cpp

@@ -16,8 +16,8 @@
  *
  * TODO:
  * - device-ify s3c240x;
- * - console screen is horizontal, but here screen is setted up with 
+ * - console screen is horizontal, but here screen is setted up with
- *   Height < Width and ROT270, in a double negation fashion. Simplify and 
+ *   Height < Width and ROT270, in a double negation fashion. Simplify and
  *   eventually update video fns;
  * - Normalize palette to actual TFT color space;
  * - Several games have dubious sound clipping and mixing;
@@ -25,7 +25,7 @@
  * - Games from SW list doesn't reload after save, is it even supported?
  * - Add slot for USB PC-Link application, add a host machine connection
  *   somehow;
- * - Verify MP3 support, which in turn needs checking out how the filesystem 
+ * - Verify MP3 support, which in turn needs checking out how the filesystem
  *   works here (and eventually a tool for direct injecting);
  * - Verify gp32linux distro;
  *

src/mame/drivers/hh_sm510.cpp

@@ -3637,7 +3637,7 @@ void gnw_mariotj_state::gnw_mariotj(machine_config &config)
 // roms
 
 ROM_START( gnw_mariotj )
-    ROM_REGION( 0x1000, "maincpu", 0 )
+	ROM_REGION( 0x1000, "maincpu", 0 )
 	ROM_LOAD( "mb-108.program", 0x0000, 0x1000, CRC(f7118bb4) SHA1(c3117fd009e4686a149f85fb65786ddffc091eeb) )
 
 	ROM_REGION( 0x100, "maincpu:melody", 0 )

src/mame/drivers/midqslvr.cpp

@@ -3,13 +3,13 @@
 /***************************************************************************
 
 Midway Quicksilver II/Graphite skeleton driver
-	
+
 Hardware configurations:
 
 Hydro Thunder:   Quicksilver II system and Diego I/O board
-Offroad Thunder: Quicksilver II system and Magicbus I/O board	
+Offroad Thunder: Quicksilver II system and Magicbus I/O board
 Arctic Thunder:  Graphite system and Substitute I/O board
-	
+
 All of the games communicate with their I/O boards serially.
 
 Quicksilver II hardware:
@@ -29,7 +29,7 @@ Chipsets (440BX AGPset):
 Note: This was once claimed to run on Windows 95 or 98 but has been proven (mostly) false. The TNT Kernel was a "DOS Extender"
 that allows core Windows NT functions to work on MS DOS. It's also possible it runs on a custom made OS as both games do not display
 anything DOS related.
-	
+
 Graphite hardware:
 - Main CPU: Intel Pentium III 733MHz
 - Motherboard: BCM GT694VP
@@ -44,13 +44,13 @@ Graphite hardware:
 Chipsets (VIA Pro133A):
 - VT82C694X Northbridge
 - VT82C686A Southbridge
-	
+
 Note: Not only a beefed up Quicksilver II but acts like a normal PC. You get the normal bios startup, a Windows 2000 startup sequence and
 then the game launcher starts. Another difference is the storage device has a copy protection scheme that "locks" the storage device to the
 motherboard's serial number. If a drive doesn't match the motherboard's serial number, the game launcher will give an error.
-	
+
 I/O boards:
-	
+
 MIDWAY GAMES INC
 5770-15983-04
 DIEGO
@@ -93,12 +93,12 @@ Notes:
     JP13-15: connectors, not used
     JP16: Power connector
     P1: DB9 RS-232 port to computer
-	Q2: ULN2064B Darlington Transistor
+    Q2: ULN2064B Darlington Transistor
-	S1: Dip Switches (8).
+    S1: Dip Switches (8).
-		 S1-3: *Off: Game Mode, On: Test Mode
+         S1-3: *Off: Game Mode, On: Test Mode
          S1-4: *Off: 25" Cabinet, On: 39" Cabinet
          S1-8: Off: Watchdog Disabled, *On: Watchdog Enabled
-	U1: Texas Instruments LS85A Logic Gate
+    U1: Texas Instruments LS85A Logic Gate
     U2-3: EL244CS Amplifier
     U4: 109B Instrumentation Amplifier
     U5: PC16550DV UART Interface IC
@@ -160,12 +160,12 @@ Notes:
     JP23: Alternate RS232 port
     JP24: connector, not used
     P1: DB9 RS-232 port to computer
-	Q4: ULN2064B Darlington Transistor
+    Q4: ULN2064B Darlington Transistor
-	S1: Dip Switches (8)
+    S1: Dip Switches (8)
          S1-7: *Off: UART, On: USB
          S1-8: Off: Watchdog Disabled, *On: Watchdog Enabled
-	S2: Dip Switches (8), all set to "off"
+    S2: Dip Switches (8), all set to "off"
-	U1: LS85A Logic Gate
+    U1: LS85A Logic Gate
     U2-3: EL244CS Amplifier
     U5: MAX707CSA Supervisory Circuit
     U6: Motorola MC74HC273A Octal D Flip-Flop (LS273 based)
@@ -226,11 +226,11 @@ Notes:
     JP23: Alternate RS232 port
     JP24: connector, not used
     P1: DB9 RS-232 port to computer
-	S1: Dip Switches (8)
+    S1: Dip Switches (8)
-	S1: Dip Switches (8)
+    S1: Dip Switches (8)
          S1-7: *Off: UART, On: USB
          S1-8: Off: Watchdog Disabled, *On: Watchdog Enabled
-	S2: Dip Switches (8)
+    S2: Dip Switches (8)
     U4-5: MC74HC273A Octal D Flip-Flop (LS273 based)
     U6: Not known yet
     U7/U11: Atmel 24C01A Serial EEPROM
@@ -238,10 +238,10 @@ Notes:
     U12-19: HC541 Octal Buffer
     U20: Philips P87C51/2 8-bit Microcontroller
     U21: DS14185WM RS-232 Interface IC
-	U22-24: ULN2064B Darlington Transistor
+    U22-24: ULN2064B Darlington Transistor
     U25: Not known yet
     Y2: FS14.74 Crystal/Oscilator
-	
+
 ***************************************************************************/
 
 

src/mame/drivers/ms32.cpp

@@ -873,7 +873,7 @@ static INPUT_PORTS_START( ms32 )
 	PORT_BIT( 0x00010000, IP_ACTIVE_LOW, IPT_COIN1 )
 	PORT_BIT( 0x00020000, IP_ACTIVE_LOW, IPT_COIN2 )
 	PORT_BIT( 0x00040000, IP_ACTIVE_LOW, IPT_SERVICE1 )
-	// mapping to F1 key because there may be a specific service dip as well 
+	// mapping to F1 key because there may be a specific service dip as well
 	PORT_BIT( 0x00080000, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME(DEF_STR( Test )) PORT_CODE(KEYCODE_F1)
 	PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_START1 )
 	PORT_BIT( 0x00200000, IP_ACTIVE_LOW, IPT_START2 )
@@ -1292,7 +1292,7 @@ static INPUT_PORTS_START( hayaosi2 )
 	PORT_INCLUDE( ms32 )
 
 	PORT_MODIFY("INPUTS")
-	// fast button is actually mapped as button 1 in hayaosi2 and button 5 for hayaosi3. 
+	// fast button is actually mapped as button 1 in hayaosi2 and button 5 for hayaosi3.
 	// We use latter layout for convenience
 	PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
 	PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)

src/mame/drivers/nes_vt.cpp

@@ -148,7 +148,7 @@ protected:
 
 	uint8_t m_8000_scramble[8];
 	uint8_t m_410x_scramble[2];
-		
+
 	void scrambled_410x_w(uint16_t offset, uint8_t data);
 	void scrambled_8000_w(address_space& space, uint16_t offset, uint8_t data);
 
@@ -173,9 +173,9 @@ private:
 	/* Extra IO */
 	DECLARE_WRITE8_MEMBER(extra_io_control_w);
 	DECLARE_READ8_MEMBER(extrain_01_r);
-	DECLARE_READ8_MEMBER(extrain_23_r);	
+	DECLARE_READ8_MEMBER(extrain_23_r);
 	DECLARE_WRITE8_MEMBER(extraout_01_w);
-	DECLARE_WRITE8_MEMBER(extraout_23_w);	
+	DECLARE_WRITE8_MEMBER(extraout_23_w);
 
 	/* Misc */
 	DECLARE_READ8_MEMBER(rs232flags_region_r);
@@ -1397,7 +1397,7 @@ READ8_MEMBER(nes_vt_state::rs232flags_region_r)
 {
 	/*
 	0x4119 RS232 Flags + Region
-	
+
 	0x01 - RX bit 8
 	0x02 - RERFF (error status)
 	0x04 - unused
@@ -1454,7 +1454,7 @@ READ8_MEMBER(nes_vt_ablpinb_state::ablpinb_in0_r)
 	{
 		m_plunger_state_count++;
 
-		if ((m_plunger_state_count >= m_plunger->read()) || (m_plunger_state_count >= 0x80)) // if it stays low for too many frames the gfx corrupt, 
+		if ((m_plunger_state_count >= m_plunger->read()) || (m_plunger_state_count >= 0x80)) // if it stays low for too many frames the gfx corrupt,
 		{
 			m_plunger_off = 1;
 			m_plunger_state_count = 0;
@@ -1507,13 +1507,13 @@ void nes_vt_state::nes_vt_map(address_map &map)
 	// 0x410c unused
 	map(0x410d, 0x410d).w(FUNC(nes_vt_state::extra_io_control_w));
 	map(0x410e, 0x410e).r(FUNC(nes_vt_state::extrain_01_r));
-	map(0x410f, 0x410f).r(FUNC(nes_vt_state::extrain_23_r));	
+	map(0x410f, 0x410f).r(FUNC(nes_vt_state::extrain_23_r));
 	// 0x4114 RS232 timer (low)
 	// 0x4115 RS232 timer (high)
 	// 0x4116 unused
 	// 0x4117 unused
 	// 0x4118 unused
-	map(0x4119, 0x4119).r(FUNC(nes_vt_state::rs232flags_region_r));	
+	map(0x4119, 0x4119).r(FUNC(nes_vt_state::rs232flags_region_r));
 	// 0x411a RS232 TX data
 	// 0x411b RS232 RX data
 
@@ -1739,7 +1739,7 @@ void nes_vt_ablpinb_state::nes_vt_ablpinb(machine_config &config)
 		(ppu2c0x_device::VBLANK_LAST_SCANLINE_PAL - ppu2c0x_device::VBLANK_FIRST_SCANLINE_PALC + 1 + 2)));
 	m_screen->set_size(32 * 8, 312);
 	m_screen->set_visarea(0 * 8, 32 * 8 - 1, 0 * 8, 30 * 8 - 1);
-	
+
 	// override for controllers
 	m_maincpu->set_addrmap(AS_PROGRAM, &nes_vt_ablpinb_state::nes_vt_ablpinb_map);
 }

src/mame/drivers/psikyo.cpp

@@ -29,17 +29,17 @@ Tengai              (J) 1996    SH404          SH404 has MCU, ymf278-b for sound
 
 To Do:
 
-- All games uses PORT_VBLANK and legacy screen parameters (which is already 
+- All games uses PORT_VBLANK and legacy screen parameters (which is already
-  bad per-se), with also naive and unlikely measurements (i.e. exactly 59.30 
+  bad per-se), with also naive and unlikely measurements (i.e. exactly 59.30
   or 59.90 Hz).
-  The most blunt examples of something being wrong with timings are with 
+  The most blunt examples of something being wrong with timings are with
-  Gunbird and Tengai: they both have FOUR frames of input lag, the real thing 
+  Gunbird and Tengai: they both have FOUR frames of input lag, the real thing
   doesn't sport anything like that.
   Given the above, all games are marked with MACHINE_IMPERFECT_TIMING until
-  somebody provides accurate H/Vsync signals for at least one game of this 
+  somebody provides accurate H/Vsync signals for at least one game of this
   driver.
-- tengai / tengaij: "For use in Japan" screen is supposed to output the 
+- tengai / tengaij: "For use in Japan" screen is supposed to output the
-  typical blue Psikyo backdrop gradient instead of being pure black as it is 
+  typical blue Psikyo backdrop gradient instead of being pure black as it is
   now;
 - Flip Screen support
 
@@ -1179,7 +1179,7 @@ void psikyo_state::s1945(machine_config &config)
 	/* video hardware */
 	SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
 	// TODO: accurate measurements
-	m_screen->set_refresh_hz(59.90); 
+	m_screen->set_refresh_hz(59.90);
 	m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2500));
 	m_screen->set_size(320, 256);
 	m_screen->set_visarea(0, 320-1, 0, 256-32-1);

src/mame/drivers/qvt70.cpp

@@ -95,40 +95,40 @@ void qvt70_state::mem_map(address_map &map)
 void qvt70_state::io_map(address_map &map)
 {
 	map.global_mask(0xff);
-//	map(0x07, 0x07) // ? (set to 0x5d)
+//  map(0x07, 0x07) // ? (set to 0x5d)
-//	map(0x08, 0x08) // ? (set to 0x00)
+//  map(0x08, 0x08) // ? (set to 0x00)
-//	map(0x09, 0x09) // ? (set to 0x00)
+//  map(0x09, 0x09) // ? (set to 0x00)
 	map(0x0a, 0x0a).w(FUNC(qvt70_state::voffset_lsb_w));
 	map(0x0b, 0x0b).w(FUNC(qvt70_state::voffset_msb_w));
-//	map(0x0c, 0x0c) // ? (set to 0x5e then 0x67)
+//  map(0x0c, 0x0c) // ? (set to 0x5e then 0x67)
-//	map(0x0d, 0x0d) // ? (set to 0x0c then 0x04)
+//  map(0x0d, 0x0d) // ? (set to 0x0c then 0x04)
-//	map(0x0e, 0x0e) // ? (set to 0x0f then 0x07)
+//  map(0x0e, 0x0e) // ? (set to 0x0f then 0x07)
-//	map(0x0f, 0x0f) // ? (set to 0x06 then 0x07)
+//  map(0x0f, 0x0f) // ? (set to 0x06 then 0x07)
-//	map(0x10, 0x10) // columns? (set to 0x50 = 80)
+//  map(0x10, 0x10) // columns? (set to 0x50 = 80)
-//	map(0x11, 0x11) // columns? (set to 0x84 = 132)
+//  map(0x11, 0x11) // columns? (set to 0x84 = 132)
-//	map(0x12, 0x12) // ? (set to 0x31 = 49)
+//  map(0x12, 0x12) // ? (set to 0x31 = 49)
-//	map(0x13, 0x13) // rows? (set to 0x19 = 25)
+//  map(0x13, 0x13) // rows? (set to 0x19 = 25)
-//	map(0x14, 0x14) // ? (set to 0x39 = 57)
+//  map(0x14, 0x14) // ? (set to 0x39 = 57)
-//	map(0x15, 0x15) // ? (set to 0x60 = 96)
+//  map(0x15, 0x15) // ? (set to 0x60 = 96)
-//	map(0x16, 0x16) // ? (set to 0x39 = 57)
+//  map(0x16, 0x16) // ? (set to 0x39 = 57)
-//	map(0x17, 0x17) // debug output? (used during memtest)
+//  map(0x17, 0x17) // debug output? (used during memtest)
-//	map(0x18, 0x18) // ? (set to 0x20 = 32)
+//  map(0x18, 0x18) // ? (set to 0x20 = 32)
-//	map(0x19, 0x19) // ? (set to 0x0f = 15)
+//  map(0x19, 0x19) // ? (set to 0x0f = 15)
-//	map(0x1a, 0x1a) // ? (set to 0x00 then 0xff)
+//  map(0x1a, 0x1a) // ? (set to 0x00 then 0xff)
-//	map(0x1b, 0x1b) // ? (set to 0x20 = 32)
+//  map(0x1b, 0x1b) // ? (set to 0x20 = 32)
-//	map(0x1c, 0x1c) // ? (set to 0x50 then 0xff)
+//  map(0x1c, 0x1c) // ? (set to 0x50 then 0xff)
 	map(0x1d, 0x1d).rw(FUNC(qvt70_state::unk_1d_r), FUNC(qvt70_state::unk_1d_w)); // ram banking? status?
 	map(0x1e, 0x1e).rw(FUNC(qvt70_state::unk_1e_r), FUNC(qvt70_state::unk_1e_w)); // ram banking?
 	map(0x1f, 0x1f).w(FUNC(qvt70_state::unk_1f_w));
-//	map(0x20, 0x20) // ? (set to 0x00)
+//  map(0x20, 0x20) // ? (set to 0x00)
-//	map(0x21, 0x21) // ? (set to 0x00)
+//  map(0x21, 0x21) // ? (set to 0x00)
-//	map(0x22, 0x22) // ? (set to 0x00)
+//  map(0x22, 0x22) // ? (set to 0x00)
-//	map(0x23, 0x23) // ? (set to 0x00)
+//  map(0x23, 0x23) // ? (set to 0x00)
-//	map(0x24, 0x24) // ? (set to 0x00)
+//  map(0x24, 0x24) // ? (set to 0x00)
-//	map(0x25, 0x25) // ? (set to 0xa0)
+//  map(0x25, 0x25) // ? (set to 0xa0)
-//	map(0x26, 0x26) // ? (set to 0xff)
+//  map(0x26, 0x26) // ? (set to 0xff)
-//	map(0x27, 0x27) // ? (set to 0x80)
+//  map(0x27, 0x27) // ? (set to 0x80)
-//	map(0x28, 0x28) // ? (set to 0x9f)
+//  map(0x28, 0x28) // ? (set to 0x9f)
 	// 29-31
 	map(0x32, 0x32).r(FUNC(qvt70_state::unk_32_r)); // keyboard data?
 	// 33-41
@@ -249,7 +249,7 @@ uint8_t qvt70_state::unk_1d_r()
 
 	uint8_t val = 0;
 	val = ioport("1d")->read();
-//	val = machine().rand();
+//  val = machine().rand();
 	logerror("1d read: %02x\n", val);
 
 	return val;
@@ -289,7 +289,7 @@ uint8_t qvt70_state::unk_1e_r()
 {
 	uint8_t val = 0;
 	val = ioport("1e")->read();
-//	val = machine().rand();
+//  val = machine().rand();
 	logerror("1e read: %02x\n", val);
 
 	return val;
@@ -311,7 +311,7 @@ uint8_t qvt70_state::unk_32_r()
 {
 	uint8_t val = 0;
 	val = ioport("32")->read();
-//	val = machine().rand();
+//  val = machine().rand();
 	logerror("32 read: %02x\n", val);
 
 	return val;
@@ -326,12 +326,12 @@ void qvt70_state::unk_42_w(uint8_t data)
 void qvt70_state::unk_60_w(uint8_t data)
 {
 	logerror("60 = %02x\n", data);
-//	m_nmi_enable = bool(BIT(data, 7));
+//  m_nmi_enable = bool(BIT(data, 7));
 }
 
 void qvt70_state::rombank_w(uint8_t data)
 {
-//	logerror("rombank_w: %02x\n", data);
+//  logerror("rombank_w: %02x\n", data);
 
 	// 765----- unknown
 	// ---43--- bankswitching

src/mame/drivers/rcm32p.cpp

@@ -247,19 +247,19 @@ static INPUT_PORTS_START( cm32p )
 	PORT_START("A7")
 	PORT_BIT(0x03ff, 0x0000, IPT_DIAL) PORT_NAME("Knob") PORT_SENSITIVITY(50) PORT_KEYDELTA(8) PORT_CODE_DEC(KEYCODE_DOWN) PORT_CODE_INC(KEYCODE_UP)
 
-	PORT_START("SERVICE")	// connected to Port 0 of the P8098 CPU.
+	PORT_START("SERVICE")   // connected to Port 0 of the P8098 CPU.
-	PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test Switch") PORT_TOGGLE PORT_CODE(KEYCODE_F2)	// SW A (checked during boot)
+	PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test Switch") PORT_TOGGLE PORT_CODE(KEYCODE_F2) // SW A (checked during boot)
-	PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: Check/Tune") PORT_CODE(KEYCODE_B)	// SW B
+	PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: Check/Tune") PORT_CODE(KEYCODE_B) // SW B
 
-	PORT_START("SW")	// test switches, accessed by reading from address 0x1300
+	PORT_START("SW")    // test switches, accessed by reading from address 0x1300
-	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: MSB Adj.") PORT_CODE(KEYCODE_1)	// SW 1
+	PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: MSB Adj.") PORT_CODE(KEYCODE_1)   // SW 1
-	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: THD Check") PORT_CODE(KEYCODE_2)	// SW 2
+	PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: THD Check") PORT_CODE(KEYCODE_2)  // SW 2
-	PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM Out: String 1") PORT_CODE(KEYCODE_3)	// SW 3
+	PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM Out: String 1") PORT_CODE(KEYCODE_3)  // SW 3
-	PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM Out: Sax 1") PORT_CODE(KEYCODE_4)	// SW 4
+	PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM Out: Sax 1") PORT_CODE(KEYCODE_4) // SW 4
-	PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM + Long Reverb") PORT_CODE(KEYCODE_5)	// SW 5
+	PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM + Long Reverb") PORT_CODE(KEYCODE_5)  // SW 5
-	PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM + Short Reverb") PORT_CODE(KEYCODE_6)	// SW 6
+	PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: PCM + Short Reverb") PORT_CODE(KEYCODE_6) // SW 6
-	PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: VCA Down Check") PORT_CODE(KEYCODE_7)	// SW 7
+	PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: VCA Down Check") PORT_CODE(KEYCODE_7) // SW 7
-	PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: VCA Up Check") PORT_CODE(KEYCODE_8)	// SW 8
+	PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_OTHER) PORT_NAME("Test: VCA Up Check") PORT_CODE(KEYCODE_8)   // SW 8
 INPUT_PORTS_END
 
 class cm32p_state : public driver_device
@@ -297,7 +297,7 @@ private:
 	DECLARE_READ8_MEMBER(snd_io_r);
 	DECLARE_WRITE8_MEMBER(snd_io_w);
 	DECLARE_READ8_MEMBER(test_sw_r);
-	
+
 	TIMER_DEVICE_CALLBACK_MEMBER(midi_timer_cb);
 	TIMER_DEVICE_CALLBACK_MEMBER(samples_timer_cb);
 
@@ -360,10 +360,10 @@ void cm32p_state::machine_start()
 
 	// TODO: The IC8 gate array has an "LCD INT" line that needs to be emulated. Then, the hack can be removed.
 	// Note: The hack is not necessary when *not* using test mode.
-	rom[0xBB2D] = 0x03;	// hack to make test mode not freeze when displaying the LCD text
+	rom[0xBB2D] = 0x03; // hack to make test mode not freeze when displaying the LCD text
 
 	// TODO: remove this hack
-	rom[0x7D80] = 0x00;	// hack to exit some loop waiting for interrupt #8
+	rom[0x7D80] = 0x00; // hack to exit some loop waiting for interrupt #8
 }
 
 void cm32p_state::machine_reset()
@@ -511,15 +511,15 @@ void cm32p_state::mt32_palette(palette_device &palette) const
 
 void cm32p_state::cm32p_map(address_map &map)
 {
-	map(0x1080, 0x10ff).rw(FUNC(cm32p_state::dsp_io_r), FUNC(cm32p_state::dsp_io_w));	// DSP area (writes to 1080..82/86/8C/8D)
+	map(0x1080, 0x10ff).rw(FUNC(cm32p_state::dsp_io_r), FUNC(cm32p_state::dsp_io_w));   // DSP area (writes to 1080..82/86/8C/8D)
 	map(0x1100, 0x1100).rw(FUNC(cm32p_state::lcd_ctrl_r), FUNC(cm32p_state::lcd_ctrl_w));
 	map(0x1102, 0x1102).w(FUNC(cm32p_state::lcd_data_w));
-	map(0x1300, 0x1300).r(FUNC(cm32p_state::test_sw_r));	// test switch state
+	map(0x1300, 0x1300).r(FUNC(cm32p_state::test_sw_r));    // test switch state
-	map(0x1400, 0x14ff).rw(FUNC(cm32p_state::snd_io_r), FUNC(cm32p_state::snd_io_w));	// sound chip area
+	map(0x1400, 0x14ff).rw(FUNC(cm32p_state::snd_io_r), FUNC(cm32p_state::snd_io_w));   // sound chip area
-	map(0x2000, 0x20ff).rom().region("maincpu", 0x2000);	// init vector @ 2080
+	map(0x2000, 0x20ff).rom().region("maincpu", 0x2000);    // init vector @ 2080
-	map(0x2100, 0x3fff).ram();	// main RAM
+	map(0x2100, 0x3fff).ram();  // main RAM
 	map(0x4000, 0xbfff).rom().region("maincpu", 0x4000);
-	map(0xc000, 0xffff).r(FUNC(cm32p_state::pcmrom_r));	// show descrambled PCM ROM (for debugging)
+	map(0xc000, 0xffff).r(FUNC(cm32p_state::pcmrom_r)); // show descrambled PCM ROM (for debugging)
 }
 
 void cm32p_state::cm32p(machine_config &config)

src/mame/drivers/spdheat.cpp

@@ -800,7 +800,7 @@ ROM_START( spdheat )
 	ROM_REGION( 0x10000, "audiocpu", 0 )
 	ROM_LOAD( "a55-17.ic11",  0x00000, 0x08000, CRC(43c2318f) SHA1(472e9cc68bb8ff3c5c3d4ec475491ad1a97261e7) )
 
-    ROM_REGION( 0x10000, "subcpu", 0 ) // TODO: What are the correct labels for these?
+	ROM_REGION( 0x10000, "subcpu", 0 ) // TODO: What are the correct labels for these?
 	ROM_LOAD( "a55-15.ic5", 0x00000, 0x08000, CRC(c43b85ee) SHA1(7d7ed6b5f3e48a38b3e387f2dbc2f2bb0662db94) )
 	ROM_LOAD( "a55-16.ic6", 0x08000, 0x08000, CRC(8f45edbd) SHA1(29a696691bd199b6fff0fe0e9fd9241cec9f3fbe) )
 

src/mame/drivers/spectrum.cpp

@@ -449,26 +449,26 @@ READ8_MEMBER(spectrum_state::spectrum_port_fe_r)
 READ8_MEMBER(spectrum_state::spectrum_port_ula_r)
 {
 	// known ports used for reading floating bus are:
-	//   0x28ff   Arkanoid, Cobra, Renegade, Short Circuit, Terra Cresta        
+	//   0x28ff   Arkanoid, Cobra, Renegade, Short Circuit, Terra Cresta
 	//   0x40ff   Sidewize
-	
+
 	// note, these games clash with Beta disk (status reg is R:xxff)
 
 	offset |= 1;
 	//logerror("fb: %04x\n", offset);
-	
+
 	// Arkanoid, Cobra, Renegade, Short Circuit, Terra Cresta
 	if (offset == 0x28ff)
 		return floating_bus_r();
-	
+
 	// Sidewize
 	if (offset == 0x40ff)
 		return floating_bus_r();
-	
+
 	// Pass through to expansion device if present
 	if (m_exp->get_card_device())
 		return m_exp->iorq_r(offset);
-	
+
 	return floating_bus_r();
 }
 
@@ -525,7 +525,7 @@ uint8_t spectrum_state::floating_bus_r()
 	*  It seems this trick was found quite late in the life of the original Sinclair models,
 	*  then found not to work properly on the later Amstrad models, so was mostly abandoned by devs.
 	*  This means most games that use it were released in a relatively small window of mid-late 1986.
-	*  
+	*
 	*  known games:
 	*    Arkanoid
 	*    Cobra
@@ -538,17 +538,17 @@ uint8_t spectrum_state::floating_bus_r()
 	*
 	*  Note, some were later re-released as "fixed" +2A compatible versions with the floating bus code removed (Arkanoid, Cobra, others?).
 	*/
-	
+
 	uint8_t data = 0xff;
 	int hpos = m_screen->hpos();
 	int vpos = m_screen->vpos();
-	
+
 	// peek into attribute ram when beam is in display area
 	// ula always returns ff when in border area (or h/vblank)
-	
+
 	if ((hpos >= 48 && hpos < 304) && (vpos >= 48 && vpos < 240))
 		data = m_video_ram[0x1800 + (((vpos-48)/8)*32) + ((hpos-48)/8)];
-	
+
 	return data;
 }
 

src/mame/drivers/votrpss.cpp

@@ -609,7 +609,7 @@ ROM_START(votrpss)
 	ROM_LOAD("u-2.v3.c.bin",   0x0000, 0x2000, CRC(410c58cf) SHA1(6e181e61ab9c268e3772fbeba101302fd40b09a2)) /* The 1987/1988 version's rom is marked "U-2 // 090788" but the actual rom data is from 1982 */
 	ROM_LOAD("u-3.v3.c.bin",   0x2000, 0x2000, CRC(1439492e) SHA1(46af8ccac6fdb93cbeb8a6d57dce5898e0e0d623)) /* The 1987/1988 version's rom is marked "U-3" */
 
-	// this rom is on the 1871G/H/J mainboard, underneath the cpu module daughterboard, in a socket. Technically it is the 'user rom', but it contains the self test code. A user dictionary could in theory be put in this rom, and larger roms than a 2764 could be used. 
+	// this rom is on the 1871G/H/J mainboard, underneath the cpu module daughterboard, in a socket. Technically it is the 'user rom', but it contains the self test code. A user dictionary could in theory be put in this rom, and larger roms than a 2764 could be used.
 	ROM_LOAD("u-4.v3.1.bin", 0xc000, 0x2000, CRC(0b7c4260) SHA1(56f0b6b1cd7b1104e09a9962583121c112337984)) /* the 1987/1988 version's rom is marked "3.1 10/09/85" but the actual rom data is the same from at least as far back as 1982; the 1982 version is marked "U4" in handwriting on a sticker, or "U-4" dot-matrix printed on a sticker */
 
 ROM_END

src/mame/drivers/vt1682.cpp

@@ -11,43 +11,43 @@
 */
 
 /*
-	UNIMPLEMENTED / TODO
+    UNIMPLEMENTED / TODO
-	
-	General VT1862:
 
-	Sound Quality (currently crackles)
+    General VT1862:
-	Verify timer enable / disable behavior
-	Line Modes, High Colour Line Mode
-	Tile rowscroll modes
-	0x8000 bit in palette is 'cut through' mode, which isn't the same as transpen, some kind of palette manipulation
-	**DONE** It seems Pal1 and Pal2 should actually be separate render buffers for each palette, on which layers / sprites can be enabled, that are mixed later and can be output independently to LCD and TV? 
-		(how does this work with high colour line mode?)
-	CCIR effects (only apply to 'palette 2'?)
-	LCD Control registers
-	Internal to External DMA (glitchy)
-	Sprite limits
-	Other hardware limits (video DMA should be delayed until Vblank, some registers only take effect at Hblank)
-	Verify raster timing (might be off by a line)
-	Hardware glitches (scroll layers + sprites get offset under specific conditions, sprites sometimes missing in 2 rightmost column, bk sometimes missing in rightmost column during scroll)
-	Sleep functionality on sound cpu (broken on hardware?)
-	Interrupt controller / proper interrupt support (currently a bit hacky, only main timer and sub-timer a supported)
-	Proper IO support (enables / disables) UART, I2C etc.
-	'Capture' mode
-	Gain (zoom) for Tilemaps
 
-	Refactor into a device
+    Sound Quality (currently crackles)
+    Verify timer enable / disable behavior
+    Line Modes, High Colour Line Mode
+    Tile rowscroll modes
+    0x8000 bit in palette is 'cut through' mode, which isn't the same as transpen, some kind of palette manipulation
+    **DONE** It seems Pal1 and Pal2 should actually be separate render buffers for each palette, on which layers / sprites can be enabled, that are mixed later and can be output independently to LCD and TV?
+        (how does this work with high colour line mode?)
+    CCIR effects (only apply to 'palette 2'?)
+    LCD Control registers
+    Internal to External DMA (glitchy)
+    Sprite limits
+    Other hardware limits (video DMA should be delayed until Vblank, some registers only take effect at Hblank)
+    Verify raster timing (might be off by a line)
+    Hardware glitches (scroll layers + sprites get offset under specific conditions, sprites sometimes missing in 2 rightmost column, bk sometimes missing in rightmost column during scroll)
+    Sleep functionality on sound cpu (broken on hardware?)
+    Interrupt controller / proper interrupt support (currently a bit hacky, only main timer and sub-timer a supported)
+    Proper IO support (enables / disables) UART, I2C etc.
+    'Capture' mode
+    Gain (zoom) for Tilemaps
 
-	+ more
+    Refactor into a device
 
-	Intec InterAct:
+    + more
 
-	Is there meant to be a 2nd player? (many games prompt a 2nd player to start, but inputs don't appear to be read?)
+    Intec InterAct:
-	Verify that internal ROM is blank (it isn't used)
 
-	Zone 40:
+    Is there meant to be a 2nd player? (many games prompt a 2nd player to start, but inputs don't appear to be read?)
+    Verify that internal ROM is blank (it isn't used)
 
-	Decrypt, verify it's a good dump, verify that it's 6502 code, see how close the architecture is to 1682 (many games are the same)
+    Zone 40:
-	If it has an internal ROM dump it (I don't see any obvious encrypted boot vectors in current dump)
+
+    Decrypt, verify it's a good dump, verify that it's 6502 code, see how close the architecture is to 1682 (many games are the same)
+    If it has an internal ROM dump it (I don't see any obvious encrypted boot vectors in current dump)
 
 */
 
@@ -4682,14 +4682,14 @@ void vt_vt1682_state::draw_layer(int which, int opaque, const rectangle& cliprec
 		   sprites and tilemaps on the select menu need to align too, without left edge scrolling glitches
 		   judging this from videos is tricky, because there's another bug that causes the right-most column of pixels to not render for certain scroll values
 		   and the right-most 2 columns of sprites to not render
-		   
+
 		   does this come down to pal1/pal2 output mixing rather than specific layers?
 		*/
 		//if (which == 0)
-		//	xscroll += 1;
+		//  xscroll += 1;
 
 		//if (which == 1)
-		//	xscroll += 1;
+		//  xscroll += 1;
 
 		int segment = m_segment_7_0_bk[which];
 		segment |= m_segment_11_8_bk[which] << 8;
@@ -4770,7 +4770,7 @@ void vt_vt1682_state::draw_layer(int which, int opaque, const rectangle& cliprec
 					{
 						// this mode isn't tested, not seen it used
 						//if (bk_paldepth_mode)
-						//	popmessage("bk_paldepth_mode set\n");
+						//  popmessage("bk_paldepth_mode set\n");
 						realdepth = pal & 0x03;
 
 						// depth might instead be the high 2 bits in 4bpp mode
@@ -4855,7 +4855,7 @@ void vt_vt1682_state::draw_sprites(const rectangle& cliprect)
 
 					// guess! Maze Pac needs sprites shifted left by 1, but actual conditions might be more complex
 					//if ((!sp_size & 0x01))
-					//	x -= 1;
+					//  x -= 1;
 
 					int palselect = 0;
 					if (sp_pal_sel)

src/mame/drivers/x1.cpp

@@ -9,15 +9,15 @@
 
     TODO:
     - clean-ups, split components into devices if necessary and maybe separate turbo/turboz features into specific file(s);
-	- refactor base video into a true scanline renderer, expect it to break 6845 drawing delegation support badly;
+    - refactor base video into a true scanline renderer, expect it to break 6845 drawing delegation support badly;
-	- support extended x1turboz video features (need more test cases?);
+    - support extended x1turboz video features (need more test cases?);
     - Rewrite keyboard input hook-up and decap/dump the keyboard MCU if possible;
     - Fix the 0xe80/0xe83 kanji ROM readback;
     - x1turbo keyboard inputs are currently broken, use x1turbo40 for now;
     - Hook-up remaining .tap image formats;
     - Implement APSS tape commands;
-    - Sort out / redump the BIOS gfx roms, and understand if TurboZ really have same BIOS as 
+    - Sort out / redump the BIOS gfx roms, and understand if TurboZ really have same BIOS as
-	  vanilla Turbo like Jp emulators seems to suggest;
+      vanilla Turbo like Jp emulators seems to suggest;
     - X1Turbo: Implement SIO.
     - Implement true 400 lines mode (i.e. Chatnoir no Mahjong v2.1, Casablanca)
     - Implement SASI HDD interface;
@@ -981,7 +981,7 @@ WRITE8_MEMBER( x1_state::x1turboz_4096_palette_w )
 				popmessage("APRD enabled, contact MAMEdev");
 				return;
 			}
-			// TODO: unlike normal operation this cannot do mid-frame scanline update 
+			// TODO: unlike normal operation this cannot do mid-frame scanline update
 			// (-> bus request signal when accessing this on non-vblank time)
 			uint32_t pal_entry = ((offset & 0xff) << 4) | ((data & 0xf0) >> 4);
 			// TODO: more complex condition

src/mame/includes/cps1.h

@@ -143,7 +143,7 @@ public:
 	void sf2m3(machine_config &config);
 	void sf2cems6(machine_config &config);
 	void sf2m10(machine_config &config);
-	
+
 	void init_cps1();
 	void init_sf2ee();
 	void init_wof();
@@ -162,14 +162,14 @@ public:
 	void init_sf2ceblp();
 	void init_sf2m8();
 	void init_dinohunt();
-	
+
 protected:
 	DECLARE_MACHINE_START(common);
 	DECLARE_MACHINE_START(cps1);
 	DECLARE_MACHINE_START(qsound);
 	DECLARE_MACHINE_START(ganbare);
 	DECLARE_MACHINE_RESET(cps);
-	
+
 	DECLARE_READ16_MEMBER(cps1_dsw_r);
 	DECLARE_READ16_MEMBER(cps1_in1_r);
 	DECLARE_READ16_MEMBER(cps1_in2_r);
@@ -200,7 +200,7 @@ protected:
 	DECLARE_WRITE16_MEMBER(sf2ceblp_prot_w);
 	DECLARE_WRITE16_MEMBER(sf2m3_layer_w);
 	DECLARE_READ16_MEMBER(dinohunt_sound_r);
-	
+
 	TILEMAP_MAPPER_MEMBER(tilemap0_scan);
 	TILEMAP_MAPPER_MEMBER(tilemap1_scan);
 	TILEMAP_MAPPER_MEMBER(tilemap2_scan);
@@ -208,16 +208,16 @@ protected:
 	TILE_GET_INFO_MEMBER(get_tile1_info);
 	TILE_GET_INFO_MEMBER(get_tile2_info);
 	virtual void video_start() override;
-	
+
 	INTERRUPT_GEN_MEMBER(cps1_interrupt);
 	TIMER_DEVICE_CALLBACK_MEMBER(ganbare_interrupt);
-	
+
 	virtual void render_layers(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
 	uint32_t screen_update_cps1(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
 	DECLARE_WRITE_LINE_MEMBER(screen_vblank_cps1);
-	
+
 	void kabuki_setup(void (*decode)(uint8_t *src, uint8_t *dst));
-	
+
 	/* maps */
 	void cpu_space_map(address_map &map);
 	void main_map(address_map &map);
@@ -229,7 +229,7 @@ protected:
 	void sf2m3_map(address_map &map);
 	void sf2cems6_map(address_map &map);
 	void sf2m10_map(address_map &map);
-	
+
 	// game-specific
 	uint16_t sf2ceblp_prot;
 
@@ -264,7 +264,7 @@ protected:
 	int m_palette_size;
 	int m_stars_rom_size;
 	uint8_t m_empty_tile[32*32];
-	
+
 	/* video/cps1.cpp */
 	inline uint16_t *cps1_base( int offset, int boundary );
 	void cps1_get_video_base();
@@ -276,7 +276,7 @@ protected:
 	void cps1_render_stars(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
 	void cps1_render_layer(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int layer, int primask);
 	void cps1_render_high_layer(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect, int layer);
-	
+
 	/* memory pointers */
 	optional_shared_ptr<uint16_t> m_mainram;
 	required_shared_ptr<uint16_t> m_gfxram;

src/mame/includes/fcrash.h

@@ -21,7 +21,7 @@ public:
 		, m_msm_1(*this, "msm1")
 		, m_msm_2(*this, "msm2")
 	{ }
-	
+
 	void fcrash(machine_config &config);
 	void cawingbl(machine_config &config);
 	void kodb(machine_config &config);
@@ -30,13 +30,13 @@ public:
 	void sgyxz(machine_config &config);
 	void wofabl(machine_config &config);
 	void varthb(machine_config &config);
-	
+
 	void init_cawingbl();
 	void init_kodb();
 	void init_mtwinsb();
 	void init_sf2m1();
 	void init_wofabl();
-	
+
 protected:
 	DECLARE_MACHINE_START(fcrash);
 	DECLARE_MACHINE_RESET(fcrash);
@@ -45,7 +45,7 @@ protected:
 	DECLARE_MACHINE_START(mtwinsb);
 	DECLARE_MACHINE_START(sf2m1);
 	DECLARE_MACHINE_START(sgyxz);
-	
+
 	DECLARE_WRITE16_MEMBER(fcrash_soundlatch_w);
 	DECLARE_WRITE8_MEMBER(fcrash_snd_bankswitch_w);
 	DECLARE_WRITE_LINE_MEMBER(m5205_int1);
@@ -58,7 +58,7 @@ protected:
 	DECLARE_WRITE16_MEMBER(sf2m1_layer_w);
 	DECLARE_WRITE16_MEMBER(varthb_layer_w);
 	DECLARE_WRITE16_MEMBER(varthb_layer2_w);
-	
+
 	uint32_t screen_update_fcrash(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
 	void fcrash_update_transmasks();
 	virtual void bootleg_render_sprites(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@@ -72,17 +72,17 @@ protected:
 	void sgyxz_map(address_map &map);
 	void wofabl_map(address_map &map);
 	void varthb_map(address_map &map);
-	
+
 	void fcrash_sound_map(address_map &map);
 	void kodb_sound_map(address_map &map);
 	void sgyxz_sound_map(address_map &map);
-	
+
 	/* sound hw */
 	int m_sample_buffer1;
 	int m_sample_buffer2;
 	int m_sample_select1;
 	int m_sample_select2;
-	
+
 	/* video config */
 	uint8_t m_layer_enable_reg;
 	uint8_t m_layer_mask_reg[4];
@@ -94,7 +94,7 @@ protected:
 	int     m_sprite_x_offset;
 	std::unique_ptr<uint16_t[]> m_bootleg_sprite_ram;
 	std::unique_ptr<uint16_t[]> m_bootleg_work_ram;
-	
+
 	optional_device<msm5205_device> m_msm_1;
 	optional_device<msm5205_device> m_msm_2;
 };

src/mame/includes/spectrum.h

@@ -248,7 +248,7 @@ protected:
 	void log_quickload(const char *type, uint32_t start, uint32_t length, uint32_t exec, const char *exec_format);
 	void setup_scr(uint8_t *quickdata, uint32_t quicksize);
 	void setup_raw(uint8_t *quickdata, uint32_t quicksize);
-	
+
 	uint8_t floating_bus_r();
 };
 

src/mame/layout/epc.lay

@@ -9,7 +9,7 @@ LEDs for the Ericsson PC keyboard
 	<element name="text_num"><text string="Num Lock"><color red="0.7" green="0.7" blue="0.7" /></text></element>
 	<element name="text_scroll"><text string="Scroll Lock"><color red="0.7" green="0.7" blue="0.7" /></text></element>
 	<element name="led" defstate="0"><disk><color red="0.85" green="0.18" blue="0.16" /></disk></element>
-	
+
 	<group name="caps">
 		<bezel element="led" name="kbled0"><bounds x="0" y="0" width="100" height="100" /></bezel>
 		<bezel element="text_caps"><bounds x="120" y="0" width="900" height="100" /></bezel>

src/mame/machine/315_5649.cpp

@@ -164,7 +164,7 @@ WRITE8_MEMBER( sega_315_5649_device::write )
 	case 0x03:
 	case 0x04:
 	case 0x05:
-	case 0x06:	// when in counter mode, bit 7 - 0 reset counters (not implemented)
+	case 0x06:  // when in counter mode, bit 7 - 0 reset counters (not implemented)
 		m_port_value[offset] = data;
 		m_out_port_cb[offset](data);
 		break;

src/mame/machine/elan_eu3a05commonsys.cpp

@@ -5,20 +5,20 @@
 #include "elan_eu3a05commonsys.h"
 
 /*
-	Both the Elan EU3A05 and EU3A14 CPU types implement some kind of custom interrupt handling
+    Both the Elan EU3A05 and EU3A14 CPU types implement some kind of custom interrupt handling
 
-	It isn't clear if this is a completely new addition to the CPU, or just an interface / controller
+    It isn't clear if this is a completely new addition to the CPU, or just an interface / controller
-	sitting on top of the existing NMI or IRQ support in the core providing custom vectors.
+    sitting on top of the existing NMI or IRQ support in the core providing custom vectors.
 
-	The interrupt handlers are 16 4-byte entries starting at 0xffb0 in memory space
+    The interrupt handlers are 16 4-byte entries starting at 0xffb0 in memory space
 
 */
 
 
 /*
-	-----------------------
+    -----------------------
     Custom Interrupt purposes
-	-----------------------
+    -----------------------
 
     TETRIS  (enables 5007 : 0a, 5008: 0f)
 
@@ -48,7 +48,7 @@
     ffdc (enabled) - probably P2 input related? ADC interrupt?
     accesses 501d / 501b
 
-	-----------------------
+    -----------------------
 
     SPACE INVADERS
 
@@ -76,14 +76,14 @@
     ffc8  (enabled by phoenix)
     decreases 304
     stuff with 50a5  bit 10
-	
+
     ffcc  (enabled by phoenix)
     uses 307
     stuff with 50a5  bit 20
 
     ffd0
     dead loop
-	 
+
     ffd4  (enabled by all games)
     main interrupt
 
@@ -105,63 +105,63 @@
     ffec
     dead loop
 
-	-----------------------
+    -----------------------
-	
-	AIR BLASTER JOYSTICK
 
-	all these 60xx jumps expect bank 00 or 0e or 3a or 7d to be active, so IRQs must be masked
+    AIR BLASTER JOYSTICK
 
-	ffb0: jmp to 6000  (ends up jumping to pointer from RAM)
+    all these 60xx jumps expect bank 00 or 0e or 3a or 7d to be active, so IRQs must be masked
-	ffb4: jmp to e08e  (stuff with 500c/500d/506e etc.)
-	ffb8: jmp to 601c  (stub handler) (has function in bank 0e - writes 00 then 01 to 50a5)
-	ffbc: jmp to 602a  (stub handler)
-	ffc0: jmp to 6038  (stub handler)
-	ffc4: jmp to 6046  (stub handler)
-	ffc8: jmp to 6054  (stub handler)
-	ffcc: jmp to 6062  (stub handler)
-	ffd0: jmp to 6070  (stub handler)
-	ffd4: jmp to 607e  (valid code - main IRQ?)
-	ffd8: jmp to 608c  (stub handler)
-	ffdc: jmp to 609a  (stub handler)
-	ffe0: jmp to 60a8  (stub handler)
-	ffe4: jmp to 60b6  (stub handler)
-	ffe8: jmp to 60c4  (stub handler)
-	ffec: jmp to 60d2  (stub handler)
 
-	fff0: 7d
+    ffb0: jmp to 6000  (ends up jumping to pointer from RAM)
+    ffb4: jmp to e08e  (stuff with 500c/500d/506e etc.)
+    ffb8: jmp to 601c  (stub handler) (has function in bank 0e - writes 00 then 01 to 50a5)
+    ffbc: jmp to 602a  (stub handler)
+    ffc0: jmp to 6038  (stub handler)
+    ffc4: jmp to 6046  (stub handler)
+    ffc8: jmp to 6054  (stub handler)
+    ffcc: jmp to 6062  (stub handler)
+    ffd0: jmp to 6070  (stub handler)
+    ffd4: jmp to 607e  (valid code - main IRQ?)
+    ffd8: jmp to 608c  (stub handler)
+    ffdc: jmp to 609a  (stub handler)
+    ffe0: jmp to 60a8  (stub handler)
+    ffe4: jmp to 60b6  (stub handler)
+    ffe8: jmp to 60c4  (stub handler)
+    ffec: jmp to 60d2  (stub handler)
 
-	fffa: e0 60 (60e0 vector) (stub handler)
+    fff0: 7d
-	fffc: 88 e1 (e188 startup vector)
+
-	fffe: 02 e0 (e002 vector)
+    fffa: e0 60 (60e0 vector) (stub handler)
+    fffc: 88 e1 (e188 startup vector)
+    fffe: 02 e0 (e002 vector)
 
 
-	-----------------------
+    -----------------------
-	
-	GOLDEN TEE HOME
 
-	ffb0  rti
+    GOLDEN TEE HOME
-	ffb4  rti
-	ffb8  rti
-	ffbc  rti
 
-	ffc0  rti
+    ffb0  rti
-	ffc4  rti
+    ffb4  rti
-	ffc8  rti
+    ffb8  rti
-	ffcc  rti
+    ffbc  rti
 
-	ffd0  rti
+    ffc0  rti
-	ffd4  main irq?
+    ffc4  rti
-	ffd8  rti
+    ffc8  rti
-	ffdc  rti
+    ffcc  rti
 
-	ffe0  something with 5045 bit 0x08 and 9d in ram (increase or decrease)  (ADC interrupt)
+    ffd0  rti
-	ffe4  something with 5045 bit 0x20 and 9c in ram (increase of decrease)  (ADC interrupt)
+    ffd4  main irq?
+    ffd8  rti
+    ffdc  rti
 
-	ffe8  rti
+    ffe0  something with 5045 bit 0x08 and 9d in ram (increase or decrease)  (ADC interrupt)
-	ffec  rti
+    ffe4  something with 5045 bit 0x20 and 9c in ram (increase of decrease)  (ADC interrupt)
 
-	regular NMI (e3f0 - jump to ($19e2) which seems to point to rti, but could move..)
+    ffe8  rti
-	regular IRQ (e3f3 - points to rti)
+    ffec  rti
+
+    regular NMI (e3f0 - jump to ($19e2) which seems to point to rti, but could move..)
+    regular IRQ (e3f3 - points to rti)
 
 */
 
@@ -246,12 +246,12 @@ void elan_eu3a05commonsys_device::device_timer(emu_timer &timer, device_timer_id
 void elan_eu3a05commonsys_device::device_start()
 {
 	save_item(NAME(m_rombank_lo));
-	save_item(NAME(m_rombank_hi)); 
+	save_item(NAME(m_rombank_hi));
-	save_item(NAME(m_intmask)); 
+	save_item(NAME(m_intmask));
-	save_item(NAME(m_custom_irq)); 
+	save_item(NAME(m_custom_irq));
-	save_item(NAME(m_custom_nmi)); 
+	save_item(NAME(m_custom_nmi));
-	save_item(NAME(m_custom_irq_vector)); 
+	save_item(NAME(m_custom_irq_vector));
-	save_item(NAME(m_custom_nmi_vector)); 
+	save_item(NAME(m_custom_nmi_vector));
 
 	m_unk_timer = timer_alloc(TIMER_UNK);
 	m_unk_timer->adjust(attotime::never);
@@ -291,10 +291,10 @@ WRITE8_MEMBER(elan_eu3a05commonsys_device::intmask_w)
 void elan_eu3a05commonsys_device::generate_custom_interrupt(int level)
 {
 	// Air Blaster uses brk in the code, which is problematic for custom IRQs
-	//	m_custom_irq = 1;
+	//  m_custom_irq = 1;
-	//	m_custom_irq_vector = 0xffd4;
+	//  m_custom_irq_vector = 0xffd4;
-	//	m_maincpu->set_input_line(INPUT_LINE_IRQ0,HOLD_LINE);
+	//  m_maincpu->set_input_line(INPUT_LINE_IRQ0,HOLD_LINE);
-	
+
 	// 5007        5008
 	// --ee --v-   ssss ss-t
 	//   10        5432 10

src/mame/machine/hp80_optrom.cpp

@@ -23,7 +23,7 @@ DEFINE_DEVICE_TYPE(HP80_OPTROM, hp80_optrom_device, "hp80_optrom", "HP80 optiona
 // +------------------+
 hp80_optrom_device::hp80_optrom_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
 	device_t(mconfig, HP80_OPTROM, tag, owner, clock),
-    device_image_interface(mconfig, *this),
+	device_image_interface(mconfig, *this),
 	m_select_code(0)
 {
 }

src/mame/machine/m6502_vt1682.cpp

@@ -7,9 +7,9 @@
     6502 with instruction scrambling
 
     This form of scrambling is used in the VRT VT1682
-	(it's used for the MiWi2 and InterAct consoles).
+    (it's used for the MiWi2 and InterAct consoles).
-    
+
-	This is simpler, permanently activated and consists of swapping opcode bits
+    This is simpler, permanently activated and consists of swapping opcode bits
     7 and 2.
 
 ***************************************************************************/

src/mame/machine/thomflop.h

@@ -146,7 +146,7 @@ private:
 
 	// internal state
 	std::unique_ptr<uint8_t[]> m_data;   // enough for a whole track
-	uint32_t m_data_idx;                 // byte position in track 
+	uint32_t m_data_idx;                 // byte position in track
 	uint32_t m_start_idx;                // start of write position
 	uint32_t m_data_size;                // track length
 	uint8_t  m_data_crc;                 // checksum when writing

src/mame/video/elan_eu3a05commonvid.cpp

@@ -5,7 +5,7 @@
 #include "elan_eu3a05commonvid.h"
 
 /*
-	Common video functions shared by Elan EU3A05 and EU3A14 CPU types
+    Common video functions shared by Elan EU3A05 and EU3A14 CPU types
 */
 
 DEFINE_DEVICE_TYPE(ELAN_EU3A05_COMMONVID, elan_eu3a05commonvid_device, "elan_eu3a05commonvid", "Elan EU3A05/EU3A14 Common Video")

src/mame/video/elan_eu3a05vid.cpp

@@ -125,8 +125,8 @@ void elan_eu3a05vid_device::draw_sprites(screen_device &screen, bitmap_ind16 &bi
 
 	    FF = flags  ( e-dD fFsS )
 	    e = enable
-		D = ZoomX to double size (boss explosions on Air Blaster)
+	    D = ZoomX to double size (boss explosions on Air Blaster)
-		d = ZoomY to double size (boss explosions on Air Blaster)
+	    d = ZoomY to double size (boss explosions on Air Blaster)
 	    S = SizeX
 	    s = SizeY
 	    F = FlipX
@@ -148,7 +148,7 @@ void elan_eu3a05vid_device::draw_sprites(screen_device &screen, bitmap_ind16 &bi
 		   top of the screen - there are no extra y co-ordinate bits.  However there would have been easier
 		   ways to hide this tho as there are a bunch of unseen lines at the bottom of the screen anyway!
 
-		   Air Blaster Joystick seems to indicate there is no sprite wrapping - sprites abruptly enter 
+		   Air Blaster Joystick seems to indicate there is no sprite wrapping - sprites abruptly enter
 		   the screen in pieces on real hardware.
 
 		   needs further investigation.
@@ -226,7 +226,7 @@ void elan_eu3a05vid_device::draw_sprites(screen_device &screen, bitmap_ind16 &bi
 			for (int xx = 0; xx < sizex; xx++)
 			{
 				int realaddr;
-				
+
 				if (!doubleX)
 					realaddr = base + ((tex_x + xx) & 0xff);
 				else
@@ -283,7 +283,7 @@ bool elan_eu3a05vid_device::get_tile_data(int base, int drawpri, int& tile, int
 void elan_eu3a05vid_device::draw_tilemaps(screen_device& screen, bitmap_ind16& bitmap, const rectangle& cliprect, int drawpri)
 {
 	/*
-		this doesn't handle 8x8 4bpp (not used by anything yet)
+	    this doesn't handle 8x8 4bpp (not used by anything yet)
 	*/
 
 	int scroll = get_scroll(1);
@@ -574,19 +574,19 @@ WRITE8_MEMBER(elan_eu3a05vid_device::elan_eu3a05_vidctrl_w)
 	    e3  4bpp 16x16         1110 0011
 	    83  8bpp 8x8           1000 0011  air blaster logo
 	    02  8bpp 8x8 (phoenix) 0000 0010  air blaster 2d normal
-		03  8bpp 8x8           0000 0011  air blaster 2d bosses
+	    03  8bpp 8x8           0000 0011  air blaster 2d bosses
-		00                     0000 0000  air blaster 3d stages
+	    00                     0000 0000  air blaster 3d stages
 
-		?tb- --wh
+	    ?tb- --wh
 
-		? = unknown
+	    ? = unknown
-		t = tile size (1 = 16x16, 0 = 8x8)
+	    t = tile size (1 = 16x16, 0 = 8x8)
-		b = bpp (0 = 8bpp, 1 = 4bpp)
+	    b = bpp (0 = 8bpp, 1 = 4bpp)
-		- = haven't seen used
+	    - = haven't seen used
-		h = tilemap height? (0 = double height)
+	    h = tilemap height? (0 = double height)
-		w = tilemap width? (0 = double width)
+	    w = tilemap width? (0 = double width)
 
-		space invaders test mode doesn't initialize this
+	    space invaders test mode doesn't initialize this
 
 	*/
 	m_vidctrl = data;

src/mame/video/elan_eu3a14vid.cpp

@@ -56,7 +56,7 @@ void elan_eu3a14vid_device::map(address_map &map)
 	map(0x1a, 0x1e).rw(FUNC(elan_eu3a14vid_device::rowscrollsplit_r), FUNC(elan_eu3a14vid_device::rowscrollsplit_w));
 	// 0x1f
 	// 0x20
-	map(0x21, 0x24).rw(FUNC(elan_eu3a14vid_device::scrollregs_r), FUNC(elan_eu3a14vid_device::scrollregs_w)); 	// 0x21,0x22 = scroll reg 1,  0x23,0x24 = scroll reg 2
+	map(0x21, 0x24).rw(FUNC(elan_eu3a14vid_device::scrollregs_r), FUNC(elan_eu3a14vid_device::scrollregs_w));   // 0x21,0x22 = scroll reg 1,  0x23,0x24 = scroll reg 2
 	map(0x25, 0x2c).rw(FUNC(elan_eu3a14vid_device::rowscrollregs_r), FUNC(elan_eu3a14vid_device::rowscrollregs_w)); // 0x25,0x26 = rowscroll reg 1, 0x27,0x28 = rowscroll reg 2, 0x29,0x2a = rowscroll reg 3, 0x2b,0x2c = rowscroll reg 3
 	// 0x2d
 	// 0x2e
@@ -80,7 +80,7 @@ void elan_eu3a14vid_device::map(address_map &map)
 	map(0x40, 0x45).rw(FUNC(elan_eu3a14vid_device::ramtilecfg_r), FUNC(elan_eu3a14vid_device::ramtilecfg_w));
 	// 0x46
 	// 0x47
-	map(0x48, 0x4b).ram(); 	// hnt3 (always 0 tho?)
+	map(0x48, 0x4b).ram();  // hnt3 (always 0 tho?)
 	// 0x4c
 	// 0x4d
 	// 0x4e

src/mame/video/ms32.cpp

@@ -423,7 +423,7 @@ uint32_t ms32_state::screen_update_ms32(screen_device &screen, bitmap_rgb32 &bit
 		rot_pri++;
 
 	//popmessage("%02x %02x %02x %d %d %d",m_priram[0x2b00 / 2],m_priram[0x2e00 / 2],m_priram[0x3a00 / 2], asc_pri, scr_pri, rot_pri);
-	
+
 	// tile-tile mixing
 	for(int prin=0;prin<4;prin++)
 	{

src/mame/video/popeye.cpp

@@ -47,11 +47,11 @@
 
   system11 left the following comment on mametesters:
 
-  	  Worth noting that there are at least 3 different types of picture output
+      Worth noting that there are at least 3 different types of picture output
-  	  for this game - and it will be difficult to make it match 'everything' out there.
+      for this game - and it will be difficult to make it match 'everything' out there.
-		1) Normal Nintendo board - inverted video output
+        1) Normal Nintendo board - inverted video output
-		2) Normal Nintendo board with non-inverted video output - has potentiometers to adjust R/G/B
+        2) Normal Nintendo board with non-inverted video output - has potentiometers to adjust R/G/B
-		3) Bootleg board, non inverted non adjustable output
+        3) Bootleg board, non inverted non adjustable output
 
   Additional note: Output for 1) is also adjusted by potentiometers which adjust
   RGB. With today's bgfx hlsl filters it is easy to individually adjust

src/mame/video/starfield_05xx.cpp

@@ -5,32 +5,32 @@
 /***************************************************************************
 
   Starfield generator documentation
-  
+
      R. Hildinger, based on RE effort Aug. 2019
-     
+
   -----
-  
+
-  * These notes are based on what is presumably an original Namco 05xx starfield 
+  * These notes are based on what is presumably an original Namco 05xx starfield
-  generator from an original 1981 Namco/Midway Galaga board. This particular 
+  generator from an original 1981 Namco/Midway Galaga board. This particular
-  chip is marked only with the text "0521" on the chip package. The ROMS on 
+  chip is marked only with the text "0521" on the chip package. The ROMS on
   this board are all marked "0508-00803 Galaga (c) Midway 1981"
-  
+
   INTRO:
   ------
-  
+
   The starfields for Galaga and Bosconian are driven by a custom Namco 05XX chip that
   is contains an internal 16-bit Linear Feedback Shift Register (LFSR) and all the
-  necessary support logic for generating a 6-bit RGB signal. The chip is fed all the 
+  necessary support logic for generating a 6-bit RGB signal. The chip is fed all the
   required signals from the video system to allow it to output a colored "star" at
   pseudo-random intervals and to scroll these stars in both horizontal and vertical
   directions.
-  
+
   The chip can generate a total of 256 stars in 4 banks of 64 for each vertical
   frame. Two of these banks of stars will be active at any one time, controlled
-  by two starfield selector pins. Some stars will be hidden by the vertical and 
+  by two starfield selector pins. Some stars will be hidden by the vertical and
   horizontal blanking, so there will always be less than 128 stars on screen at one
-  time. 
+  time.
-  
+
   The 05xx is a typical seventies-era 5v logic chip in a 24 pin, .6" width package:
 
   Pin arrangement:
@@ -69,105 +69,105 @@
   INPUTS:
   -------
 
-  Pin 1 (CLK): This signal drives the internal linear feedback shift register (LFSR), 
+  Pin 1 (CLK): This signal drives the internal linear feedback shift register (LFSR),
                as well as some internal state logic.
-   
+
-  Pin 2 (_HSYNC): Video system horizontal sync signal (pulse low). Rising edge marks 
+  Pin 2 (_HSYNC): Video system horizontal sync signal (pulse low). Rising edge marks
                   the start of each horizontal line in monitor's natural orientation.
-           
+
-  Pin 3 (LFSR_RUN): Enable the internal LFSR to update with every CLK cycle. This 
+  Pin 3 (LFSR_RUN): Enable the internal LFSR to update with every CLK cycle. This
-                    signal is gated internally with the SCROLL and _STARCLR signals 
+                    signal is gated internally with the SCROLL and _STARCLR signals
-                    to implement horizontal and vertical starfield scrolling, and 
+                    to implement horizontal and vertical starfield scrolling, and
                     to clear the starfield altogether.
 
-  Pin 4 (_VSYNC): Video system vertical sync signal (pulse low). Rising edge marks 
+  Pin 4 (_VSYNC): Video system vertical sync signal (pulse low). Rising edge marks
                   the start of each video frame.
 
-  Pin 5 (_OE): Output Enable (Active low): When low, the RGB outputs are active. When 
+  Pin 5 (_OE): Output Enable (Active low): When low, the RGB outputs are active. When
-              high, the RGB outputs are placed in a high impedance state to prevent 
+              high, the RGB outputs are placed in a high impedance state to prevent
-              interference with sprite and tile map generators. This line is used to 
+              interference with sprite and tile map generators. This line is used to
-              effectively place stars in the background and prevent them from 
+              effectively place stars in the background and prevent them from
               overwriting sprites and tiles.
 
-  Pins 13-15 (SCROLL_X): These 3 lines control the horizontal speed and direction of 
+  Pins 13-15 (SCROLL_X): These 3 lines control the horizontal speed and direction of
-                         the starfield scrolling. SCROLL_X2, SCROLL_X1, and 
+                         the starfield scrolling. SCROLL_X2, SCROLL_X1, and
                          SCROLL_X0 map to scroll speed as follows:
 
-	SCROLL_X2	SCROLL_X1	SCROLL_X0	speed and direction
+    SCROLL_X2   SCROLL_X1   SCROLL_X0   speed and direction
-	---------	---------	---------	-------------------
+    ---------   ---------   ---------   -------------------
-	low		low		low		1 pixels per frame reverse (-X)
+    low     low     low     1 pixels per frame reverse (-X)
-	low		low		high		2 pixels per frame reverse (-X)
+    low     low     high        2 pixels per frame reverse (-X)
-	low		high		low		3 pixels per frame reverse (-X)
+    low     high        low     3 pixels per frame reverse (-X)
-	low		high		high		4 pixels per frame reverse (-X)
+    low     high        high        4 pixels per frame reverse (-X)
-		
-	high		low		low		3 pixels per frame forward (+X)
-	high		low		high		2 pixels per frame forward (+X)
-	high		high		low		1 pixels per frame forward (+X)
-	high		high		high		0 pixels per frame stationary
 
-  Pins 16-18 (SCROLL_Y): These 3 lines control the vertical speed and direction of the 
+    high        low     low     3 pixels per frame forward (+X)
-                         starfield scrolling. SCROLL_Y2, SCROLL_Y1, and SCROLL_Y0 map to 
+    high        low     high        2 pixels per frame forward (+X)
+    high        high        low     1 pixels per frame forward (+X)
+    high        high        high        0 pixels per frame stationary
+
+  Pins 16-18 (SCROLL_Y): These 3 lines control the vertical speed and direction of the
+                         starfield scrolling. SCROLL_Y2, SCROLL_Y1, and SCROLL_Y0 map to
                          scroll speed as follows:
 
-	SCROLL_Y2	SCROLL_Y1	SCROLL_Y0	speed
+    SCROLL_Y2   SCROLL_Y1   SCROLL_Y0   speed
-	---------	---------	---------	-----
+    ---------   ---------   ---------   -----
-	low		low		low		0 lines per frame stationary
+    low     low     low     0 lines per frame stationary
-	low		low		high		1 lines per frame reverse (-Y)
+    low     low     high        1 lines per frame reverse (-Y)
-	low		high		low		2 lines per frame reverse (-Y)
+    low     high        low     2 lines per frame reverse (-Y)
-	low		high		high		3 lines per frame reverse (-Y)
+    low     high        high        3 lines per frame reverse (-Y)
 
-	high		low		low		4 lines per frame forward (+Y)
+    high        low     low     4 lines per frame forward (+Y)
-	high		low		high		3 lines per frame forward (+Y)
+    high        low     high        3 lines per frame forward (+Y)
-	high		high		low		2 lines per frame forward (+Y)
+    high        high        low     2 lines per frame forward (+Y)
-	high		high		high		1 lines per frame forward (+Y)
+    high        high        high        1 lines per frame forward (+Y)
 
-  Pin 19 (_STARCLR): Gates the LFSR_RUN signal when active, stopping the LFSR from 
+  Pin 19 (_STARCLR): Gates the LFSR_RUN signal when active, stopping the LFSR from
-                     running which effectively stops the starfield from being drawn. 
+                     running which effectively stops the starfield from being drawn.
                      It also resets the LFSR seed back to boot value.
 
   Pins 22-23 (SF): These two lines control which of the 4 star sets are currently being
                    displayed on screen. SF1 and SF0 map to the star sets as follows:
 
-	SF1		SF0		Star sets
+    SF1     SF0     Star sets
-	---		---		---------
+    ---     ---     ---------
-	low		low		0 and 2
+    low     low     0 and 2
-	low		high		1 and 2
+    low     high        1 and 2
-	high		high		1 and 3
+    high        high        1 and 3
-	High		low		0 and 3
+    High        low     0 and 3
 
 
 
   OUTPUTS:
   --------
 
-  Pins 6-11 (RGB Output): These are the red, green, and blue outputs designed to be 
+  Pins 6-11 (RGB Output): These are the red, green, and blue outputs designed to be
-                          fed in to a digital to analog converter and sent to the picture 
+                          fed in to a digital to analog converter and sent to the picture
                           tube. These outputs are active every time the LFSR has a "hit"
-                          that indicates a star should be generated at this point. 
+                          that indicates a star should be generated at this point.
                           Together they form a 6-bit RGB color value as follows:
 
-	Bit5        Bit4        Bit3        Bit2        Bit1        Bit0
+    Bit5        Bit4        Bit3        Bit2        Bit1        Bit0
-	----        ----        ----        ----        ----        ----
+    ----        ----        ----        ----        ----        ----
-	BLUE_HI     BLUE_LO     GREEN_HI    GREEN_LO    RED_HI      RED_LO
+    BLUE_HI     BLUE_LO     GREEN_HI    GREEN_LO    RED_HI      RED_LO
-		
+
-  Pin 20 (OE_CHAIN): This signal (chained output enable) is high for 1 CLK cycle every 
+  Pin 20 (OE_CHAIN): This signal (chained output enable) is high for 1 CLK cycle every
                      time the LFSR has a "hit" that indicates a star should be generated
                      at this point. It is active at the same time as the RGB outputs.
- 
+
   Pin 21 (LFSR_OUT): This is the output bit of the internal 16-bit LFSR.
 
 
   MACHINE NOTES:
   --------------
   ( G = Galaga, B = Bosconian, GB = both)
-  
+
   GB: CLK: - driven at 1/3 of the Master clock signal ( 18.432 Mhz / 3 = 6.144 MHz ).
-  
+
   GB: _HSYNC: - driven at 1/384 of the CLK signal ( 6.144 Mhz / 384 = 16 KHz )
               - pulse width = 32 CLK cycles low, 352 CLK cycles high (total = 384)
               - High pulse width limits horizontal resolution to maximum of 352 pixels.
               - 256 pulses per vertical frame during _VSYNC high
-              
+
   GB: _VSYNC: - driven at 1/264 of the _HSYNC signal ( 16 KHz / 264 =  60.60606 Hz)
               - pulse width = 8 _HSYNC pulses low, 256 _HSYNC pulses high (total = 264)
               - High pulse width limits vertical resolution to maximum of 256 lines.
@@ -175,9 +175,9 @@
   GB: LFSR_RUN: - driven at 1/384 of the CLK signal ( 6.144 Mhz / 384 = 16 KHz )
                 - pulse width = 128 CLK cycles low, 256 CLK cycles high (total = 384)
                 - 256 pulses per vertical frame during _VSYNC high
-                - High pulse position sits inside _HSYNC high between CLK 
+                - High pulse position sits inside _HSYNC high between CLK
-                  cycles 56 and 311, which effectively limits starfield width 
+                  cycles 56 and 311, which effectively limits starfield width
-                  to 256 horizontal pixels 
+                  to 256 horizontal pixels
 
   GB: _OE: - Semi-periodic signal driven at 1/384 of the CLK signal ( 16 KHz )
            - Low portion of signal is driven high at any point where a tile or
@@ -185,84 +185,84 @@
            - Low pulse width = 288 CLK cycles, High pulse width = 96 CLK cycles
            - Low pulse position inside _HSYNC high between CLK cycles 40 and 327
            - Low pulse width further limits horizontal resolution to 288 pixels
-           - Signal is only actively generated by video system hardware between _HSYNC 
+           - Signal is only actively generated by video system hardware between _HSYNC
              pulses 25 and 248 for a total of 224 pulses, which further limits vertical
               esolution to 224 lines.
 
   G: SCROLL_Y: - All SCROLL_Y signals are tied to ground
-  
+
-  GB: RGB OUTPUT: These outputs are sent to the simple resistance ladders that form the 
+  GB: RGB OUTPUT: These outputs are sent to the simple resistance ladders that form the
                   8-bit RGB DAC within the video system:
-           
+
                   BLUE_HI ----> 220 ohm resistor --------> Blue video signal
                   BLUE_LO ----> 470 ohm resistor ----^
-           
+
                   GREEN_HI ---> 220 ohm resistor --------> Green video signal
                   GREEN_LO ---> 470 ohm resistor ----^
                ......--------->  1K ohm resistor ----^
-     
+
                   RED_HI -----> 220 ohm resistor --------> Red video signal
                   RED_LO -----> 470 ohm resistor ----^
                ......--------->  1K ohm resistor ----^
 
-  GB: OE_CHAIN: - This signal is sent to the color LUT PROM that handles the output 
+  GB: OE_CHAIN: - This signal is sent to the color LUT PROM that handles the output
-                  from the tile and sprite generators. It forces the PROM outputs to 
+                  from the tile and sprite generators. It forces the PROM outputs to
                   go high impedance when the signal is high.
-                  
+
 
   THEORY OF OPERATION:
   --------------------
-  
+
   The operation of the 05xx starfield generator is fairly simple, but subject to a
-  fairly complex clocking scheme when scrolling is taken into account. 
+  fairly complex clocking scheme when scrolling is taken into account.
-  
+
   The 05xx is designed as a beam-following color generator much like other starfield
-  generators in games like Galaxian, etc. It uses an internal LFSR to function 
+  generators in games like Galaxian, etc. It uses an internal LFSR to function
-  a pseudo-random number generator, and it runs one step for every pixel clock except 
+  a pseudo-random number generator, and it runs one step for every pixel clock except
-  when gated by the LFSR_RUN, SCROLL and _STARCLR input signals. 
+  when gated by the LFSR_RUN, SCROLL and _STARCLR input signals.
-  
+
-  The LFSR is a 16-bit fibonacci-style shift register with taps at 16,13, 11, and 6; 
+  The LFSR is a 16-bit fibonacci-style shift register with taps at 16,13, 11, and 6;
-  producing a maximal sequence of 65,535 steps before starting over. It is run 
+  producing a maximal sequence of 65,535 steps before starting over. It is run
   over a 256x256 pixel portion of the video frame, and does not reset with each new
   frame. Since the sequence period is 65,535 steps, and the pixel field is 65,536 steps,
   the generated starfield will scroll in the -X direction 1 pixel per frame. To make the
-  starfield stationary, the LFSR must skip 1 pixel clock per frame. In fact all 
+  starfield stationary, the LFSR must skip 1 pixel clock per frame. In fact all
-  scrolling is achieved by either running the LFSR extra steps during the blanking 
+  scrolling is achieved by either running the LFSR extra steps during the blanking
   interval, or skipping pixel clocks.
-  
+
   The individual stars are generated by a logic function that looks at the state of the
-  LFSR and triggers based on the value of certain bits within the state. When the bits 
+  LFSR and triggers based on the value of certain bits within the state. When the bits
-  match pre-determined values (a "hit"), a logic function is applied to the remaining 
+  match pre-determined values (a "hit"), a logic function is applied to the remaining
-  bits to generate both a starfield set value and a color value. If the starfield value 
+  bits to generate both a starfield set value and a color value. If the starfield value
-  matches an active set, the color value is applied the RGB outputs for the duration of 
+  matches an active set, the color value is applied the RGB outputs for the duration of
-  the pixel clock, and the OE_CHAIN signal is raised to block the output from the sprite 
+  the pixel clock, and the OE_CHAIN signal is raised to block the output from the sprite
   and tilemap video sections.
-  
+
-  An LFSR hit is detected when the following is true: 
+  An LFSR hit is detected when the following is true:
-  
+
     bits 14, 13, 12, and 11 = 1
     bits 15,  9,  4, and  2 = 0
 
         LFSR state:     Bf Be Bd Bc - Bb Ba B9 B8 - B7 B6 B5 B4 - B3 B2 B1 B0
-                        |  |  |  |    |  |  |  |    |  |  |  |    |  |  |  | 
+                        |  |  |  |    |  |  |  |    |  |  |  |    |  |  |  |
         and'ed with:    1  1  1  1    1  0  1  0    0  0  0  1    0  1  0  0  (FA14)
-                        |  |  |  |    |  |  |  |    |  |  |  |    |  |  |  | 
+                        |  |  |  |    |  |  |  |    |  |  |  |    |  |  |  |
         equals:         0  1  1  1    1  0  0  0    0  0  0  0    0  0  0  0  (7800)
 
     Therefore an LFSR hit looks like this:
-                            
+
                         0  1  1  1  - 1  Ba 0  B8 - B7 B6 B5 0  - B4 0  B1 B0
-       
+
-  By limiting LFSR hits to only those values where 8 of the 16 bits match a specific 
+  By limiting LFSR hits to only those values where 8 of the 16 bits match a specific
   value, only 256 hits will be detected per LFSR period, and thus 256 possible stars.
   Because the hit detection values contain at least one positive bit, it avoids the
   issue where an LFSR never reaches the all-zeroes state.
-  
+
-  Once a hit is detected, set and color values are extracted from the remaining 8 
+  Once a hit is detected, set and color values are extracted from the remaining 8
   bits as follows:
-  
+
        star set value = (Ba B8)b                            [0..3]
-       
+
        color value (BBGGRR) = (!B4 !B1 !B0 !B7 !B6 !B5)b    [0..63]
 
 
@@ -285,7 +285,7 @@
            sequence of the Galois form is different, and therefore requires
            a different set of hit and decode logic. It was found that the
            logic required for the Galois form was much more complicated than
-           the Fibonacci form, which is why the latter is used in this 
+           the Fibonacci form, which is why the latter is used in this
            implementation.
 
            The LFSR used by Wolfgang and Jindřich had taps at 15, 12, 10 and 5.
@@ -303,19 +303,19 @@
 
   NUMBER OF STARS ON SCREEN:
   --------------------------
-  
+
   As stated before, during any frame only 2 of the 4 banks of 64 stars will be displayed,
   for a maximum of 128 stars. This maximum is reduced to 126 by the fact that 1 star in
   every bank has the color 0x00, or completely black and therefore invisible on screen.
-  Additionally, some stars are generated outside the vertical boundaries of the 
+  Additionally, some stars are generated outside the vertical boundaries of the
   visible portion of the screen and are also invisible on screen, making the total
   number of stars on screen at any one time less than 126.
-  
+
   The durations of the horizontal and vertical sync pulses for Galaga and Bosconian allow
   for a frame size of 352 x 256. The LFSR_RUN signal pulse sits inside _HSYNC signal pulse
-  between pixel clock cycles 56 and 311, thus limiting the size of the frame where stars 
+  between pixel clock cycles 56 and 311, thus limiting the size of the frame where stars
   are generated to 256 x 256:
-  
+
             0         56                                              311    351
           0 +---------+===============================================+------+
             |         |                                               |      |
@@ -340,12 +340,12 @@
             |         |                                               |      |
             |         |                                               |      |
         255 +---------+===============================================+------+
-        
+
   The _OE signal restricts the visible area of the video frame. The _OE signal pulse sits
   between pixel clock cycles 40 and 327, limiting the visible horizontal dimension to
-  288 pixels. Also, the _OE signal is only generated between lines 24 and 247, limiting 
+  288 pixels. Also, the _OE signal is only generated between lines 24 and 247, limiting
   the vertical dimension to 224 lines, hence the final output resolution of 288 x 224:
-  
+
             0         56                                              311    351
           0 +---------+===============================================+------+
             |         |                                               |      |
@@ -378,64 +378,64 @@
 
   HORIZONTAL SCROLLING:
   ---------------------
-  
+
-  Horizontal and vertical scrolling of the starfield is accomplished by either advancing 
+  Horizontal and vertical scrolling of the starfield is accomplished by either advancing
   the LFSR or delaying the advance for some number of pixel clocks per frame
-  
+
-  For horizontal scrolling, advancing the LFSR an additional Z number of clocks results 
+  For horizontal scrolling, advancing the LFSR an additional Z number of clocks results
   in a starfield shift in the negative X direction of Z+1 pixels, while delaying the LFSR
   advance results in shift in the positive X direction of Z-1 pixels. The scrolling
   amount and direction is controlled by the SCROLL_X input signals as follows:
-  
+
     SCROLL_X     LFSR ACTION / FRAME     NUM LFSR ADVs / FRAME   X SHIFT RESULT
     --------------------------------------------------------------------------------
-    000          nothing                 256*256 + 0 = 65536     -1 pixels 
+    000          nothing                 256*256 + 0 = 65536     -1 pixels
-    001          Advance 1 extra         256*256 + 1 = 65537     -2 pixels 
+    001          Advance 1 extra         256*256 + 1 = 65537     -2 pixels
-    010          Advance 2 extra         256*256 + 2 = 65538     -3 pixels 
+    010          Advance 2 extra         256*256 + 2 = 65538     -3 pixels
-    011          Advance 3 extra         256*256 + 3 = 65539     -4 pixels 
+    011          Advance 3 extra         256*256 + 3 = 65539     -4 pixels
     100          Delay 4 clock           256*256 - 4 = 65532     +3 pixels
     101          Delay 3 clocks          256*256 - 3 = 65533     +2 pixels
     110          Delay 2 clocks          256*256 - 2 = 65534     +1 pixels
     111          Delay 1 clocks          256*256 - 1 = 65535     No X Shift
-  
+
       NOTE: The advance or delay of the LFSR occurs at pixel clock 0x500 (1280) after
-      the start of each frame. This is during the non-visible portion of starfield 
+      the start of each frame. This is during the non-visible portion of starfield
       generation.
 
 
   VERTICAL SCROLLING:
   -------------------
-  
+
   For vertical scrolling, advancing the LFSR an additional (Z * the horizontal frame
-  size) number of clocks results in a starfield shift in the negative Y direction of Z+1 
+  size) number of clocks results in a starfield shift in the negative Y direction of Z+1
-  lines, while delaying the LFSR advance results in shift in the positive Y direction of 
+  lines, while delaying the LFSR advance results in shift in the positive Y direction of
-  Z-1 pixels. The scrolling amount and direction is controlled by the SCROLL_Y input 
+  Z-1 pixels. The scrolling amount and direction is controlled by the SCROLL_Y input
   signals as follows:
-  
+
     SCROLL_Y     LFSR ACTION / FRAME     NUM LFSR ADVs / FRAME    Y SHIFT RESULT
     --------------------------------------------------------------------------------
     000          nothing                 256*256 + 0 = 65536      No Y Shift
-    001          Advance 1*256 extra     256*256 + 256 = 65792    -1 lines 
+    001          Advance 1*256 extra     256*256 + 256 = 65792    -1 lines
-    010          Advance 2*256 extra     256*256 + 512 = 66048    -2 lines 
+    010          Advance 2*256 extra     256*256 + 512 = 66048    -2 lines
-    011          Advance 3*256 extra     256*256 + 768 = 66304    -3 lines 
+    011          Advance 3*256 extra     256*256 + 768 = 66304    -3 lines
     100          Delay 4*256 clock       256*256 - 1024 = 64512   +4 lines
     101          Delay 3*256 clocks      256*256 - 768 = 64768    +3 lines
     110          Delay 2*256 clocks      256*256 - 512 = 65024    +2 lines
     111          Delay 1*256 clocks      256*256 - 256 = 65280    +1 lines
-  
+
   Vertical scrolling is accomplished in much the same way as horizontal scrolling in that
-  the primary difference between the two is that for vertical scrolling we have to 
+  the primary difference between the two is that for vertical scrolling we have to
-  advance or delay the LFSR in multiples of the horizontal starfield frame size to 
+  advance or delay the LFSR in multiples of the horizontal starfield frame size to
-  effectively  scroll a single vertical line. Also, the points at which these delays 
+  effectively  scroll a single vertical line. Also, the points at which these delays
-  or advances occur are not at the same point in every case. 
+  or advances occur are not at the same point in every case.
-  
+
-  For example, the default SCROLL_Y value of 000 equates to no Y scrolling. In this case 
+  For example, the default SCROLL_Y value of 000 equates to no Y scrolling. In this case
-  the LFSR is run for 256 pixel clocks per line starting at line 2 within the frame and 
+  the LFSR is run for 256 pixel clocks per line starting at line 2 within the frame and
-  ending at line 257, for a total of 256*256 = 65,526 pixel clocks. The start and end 
+  ending at line 257, for a total of 256*256 = 65,526 pixel clocks. The start and end
   lines for other SCROLL_Y values are different. The following table lists the lines over
   which the LFSR is run (keeping in mind that running the LFSR over a line means 256 LFSR
   advances):
-  
+
     SCROLL_Y   SKIP   PRE_VIS         VISIBLE            POST_VIS             TOTAL_LINES
     -------------------------------------------------------------------------------------
     000        2      [2..23] (22)    [24..247] (224)    [248..257] (10)      (256)
@@ -452,29 +452,29 @@
           PRE_VIS, VISIBLE, POST_VIS = line range of LFSR runs during pre-visible,
                  visible, and post-visible potions of frame
           TOTAL_LINES = Total number of lines over which the LFSR is run
-                
+
     NOTE2: Lines are indexed from 0
            Lines > 255 are inside the vertical blanking interval
-    
+
 
 
   _STARCLR AND THE LFSR SEED:
   ----------------------------------------
-  
+
-  The _STARCLR input signal is used to stop the LFSR from running (and therefore 
+  The _STARCLR input signal is used to stop the LFSR from running (and therefore
-  generating any stars), and to reset its internal state. At no other time is the 
+  generating any stars), and to reset its internal state. At no other time is the
-  internal state of the LFSR reset. When the _STARCLR signal is held low, the 
+  internal state of the LFSR reset. When the _STARCLR signal is held low, the
-  LFSR_RUN signal is blocked, and the internal state of the LFSR is loaded with 
+  LFSR_RUN signal is blocked, and the internal state of the LFSR is loaded with
-  it's seed value, which is 0x7FFF. 
+  it's seed value, which is 0x7FFF.
 
   NOTE: Testing with a Galaga machine reveals that during normal operation, the
         _STARCLR signal is held low at power on and then raised when the initial
         attract screen displays. The low-to-high transition arrives approximately
-        14,191 starfield pixel clocks in to the first frame of attract screen animation, 
+        14,191 starfield pixel clocks in to the first frame of attract screen animation,
         resulting in a starfield that is half-filled. There is no real way to simulate
         this in the MAME galaga video driver as it fills the starfield between frames
         rather than mid-frame.
-  
+
 ***************************************************************************/
 
 
@@ -561,12 +561,12 @@ void starfield_05xx_device::enable_starfield(uint8_t on)
 
 void starfield_05xx_device::set_scroll_speed(uint8_t index_x, uint8_t index_y)
 {
-	// Set initial pre- and post- visible cycle counts based on vertical 
+	// Set initial pre- and post- visible cycle counts based on vertical
 	// scroll registers
 	m_pre_vis_cycle_count = pre_vis_cycle_count_values[index_y];
 	m_post_vis_cycle_count = post_vis_cycle_count_values[index_y];
-	
+
-	// X scrolling occurs during pre-visible portion, so adjust 
+	// X scrolling occurs during pre-visible portion, so adjust
 	// pre-visible cycle count to based on horizontal scroll registers
 	m_pre_vis_cycle_count += speed_X_cycle_count_offset[index_x];
 }
@@ -585,7 +585,7 @@ void starfield_05xx_device::set_starfield_config(uint16_t off_x, uint16_t off_y,
 	// Set X and Y starfield position offsets
 	m_offset_x = off_x;
 	m_offset_y = off_y;
-	
+
 	// Set X range limit
 	m_limit_x = lim_x;
 }
@@ -593,15 +593,15 @@ void starfield_05xx_device::set_starfield_config(uint16_t off_x, uint16_t off_y,
 
 uint16_t starfield_05xx_device::get_next_lfsr_state(uint16_t lfsr)
 {
-    uint16_t bit;
+	uint16_t bit;
 
-    // 16-bit FIBONACCI-style LFSR with taps at 16,13,11, and 6
+	// 16-bit FIBONACCI-style LFSR with taps at 16,13,11, and 6
-    // These taps produce a maximal sequence of 65,535 steps.
+	// These taps produce a maximal sequence of 65,535 steps.
 
-    bit = ((lfsr >> 0) ^ (lfsr >> 3) ^ (lfsr >> 5) ^ (lfsr >> 10));
+	bit = ((lfsr >> 0) ^ (lfsr >> 3) ^ (lfsr >> 5) ^ (lfsr >> 10));
-    lfsr = (lfsr >> 1) | (bit << 15);
+	lfsr = (lfsr >> 1) | (bit << 15);
 
-    return lfsr;
+	return lfsr;
 }
 
 

src/mame/video/starfield_05xx.h

@@ -21,14 +21,14 @@ protected:
 
 private:
 	uint16_t get_next_lfsr_state(uint16_t lfsr);
-	
+
 	uint8_t  m_enable;
 	uint16_t m_lfsr;
 	uint16_t m_pre_vis_cycle_count;
 	uint16_t m_post_vis_cycle_count;
 	uint8_t  m_set_a;
 	uint8_t  m_set_b;
-	
+
 	uint16_t m_offset_x;
 	uint16_t m_offset_y;
 	uint16_t m_limit_x;

src/osd/modules/render/bgfxutil.cpp

@@ -45,28 +45,28 @@ const bgfx::Memory* bgfx_util::mame_texture_data_to_argb32(uint32_t src_format,
 
 	for (int y = 0; y < height; y++)
 	{
-	    switch (src_format)
+		switch (src_format)
-	    {
+		{
-	    case PRIMFLAG_TEXFORMAT(TEXFORMAT_PALETTE16):
+		case PRIMFLAG_TEXFORMAT(TEXFORMAT_PALETTE16):
-	        copy_util::copyline_palette16(dst, src16, width, palette);
+			copy_util::copyline_palette16(dst, src16, width, palette);
-	        src16 += rowpixels;
+			src16 += rowpixels;
-	        break;
+			break;
-	    case PRIMFLAG_TEXFORMAT(TEXFORMAT_YUY16):
+		case PRIMFLAG_TEXFORMAT(TEXFORMAT_YUY16):
-	        copy_util::copyline_yuy16_to_argb(dst, src16, width, palette, 1);
+			copy_util::copyline_yuy16_to_argb(dst, src16, width, palette, 1);
-	        src16 += rowpixels;
+			src16 += rowpixels;
-	        break;
+			break;
-	    case PRIMFLAG_TEXFORMAT(TEXFORMAT_ARGB32):
+		case PRIMFLAG_TEXFORMAT(TEXFORMAT_ARGB32):
-	        copy_util::copyline_argb32(dst, src32, width, palette);
+			copy_util::copyline_argb32(dst, src32, width, palette);
-	        src32 += rowpixels;
+			src32 += rowpixels;
-	        break;
+			break;
-	    case PRIMFLAG_TEXFORMAT(TEXFORMAT_RGB32):
+		case PRIMFLAG_TEXFORMAT(TEXFORMAT_RGB32):
-	        copy_util::copyline_rgb32(dst, src32, width, palette);
+			copy_util::copyline_rgb32(dst, src32, width, palette);
-	        src32 += rowpixels;
+			src32 += rowpixels;
-	        break;
+			break;
-	    default:
+		default:
-	        break;
+			break;
-	    }
+		}
-	    dst += width;
+		dst += width;
 	}
 	return mem;
 }