mirror of
https://github.com/holub/mame
synced 2025-06-05 20:33:45 +03:00
aica is modern device as well now (nw)
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@ -2735,7 +2735,6 @@ src/emu/sound/aica.c svneol=native#text/plain
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src/emu/sound/aica.h svneol=native#text/plain
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src/emu/sound/aicadsp.c svneol=native#text/plain
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src/emu/sound/aicadsp.h svneol=native#text/plain
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src/emu/sound/aicalfo.inc svneol=native#text/plain
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src/emu/sound/asc.c svneol=native#text/plain
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src/emu/sound/asc.h svneol=native#text/plain
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src/emu/sound/astrocde.c svneol=native#text/plain
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1215
src/emu/sound/aica.c
1215
src/emu/sound/aica.c
File diff suppressed because it is too large
Load Diff
@ -6,45 +6,203 @@
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#ifndef __AICA_H__
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#define __AICA_H__
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#include "aicadsp.h"
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struct aica_interface
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#define MCFG_AICA_MASTER \
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aica_device::set_master(*device);
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#define MCFG_AICA_ROFFSET(_offs) \
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aica_device::set_roffset(*device, _offs);
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#define MCFG_AICA_IRQ_CB(_devcb) \
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devcb = &aica_device::set_irq_callback(*device, DEVCB2_##_devcb);
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#define MCFG_AICA_MAIN_IRQ_CB(_devcb) \
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devcb = &aica_device::set_main_irq_callback(*device, DEVCB2_##_devcb);
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enum AICA_STATE {AICA_ATTACK,AICA_DECAY1,AICA_DECAY2,AICA_RELEASE};
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struct AICA_LFO_t
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{
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int master;
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int roffset; /* offset in the region */
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devcb_write_line irq_callback; /* irq callback */
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devcb_write_line master_irq_callback;
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unsigned short phase;
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UINT32 phase_step;
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int *table;
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int *scale;
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};
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void aica_set_ram_base(device_t *device, void *base, int size);
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// AICA register access
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DECLARE_READ16_DEVICE_HANDLER( aica_r );
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DECLARE_WRITE16_DEVICE_HANDLER( aica_w );
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struct AICA_EG_t
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{
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int volume; //
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AICA_STATE state;
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int step;
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//step vals
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int AR; //Attack
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int D1R; //Decay1
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int D2R; //Decay2
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int RR; //Release
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// MIDI I/O access
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DECLARE_WRITE16_DEVICE_HANDLER( aica_midi_in );
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DECLARE_READ16_DEVICE_HANDLER( aica_midi_out_r );
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int DL; //Decay level
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UINT8 LPLINK;
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};
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struct AICA_SLOT
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{
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union
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{
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UINT16 data[0x40]; //only 0x1a bytes used
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UINT8 datab[0x80];
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} udata;
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UINT8 active; //this slot is currently playing
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UINT8 *base; //samples base address
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UINT32 prv_addr; // previous play address (for ADPCM)
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UINT32 cur_addr; //current play address (24.8)
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UINT32 nxt_addr; //next play address
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UINT32 step; //pitch step (24.8)
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UINT8 Backwards; //the wave is playing backwards
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AICA_EG_t EG; //Envelope
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AICA_LFO_t PLFO; //Phase LFO
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AICA_LFO_t ALFO; //Amplitude LFO
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int slot;
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int cur_sample; //current ADPCM sample
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int cur_quant; //current ADPCM step
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int curstep;
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int cur_lpquant, cur_lpsample, cur_lpstep;
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UINT8 *adbase, *adlpbase;
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UINT8 lpend;
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};
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class aica_device : public device_t,
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public device_sound_interface
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{
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public:
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aica_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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~aica_device();
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// access to legacy token
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struct aica_state *token() const { assert(m_token != NULL); return m_token; }
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static void set_master(device_t &device) { downcast<aica_device &>(device).m_master = true; }
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static void set_roffset(device_t &device, int roffset) { downcast<aica_device &>(device).m_roffset = roffset; }
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template<class _Object> static devcb2_base &set_irq_callback(device_t &device, _Object object) { return downcast<aica_device &>(device).m_irq_cb.set_callback(object); }
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template<class _Object> static devcb2_base &set_main_irq_callback(device_t &device, _Object object) { return downcast<aica_device &>(device).m_main_irq_cb.set_callback(object); }
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// AICA register access
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DECLARE_READ16_MEMBER( read );
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DECLARE_WRITE16_MEMBER( write );
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// MIDI I/O access
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DECLARE_WRITE16_MEMBER( midi_in );
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DECLARE_READ16_MEMBER( midi_out_r );
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void set_ram_base(void *base, int size);
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protected:
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// device-level overrides
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virtual void device_config_complete();
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virtual void device_start();
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virtual void device_stop();
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// sound stream update overrides
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virtual void sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples);
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private:
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// internal state
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struct aica_state *m_token;
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unsigned char DecodeSCI(unsigned char irq);
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void ResetInterrupts();
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void CheckPendingIRQ();
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void CheckPendingIRQ_SH4();
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TIMER_CALLBACK_MEMBER( timerA_cb );
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TIMER_CALLBACK_MEMBER( timerB_cb );
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TIMER_CALLBACK_MEMBER( timerC_cb );
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int Get_AR(int base,int R);
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int Get_DR(int base,int R);
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int Get_RR(int base,int R);
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void Compute_EG(AICA_SLOT *slot);
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int EG_Update(AICA_SLOT *slot);
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UINT32 Step(AICA_SLOT *slot);
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void Compute_LFO(AICA_SLOT *slot);
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void InitADPCM(int *PrevSignal, int *PrevQuant);
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inline signed short DecodeADPCM(int *PrevSignal, unsigned char Delta, int *PrevQuant);
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void StartSlot(AICA_SLOT *slot);
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void StopSlot(AICA_SLOT *slot,int keyoff);
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void Init();
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void UpdateSlotReg(int s,int r);
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void UpdateReg(address_space &space, int reg);
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void UpdateSlotRegR(int slot,int reg);
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void UpdateRegR(address_space &space, int reg);
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void w16(address_space &space,unsigned int addr,unsigned short val);
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unsigned short r16(address_space &space, unsigned int addr);
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inline INT32 UpdateSlot(AICA_SLOT *slot);
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void DoMasterSamples(int nsamples);
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void aica_exec_dma(address_space &space);
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void AICALFO_Init();
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inline signed int AICAPLFO_Step(AICA_LFO_t *LFO);
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inline signed int AICAALFO_Step(AICA_LFO_t *LFO);
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void AICALFO_ComputeStep(AICA_LFO_t *LFO,UINT32 LFOF,UINT32 LFOWS,UINT32 LFOS,int ALFO);
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bool m_master;
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int m_roffset; /* offset in the region */
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devcb2_write_line m_irq_cb;
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devcb2_write_line m_main_irq_cb;
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union
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{
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UINT16 data[0xc0/2];
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UINT8 datab[0xc0];
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} m_udata;
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UINT16 m_IRQL, m_IRQR;
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UINT16 m_EFSPAN[0x48];
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AICA_SLOT m_Slots[64];
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signed short m_RINGBUF[64];
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unsigned char m_BUFPTR;
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unsigned char *m_AICARAM;
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UINT32 m_AICARAM_LENGTH, m_RAM_MASK, m_RAM_MASK16;
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sound_stream * m_stream;
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INT32 *m_buffertmpl, *m_buffertmpr;
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UINT32 m_IrqTimA;
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UINT32 m_IrqTimBC;
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UINT32 m_IrqMidi;
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UINT8 m_MidiOutW,m_MidiOutR;
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UINT8 m_MidiStack[16];
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UINT8 m_MidiW,m_MidiR;
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int m_LPANTABLE[0x20000];
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int m_RPANTABLE[0x20000];
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int m_TimPris[3];
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int m_TimCnt[3];
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UINT16 m_mcieb, m_mcipd;
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// timers
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emu_timer *m_timerA, *m_timerB, *m_timerC;
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// DMA stuff
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struct{
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UINT32 dmea;
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UINT16 drga;
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UINT16 dlg;
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UINT8 dgate;
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UINT8 ddir;
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}m_dma;
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int m_ARTABLE[64], m_DRTABLE[64];
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AICADSP m_DSP;
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stream_sample_t *m_bufferl;
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stream_sample_t *m_bufferr;
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int m_length;
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signed short *m_RBUFDST; //this points to where the sample will be stored in the RingBuf
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INT32 m_EG_TABLE[0x400];
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int m_PLFO_TRI[256],m_PLFO_SQR[256],m_PLFO_SAW[256],m_PLFO_NOI[256];
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int m_ALFO_TRI[256],m_ALFO_SQR[256],m_ALFO_SAW[256],m_ALFO_NOI[256];
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int m_PSCALES[8][256];
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int m_ASCALES[8][256];
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};
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extern const device_type AICA;
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@ -1,5 +1,4 @@
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#include "emu.h"
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#include "aica.h"
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#include "aicadsp.h"
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static UINT16 PACK(INT32 val)
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@ -1,159 +0,0 @@
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/*
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AICA LFO handling
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Part of the AICA emulator package.
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(not compiled directly, #included from aica.c)
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By ElSemi, kingshriek, Deunan Knute, and R. Belmont
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*/
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#define LFO_SHIFT 8
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struct LFO_t
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{
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unsigned short phase;
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UINT32 phase_step;
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int *table;
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int *scale;
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};
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#define LFIX(v) ((unsigned int) ((float) (1<<LFO_SHIFT)*(v)))
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//Convert DB to multiply amplitude
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#define DB(v) LFIX(pow(10.0,v/20.0))
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//Convert cents to step increment
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#define CENTS(v) LFIX(pow(2.0,v/1200.0))
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static int PLFO_TRI[256],PLFO_SQR[256],PLFO_SAW[256],PLFO_NOI[256];
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static int ALFO_TRI[256],ALFO_SQR[256],ALFO_SAW[256],ALFO_NOI[256];
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static const float LFOFreq[32]={0.17f,0.19f,0.23f,0.27f,0.34f,0.39f,0.45f,0.55f,0.68f,0.78f,0.92f,1.10f,1.39f,1.60f,1.87f,2.27f,
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2.87f,3.31f,3.92f,4.79f,6.15f,7.18f,8.60f,10.8f,14.4f,17.2f,21.5f,28.7f,43.1f,57.4f,86.1f,172.3f};
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static const float ASCALE[8]={0.0f,0.4f,0.8f,1.5f,3.0f,6.0f,12.0f,24.0f};
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static const float PSCALE[8]={0.0f,7.0f,13.5f,27.0f,55.0f,112.0f,230.0f,494.0f};
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static int PSCALES[8][256];
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static int ASCALES[8][256];
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static void AICALFO_Init(running_machine &machine)
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{
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int i,s;
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for(i=0;i<256;++i)
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{
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int a,p;
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// float TL;
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//Saw
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a=255-i;
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if(i<128)
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p=i;
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else
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p=i-256;
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ALFO_SAW[i]=a;
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PLFO_SAW[i]=p;
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//Square
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if(i<128)
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{
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a=255;
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p=127;
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}
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else
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{
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a=0;
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p=-128;
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}
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ALFO_SQR[i]=a;
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PLFO_SQR[i]=p;
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//Tri
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if(i<128)
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a=255-(i*2);
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else
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a=(i*2)-256;
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if(i<64)
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p=i*2;
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else if(i<128)
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p=255-i*2;
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else if(i<192)
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p=256-i*2;
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else
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p=i*2-511;
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ALFO_TRI[i]=a;
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PLFO_TRI[i]=p;
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//noise
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//a=lfo_noise[i];
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a=machine.rand()&0xff;
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p=128-a;
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ALFO_NOI[i]=a;
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PLFO_NOI[i]=p;
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}
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for(s=0;s<8;++s)
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{
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float limit=PSCALE[s];
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for(i=-128;i<128;++i)
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{
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PSCALES[s][i+128]=CENTS(((limit*(float) i)/128.0));
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}
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limit=-ASCALE[s];
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for(i=0;i<256;++i)
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{
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ASCALES[s][i]=DB(((limit*(float) i)/256.0));
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}
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}
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}
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INLINE signed int AICAPLFO_Step(LFO_t *LFO)
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{
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int p;
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LFO->phase+=LFO->phase_step;
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#if LFO_SHIFT!=8
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LFO->phase&=(1<<(LFO_SHIFT+8))-1;
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#endif
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p=LFO->table[LFO->phase>>LFO_SHIFT];
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p=LFO->scale[p+128];
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return p<<(SHIFT-LFO_SHIFT);
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}
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INLINE signed int AICAALFO_Step(LFO_t *LFO)
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{
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int p;
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LFO->phase+=LFO->phase_step;
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#if LFO_SHIFT!=8
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LFO->phase&=(1<<(LFO_SHIFT+8))-1;
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#endif
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p=LFO->table[LFO->phase>>LFO_SHIFT];
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p=LFO->scale[p];
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return p<<(SHIFT-LFO_SHIFT);
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}
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static void AICALFO_ComputeStep(LFO_t *LFO,UINT32 LFOF,UINT32 LFOWS,UINT32 LFOS,int ALFO)
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{
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float step=(float) LFOFreq[LFOF]*256.0/(float)44100.0;
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LFO->phase_step=(unsigned int) ((float) (1<<LFO_SHIFT)*step);
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if(ALFO)
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{
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switch(LFOWS)
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{
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case 0: LFO->table=ALFO_SAW; break;
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case 1: LFO->table=ALFO_SQR; break;
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case 2: LFO->table=ALFO_TRI; break;
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case 3: LFO->table=ALFO_NOI; break;
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default: printf("Unknown ALFO %d\n", LFOWS);
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}
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LFO->scale=ASCALES[LFOS];
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}
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else
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{
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switch(LFOWS)
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{
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case 0: LFO->table=PLFO_SAW; break;
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case 1: LFO->table=PLFO_SQR; break;
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case 2: LFO->table=PLFO_TRI; break;
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case 3: LFO->table=PLFO_NOI; break;
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default: printf("Unknown PLFO %d\n", LFOWS);
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}
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LFO->scale=PSCALES[LFOS];
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}
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}
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@ -204,13 +204,10 @@ void scsp_device::device_start()
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init();
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// set up the IRQ callbacks
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{
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m_irq_cb.resolve_safe();
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m_stream = machine().sound().stream_alloc(*this, 0, 2, 44100, this);
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}
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m_irq_cb.resolve_safe();
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m_main_irq_cb.resolve_safe();
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m_stream = machine().sound().stream_alloc(*this, 0, 2, 44100, this);
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}
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//-------------------------------------------------
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@ -76,7 +76,6 @@ class scsp_device : public device_t,
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{
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public:
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scsp_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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~scsp_device() {}
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static void set_roffset(device_t &device, int roffset) { downcast<scsp_device &>(device).m_roffset = roffset; }
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template<class _Object> static devcb2_base &set_irq_callback(device_t &device, _Object object) { return downcast<scsp_device &>(device).m_irq_cb.set_callback(object); }
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@ -536,10 +536,6 @@ ifneq ($(filter AICA,$(SOUNDS)),)
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SOUNDOBJS += $(SOUNDOBJ)/aica.o $(SOUNDOBJ)/aicadsp.o
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endif
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$(SOUNDOBJ)/aica.o: $(SOUNDSRC)/aicalfo.inc
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#-------------------------------------------------
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# Seta custom sound chips
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#@src/emu/sound/st0016.h,SOUNDS += ST0016
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@ -1812,15 +1812,6 @@ WRITE_LINE_MEMBER(naomi_state::sh4_aica_irq)
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dc_update_interrupt_status();
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}
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static const aica_interface aica_config =
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{
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TRUE,
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0,
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DEVCB_DRIVER_LINE_MEMBER(naomi_state,aica_irq),
|
||||
DEVCB_DRIVER_LINE_MEMBER(naomi_state,sh4_aica_irq)
|
||||
};
|
||||
|
||||
|
||||
static ADDRESS_MAP_START( dc_audio_map, AS_PROGRAM, 32, naomi_state )
|
||||
ADDRESS_MAP_UNMAP_HIGH
|
||||
AM_RANGE(0x00000000, 0x007fffff) AM_RAM AM_SHARE("dc_sound_ram") /* shared with SH-4 */
|
||||
@ -2487,7 +2478,7 @@ INPUT_PORTS_END
|
||||
MACHINE_RESET_MEMBER(naomi_state,naomi)
|
||||
{
|
||||
naomi_state::machine_reset();
|
||||
aica_set_ram_base(machine().device("aica"), dc_sound_ram, 8*1024*1024);
|
||||
m_aica->set_ram_base(dc_sound_ram, 8*1024*1024);
|
||||
}
|
||||
|
||||
/*
|
||||
@ -2521,7 +2512,10 @@ static MACHINE_CONFIG_START( naomi_aw_base, naomi_state )
|
||||
|
||||
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
|
||||
MCFG_SOUND_ADD("aica", AICA, 0)
|
||||
MCFG_SOUND_CONFIG(aica_config)
|
||||
MCFG_AICA_MASTER
|
||||
MCFG_AICA_IRQ_CB(WRITELINE(naomi_state, aica_irq))
|
||||
MCFG_AICA_MAIN_IRQ_CB(WRITELINE(naomi_state, sh4_aica_irq))
|
||||
|
||||
MCFG_SOUND_ROUTE(0, "lspeaker", 2.0)
|
||||
MCFG_SOUND_ROUTE(1, "rspeaker", 2.0)
|
||||
|
||||
|
@ -10,6 +10,7 @@
|
||||
#include "video/powervr2.h"
|
||||
#include "machine/naomig1.h"
|
||||
#include "machine/maple-dc.h"
|
||||
#include "sound/aica.h"
|
||||
|
||||
class dc_state : public driver_device
|
||||
{
|
||||
@ -24,7 +25,8 @@ class dc_state : public driver_device
|
||||
m_soundcpu(*this, "soundcpu"),
|
||||
m_powervr2(*this, "powervr2"),
|
||||
m_maple(*this, "maple_dc"),
|
||||
m_naomig1(*this, "rom_board") { }
|
||||
m_naomig1(*this, "rom_board"),
|
||||
m_aica(*this, "aica") { }
|
||||
|
||||
required_shared_ptr<UINT64> dc_framebuffer_ram; // '32-bit access area'
|
||||
required_shared_ptr<UINT64> dc_texture_ram; // '64-bit access area'
|
||||
@ -80,6 +82,7 @@ class dc_state : public driver_device
|
||||
required_device<powervr2_device> m_powervr2;
|
||||
required_device<maple_dc_device> m_maple;
|
||||
optional_device<naomi_g1_device> m_naomig1;
|
||||
required_device<aica_device> m_aica;
|
||||
|
||||
void generic_dma(UINT32 main_adr, void *dma_ptr, UINT32 length, UINT32 size, bool to_mainram);
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(dc_scanline);
|
||||
|
@ -8,7 +8,6 @@
|
||||
#include "debugger.h"
|
||||
#include "includes/dc.h"
|
||||
#include "cpu/sh4/sh4.h"
|
||||
#include "sound/aica.h"
|
||||
#include "machine/mie.h"
|
||||
#include "machine/naomig1.h"
|
||||
#include "video/powervr2.h"
|
||||
@ -681,7 +680,7 @@ READ32_MEMBER(dc_state::dc_aica_reg_r)
|
||||
if(offset == 0x2c00/4)
|
||||
return m_armrst;
|
||||
|
||||
return aica_r(machine().device("aica"), space, offset*2, 0xffff);
|
||||
return m_aica->read(space, offset*2, 0xffff);
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(dc_state::dc_aica_reg_w)
|
||||
@ -705,19 +704,19 @@ WRITE32_MEMBER(dc_state::dc_aica_reg_w)
|
||||
}
|
||||
}
|
||||
|
||||
aica_w(machine().device("aica"), space, offset*2, data, 0xffff);
|
||||
m_aica->write(space, offset*2, data, 0xffff);
|
||||
|
||||
// mame_printf_verbose("AICA REG: [%08x=%x] write %x to %x, mask %" I64FMT "x\n", 0x700000+reg*4, data, offset, mem_mask);
|
||||
}
|
||||
|
||||
READ32_MEMBER(dc_state::dc_arm_aica_r)
|
||||
{
|
||||
return aica_r(machine().device("aica"), space, offset*2, 0xffff) & 0xffff;
|
||||
return m_aica->read(space, offset*2, 0xffff) & 0xffff;
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(dc_state::dc_arm_aica_w)
|
||||
{
|
||||
aica_w(machine().device("aica"), space, offset*2, data, mem_mask&0xffff);
|
||||
m_aica->write(space, offset*2, data, mem_mask&0xffff);
|
||||
}
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(dc_state::dc_scanline)
|
||||
|
@ -576,9 +576,8 @@ INPUT_PORTS_END
|
||||
|
||||
MACHINE_RESET_MEMBER(dc_cons_state,dc_console)
|
||||
{
|
||||
device_t *aica = machine().device("aica");
|
||||
dc_state::machine_reset();
|
||||
aica_set_ram_base(aica, dc_sound_ram, 2*1024*1024);
|
||||
m_aica->set_ram_base(dc_sound_ram, 2*1024*1024);
|
||||
}
|
||||
|
||||
WRITE_LINE_MEMBER(dc_cons_state::aica_irq)
|
||||
@ -596,14 +595,6 @@ WRITE_LINE_MEMBER(dc_cons_state::sh4_aica_irq)
|
||||
dc_update_interrupt_status();
|
||||
}
|
||||
|
||||
static const aica_interface dc_aica_interface =
|
||||
{
|
||||
TRUE,
|
||||
0,
|
||||
DEVCB_DRIVER_LINE_MEMBER(dc_cons_state,aica_irq),
|
||||
DEVCB_DRIVER_LINE_MEMBER(dc_cons_state,sh4_aica_irq)
|
||||
};
|
||||
|
||||
static const struct sh4_config sh4cpu_config = { 1, 0, 1, 0, 0, 0, 1, 1, 0, CPU_CLOCK };
|
||||
|
||||
static MACHINE_CONFIG_FRAGMENT( gdrom_config )
|
||||
@ -642,7 +633,9 @@ static MACHINE_CONFIG_START( dc, dc_cons_state )
|
||||
|
||||
MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
|
||||
MCFG_SOUND_ADD("aica", AICA, 0)
|
||||
MCFG_SOUND_CONFIG(dc_aica_interface)
|
||||
MCFG_AICA_MASTER
|
||||
MCFG_AICA_IRQ_CB(WRITELINE(dc_cons_state, aica_irq))
|
||||
MCFG_AICA_MAIN_IRQ_CB(WRITELINE(dc_cons_state, sh4_aica_irq))
|
||||
MCFG_SOUND_ROUTE(0, "lspeaker", 1.0)
|
||||
MCFG_SOUND_ROUTE(0, "rspeaker", 1.0)
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user