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arm: use standard_irq_callback (nw)

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This commit is contained in:
hap 2019-05-31 21:35:54 +02:00
parent 5a0f71c07e
commit e6a2b84857
3 changed files with 7 additions and 28 deletions
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1
src/devices/bus/isa/chessm.cpp
View File

@ -137,7 +137,6 @@ void isa8_chessm_device::device_add_mconfig(machine_config &config)
ARM(config, m_maincpu, 30_MHz_XTAL/2);
m_maincpu->set_addrmap(AS_PROGRAM, &isa8_chessm_device::chessm_mem);
m_maincpu->set_copro_type(arm_cpu_device::copro_type::VL86C020);
m_maincpu->set_nested_irq_hack(false);
GENERIC_LATCH_8(config, m_mainlatch);
GENERIC_LATCH_8(config, m_sublatch);

32
src/devices/cpu/arm/arm.cpp
View File

@ -4,10 +4,6 @@
ARM 2/3/6 Emulation (26 bit address bus)
Todo:
- Get rid of m_nested_irq_hack, interrupts don't work like that but several MAME
drivers rely on it since it's been in arm.cpp for so long
- Interrupts are currently implemented like HOLD_LINE for everything, with the way it
resets pending interrupts when taken
- Timing - Currently very approximated, nothing relies on proper timing so far.
- IRQ timing not yet correct (again, nothing is affected by this so far).
@ -247,7 +243,6 @@ arm_cpu_device::arm_cpu_device(const machine_config &mconfig, device_type type,
, m_program_config("program", endianness, 32, 26, 0)
, m_endian(endianness)
, m_copro_type(copro_type::UNKNOWN_CP15)
, m_nested_irq_hack(false)
{
std::fill(std::begin(m_sArmRegister), std::end(m_sArmRegister), 0);
}
@ -341,16 +336,14 @@ void arm_cpu_device::device_reset()
void arm_cpu_device::execute_run()
{
uint32_t pc;
uint32_t insn;
do
{
arm_check_irq_state();
debugger_instruction_hook(R15 & ADDRESS_MASK);
/* load instruction */
pc = R15;
insn = m_pr32( pc & ADDRESS_MASK );
uint32_t pc = R15;
uint32_t insn = m_pr32( pc & ADDRESS_MASK );
switch (insn >> INSN_COND_SHIFT)
{
@ -447,9 +440,6 @@ void arm_cpu_device::execute_run()
m_icount -= S_CYCLE;
R15 += 4;
}
arm_check_irq_state();
} while( m_icount > 0 );
} /* arm_execute */
@ -473,7 +463,7 @@ void arm_cpu_device::arm_check_irq_state()
R15 = eARM_MODE_FIQ; /* Set FIQ mode so PC is saved to correct R14 bank */
SetRegister( 14, pc ); /* save PC */
R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x1c|eARM_MODE_FIQ|I_MASK|F_MASK; /* Mask both IRQ & FIRQ, set PC=0x1c */
m_pendingFiq=0;
standard_irq_callback(ARM_FIRQ_LINE);
return;
}
@ -482,7 +472,7 @@ void arm_cpu_device::arm_check_irq_state()
R15 = eARM_MODE_IRQ; /* Set IRQ mode so PC is saved to correct R14 bank */
SetRegister( 14, pc ); /* save PC */
R15 = (pc&PSR_MASK)|(pc&IRQ_MASK)|0x18|eARM_MODE_IRQ|I_MASK|(pc&F_MASK); /* Mask only IRQ, set PC=0x18 */
m_pendingIrq=0;
standard_irq_callback(ARM_IRQ_LINE);
return;
}
}
@ -493,21 +483,13 @@ void arm_cpu_device::execute_set_input(int irqline, int state)
switch (irqline)
{
case ARM_IRQ_LINE: /* IRQ */
if (state && (!m_nested_irq_hack || (R15&0x3)!=eARM_MODE_IRQ)) /* Don't allow nested IRQs */
m_pendingIrq=1;
else
m_pendingIrq=0;
m_pendingIrq = state ? 1 : 0;
break;
case ARM_FIRQ_LINE: /* FIRQ */
if (state && (!m_nested_irq_hack || (R15&0x3)!=eARM_MODE_FIQ)) /* Don't allow nested FIRQs */
m_pendingFiq=1;
else
m_pendingFiq=0;
m_pendingFiq = state ? 1 : 0;
break;
}
arm_check_irq_state();
}

2
src/devices/cpu/arm/arm.h
View File

@ -30,7 +30,6 @@ public:
arm_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
void set_copro_type(copro_type type) { m_copro_type = type; }
void set_nested_irq_hack(bool enable) { m_nested_irq_hack = enable; }
protected:
enum
@ -75,7 +74,6 @@ protected:
std::function<u32 (offs_t)> m_pr32;
endianness_t m_endian;
copro_type m_copro_type;
bool m_nested_irq_hack;
void cpu_write32( int addr, uint32_t data );
void cpu_write8( int addr, uint8_t data );