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m88000: add variants of some triadic instructions with un-decoded bits

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This commit is contained in:
Patrick Mackinlay 2023-01-17 19:21:30 +07:00
parent 16de1c7df5
commit e6adac10ec
1 changed files with 4 additions and 0 deletions
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4
src/devices/cpu/m88000/m88000.cpp
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@ -764,6 +764,7 @@ void mc88100_device::execute(u32 const inst)
} }
break; break;
case 0x340: // divu: unsigned integer divide (register) case 0x340: // divu: unsigned integer divide (register)
case 0x348:
if (!(m_cr[PSR] & PSR_SFD1)) if (!(m_cr[PSR] & PSR_SFD1))
{ {
if (m_r[S2]) if (m_r[S2])
@ -775,6 +776,7 @@ void mc88100_device::execute(u32 const inst)
exception(E_SFU1_P); exception(E_SFU1_P);
break; break;
case 0x360: // mul: integer multiply (register) case 0x360: // mul: integer multiply (register)
case 0x368:
if (!(m_cr[PSR] & PSR_SFD1)) if (!(m_cr[PSR] & PSR_SFD1))
m_r[D] = m_r[S1] * m_r[S2]; m_r[D] = m_r[S1] * m_r[S2];
else else
@ -869,6 +871,7 @@ void mc88100_device::execute(u32 const inst)
} }
break; break;
case 0x3c0: // div: signed integer divide (register) case 0x3c0: // div: signed integer divide (register)
case 0x3c8:
if (!(m_cr[PSR] & PSR_SFD1)) if (!(m_cr[PSR] & PSR_SFD1))
{ {
if (m_r[S2] && !BIT(m_r[S1], 31) && !BIT(m_r[S2], 31)) if (m_r[S2] && !BIT(m_r[S1], 31) && !BIT(m_r[S2], 31))
@ -880,6 +883,7 @@ void mc88100_device::execute(u32 const inst)
exception(E_SFU1_P); exception(E_SFU1_P);
break; break;
case 0x3e0: // cmp: integer compare (register) case 0x3e0: // cmp: integer compare (register)
case 0x3e8:
m_r[D] = cmp(m_r[S1], m_r[S2]); m_r[D] = cmp(m_r[S1], m_r[S2]);
break; break;