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https://github.com/holub/mame
synced 2025-06-29 07:34:45 +03:00
smc91c9x: WIP Fixed loopback and added proper MMU handling. (nw)
This commit is contained in:
Ted Green
parent
f9ce368faa
commit
e6cd405fde
@ -15,7 +15,8 @@
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#include "emu.h"
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#include "smc91c9x.h"
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// Needed for netdev_count???
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#include "osdnet.h"
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/***************************************************************************
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@ -120,17 +121,23 @@ smc91c9x_device::smc91c9x_device(const machine_config &mconfig, device_type type
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void smc91c9x_device::device_start()
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{
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// TX timer
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m_tx_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(smc91c9x_device::send_frame), this));
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m_irq_handler.resolve_safe();
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/* register ide states */
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save_item(NAME(m_reg));
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save_item(NAME(m_regmask));
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save_item(NAME(m_irq_state));
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save_item(NAME(m_alloc_count));
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save_item(NAME(m_rx));
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save_item(NAME(m_tx));
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save_item(NAME(m_buffer));
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save_item(NAME(m_sent));
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save_item(NAME(m_recd));
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save_item(NAME(m_alloc_rx));
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save_item(NAME(m_alloc_tx));
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// TODO: Need to save these
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//save_item(NAME(m_comp_rx));
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//save_item(NAME(m_comp_tx));
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}
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//-------------------------------------------------
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@ -141,37 +148,13 @@ void smc91c9x_device::device_reset()
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{
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std::fill(std::begin(m_reg), std::end(m_reg), 0);
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std::fill(std::begin(m_rx), std::end(m_rx), 0);
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std::fill(std::begin(m_tx), std::end(m_tx), 0);
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std::fill(std::begin(m_regmask), std::end(m_regmask), 0);
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m_irq_state = 0;
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m_alloc_count = 0;
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rx_fifo_out = 0;
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rx_fifo_in = 0;
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tx_fifo_out = 0;
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tx_fifo_in = 0;
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m_sent = 0;
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m_recd = 0;
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osd_list_network_adapters();
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unsigned char const *const mac = (const unsigned char *)get_mac();
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if (VERBOSE & LOG_GENERAL)
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{
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logerror("MAC : ");
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for (int i = 0; i < ETHERNET_ADDR_SIZE; i++)
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logerror("%.2X", mac[i]);
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logerror("\n");
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}
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set_promisc(true);
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m_reg[EREG_TCR] = 0x0000; m_regmask[EREG_TCR] = 0x3d87;
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m_reg[EREG_EPH_STATUS] = 0x0000; m_regmask[EREG_EPH_STATUS] = 0x0000;
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m_reg[EREG_RCR] = 0x0000; m_regmask[EREG_RCR] = 0xc307;
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@ -188,11 +171,6 @@ void smc91c9x_device::device_reset()
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m_reg[EREG_IA2_3] = 0x12F7; m_regmask[EREG_IA2_3] = 0xffff;
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m_reg[EREG_IA4_5] = 0x5634; m_regmask[EREG_IA4_5] = 0xffff;
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// Interface MAC
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m_reg[EREG_IA0_1] = mac[0] | (mac[1]<<8);
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m_reg[EREG_IA2_3] = mac[2] | (mac[3]<<8);
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m_reg[EREG_IA4_5] = mac[4] | (mac[5]<<8);
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m_reg[EREG_GENERAL_PURP] = 0x0000; m_regmask[EREG_GENERAL_PURP] = 0xffff;
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m_reg[EREG_CONTROL] = 0x0100; m_regmask[EREG_CONTROL] = 0x68e7;
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@ -209,12 +187,51 @@ void smc91c9x_device::device_reset()
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m_reg[EREG_MT4_5] = 0x0000; m_regmask[EREG_MT4_5] = 0xffff;
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m_reg[EREG_MT6_7] = 0x0000; m_regmask[EREG_MT6_7] = 0xffff;
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m_reg[EREG_MGMT] = 0x3030; m_regmask[EREG_MGMT] = 0x0f0f;
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m_reg[EREG_REVISION] = 0x3340; m_regmask[EREG_REVISION] = 0x0000;
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m_reg[EREG_REVISION] = 0x3345; m_regmask[EREG_REVISION] = 0x0000;
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m_reg[EREG_ERCV] = 0x331f; m_regmask[EREG_ERCV] = 0x009f;
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update_ethernet_irq();
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m_tx_timer->reset();
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// Setup real network if enabled
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if (netdev_count()) {
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osd_list_network_adapters();
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unsigned char const *const mac = (const unsigned char *)get_mac();
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if (VERBOSE & LOG_GENERAL)
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{
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logerror("MAC : ");
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for (int i = 0; i < ETHERNET_ADDR_SIZE; i++)
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logerror("%.2X", mac[i]);
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logerror("\n");
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}
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set_promisc(true);
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// Interface MAC
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m_reg[EREG_IA0_1] = mac[0] | (mac[1] << 8);
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m_reg[EREG_IA2_3] = mac[2] | (mac[3] << 8);
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m_reg[EREG_IA4_5] = mac[4] | (mac[5] << 8);
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}
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// Reset MMU
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mmu_reset();
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}
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void smc91c9x_device::mmu_reset()
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{
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// Reset MMU allocations
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m_alloc_rx = 0;
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m_alloc_tx = 0;
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// Reset completion FIFOs
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while (!m_comp_tx.empty())
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m_comp_tx.pop();
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while (!m_comp_rx.empty())
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m_comp_rx.pop();
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// Flush fifos.
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clear_tx_fifo();
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clear_rx_fifo();
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}
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DEFINE_DEVICE_TYPE(SMC91C94, smc91c94_device, "smc91c94", "SMC91C94 Ethernet Controller")
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@ -230,18 +247,38 @@ smc91c96_device::smc91c96_device(const machine_config &mconfig, const char *tag,
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{
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}
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bool smc91c9x_device::alloc_req(const int tx, int &packet_num)
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{
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u32 curr_alloc = m_alloc_rx | m_alloc_tx;
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for (int index = 0; index < ETHER_BUFFERS; index++) {
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if (!(curr_alloc & (1 << index))) {
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packet_num = index;
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if (tx) {
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m_alloc_tx |= 1 << index;
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} else {
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m_alloc_rx |= 1 << index;
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}
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return true;
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}
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}
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return false;
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}
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void smc91c9x_device::alloc_release(const int packet_num)
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{
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int clear_mask = ~(1 << packet_num);
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m_alloc_tx &= clear_mask;
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m_alloc_rx &= clear_mask;
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}
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void smc91c9x_device::clear_tx_fifo()
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{
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tx_fifo_in = 0;
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tx_fifo_out = 0;
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std::fill(std::begin(m_tx), std::end(m_tx), 0);
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}
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void smc91c9x_device::clear_rx_fifo()
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{
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rx_fifo_in = 0;
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rx_fifo_out = 0;
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std::fill(std::begin(m_rx), std::end(m_rx), 0);
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}
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int smc91c9x_device::is_broadcast(uint8_t mac_address[])
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@ -268,22 +305,14 @@ int smc91c9x_device::ethernet_packet_is_for_me(const uint8_t mac_address[])
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// wireshark filter: eth.addr eq 08:00:1e:01:ae:a5 or eth.dst eq ff:ff:ff:ff:ff:ff or eth.dst eq 09:00:1e:00:00:00 or eth.dst eq 09:00:1e:00:00:01
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int i;
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uint8_t local_address[ETHERNET_ADDR_SIZE];
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LOG("\n");
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local_address[0] = (m_reg[EREG_IA0_1]>>0) & 0xFF;
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local_address[1] = (m_reg[EREG_IA0_1]>>8) & 0xFF;
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local_address[2] = (m_reg[EREG_IA2_3]>>0) & 0xFF;
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local_address[3] = (m_reg[EREG_IA2_3]>>8) & 0xFF;
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local_address[4] = (m_reg[EREG_IA4_5]>>0) & 0xFF;
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local_address[5] = (m_reg[EREG_IA4_5]>>8) & 0xFF;
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if (VERBOSE & LOG_GENERAL)
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{
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for ( i = 0 ; i < ETHERNET_ADDR_SIZE ; i++ )
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{
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logerror("%.2X",local_address[i]);
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logerror("%.2X", ((u8 *)&m_reg[EREG_IA0_1])[i]);
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}
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logerror("=");
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for ( i = 0 ; i < ETHERNET_ADDR_SIZE ; i++ )
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@ -300,7 +329,7 @@ int smc91c9x_device::ethernet_packet_is_for_me(const uint8_t mac_address[])
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return 2;
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}
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if (memcmp(mac_address, local_address, ETHERNET_ADDR_SIZE) == 0)
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if (memcmp(mac_address, &m_reg[EREG_IA0_1], ETHERNET_ADDR_SIZE) == 0)
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{
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LOG(" -- Address Match\n");
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return 1;
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@ -335,7 +364,7 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length)
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logerror(" - IsForMe %d - %d/0x%x bytes\n", isforme, length, length);
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}
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if ( (length < ETHERNET_ADDR_SIZE || !isforme) && !(m_reg[EREG_RCR] & 0x0100) )
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if ( (length < ETHERNET_ADDR_SIZE || !isforme) && !(m_reg[EREG_RCR] & 0x0102) )
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{
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LOG("\n");
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@ -345,13 +374,18 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length)
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/* signal a receive */
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// Try to request a packet number
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int packet_num;
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if (!alloc_req(0, packet_num)) {
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logerror("recv_cb: Couldn't allocate a recieve packet\n");
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return;
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}
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/* compute the packet length */
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if ( ( length < ( ETHER_BUFFER_SIZE - ( 2+2+2 ) ) ) )
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{
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uint8_t *const packet = &m_rx[ ( rx_fifo_in & ( ETHER_RX_BUFFERS - 1 ) ) * ETHER_BUFFER_SIZE];
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std::fill_n(packet, ETHER_BUFFER_SIZE, 0);
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uint8_t *const packet = &m_buffer[ packet_num * ETHER_BUFFER_SIZE];
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int dst = 0;
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@ -384,17 +418,15 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length)
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packet[dst++] = 0x40 | 0x00; // Control
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}
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dst += 2;
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//dst += 2;
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dst &= 0x7FF;
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packet[2] = (dst&0xFF);
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packet[3] = (dst) >> 8;
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m_reg[EREG_INTERRUPT] |= EINT_RCV;
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m_reg[EREG_FIFO_PORTS] &= ~0x8000;
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rx_fifo_in = (rx_fifo_in + 1) & ( ETHER_RX_BUFFERS - 1 );
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// Push packet number to rx completion fifo
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m_comp_rx.push(packet_num);
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}
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else
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{
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@ -416,12 +448,31 @@ void smc91c9x_device::recv_cb(uint8_t *data, int length)
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void smc91c9x_device::update_ethernet_irq()
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{
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// Check tx completion fifo empty
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if (m_comp_tx.empty()) {
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m_reg[EREG_INTERRUPT] |= EINT_TX_EMPTY;
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}
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else {
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m_reg[EREG_INTERRUPT] &= ~EINT_TX_EMPTY;
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}
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// Check rx completion fifo empty
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if (m_comp_rx.empty())
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m_reg[EREG_INTERRUPT] &= ~EINT_RCV;
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else
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m_reg[EREG_INTERRUPT] |= EINT_RCV;
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uint8_t const mask = m_reg[EREG_INTERRUPT] >> 8;
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uint8_t const state = m_reg[EREG_INTERRUPT] & 0xff;
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/* update the IRQ state */
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m_irq_state = ((mask & state) != 0);
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uint8_t new_state = mask & state;
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if (m_irq_state ^ new_state)
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{
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logerror("update_ethernet_irq: old: %02x new: %02x\n", m_irq_state, new_state);
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m_irq_state = new_state;
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m_irq_handler(m_irq_state ? ASSERT_LINE : CLEAR_LINE);
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}
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}
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@ -440,29 +491,19 @@ void smc91c9x_device::update_stats()
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send_frame - push a frame to the interface
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-------------------------------------------------*/
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int smc91c9x_device::send_frame()
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TIMER_CALLBACK_MEMBER(smc91c9x_device::send_frame)
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{
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bool const is_broadcast = (m_tx[4] == 0xff && m_tx[5] == 0xff && m_tx[6] == 0xff &&
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m_tx[7] == 0xff && m_tx[8] == 0xff && m_tx[9] == 0xff);
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const int packet_num = m_comp_tx.front();
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uint8_t *const tx_buffer = &m_buffer[packet_num * ETHER_BUFFER_SIZE];
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tx_fifo_in = ( tx_fifo_in + 1 ) & ( ETHER_TX_BUFFERS - 1 );
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uint8_t *const tx_buffer = &m_tx[(tx_fifo_out & (ETHER_TX_BUFFERS-1))* ETHER_BUFFER_SIZE];
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tx_fifo_out = ((tx_fifo_out + 1)& (ETHER_TX_BUFFERS-1));
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/* update the EPH register and stuff it in the first transmit word */
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/* update the EPH register */
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m_reg[EREG_EPH_STATUS] = 0x0001;
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if (is_broadcast)
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if (is_broadcast(&tx_buffer[4]))
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m_reg[EREG_EPH_STATUS] |= 0x0040;
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tx_buffer[0] = m_reg[EREG_EPH_STATUS];
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tx_buffer[1] = m_reg[EREG_EPH_STATUS] >> 8;
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/* signal a transmit interrupt and mark the transmit buffer empty */
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// signal a transmit interrupt
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m_reg[EREG_INTERRUPT] |= EINT_TX;
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m_reg[EREG_INTERRUPT] |= EINT_TX_EMPTY;
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m_reg[EREG_FIFO_PORTS] |= 0x0080;
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m_sent++;
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update_stats();
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@ -483,106 +524,12 @@ int smc91c9x_device::send_frame()
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logerror("--- %d/0x%x bytes\n", buffer_len, buffer_len);
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}
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if ( buffer_len > 4 )
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if (buffer_len > 4)
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{
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// odd or even sized frame ?
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if (tx_buffer[buffer_len-1] & 0x20)
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buffer_len--;
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else
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buffer_len -= 2;
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if (!(m_reg[EREG_TCR] & 0x2002))
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{
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// No loopback... Send the frame
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if ( !send(&tx_buffer[4], buffer_len-4) )
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{
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// FIXME: failed to send the Ethernet packet
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//logerror("failed to send Ethernet packet\n");
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//LOG(this,("read_command_port(): !!! failed to send Ethernet packet"));
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}
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}
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else
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{
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// TODO loopback mode : Push the frame to the RX FIFO.
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}
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}
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return 0;
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}
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/*-------------------------------------------------
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process_command - handle MMU commands
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-------------------------------------------------*/
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void smc91c9x_device::process_command(uint16_t data)
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{
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switch ((data >> 4) & 0xF)
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{
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case ECMD_NOP:
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LOG(" NOP\n");
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break;
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case ECMD_ALLOCATE:
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LOG(" ALLOCATE MEMORY FOR TX (%d)\n", (data & 7));
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m_reg[EREG_PNR_ARR] &= ~0xff00;
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m_reg[EREG_PNR_ARR] |= (m_alloc_count++ & 0x7F) << 8;
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m_reg[EREG_INTERRUPT] |= 0x0008;
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update_ethernet_irq();
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break;
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case ECMD_RESET_MMU:
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/*
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0100
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- RESET MMU TO INITIAL STATE -
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Frees all memory allocations, clears relevant
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interrupts, resets packet FIFO pointers.
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*/
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LOG(" RESET MMU\n");
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// Flush fifos.
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clear_tx_fifo();
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clear_rx_fifo();
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break;
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case ECMD_REMOVE_TOPFRAME_TX:
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LOG(" REMOVE FRAME FROM TX FIFO\n");
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break;
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case ECMD_REMOVE_TOPFRAME_RX:
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LOG(" REMOVE FRAME FROM RX FIFO\n");
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case ECMD_REMOVE_RELEASE_TOPFRAME_RX:
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LOG(" REMOVE AND RELEASE FRAME FROM RX FIFO (RXI=%d RXO=%d)\n", rx_fifo_in & (ETHER_RX_BUFFERS - 1), rx_fifo_out & (ETHER_RX_BUFFERS - 1));
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m_reg[EREG_INTERRUPT] &= ~EINT_RCV;
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if ( (rx_fifo_in & ( ETHER_RX_BUFFERS - 1 ) ) != (rx_fifo_out & ( ETHER_RX_BUFFERS - 1 ) ) )
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rx_fifo_out = ( (rx_fifo_out + 1) & ( ETHER_RX_BUFFERS - 1 ) );
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if ( (rx_fifo_in & ( ETHER_RX_BUFFERS - 1 ) ) != (rx_fifo_out & ( ETHER_RX_BUFFERS - 1 ) ) )
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{
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m_reg[EREG_INTERRUPT] |= EINT_RCV;
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m_reg[EREG_FIFO_PORTS] &= ~0x8000;
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}
|
||||
else
|
||||
m_reg[EREG_FIFO_PORTS] |= 0x8000;
|
||||
|
||||
update_ethernet_irq();
|
||||
m_recd++;
|
||||
update_stats();
|
||||
break;
|
||||
|
||||
case ECMD_RELEASE_PACKET:
|
||||
LOG(" RELEASE SPECIFIC PACKET\n");
|
||||
break;
|
||||
|
||||
case ECMD_ENQUEUE_PACKET:
|
||||
LOG(" ENQUEUE TX PACKET\n");
|
||||
|
||||
if ( m_link_unconnected )
|
||||
if (m_link_unconnected)
|
||||
{
|
||||
// Set lost carrier
|
||||
if ( m_reg[EREG_TCR] & 0x0400 )
|
||||
if (m_reg[EREG_TCR] & 0x0400)
|
||||
{
|
||||
m_reg[EREG_EPH_STATUS] |= 0x400;
|
||||
// Clear Tx Enable on error
|
||||
@ -590,7 +537,7 @@ void smc91c9x_device::process_command(uint16_t data)
|
||||
}
|
||||
|
||||
// Set signal quality error
|
||||
if ( m_reg[EREG_TCR] & 0x1000 )
|
||||
if (m_reg[EREG_TCR] & 0x1000)
|
||||
{
|
||||
m_reg[EREG_EPH_STATUS] |= 0x20;
|
||||
// Clear Tx Enable on error
|
||||
@ -608,14 +555,115 @@ void smc91c9x_device::process_command(uint16_t data)
|
||||
}
|
||||
else
|
||||
{
|
||||
if ( m_reg[EREG_TCR] & 0x0001 ) // TX EN ?
|
||||
// odd or even sized frame ?
|
||||
if (tx_buffer[buffer_len - 1] & 0x20)
|
||||
buffer_len--;
|
||||
else
|
||||
buffer_len -= 2;
|
||||
|
||||
// Send the frame
|
||||
if (!send(&tx_buffer[4], buffer_len - 4))
|
||||
{
|
||||
send_frame();
|
||||
// FIXME: failed to send the Ethernet packet
|
||||
//logerror("failed to send Ethernet packet\n");
|
||||
//LOG(this,("read_command_port(): !!! failed to send Ethernet packet"));
|
||||
}
|
||||
|
||||
// Loopback if loopback is set or fduplx is set
|
||||
// TODO: Figure out correct size
|
||||
// TODO: Check for addtional filter options for FDUPLX mode
|
||||
if ((m_reg[EREG_TCR] & 0x2002) || (m_reg[EREG_TCR] & 0x0800))
|
||||
recv_cb(&tx_buffer[4], buffer_len - 2);
|
||||
}
|
||||
}
|
||||
// Update status in the transmit word
|
||||
tx_buffer[0] = m_reg[EREG_EPH_STATUS];
|
||||
tx_buffer[1] = m_reg[EREG_EPH_STATUS] >> 8;
|
||||
|
||||
update_ethernet_irq();
|
||||
}
|
||||
|
||||
/*-------------------------------------------------
|
||||
process_command - handle MMU commands
|
||||
-------------------------------------------------*/
|
||||
|
||||
void smc91c9x_device::process_command(uint16_t data)
|
||||
{
|
||||
switch ((data >> 4) & 0xF)
|
||||
{
|
||||
case ECMD_NOP:
|
||||
LOG(" NOP\n");
|
||||
break;
|
||||
|
||||
case ECMD_ALLOCATE:
|
||||
LOG(" ALLOCATE MEMORY FOR TX (%d)\n", (data & 7));
|
||||
{
|
||||
int packet_num;
|
||||
if (alloc_req(1, packet_num)) {
|
||||
// Set ARR register
|
||||
m_reg[EREG_PNR_ARR] &= ~0xff00;
|
||||
m_reg[EREG_PNR_ARR] |= packet_num << 8;
|
||||
m_reg[EREG_INTERRUPT] |= EINT_ALLOC;
|
||||
|
||||
update_ethernet_irq();
|
||||
}
|
||||
else {
|
||||
logerror("ECMD_ALLOCATE: Couldn't allocate TX memory\n");
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case ECMD_RESET_MMU:
|
||||
/*
|
||||
0100
|
||||
- RESET MMU TO INITIAL STATE -
|
||||
Frees all memory allocations, clears relevant
|
||||
interrupts, resets packet FIFO pointers.
|
||||
*/
|
||||
|
||||
LOG(" RESET MMU\n");
|
||||
mmu_reset();
|
||||
break;
|
||||
|
||||
case ECMD_REMOVE_TOPFRAME_TX:
|
||||
LOG(" REMOVE FRAME FROM TX FIFO\n");
|
||||
m_comp_tx.pop();
|
||||
// TODO: Should we clear TX_INT?
|
||||
break;
|
||||
|
||||
case ECMD_REMOVE_RELEASE_TOPFRAME_RX:
|
||||
LOG(" REMOVE AND RELEASE FRAME FROM RX FIFO (PACK_NUM=%d)\n", m_comp_rx.front());
|
||||
// Release memory allocation
|
||||
alloc_release(m_comp_rx.front());
|
||||
// Fall through
|
||||
case ECMD_REMOVE_TOPFRAME_RX:
|
||||
LOG(" REMOVE FRAME FROM RX FIFO\n");
|
||||
// remove entry from rx queue
|
||||
m_comp_rx.pop();
|
||||
|
||||
update_ethernet_irq();
|
||||
m_recd++;
|
||||
update_stats();
|
||||
break;
|
||||
|
||||
case ECMD_RELEASE_PACKET:
|
||||
{
|
||||
const int packet_number = m_reg[EREG_PNR_ARR] & 0xff;
|
||||
alloc_release(packet_number);
|
||||
LOG(" RELEASE SPECIFIC PACKET %d\n", packet_number);
|
||||
}
|
||||
break;
|
||||
|
||||
case ECMD_ENQUEUE_PACKET:
|
||||
LOG(" ENQUEUE TX PACKET\n");
|
||||
|
||||
if (m_reg[EREG_TCR] & 0x0001) // TX EN ?
|
||||
{
|
||||
const int packet_number = m_reg[EREG_PNR_ARR] & 0xff;
|
||||
// Push packet number tx completion fifo
|
||||
m_comp_tx.push(packet_number);
|
||||
m_tx_timer->adjust(attotime::from_usec(10));
|
||||
}
|
||||
break;
|
||||
|
||||
case ECMD_RESET_FIFOS:
|
||||
@ -666,6 +714,19 @@ READ16_MEMBER( smc91c9x_device::read )
|
||||
}
|
||||
break;
|
||||
|
||||
case EREG_FIFO_PORTS:
|
||||
result = 0;
|
||||
if (!m_comp_tx.empty())
|
||||
result |= m_comp_tx.front();
|
||||
else
|
||||
result |= 0x80;
|
||||
if (!m_comp_rx.empty())
|
||||
result |= m_comp_rx.front() << 8;
|
||||
else
|
||||
result |= 0x80 << 8;
|
||||
break;
|
||||
|
||||
|
||||
case EREG_DATA_0: /* data register */
|
||||
case EREG_DATA_1: /* data register */
|
||||
{
|
||||
@ -673,13 +734,9 @@ READ16_MEMBER( smc91c9x_device::read )
|
||||
int addr = m_reg[EREG_POINTER] & 0x7ff;
|
||||
|
||||
if ( m_reg[EREG_POINTER] & 0x8000 )
|
||||
{
|
||||
buffer = &m_rx[(rx_fifo_out & ( ETHER_RX_BUFFERS - 1 )) * ETHER_BUFFER_SIZE];
|
||||
}
|
||||
buffer = &m_buffer[m_comp_rx.front() * ETHER_BUFFER_SIZE];
|
||||
else
|
||||
{
|
||||
buffer = (uint8_t *)&m_tx[(tx_fifo_in & (ETHER_TX_BUFFERS-1))* ETHER_BUFFER_SIZE];;
|
||||
}
|
||||
buffer = &m_buffer[(m_reg[EREG_PNR_ARR] & 0x1f) * ETHER_BUFFER_SIZE];;
|
||||
|
||||
result = buffer[addr++];
|
||||
if ( ACCESSING_BITS_8_15 )
|
||||
@ -799,15 +856,12 @@ WRITE16_MEMBER( smc91c9x_device::write )
|
||||
uint8_t *buffer;
|
||||
int addr = m_reg[EREG_POINTER] & 0x7ff;
|
||||
|
||||
if ( m_reg[EREG_POINTER] & 0x8000 )
|
||||
{
|
||||
buffer = &m_rx[(rx_fifo_out & ( ETHER_RX_BUFFERS - 1 )) * ETHER_BUFFER_SIZE];
|
||||
}
|
||||
if (m_reg[EREG_POINTER] & 0x8000)
|
||||
buffer = &m_buffer[m_comp_rx.front() * ETHER_BUFFER_SIZE];
|
||||
else
|
||||
{
|
||||
buffer = (uint8_t *)&m_tx[(tx_fifo_in & (ETHER_TX_BUFFERS-1))* ETHER_BUFFER_SIZE];;
|
||||
}
|
||||
buffer = &m_buffer[(m_reg[EREG_PNR_ARR] & 0x1f) * ETHER_BUFFER_SIZE];;
|
||||
|
||||
// TODO: Should be checking if incr is set
|
||||
buffer[addr++] = data;
|
||||
if ( ACCESSING_BITS_8_15 )
|
||||
buffer[addr++] = data >> 8;
|
||||
@ -817,10 +871,12 @@ WRITE16_MEMBER( smc91c9x_device::write )
|
||||
}
|
||||
|
||||
case EREG_INTERRUPT:
|
||||
m_reg[EREG_INTERRUPT] &= ~(data & 0x56);
|
||||
// Need to clear tx int here for vegas cartfury
|
||||
if ( m_reg[EREG_FIFO_PORTS] & 0x0080 )
|
||||
// Pop tx fifo packet from completion fifo if clear tx int is set
|
||||
if (m_reg[EREG_INTERRUPT] & data & EINT_TX) {
|
||||
m_comp_tx.pop();
|
||||
m_reg[EREG_INTERRUPT] &= ~EINT_TX;
|
||||
}
|
||||
m_reg[EREG_INTERRUPT] &= ~(data & 0x56);
|
||||
update_ethernet_irq();
|
||||
break;
|
||||
}
|
||||
|
||||
@ -11,6 +11,8 @@
|
||||
#ifndef MAME_MACHINE_SMC91C9X_H
|
||||
#define MAME_MACHINE_SMC91C9X_H
|
||||
|
||||
#include <queue>
|
||||
|
||||
/***************************************************************************
|
||||
TYPE DEFINITIONS
|
||||
***************************************************************************/
|
||||
@ -22,8 +24,10 @@ public:
|
||||
|
||||
DECLARE_READ16_MEMBER( read );
|
||||
DECLARE_WRITE16_MEMBER( write );
|
||||
TIMER_CALLBACK_MEMBER(send_frame);
|
||||
|
||||
virtual void recv_cb(uint8_t *data, int length) override;
|
||||
void set_link_connected(bool connected) { m_link_unconnected = !connected; };
|
||||
|
||||
protected:
|
||||
smc91c9x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
|
||||
@ -34,10 +38,22 @@ protected:
|
||||
|
||||
private:
|
||||
static constexpr unsigned ETHER_BUFFER_SIZE = 2048;
|
||||
static constexpr unsigned ETHER_RX_BUFFERS = 16;
|
||||
static constexpr unsigned ETHER_TX_BUFFERS = 16;
|
||||
// TODO: 96 device is larger
|
||||
static constexpr unsigned ETHER_BUFFERS = 16;
|
||||
static constexpr unsigned ETHERNET_ADDR_SIZE = 6;
|
||||
|
||||
// mmu
|
||||
// The bits in these vectors indicate a packet has been allocated
|
||||
u32 m_alloc_rx, m_alloc_tx;
|
||||
std::queue<int> m_comp_tx, m_comp_rx;
|
||||
// Requests a packet allocation and returns true
|
||||
// and sets the packet number if successful
|
||||
bool alloc_req(const int tx, int &packet_num);
|
||||
// Releases an allocation
|
||||
void alloc_release(const int packet_num);
|
||||
// Resets the MMU
|
||||
void mmu_reset();
|
||||
|
||||
// internal state
|
||||
devcb_write_line m_irq_handler;
|
||||
|
||||
@ -51,22 +67,15 @@ private:
|
||||
/* IRQ information */
|
||||
uint8_t m_irq_state;
|
||||
|
||||
/* allocate information */
|
||||
uint8_t m_alloc_count;
|
||||
|
||||
/* transmit/receive FIFOs */
|
||||
uint32_t rx_fifo_out;
|
||||
uint32_t rx_fifo_in;
|
||||
uint8_t m_rx[ETHER_BUFFER_SIZE * ETHER_RX_BUFFERS];
|
||||
|
||||
uint32_t tx_fifo_out;
|
||||
uint32_t tx_fifo_in;
|
||||
uint8_t m_tx[ETHER_BUFFER_SIZE * ETHER_TX_BUFFERS];
|
||||
// Main memory
|
||||
uint8_t m_buffer[ETHER_BUFFER_SIZE * ETHER_BUFFERS];
|
||||
|
||||
/* counters */
|
||||
uint32_t m_sent;
|
||||
uint32_t m_recd;
|
||||
|
||||
emu_timer* m_tx_timer;
|
||||
|
||||
int ethernet_packet_is_for_me(const uint8_t mac_address[]);
|
||||
int is_broadcast(uint8_t mac_address[]);
|
||||
|
||||
@ -77,8 +86,6 @@ private:
|
||||
void clear_tx_fifo();
|
||||
void clear_rx_fifo();
|
||||
|
||||
int send_frame();
|
||||
|
||||
};
|
||||
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user