mirror of
https://github.com/holub/mame
synced 2025-04-23 00:39:36 +03:00
Merge branch 'master' of https://github.com/mamedev/mame
This commit is contained in:
angelosa
commit
e6f6986455
@ -2694,12 +2694,16 @@ files {
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MAME_DIR .. "src/mame/machine/namcomcu.h",
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MAME_DIR .. "src/mame/machine/namcoio_gearbox.cpp",
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MAME_DIR .. "src/mame/machine/namcoio_gearbox.h",
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MAME_DIR .. "src/mame/machine/namco_c148.cpp",
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MAME_DIR .. "src/mame/machine/namco_c148.h",
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MAME_DIR .. "src/mame/machine/namco_c139.cpp",
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MAME_DIR .. "src/mame/machine/namco_c139.h",
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MAME_DIR .. "src/mame/audio/namco52.cpp",
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MAME_DIR .. "src/mame/audio/namco52.h",
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MAME_DIR .. "src/mame/audio/namco54.cpp",
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MAME_DIR .. "src/mame/audio/namco54.h",
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MAME_DIR .. "src/mame/video/c116.cpp",
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MAME_DIR .. "src/mame/video/c116.h",
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MAME_DIR .. "src/mame/video/namco_c116.cpp",
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MAME_DIR .. "src/mame/video/namco_c116.h",
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MAME_DIR .. "src/mame/video/c45.cpp",
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MAME_DIR .. "src/mame/video/c45.h",
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}
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@ -597,10 +597,9 @@ static ADDRESS_MAP_START( namcos2_68k_default_cpu_board_am, AS_PROGRAM, 16, namc
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AM_RANGE(0x400000, 0x41ffff) AM_READWRITE(c123_tilemap_videoram_r,c123_tilemap_videoram_w)
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AM_RANGE(0x420000, 0x42003f) AM_READWRITE(c123_tilemap_control_r,c123_tilemap_control_w)
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AM_RANGE(0x440000, 0x44ffff) AM_READWRITE(paletteram_word_r,paletteram_word_w) AM_SHARE("paletteram")
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AM_RANGE(0x460000, 0x460fff) AM_READWRITE(dpram_word_r,dpram_word_w)
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AM_RANGE(0x468000, 0x468fff) AM_READWRITE(dpram_word_r,dpram_word_w) /* mirror */
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AM_RANGE(0x480000, 0x483fff) AM_READWRITE(serial_comms_ram_r,serial_comms_ram_w) AM_SHARE("serialram")
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AM_RANGE(0x4a0000, 0x4a000f) AM_READWRITE(serial_comms_ctrl_r,serial_comms_ctrl_w)
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AM_RANGE(0x460000, 0x460fff) AM_MIRROR(0xf000) AM_READWRITE(dpram_word_r,dpram_word_w)
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AM_RANGE(0x480000, 0x483fff) AM_DEVREADWRITE("sci", namco_c139_device, ram_r, ram_w)
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AM_RANGE(0x4a0000, 0x4a000f) AM_DEVICE("sci", namco_c139_device, regs_map)
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ADDRESS_MAP_END
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/*************************************************************/
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@ -618,14 +617,14 @@ static ADDRESS_MAP_START( master_default_am, AS_PROGRAM, 16, namcos2_state )
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AM_RANGE(0x000000, 0x03ffff) AM_ROM
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AM_RANGE(0x100000, 0x10ffff) AM_RAMBANK(NAMCOS2_68K_MASTER_RAM)
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AM_RANGE(0x180000, 0x183fff) AM_READWRITE8(namcos2_68k_eeprom_r,namcos2_68k_eeprom_w,0x00ff)
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AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
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AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("master_intc", namco_c148_device, map)
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AM_IMPORT_FROM( common_default_am )
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( slave_default_am, AS_PROGRAM, 16, namcos2_state )
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AM_RANGE(0x000000, 0x03ffff) AM_ROM
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AM_RANGE(0x100000, 0x13ffff) AM_RAMBANK(NAMCOS2_68K_SLAVE_RAM)
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AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
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AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("slave_intc", namco_c148_device, map)
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AM_IMPORT_FROM( common_default_am )
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ADDRESS_MAP_END
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@ -645,14 +644,14 @@ static ADDRESS_MAP_START( master_finallap_am, AS_PROGRAM, 16, namcos2_state )
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AM_RANGE(0x000000, 0x03ffff) AM_ROM
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AM_RANGE(0x100000, 0x10ffff) AM_RAMBANK(NAMCOS2_68K_MASTER_RAM)
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AM_RANGE(0x180000, 0x183fff) AM_READWRITE8(namcos2_68k_eeprom_r,namcos2_68k_eeprom_w,0x00ff)
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AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
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AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("master_intc", namco_c148_device, map)
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AM_IMPORT_FROM( common_finallap_am )
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( slave_finallap_am, AS_PROGRAM, 16, namcos2_state )
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AM_RANGE(0x000000, 0x03ffff) AM_ROM
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AM_RANGE(0x100000, 0x13ffff) AM_RAMBANK(NAMCOS2_68K_SLAVE_RAM)
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AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
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AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("slave_intc", namco_c148_device, map)
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AM_IMPORT_FROM( common_finallap_am )
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ADDRESS_MAP_END
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@ -669,14 +668,14 @@ static ADDRESS_MAP_START( master_sgunner_am, AS_PROGRAM, 16, namcos2_state )
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AM_RANGE(0x000000, 0x03ffff) AM_ROM
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AM_RANGE(0x100000, 0x10ffff) AM_RAMBANK(NAMCOS2_68K_MASTER_RAM)
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AM_RANGE(0x180000, 0x183fff) AM_READWRITE8(namcos2_68k_eeprom_r,namcos2_68k_eeprom_w,0x00ff)
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AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
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AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("master_intc", namco_c148_device, map)
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AM_IMPORT_FROM( common_sgunner_am )
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( slave_sgunner_am, AS_PROGRAM, 16, namcos2_state )
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AM_RANGE(0x000000, 0x03ffff) AM_ROM
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AM_RANGE(0x100000, 0x13ffff) AM_RAMBANK(NAMCOS2_68K_SLAVE_RAM)
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AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
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AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("slave_intc", namco_c148_device, map)
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AM_IMPORT_FROM( common_sgunner_am )
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ADDRESS_MAP_END
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@ -694,14 +693,14 @@ static ADDRESS_MAP_START( master_metlhawk_am, AS_PROGRAM, 16, namcos2_state )
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AM_RANGE(0x000000, 0x03ffff) AM_ROM
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AM_RANGE(0x100000, 0x10ffff) AM_RAMBANK(NAMCOS2_68K_MASTER_RAM)
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AM_RANGE(0x180000, 0x183fff) AM_READWRITE8(namcos2_68k_eeprom_r,namcos2_68k_eeprom_w,0x00ff)
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AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
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AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("master_intc", namco_c148_device, map)
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AM_IMPORT_FROM( common_metlhawk_am )
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( slave_metlhawk_am, AS_PROGRAM, 16, namcos2_state )
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AM_RANGE(0x000000, 0x03ffff) AM_ROM
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AM_RANGE(0x100000, 0x13ffff) AM_RAMBANK(NAMCOS2_68K_SLAVE_RAM)
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AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
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AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("slave_intc", namco_c148_device, map)
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AM_IMPORT_FROM( common_metlhawk_am )
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ADDRESS_MAP_END
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@ -724,14 +723,14 @@ static ADDRESS_MAP_START( master_luckywld_am, AS_PROGRAM, 16, namcos2_state )
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AM_RANGE(0x000000, 0x03ffff) AM_ROM
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AM_RANGE(0x100000, 0x10ffff) AM_RAMBANK(NAMCOS2_68K_MASTER_RAM)
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AM_RANGE(0x180000, 0x183fff) AM_READWRITE8(namcos2_68k_eeprom_r,namcos2_68k_eeprom_w,0x00ff)
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AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
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AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("master_intc", namco_c148_device, map)
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AM_IMPORT_FROM( common_luckywld_am )
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( slave_luckywld_am, AS_PROGRAM, 16, namcos2_state )
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AM_RANGE(0x000000, 0x03ffff) AM_ROM
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AM_RANGE(0x100000, 0x13ffff) AM_RAMBANK(NAMCOS2_68K_SLAVE_RAM)
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AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
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AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("slave_intc", namco_c148_device, map)
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AM_IMPORT_FROM( common_luckywld_am )
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ADDRESS_MAP_END
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@ -1680,14 +1679,45 @@ via software as INT1
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/* */
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/*************************************************************/
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static MACHINE_CONFIG_START( configure_c148_standard, namcos2_state )
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MCFG_NAMCO_C148_ADD("master_intc","maincpu",true)
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namco_c148_device::link_c148_device(*device,"slave_intc");
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MCFG_NAMCO_C148_EXT1_CB(WRITE8(namcos2_state, sound_reset_w))
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MCFG_NAMCO_C148_EXT2_CB(WRITE8(namcos2_state, system_reset_w))
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MCFG_NAMCO_C148_ADD("slave_intc","slave",false)
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namco_c148_device::link_c148_device(*device,"master_intc");
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MACHINE_CONFIG_END
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// TODO: temp
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TIMER_DEVICE_CALLBACK_MEMBER(namcos2_state::screen_scanline)
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{
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int scanline = param;
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int cur_posirq = get_pos_irq_scanline();
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if(scanline == 240)
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{
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m_master_intc->vblank_irq_trigger();
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m_slave_intc->vblank_irq_trigger();
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}
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if(scanline == cur_posirq)
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{
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m_master_intc->pos_irq_trigger();
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m_slave_intc->pos_irq_trigger();
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// TODO: wrong place!
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m_screen->update_partial(param);
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}
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}
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static MACHINE_CONFIG_START( default, namcos2_state )
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MCFG_CPU_ADD("maincpu", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */
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MCFG_CPU_PROGRAM_MAP(master_default_am)
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MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos2_shared_state, namcos2_68k_master_vblank)
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MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos2_state, screen_scanline, "screen", 0, 1)
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MCFG_CPU_ADD("slave", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */
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MCFG_CPU_PROGRAM_MAP(slave_default_am)
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MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos2_shared_state, namcos2_68k_slave_vblank)
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MCFG_CPU_ADD("audiocpu", M6809, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */
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MCFG_CPU_PROGRAM_MAP(sound_default_am)
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@ -1704,6 +1734,9 @@ static MACHINE_CONFIG_START( default, namcos2_state )
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MCFG_MACHINE_RESET_OVERRIDE(namcos2_state,namcos2)
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MCFG_NVRAM_ADD_1FILL("nvram")
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MCFG_FRAGMENT_ADD(configure_c148_standard)
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MCFG_NAMCO_C139_ADD("sci")
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_REFRESH_RATE( (49152000.0 / 8) / (384 * 264) )
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MCFG_SCREEN_SIZE(384, 264)
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@ -1758,11 +1791,10 @@ MACHINE_CONFIG_END
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static MACHINE_CONFIG_START( gollygho, namcos2_state )
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MCFG_CPU_ADD("maincpu", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */
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MCFG_CPU_PROGRAM_MAP(master_default_am)
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MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos2_shared_state, namcos2_68k_master_vblank)
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MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos2_state, screen_scanline, "screen", 0, 1)
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MCFG_CPU_ADD("slave", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */
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MCFG_CPU_PROGRAM_MAP(slave_default_am)
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MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos2_shared_state, namcos2_68k_slave_vblank)
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MCFG_CPU_ADD("audiocpu", M6809, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */
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MCFG_CPU_PROGRAM_MAP(sound_default_am)
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@ -1779,6 +1811,9 @@ static MACHINE_CONFIG_START( gollygho, namcos2_state )
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MCFG_MACHINE_RESET_OVERRIDE(namcos2_state,namcos2)
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MCFG_NVRAM_ADD_1FILL("nvram")
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MCFG_FRAGMENT_ADD(configure_c148_standard)
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MCFG_NAMCO_C139_ADD("sci")
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_REFRESH_RATE( (49152000.0 / 8) / (384 * 264) )
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MCFG_SCREEN_SIZE(384, 264)
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@ -1806,11 +1841,10 @@ MACHINE_CONFIG_END
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static MACHINE_CONFIG_START( finallap, namcos2_state )
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MCFG_CPU_ADD("maincpu", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */
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MCFG_CPU_PROGRAM_MAP(master_finallap_am)
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MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos2_shared_state, namcos2_68k_master_vblank)
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MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos2_state, screen_scanline, "screen", 0, 1)
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MCFG_CPU_ADD("slave", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */
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MCFG_CPU_PROGRAM_MAP(slave_finallap_am)
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MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos2_shared_state, namcos2_68k_slave_vblank)
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MCFG_CPU_ADD("audiocpu", M6809, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */
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MCFG_CPU_PROGRAM_MAP(sound_default_am)
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@ -1827,6 +1861,9 @@ static MACHINE_CONFIG_START( finallap, namcos2_state )
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MCFG_MACHINE_RESET_OVERRIDE(namcos2_state,namcos2)
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MCFG_NVRAM_ADD_1FILL("nvram")
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MCFG_FRAGMENT_ADD(configure_c148_standard)
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MCFG_NAMCO_C139_ADD("sci")
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MCFG_SCREEN_ADD("screen", RASTER)
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MCFG_SCREEN_REFRESH_RATE( (49152000.0 / 8) / (384 * 264) )
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MCFG_SCREEN_SIZE(384, 264)
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@ -1859,11 +1896,10 @@ MACHINE_CONFIG_END
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static MACHINE_CONFIG_START( sgunner, namcos2_state )
|
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MCFG_CPU_ADD("maincpu", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */
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MCFG_CPU_PROGRAM_MAP(master_sgunner_am)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos2_shared_state, namcos2_68k_master_vblank)
|
||||
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos2_state, screen_scanline, "screen", 0, 1)
|
||||
|
||||
MCFG_CPU_ADD("slave", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */
|
||||
MCFG_CPU_PROGRAM_MAP(slave_sgunner_am)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos2_shared_state, namcos2_68k_slave_vblank)
|
||||
|
||||
MCFG_CPU_ADD("audiocpu", M6809, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */
|
||||
MCFG_CPU_PROGRAM_MAP(sound_default_am)
|
||||
@ -1880,6 +1916,9 @@ static MACHINE_CONFIG_START( sgunner, namcos2_state )
|
||||
MCFG_MACHINE_RESET_OVERRIDE(namcos2_state,namcos2)
|
||||
MCFG_NVRAM_ADD_1FILL("nvram")
|
||||
|
||||
MCFG_FRAGMENT_ADD(configure_c148_standard)
|
||||
MCFG_NAMCO_C139_ADD("sci")
|
||||
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE( (49152000.0 / 8) / (384 * 264) )
|
||||
MCFG_SCREEN_SIZE(384, 264)
|
||||
@ -1909,11 +1948,10 @@ MACHINE_CONFIG_END
|
||||
static MACHINE_CONFIG_START( sgunner2, namcos2_state )
|
||||
MCFG_CPU_ADD("maincpu", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */
|
||||
MCFG_CPU_PROGRAM_MAP(master_sgunner_am)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos2_shared_state, namcos2_68k_master_vblank)
|
||||
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos2_state, screen_scanline, "screen", 0, 1)
|
||||
|
||||
MCFG_CPU_ADD("slave", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */
|
||||
MCFG_CPU_PROGRAM_MAP(slave_sgunner_am)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos2_shared_state, namcos2_68k_slave_vblank)
|
||||
|
||||
MCFG_CPU_ADD("audiocpu", M6809, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */
|
||||
MCFG_CPU_PROGRAM_MAP(sound_default_am)
|
||||
@ -1935,6 +1973,9 @@ static MACHINE_CONFIG_START( sgunner2, namcos2_state )
|
||||
MCFG_MACHINE_RESET_OVERRIDE(namcos2_state,namcos2)
|
||||
MCFG_NVRAM_ADD_1FILL("nvram")
|
||||
|
||||
MCFG_FRAGMENT_ADD(configure_c148_standard)
|
||||
MCFG_NAMCO_C139_ADD("sci")
|
||||
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE( (49152000.0 / 8) / (384 * 264) )
|
||||
MCFG_SCREEN_SIZE(384, 264)
|
||||
@ -1964,11 +2005,10 @@ MACHINE_CONFIG_END
|
||||
static MACHINE_CONFIG_START( luckywld, namcos2_state )
|
||||
MCFG_CPU_ADD("maincpu", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */
|
||||
MCFG_CPU_PROGRAM_MAP(master_luckywld_am)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos2_shared_state, namcos2_68k_master_vblank)
|
||||
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos2_state, screen_scanline, "screen", 0, 1)
|
||||
|
||||
MCFG_CPU_ADD("slave", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */
|
||||
MCFG_CPU_PROGRAM_MAP(slave_luckywld_am)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos2_shared_state, namcos2_68k_slave_vblank)
|
||||
|
||||
MCFG_CPU_ADD("audiocpu", M6809, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */
|
||||
MCFG_CPU_PROGRAM_MAP(sound_default_am)
|
||||
@ -1985,6 +2025,9 @@ static MACHINE_CONFIG_START( luckywld, namcos2_state )
|
||||
MCFG_MACHINE_RESET_OVERRIDE(namcos2_state,namcos2)
|
||||
MCFG_NVRAM_ADD_1FILL("nvram")
|
||||
|
||||
MCFG_FRAGMENT_ADD(configure_c148_standard)
|
||||
MCFG_NAMCO_C139_ADD("sci")
|
||||
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE( (49152000.0 / 8) / (384 * 264) )
|
||||
MCFG_SCREEN_SIZE(384, 264)
|
||||
@ -2017,16 +2060,15 @@ MACHINE_CONFIG_END
|
||||
static MACHINE_CONFIG_START( metlhawk, namcos2_state )
|
||||
MCFG_CPU_ADD("maincpu", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */
|
||||
MCFG_CPU_PROGRAM_MAP(master_metlhawk_am)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos2_shared_state, namcos2_68k_master_vblank)
|
||||
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos2_state, screen_scanline, "screen", 0, 1)
|
||||
|
||||
MCFG_CPU_ADD("slave", M68000, M68K_CPU_CLOCK) /* 12.288MHz (49.152MHz OSC/4) */
|
||||
MCFG_CPU_PROGRAM_MAP(slave_metlhawk_am)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos2_shared_state, namcos2_68k_slave_vblank)
|
||||
|
||||
MCFG_CPU_ADD("audiocpu", M6809, M68B09_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - Sound handling */
|
||||
MCFG_CPU_PROGRAM_MAP(sound_default_am)
|
||||
MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq0_line_hold, 2*60)
|
||||
MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq1_line_hold, 120)
|
||||
//MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq0_line_hold, 2*60)
|
||||
//MCFG_CPU_PERIODIC_INT_DRIVER(namcos2_shared_state, irq1_line_hold, 120)
|
||||
|
||||
MCFG_CPU_ADD("mcu", HD63705, C65_CPU_CLOCK) /* 2.048MHz (49.152MHz OSC/24) - I/O handling */
|
||||
MCFG_CPU_PROGRAM_MAP(mcu_default_am)
|
||||
@ -2038,6 +2080,9 @@ static MACHINE_CONFIG_START( metlhawk, namcos2_state )
|
||||
MCFG_MACHINE_RESET_OVERRIDE(namcos2_state,namcos2)
|
||||
MCFG_NVRAM_ADD_1FILL("nvram")
|
||||
|
||||
MCFG_FRAGMENT_ADD(configure_c148_standard)
|
||||
MCFG_NAMCO_C139_ADD("sci")
|
||||
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_REFRESH_RATE( (49152000.0 / 8) / (384 * 264) )
|
||||
MCFG_SCREEN_SIZE(384, 264)
|
||||
@ -2060,6 +2105,7 @@ static MACHINE_CONFIG_START( metlhawk, namcos2_state )
|
||||
MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
|
||||
|
||||
MCFG_YM2151_ADD("ymsnd", YM2151_SOUND_CLOCK) /* 3.579545MHz */
|
||||
MCFG_YM2151_IRQ_HANDLER(INPUTLINE("audiocpu", 1))
|
||||
MCFG_SOUND_ROUTE(0, "lspeaker", 0.80)
|
||||
MCFG_SOUND_ROUTE(1, "rspeaker", 0.80)
|
||||
MACHINE_CONFIG_END
|
||||
@ -5687,11 +5733,11 @@ DRIVER_INIT_MEMBER(namcos2_state,luckywld)
|
||||
/* and metal hawk have the B version and dragon saber has the C version */
|
||||
|
||||
/* YEAR, NAME, PARENT, MACHINE, INPUT, STATE, INIT, MONITOR, COMPANY, FULLNAME */
|
||||
GAMEL(1987, finallap, 0, finallap, finallap, namcos2_state, finallap, ROT0, "Namco", "Final Lap (Rev E)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND, layout_finallap )
|
||||
GAMEL(1987, finallapd, finallap, finallap, finallap, namcos2_state, finallap, ROT0, "Namco", "Final Lap (Rev D)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND, layout_finallap )
|
||||
GAMEL(1987, finallapc, finallap, finallap, finallap, namcos2_state, finallap, ROT0, "Namco", "Final Lap (Rev C)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND, layout_finallap )
|
||||
GAMEL(1987, finallapjc, finallap, finallap, finallap, namcos2_state, finallap, ROT0, "Namco", "Final Lap (Japan, Rev C)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND, layout_finallap )
|
||||
GAMEL(1987, finallapjb, finallap, finallap, finallap, namcos2_state, finallap, ROT0, "Namco", "Final Lap (Japan, Rev B)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND, layout_finallap )
|
||||
GAMEL(1987, finallap, 0, finallap, finallap, namcos2_state, finallap, ROT0, "Namco", "Final Lap (Rev E)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NODEVICE_LAN, layout_finallap )
|
||||
GAMEL(1987, finallapd, finallap, finallap, finallap, namcos2_state, finallap, ROT0, "Namco", "Final Lap (Rev D)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NODEVICE_LAN, layout_finallap )
|
||||
GAMEL(1987, finallapc, finallap, finallap, finallap, namcos2_state, finallap, ROT0, "Namco", "Final Lap (Rev C)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NODEVICE_LAN, layout_finallap )
|
||||
GAMEL(1987, finallapjc, finallap, finallap, finallap, namcos2_state, finallap, ROT0, "Namco", "Final Lap (Japan, Rev C)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NODEVICE_LAN, layout_finallap )
|
||||
GAMEL(1987, finallapjb, finallap, finallap, finallap, namcos2_state, finallap, ROT0, "Namco", "Final Lap (Japan, Rev B)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NODEVICE_LAN, layout_finallap )
|
||||
|
||||
GAME( 1988, assault, 0, default2, assault, namcos2_state, assault, ROT90, "Namco", "Assault (Rev B)", 0 )
|
||||
GAME( 1988, assaultj, assault, default2, assault, namcos2_state, assaultj, ROT90, "Namco", "Assault (Japan)", 0 )
|
||||
@ -5708,9 +5754,9 @@ GAME( 1988, mirninja, 0, default, default, namcos2_state, mirninja, R
|
||||
GAME( 1988, phelios, 0, default2, default, namcos2_state, phelios, ROT90, "Namco", "Phelios", 0)
|
||||
GAME( 1988, pheliosj, phelios, default2, default, namcos2_state, phelios, ROT90, "Namco", "Phelios (Japan)", 0)
|
||||
|
||||
GAME( 1989, dirtfoxj, 0, default2, dirtfox, namcos2_state, dirtfoxj, ROT90, "Namco", "Dirt Fox (Japan)", 0 )
|
||||
GAME( 1989, dirtfoxj, 0, default2, dirtfox, namcos2_state, dirtfoxj, ROT90, "Namco", "Dirt Fox (Japan)", MACHINE_NODEVICE_LAN )
|
||||
|
||||
GAMEL(1989, fourtrax, 0, finallap, fourtrax, namcos2_state, fourtrax, ROT0, "Namco", "Four Trax", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND, layout_finallap )
|
||||
GAMEL(1989, fourtrax, 0, finallap, fourtrax, namcos2_state, fourtrax, ROT0, "Namco", "Four Trax", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NODEVICE_LAN, layout_finallap )
|
||||
|
||||
GAME( 1989, valkyrie, 0, default3, default, namcos2_state, valkyrie, ROT90, "Namco", "Valkyrie No Densetsu (Japan)", 0 )
|
||||
|
||||
@ -5729,8 +5775,8 @@ GAME( 1990, dsaber, 0, default3, default, namcos2_state, dsaber, R
|
||||
GAME( 1990, dsabera, dsaber, default3, default, namcos2_state, dsaber, ROT90, "Namco", "Dragon Saber (World, older?)", 0 )
|
||||
GAME( 1990, dsaberj, dsaber, default3, default, namcos2_state, dsaberj, ROT90, "Namco", "Dragon Saber (Japan, Rev B)", 0 )
|
||||
|
||||
GAMEL(1990, finalap2, 0, finallap, finallap, namcos2_state, finalap2, ROT0, "Namco", "Final Lap 2", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND, layout_finallap )
|
||||
GAMEL(1990, finalap2j, finalap2, finallap, finallap, namcos2_state, finalap2, ROT0, "Namco", "Final Lap 2 (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND, layout_finallap )
|
||||
GAMEL(1990, finalap2, 0, finallap, finallap, namcos2_state, finalap2, ROT0, "Namco", "Final Lap 2", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NODEVICE_LAN, layout_finallap )
|
||||
GAMEL(1990, finalap2j, finalap2, finallap, finallap, namcos2_state, finalap2, ROT0, "Namco", "Final Lap 2 (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NODEVICE_LAN, layout_finallap )
|
||||
|
||||
GAME( 1990, gollygho, 0, gollygho, gollygho, namcos2_state, gollygho, ROT180, "Namco", "Golly! Ghost!", MACHINE_REQUIRES_ARTWORK )
|
||||
|
||||
@ -5749,24 +5795,24 @@ GAME( 1991, cosmogngj, cosmogng, default, default, namcos2_state, cosmogng, R
|
||||
GAME( 1992, bubbletr, 0, gollygho, bubbletr, namcos2_state, bubbletr, ROT180, "Namco", "Bubble Trouble (World, Rev B)", MACHINE_REQUIRES_ARTWORK )
|
||||
GAME( 1992, bubbletrj, bubbletr, gollygho, bubbletr, namcos2_state, bubbletr, ROT180, "Namco", "Bubble Trouble (Japan, Rev C)", MACHINE_REQUIRES_ARTWORK )
|
||||
|
||||
GAMEL(1992, finalap3, 0, finallap, finalap3, namcos2_state, finalap3, ROT0, "Namco", "Final Lap 3 (World, set 1)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND, layout_finallap )
|
||||
GAMEL(1992, finalap3a, finalap3, finallap, finalap3, namcos2_state, finalap3, ROT0, "Namco", "Final Lap 3 (World, set 2)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND, layout_finallap )
|
||||
GAMEL(1992, finalap3j, finalap3, finallap, finalap3, namcos2_state, finalap3, ROT0, "Namco", "Final Lap 3 (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND, layout_finallap )
|
||||
GAMEL(1992, finalap3jc, finalap3, finallap, finalap3, namcos2_state, finalap3, ROT0, "Namco", "Final Lap 3 (Japan - Rev C)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND, layout_finallap )
|
||||
GAMEL(1992, finalap3bl, finalap3, finallap, finalap3, namcos2_state, finalap3, ROT0, "Namco", "Final Lap 3 (bootleg)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND, layout_finallap )
|
||||
GAMEL(1992, finalap3, 0, finallap, finalap3, namcos2_state, finalap3, ROT0, "Namco", "Final Lap 3 (World, set 1)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NODEVICE_LAN, layout_finallap )
|
||||
GAMEL(1992, finalap3a, finalap3, finallap, finalap3, namcos2_state, finalap3, ROT0, "Namco", "Final Lap 3 (World, set 2)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NODEVICE_LAN, layout_finallap )
|
||||
GAMEL(1992, finalap3j, finalap3, finallap, finalap3, namcos2_state, finalap3, ROT0, "Namco", "Final Lap 3 (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NODEVICE_LAN, layout_finallap )
|
||||
GAMEL(1992, finalap3jc, finalap3, finallap, finalap3, namcos2_state, finalap3, ROT0, "Namco", "Final Lap 3 (Japan - Rev C)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NODEVICE_LAN, layout_finallap )
|
||||
GAMEL(1992, finalap3bl, finalap3, finallap, finalap3, namcos2_state, finalap3, ROT0, "Namco", "Final Lap 3 (bootleg)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NODEVICE_LAN, layout_finallap )
|
||||
|
||||
GAME( 1992, luckywld, 0, luckywld, luckywld, namcos2_state, luckywld, ROT0, "Namco", "Lucky & Wild", 0 )
|
||||
GAME( 1992, luckywldj, luckywld, luckywld, luckywld, namcos2_state, luckywld, ROT0, "Namco", "Lucky & Wild (Japan)", 0 )
|
||||
|
||||
GAME( 1992, suzuka8h, 0, luckywld, suzuka, namcos2_state, suzuka8h, ROT0, "Namco", "Suzuka 8 Hours (World, Rev C)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
|
||||
GAME( 1992, suzuka8hj, suzuka8h, luckywld, suzuka, namcos2_state, suzuka8h, ROT0, "Namco", "Suzuka 8 Hours (Japan, Rev B)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
|
||||
GAME( 1992, suzuka8h, 0, luckywld, suzuka, namcos2_state, suzuka8h, ROT0, "Namco", "Suzuka 8 Hours (World, Rev C)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NODEVICE_LAN )
|
||||
GAME( 1992, suzuka8hj, suzuka8h, luckywld, suzuka, namcos2_state, suzuka8h, ROT0, "Namco", "Suzuka 8 Hours (Japan, Rev B)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NODEVICE_LAN )
|
||||
|
||||
GAME( 1992, sws, 0, default, default, namcos2_state, sws, ROT0, "Namco", "Super World Stadium (Japan)", 0 )
|
||||
|
||||
GAME( 1992, sws92, 0, default, default, namcos2_state, sws92, ROT0, "Namco", "Super World Stadium '92 (Japan)", 0 )
|
||||
GAME( 1992, sws92g, sws92, default, default, namcos2_state, sws92g, ROT0, "Namco", "Super World Stadium '92 Gekitouban (Japan)", 0 )
|
||||
|
||||
GAME( 1993, suzuk8h2, 0, luckywld, suzuka, namcos2_state, suzuk8h2, ROT0, "Namco", "Suzuka 8 Hours 2 (World, Rev B)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
|
||||
GAME( 1993, suzuk8h2j, suzuk8h2, luckywld, suzuka, namcos2_state, suzuk8h2, ROT0, "Namco", "Suzuka 8 Hours 2 (Japan, Rev B)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND )
|
||||
GAME( 1993, suzuk8h2, 0, luckywld, suzuka, namcos2_state, suzuk8h2, ROT0, "Namco", "Suzuka 8 Hours 2 (World, Rev B)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NODEVICE_LAN )
|
||||
GAME( 1993, suzuk8h2j, suzuk8h2, luckywld, suzuka, namcos2_state, suzuk8h2, ROT0, "Namco", "Suzuka 8 Hours 2 (Japan, Rev B)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_NODEVICE_LAN )
|
||||
|
||||
GAME( 1993, sws93, 0, default, default, namcos2_state, sws93, ROT0, "Namco", "Super World Stadium '93 (Japan)", 0 )
|
||||
|
||||
@ -67,7 +67,7 @@ STATUS:
|
||||
- posirq handling broken
|
||||
|
||||
Driver's Eyes
|
||||
crashes
|
||||
Left and Right screen
|
||||
|
||||
TODO: (*) Extract DSP BIOS
|
||||
|
||||
@ -805,6 +805,7 @@ WRITE16_MEMBER(namcos21_state::dspram16_w)
|
||||
|
||||
int namcos21_state::init_dsp()
|
||||
{
|
||||
// TODO: what actually tests this?
|
||||
uint16_t *pMem = (uint16_t *)memregion("dspmaster")->base();
|
||||
/**
|
||||
* DSP BIOS tests "CPU ID" on startup
|
||||
@ -1225,12 +1226,6 @@ WRITE8_MEMBER(namcos21_state::namcos2_dualportram_byte_w)
|
||||
m_mpDualPortRAM[offset] = data;
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
WRITE16_MEMBER(namcos21_state::NAMCO_C139_SCI_buffer_w){}
|
||||
READ16_MEMBER(namcos21_state::NAMCO_C139_SCI_buffer_r){ return 0; }
|
||||
|
||||
WRITE16_MEMBER(namcos21_state::NAMCO_C139_SCI_register_w){}
|
||||
READ16_MEMBER(namcos21_state::NAMCO_C139_SCI_register_r){ return 0; }
|
||||
/******************************************************************************/
|
||||
|
||||
/*************************************************************/
|
||||
@ -1252,8 +1247,8 @@ static ADDRESS_MAP_START( common_map, AS_PROGRAM, 16, namcos21_state )
|
||||
AM_RANGE(0x800000, 0x8fffff) AM_ROM AM_REGION("data", 0)
|
||||
AM_RANGE(0x900000, 0x90ffff) AM_RAM AM_SHARE("sharedram")
|
||||
AM_RANGE(0xa00000, 0xa00fff) AM_READWRITE(namcos2_68k_dualportram_word_r,namcos2_68k_dualportram_word_w)
|
||||
AM_RANGE(0xb00000, 0xb03fff) AM_READWRITE(NAMCO_C139_SCI_buffer_r,NAMCO_C139_SCI_buffer_w)
|
||||
AM_RANGE(0xb80000, 0xb8000f) AM_READWRITE(NAMCO_C139_SCI_register_r,NAMCO_C139_SCI_register_w)
|
||||
AM_RANGE(0xb00000, 0xb03fff) AM_DEVREADWRITE("sci", namco_c139_device, ram_r, ram_w)
|
||||
AM_RANGE(0xb80000, 0xb8000f) AM_DEVICE("sci", namco_c139_device, regs_map)
|
||||
AM_RANGE(0xc00000, 0xcfffff) AM_ROM AM_MIRROR(0x100000) AM_REGION("edata", 0)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -1261,14 +1256,14 @@ static ADDRESS_MAP_START( master_map, AS_PROGRAM, 16, namcos21_state )
|
||||
AM_RANGE(0x000000, 0x0fffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x10ffff) AM_RAM /* private work RAM */
|
||||
AM_RANGE(0x180000, 0x183fff) AM_READWRITE8(namcos2_68k_eeprom_r,namcos2_68k_eeprom_w,0x00ff)
|
||||
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
|
||||
AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("master_intc", namco_c148_device, map)
|
||||
AM_IMPORT_FROM( common_map )
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( slave_map, AS_PROGRAM, 16, namcos21_state )
|
||||
AM_RANGE(0x000000, 0x07ffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x13ffff) AM_RAM /* private work RAM */
|
||||
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
|
||||
AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("slave_intc", namco_c148_device, map)
|
||||
AM_IMPORT_FROM( common_map )
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -1469,7 +1464,7 @@ static ADDRESS_MAP_START( winrun_master_map, AS_PROGRAM, 16, namcos21_state )
|
||||
AM_RANGE(0x000000, 0x03ffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x10ffff) AM_RAM /* work RAM */
|
||||
AM_RANGE(0x180000, 0x183fff) AM_READWRITE8(namcos2_68k_eeprom_r,namcos2_68k_eeprom_w,0x00ff)
|
||||
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
|
||||
AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("master_intc", namco_c148_device, map)
|
||||
AM_RANGE(0x250000, 0x25ffff) AM_RAM AM_SHARE("winrun_polydata")
|
||||
AM_RANGE(0x260000, 0x26ffff) AM_RAM /* unused? */
|
||||
AM_RANGE(0x280000, 0x281fff) AM_WRITE(winrun_dspbios_w) AM_SHARE("winrun_dspbios")
|
||||
@ -1481,34 +1476,35 @@ static ADDRESS_MAP_START( winrun_master_map, AS_PROGRAM, 16, namcos21_state )
|
||||
AM_RANGE(0x800000, 0x87ffff) AM_ROM AM_REGION("data", 0)
|
||||
AM_RANGE(0x900000, 0x90ffff) AM_RAM AM_SHARE("sharedram")
|
||||
AM_RANGE(0xa00000, 0xa00fff) AM_READWRITE(namcos2_68k_dualportram_word_r,namcos2_68k_dualportram_word_w)
|
||||
AM_RANGE(0xb00000, 0xb03fff) AM_READWRITE(NAMCO_C139_SCI_buffer_r,NAMCO_C139_SCI_buffer_w)
|
||||
AM_RANGE(0xb80000, 0xb8000f) AM_READWRITE(NAMCO_C139_SCI_register_r,NAMCO_C139_SCI_register_w)
|
||||
AM_RANGE(0xb00000, 0xb03fff) AM_DEVREADWRITE("sci", namco_c139_device, ram_r, ram_w)
|
||||
AM_RANGE(0xb80000, 0xb8000f) AM_DEVICE("sci", namco_c139_device, regs_map)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( winrun_slave_map, AS_PROGRAM, 16, namcos21_state )
|
||||
AM_RANGE(0x000000, 0x03ffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x13ffff) AM_RAM
|
||||
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
|
||||
AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("slave_intc", namco_c148_device, map)
|
||||
AM_RANGE(0x600000, 0x60ffff) AM_RAM AM_SHARE("gpu_comram")
|
||||
AM_RANGE(0x800000, 0x87ffff) AM_ROM AM_REGION("data", 0)
|
||||
AM_RANGE(0x900000, 0x90ffff) AM_RAM AM_SHARE("sharedram")
|
||||
AM_RANGE(0xa00000, 0xa00fff) AM_READWRITE(namcos2_68k_dualportram_word_r,namcos2_68k_dualportram_word_w)
|
||||
AM_RANGE(0xb00000, 0xb03fff) AM_READWRITE(NAMCO_C139_SCI_buffer_r,NAMCO_C139_SCI_buffer_w)
|
||||
AM_RANGE(0xb80000, 0xb8000f) AM_READWRITE(NAMCO_C139_SCI_register_r,NAMCO_C139_SCI_register_w)
|
||||
AM_RANGE(0xb00000, 0xb03fff) AM_DEVREADWRITE("sci", namco_c139_device, ram_r, ram_w)
|
||||
AM_RANGE(0xb80000, 0xb8000f) AM_DEVICE("sci", namco_c139_device, regs_map)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
static ADDRESS_MAP_START( winrun_gpu_map, AS_PROGRAM, 16, namcos21_state )
|
||||
AM_RANGE(0x000000, 0x07ffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x100001) AM_READWRITE(winrun_gpu_color_r,winrun_gpu_color_w) /* ? */
|
||||
AM_RANGE(0x180000, 0x19ffff) AM_RAM /* work RAM */
|
||||
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos21_68k_gpu_C148_r,namcos21_68k_gpu_C148_w)
|
||||
AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("gpu_intc", namco_c148_device, map)
|
||||
AM_RANGE(0x200000, 0x20ffff) AM_RAM AM_SHARE("gpu_comram")
|
||||
AM_RANGE(0x400000, 0x40ffff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
|
||||
AM_RANGE(0x410000, 0x41ffff) AM_RAM_DEVWRITE("palette", palette_device, write_ext) AM_SHARE("palette_ext")
|
||||
AM_RANGE(0x600000, 0x6fffff) AM_ROM AM_REGION("gdata", 0)
|
||||
AM_RANGE(0xc00000, 0xcfffff) AM_READWRITE(winrun_gpu_videoram_r,winrun_gpu_videoram_w)
|
||||
AM_RANGE(0xd00000, 0xd0000f) AM_READWRITE(winrun_gpu_register_r,winrun_gpu_register_w)
|
||||
// AM_RANGE(0xe0000c, 0xe0000d) POSIRQ
|
||||
AM_RANGE(0xe0000c, 0xe0000d) AM_DEVREADWRITE8("gpu_intc", namco_c148_device, ext_posirq_line_r,ext_posirq_line_w,0x00ff)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
@ -1572,15 +1568,15 @@ static ADDRESS_MAP_START( driveyes_common_map, AS_PROGRAM, 16, namcos21_state )
|
||||
AM_RANGE(0x800000, 0x8fffff) AM_ROM AM_REGION("data", 0)
|
||||
AM_RANGE(0x900000, 0x90ffff) AM_RAM AM_SHARE("sharedram")
|
||||
AM_RANGE(0xa00000, 0xa00fff) AM_READWRITE(namcos2_68k_dualportram_word_r,namcos2_68k_dualportram_word_w)
|
||||
AM_RANGE(0xb00000, 0xb03fff) AM_READWRITE(NAMCO_C139_SCI_buffer_r,NAMCO_C139_SCI_buffer_w)
|
||||
AM_RANGE(0xb80000, 0xb8000f) AM_READWRITE(NAMCO_C139_SCI_register_r,NAMCO_C139_SCI_register_w)
|
||||
AM_RANGE(0xb00000, 0xb03fff) AM_DEVREADWRITE("sci", namco_c139_device, ram_r, ram_w)
|
||||
AM_RANGE(0xb80000, 0xb8000f) AM_DEVICE("sci", namco_c139_device, regs_map)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( driveyes_master_map, AS_PROGRAM, 16, namcos21_state )
|
||||
AM_RANGE(0x000000, 0x03ffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x10ffff) AM_RAM /* private work RAM */
|
||||
AM_RANGE(0x180000, 0x183fff) AM_READWRITE8(namcos2_68k_eeprom_r,namcos2_68k_eeprom_w,0x00ff)
|
||||
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
|
||||
AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("master_intc", namco_c148_device, map)
|
||||
AM_RANGE(0x250000, 0x25ffff) AM_RAM AM_SHARE("winrun_polydata")
|
||||
AM_RANGE(0x280000, 0x281fff) AM_WRITE(winrun_dspbios_w) AM_SHARE("winrun_dspbios")
|
||||
AM_RANGE(0x380000, 0x38000f) AM_READWRITE(winrun_dspcomram_control_r,winrun_dspcomram_control_w)
|
||||
@ -1593,7 +1589,7 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( driveyes_slave_map, AS_PROGRAM, 16, namcos21_state )
|
||||
AM_RANGE(0x000000, 0x03ffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x10ffff) AM_RAM /* private work RAM */
|
||||
AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
|
||||
AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("slave_intc", namco_c148_device, map)
|
||||
AM_IMPORT_FROM( driveyes_common_map )
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -1851,15 +1847,44 @@ MACHINE_START_MEMBER(namcos21_state,namcos21)
|
||||
namcos2_kickstart = namcos21_kickstart;
|
||||
}
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(namcos21_state::screen_scanline)
|
||||
{
|
||||
int scanline = param;
|
||||
// int cur_posirq = get_posirq_scanline()*2;
|
||||
|
||||
if(scanline == 240*2)
|
||||
{
|
||||
m_master_intc->vblank_irq_trigger();
|
||||
m_slave_intc->vblank_irq_trigger();
|
||||
if(m_gpu_intc)
|
||||
m_gpu_intc->vblank_irq_trigger();
|
||||
}
|
||||
|
||||
if(m_gpu_intc != nullptr)
|
||||
{
|
||||
if(scanline == (0xff-m_gpu_intc->get_posirq_line())*2)
|
||||
m_gpu_intc->pos_irq_trigger();
|
||||
}
|
||||
}
|
||||
|
||||
static MACHINE_CONFIG_START( configure_c148_standard, namcos21_state )
|
||||
MCFG_NAMCO_C148_ADD("master_intc","maincpu",true)
|
||||
namco_c148_device::link_c148_device(*device,"slave_intc");
|
||||
MCFG_NAMCO_C148_EXT1_CB(WRITE8(namcos21_state, sound_reset_w))
|
||||
MCFG_NAMCO_C148_EXT2_CB(WRITE8(namcos21_state, system_reset_w))
|
||||
|
||||
MCFG_NAMCO_C148_ADD("slave_intc","slave",false)
|
||||
namco_c148_device::link_c148_device(*device,"master_intc");
|
||||
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_START( namcos21, namcos21_state )
|
||||
MCFG_CPU_ADD("maincpu", M68000,12288000) /* Master */
|
||||
MCFG_CPU_PROGRAM_MAP(master_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_master_vblank)
|
||||
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos21_state, screen_scanline, "screen", 0, 1)
|
||||
|
||||
MCFG_CPU_ADD("slave", M68000,12288000) /* Slave */
|
||||
MCFG_CPU_PROGRAM_MAP(slave_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_slave_vblank)
|
||||
|
||||
MCFG_CPU_ADD("audiocpu", M6809,3072000) /* Sound */
|
||||
MCFG_CPU_PROGRAM_MAP(sound_map)
|
||||
@ -1898,6 +1923,9 @@ static MACHINE_CONFIG_START( namcos21, namcos21_state )
|
||||
MCFG_SCREEN_UPDATE_DRIVER(namcos21_state, screen_update_namcos21)
|
||||
MCFG_SCREEN_PALETTE("palette")
|
||||
|
||||
MCFG_FRAGMENT_ADD(configure_c148_standard)
|
||||
MCFG_NAMCO_C139_ADD("sci")
|
||||
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", namcos21)
|
||||
MCFG_PALETTE_ADD("palette", NAMCOS21_NUM_COLORS)
|
||||
MCFG_PALETTE_FORMAT(XBRG)
|
||||
@ -1920,11 +1948,10 @@ MACHINE_CONFIG_END
|
||||
static MACHINE_CONFIG_START( driveyes, namcos21_state )
|
||||
MCFG_CPU_ADD("maincpu", M68000,12288000) /* Master */
|
||||
MCFG_CPU_PROGRAM_MAP(driveyes_master_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_master_vblank)
|
||||
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos21_state, screen_scanline, "screen", 0, 1)
|
||||
|
||||
MCFG_CPU_ADD("slave", M68000,12288000) /* Slave */
|
||||
MCFG_CPU_PROGRAM_MAP(driveyes_slave_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_slave_vblank)
|
||||
|
||||
MCFG_CPU_ADD("audiocpu", M6809,3072000) /* Sound */
|
||||
MCFG_CPU_PROGRAM_MAP(sound_map)
|
||||
@ -1952,6 +1979,9 @@ static MACHINE_CONFIG_START( driveyes, namcos21_state )
|
||||
|
||||
MCFG_DEVICE_ADD("gearbox", NAMCOIO_GEARBOX, 0)
|
||||
|
||||
MCFG_FRAGMENT_ADD(configure_c148_standard)
|
||||
MCFG_NAMCO_C139_ADD("sci")
|
||||
|
||||
MCFG_SCREEN_ADD("screen", RASTER)
|
||||
MCFG_SCREEN_RAW_PARAMS_NAMCO480I
|
||||
MCFG_SCREEN_UPDATE_DRIVER(namcos21_state, screen_update_driveyes)
|
||||
@ -1975,15 +2005,13 @@ static MACHINE_CONFIG_START( driveyes, namcos21_state )
|
||||
MCFG_SOUND_ROUTE(1, "rspeaker", 0.30)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( winrun, namcos21_state )
|
||||
MCFG_CPU_ADD("maincpu", M68000,12288000) /* Master */
|
||||
MCFG_CPU_PROGRAM_MAP(winrun_master_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_master_vblank)
|
||||
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos21_state, screen_scanline, "screen", 0, 1)
|
||||
|
||||
MCFG_CPU_ADD("slave", M68000,12288000) /* Slave */
|
||||
MCFG_CPU_PROGRAM_MAP(winrun_slave_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_slave_vblank)
|
||||
|
||||
MCFG_CPU_ADD("audiocpu", M6809,3072000) /* Sound */
|
||||
MCFG_CPU_PROGRAM_MAP(sound_map)
|
||||
@ -2005,7 +2033,10 @@ static MACHINE_CONFIG_START( winrun, namcos21_state )
|
||||
|
||||
MCFG_CPU_ADD("gpu", M68000,12288000) /* graphics coprocessor */
|
||||
MCFG_CPU_PROGRAM_MAP(winrun_gpu_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state, namcos2_68k_gpu_vblank)
|
||||
|
||||
MCFG_FRAGMENT_ADD(configure_c148_standard)
|
||||
MCFG_NAMCO_C148_ADD("gpu_intc","gpu",false)
|
||||
MCFG_NAMCO_C139_ADD("sci")
|
||||
|
||||
MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame */
|
||||
|
||||
@ -2726,13 +2757,13 @@ DRIVER_INIT_MEMBER(namcos21_state,driveyes)
|
||||
|
||||
/* YEAR, NAME, PARENT, MACHINE, INPUT, INIT, MONITOR, COMPANY, FULLNAME, FLAGS */
|
||||
GAME( 1988, winrun, 0, winrun, winrun, namcos21_state, winrun, ROT0, "Namco", "Winning Run", MACHINE_IMPERFECT_GRAPHICS )
|
||||
GAME( 1989, winrungp, 0, winrun, winrungp, namcos21_state, winrun, ROT0, "Namco", "Winning Run Suzuka Grand Prix (Japan)", MACHINE_IMPERFECT_GRAPHICS )
|
||||
GAME( 1991, winrun91, 0, winrun, winrungp, namcos21_state, winrun, ROT0, "Namco", "Winning Run '91 (Japan)", MACHINE_IMPERFECT_GRAPHICS )
|
||||
GAME( 1991, driveyes, 0, driveyes, driveyes, namcos21_state, driveyes, ROT0, "Namco", "Driver's Eyes (Japan)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS )
|
||||
GAME( 1989, winrungp, 0, winrun, winrungp, namcos21_state, winrun, ROT0, "Namco", "Winning Run Suzuka Grand Prix (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN )
|
||||
GAME( 1991, winrun91, 0, winrun, winrungp, namcos21_state, winrun, ROT0, "Namco", "Winning Run '91 (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN )
|
||||
GAME( 1991, driveyes, 0, driveyes, driveyes, namcos21_state, driveyes, ROT0, "Namco", "Driver's Eyes (Japan)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN)
|
||||
GAME( 1991, solvalou, 0, namcos21, s21default, namcos21_state, solvalou, ROT0, "Namco", "Solvalou (Japan)", MACHINE_IMPERFECT_GRAPHICS )
|
||||
GAME( 1991, starblad, 0, namcos21, s21default, namcos21_state, starblad, ROT0, "Namco", "Starblade (World)", MACHINE_IMPERFECT_GRAPHICS )
|
||||
GAME( 1991, starbladj, starblad, namcos21, s21default, namcos21_state, starblad, ROT0, "Namco", "Starblade (Japan)", MACHINE_IMPERFECT_GRAPHICS )
|
||||
GAME( 1992, aircomb, 0, namcos21, aircomb, namcos21_state, aircomb, ROT0, "Namco", "Air Combat (US)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS )
|
||||
GAME( 1992, aircomb, 0, namcos21, aircomb, namcos21_state, aircomb, ROT0, "Namco", "Air Combat (US)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) // There's code for a SCI, is it even possible to play multiplayer?
|
||||
GAME( 1992, aircombj, aircomb, namcos21, aircomb, namcos21_state, aircomb, ROT0, "Namco", "Air Combat (Japan)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS )
|
||||
GAME( 1993, cybsled, 0, namcos21, cybsled, namcos21_state, cybsled, ROT0, "Namco", "Cyber Sled (World)", MACHINE_IMPERFECT_GRAPHICS )
|
||||
GAME( 1993, cybsledj, cybsled, namcos21, cybsled, namcos21_state, cybsled, ROT0, "Namco", "Cyber Sled (Japan)", MACHINE_IMPERFECT_GRAPHICS )
|
||||
GAME( 1993, cybsled, 0, namcos21, cybsled, namcos21_state, cybsled, ROT0, "Namco", "Cyber Sled (World)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN )
|
||||
GAME( 1993, cybsledj, cybsled, namcos21, cybsled, namcos21_state, cybsled, ROT0, "Namco", "Cyber Sled (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NODEVICE_LAN )
|
||||
|
||||
@ -1,7 +1,7 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:R. Belmont, ElSemi
|
||||
#include "namcos2.h"
|
||||
#include "video/c116.h"
|
||||
#include "video/namco_c116.h"
|
||||
|
||||
#define NAMCOFL_HTOTAL (288) /* wrong */
|
||||
#define NAMCOFL_HBSTART (288)
|
||||
|
||||
@ -8,7 +8,7 @@
|
||||
|
||||
#include "namcos2.h"
|
||||
#include "machine/eeprompar.h"
|
||||
#include "video/c116.h"
|
||||
#include "video/namco_c116.h"
|
||||
|
||||
#define NAMCONB1_HTOTAL (288) /* wrong */
|
||||
#define NAMCONB1_HBSTART (288)
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
#include "machine/c117.h"
|
||||
#include "sound/dac.h"
|
||||
#include "sound/namco.h"
|
||||
#include "video/c116.h"
|
||||
#include "video/namco_c116.h"
|
||||
|
||||
class namcos1_state : public driver_device
|
||||
{
|
||||
|
||||
@ -11,6 +11,8 @@
|
||||
#include "namcoic.h"
|
||||
#include "cpu/m6502/m3745x.h"
|
||||
#include "video/c45.h"
|
||||
#include "machine/namco_c148.h"
|
||||
#include "machine/namco_c139.h"
|
||||
|
||||
/* CPU reference numbers */
|
||||
|
||||
@ -101,6 +103,9 @@ public:
|
||||
m_dspmaster(*this, "dspmaster"),
|
||||
m_dspslave(*this, "dspslave"),
|
||||
m_c68(*this, "c68"),
|
||||
m_master_intc(*this, "master_intc"),
|
||||
m_slave_intc(*this, "slave_intc"),
|
||||
m_sci(*this, "sci"),
|
||||
m_gpu(*this, "gpu"),
|
||||
m_gametype(0),
|
||||
m_c169_roz_videoram(*this, "rozvideoram", 0),
|
||||
@ -119,21 +124,26 @@ public:
|
||||
optional_device<cpu_device> m_dspmaster;
|
||||
optional_device<cpu_device> m_dspslave;
|
||||
optional_device<m37450_device> m_c68;
|
||||
required_device<namco_c148_device> m_master_intc;
|
||||
required_device<namco_c148_device> m_slave_intc;
|
||||
required_device<namco_c139_device> m_sci;
|
||||
optional_device<cpu_device> m_gpu; //to be moved to namco21_state after disentangling
|
||||
|
||||
// game type helpers
|
||||
bool is_system21();
|
||||
int m_gametype;
|
||||
|
||||
emu_timer *m_posirq_timer;
|
||||
int m_mcu_analog_ctrl;
|
||||
int m_mcu_analog_data;
|
||||
int m_mcu_analog_complete;
|
||||
std::unique_ptr<uint8_t[]> m_eeprom;
|
||||
uint16_t m_68k_master_C148[0x20];
|
||||
uint16_t m_68k_slave_C148[0x20];
|
||||
uint16_t m_68k_gpu_C148[0x20];
|
||||
|
||||
DECLARE_WRITE8_MEMBER(sound_reset_w);
|
||||
DECLARE_WRITE8_MEMBER(system_reset_w);
|
||||
void reset_all_subcpus(int state);
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(screen_scanline);
|
||||
|
||||
// C123 Tilemap Emulation
|
||||
// TODO: merge with namcos1.cpp implementation and convert to device
|
||||
public:
|
||||
@ -218,23 +228,9 @@ public:
|
||||
// general
|
||||
void zdrawgfxzoom(screen_device &screen, bitmap_ind16 &dest_bmp, const rectangle &clip, gfx_element *gfx, uint32_t code, uint32_t color, int flipx, int flipy, int sx, int sy, int scalex, int scaley, int zpos);
|
||||
void zdrawgfxzoom(screen_device &screen, bitmap_rgb32 &dest_bmp, const rectangle &clip, gfx_element *gfx, uint32_t code, uint32_t color, int flipx, int flipy, int sx, int sy, int scalex, int scaley, int zpos);
|
||||
INTERRUPT_GEN_MEMBER(namcos2_68k_master_vblank);
|
||||
INTERRUPT_GEN_MEMBER(namcos2_68k_slave_vblank);
|
||||
INTERRUPT_GEN_MEMBER(namcos2_68k_gpu_vblank);
|
||||
TIMER_CALLBACK_MEMBER(namcos2_posirq_tick);
|
||||
void adjust_posirq_timer( int scanline );
|
||||
void init_c148();
|
||||
void reset_all_subcpus(int state);
|
||||
uint16_t readwrite_c148( address_space &space, offs_t offset, uint16_t data, int bWrite );
|
||||
int get_posirq_scanline();
|
||||
|
||||
DECLARE_WRITE8_MEMBER( namcos2_68k_eeprom_w );
|
||||
DECLARE_READ8_MEMBER( namcos2_68k_eeprom_r );
|
||||
DECLARE_WRITE16_MEMBER( namcos2_68k_master_C148_w );
|
||||
DECLARE_READ16_MEMBER( namcos2_68k_master_C148_r );
|
||||
|
||||
DECLARE_WRITE16_MEMBER( namcos2_68k_slave_C148_w );
|
||||
DECLARE_READ16_MEMBER( namcos2_68k_slave_C148_r );
|
||||
|
||||
DECLARE_WRITE8_MEMBER( namcos2_mcu_port_d_w );
|
||||
DECLARE_READ8_MEMBER( namcos2_mcu_port_d_r );
|
||||
@ -244,9 +240,6 @@ public:
|
||||
DECLARE_READ8_MEMBER( namcos2_mcu_analog_port_r );
|
||||
DECLARE_WRITE8_MEMBER( namcos2_sound_bankselect_w );
|
||||
|
||||
/* TODO: this should belong to namcos21_state */
|
||||
DECLARE_WRITE16_MEMBER( namcos21_68k_gpu_C148_w );
|
||||
DECLARE_READ16_MEMBER( namcos21_68k_gpu_C148_r );
|
||||
required_device<cpu_device> m_maincpu;
|
||||
optional_device<cpu_device> m_audiocpu;
|
||||
optional_device<cpu_device> m_slave;
|
||||
@ -264,7 +257,6 @@ public:
|
||||
m_dpram(*this, "dpram"),
|
||||
m_paletteram(*this, "paletteram"),
|
||||
m_spriteram(*this, "spriteram"),
|
||||
m_serial_comms_ram(*this, "serialram"),
|
||||
m_rozram(*this, "rozram"),
|
||||
m_roz_ctrl(*this, "rozctrl"),
|
||||
m_c45_road(*this, "c45_road")
|
||||
@ -331,10 +323,6 @@ public:
|
||||
DECLARE_WRITE16_MEMBER( rozram_word_w );
|
||||
DECLARE_READ16_MEMBER( gfx_ctrl_r );
|
||||
DECLARE_WRITE16_MEMBER( gfx_ctrl_w );
|
||||
DECLARE_READ16_MEMBER( serial_comms_ram_r );
|
||||
DECLARE_WRITE16_MEMBER( serial_comms_ram_w );
|
||||
DECLARE_READ16_MEMBER( serial_comms_ctrl_r );
|
||||
DECLARE_WRITE16_MEMBER( serial_comms_ctrl_w );
|
||||
|
||||
void draw_sprite_init();
|
||||
void update_palette();
|
||||
@ -345,11 +333,11 @@ public:
|
||||
uint16_t get_palette_register( int which );
|
||||
|
||||
int get_pos_irq_scanline() { return (get_palette_register(5) - 32) & 0xff; }
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(screen_scanline);
|
||||
|
||||
required_shared_ptr<uint8_t> m_dpram; /* 2Kx8 */
|
||||
required_shared_ptr<uint16_t> m_paletteram;
|
||||
optional_shared_ptr<uint16_t> m_spriteram;
|
||||
optional_shared_ptr<uint16_t> m_serial_comms_ram;
|
||||
optional_shared_ptr<uint16_t> m_rozram;
|
||||
optional_shared_ptr<uint16_t> m_roz_ctrl;
|
||||
tilemap_t *m_tilemap_roz;
|
||||
|
||||
@ -54,7 +54,8 @@ public:
|
||||
m_ptrom24(*this,"point24"),
|
||||
m_ptrom16(*this,"point16"),
|
||||
m_dsp(*this, "dsp"),
|
||||
m_io_gearbox(*this, "gearbox")
|
||||
m_io_gearbox(*this, "gearbox"),
|
||||
m_gpu_intc(*this, "gpu_intc")
|
||||
{ }
|
||||
|
||||
optional_shared_ptr<uint16_t> m_winrun_dspbios;
|
||||
@ -68,8 +69,10 @@ public:
|
||||
|
||||
optional_device<cpu_device> m_dsp;
|
||||
optional_device<namcoio_gearbox_device> m_io_gearbox;
|
||||
optional_device<namco_c148_device> m_gpu_intc;
|
||||
|
||||
std::unique_ptr<uint8_t[]> m_videoram;
|
||||
std::unique_ptr<uint8_t[]> m_maskram;
|
||||
std::unique_ptr<uint16_t[]> m_winrun_dspcomram;
|
||||
uint16_t m_winrun_poly_buf[WINRUN_MAX_POLY_PARAM];
|
||||
int m_winrun_poly_index;
|
||||
@ -134,10 +137,6 @@ public:
|
||||
DECLARE_WRITE16_MEMBER(namcos2_68k_dualportram_word_w);
|
||||
DECLARE_READ8_MEMBER(namcos2_dualportram_byte_r);
|
||||
DECLARE_WRITE8_MEMBER(namcos2_dualportram_byte_w);
|
||||
DECLARE_WRITE16_MEMBER(NAMCO_C139_SCI_buffer_w);
|
||||
DECLARE_READ16_MEMBER(NAMCO_C139_SCI_buffer_r);
|
||||
DECLARE_WRITE16_MEMBER(NAMCO_C139_SCI_register_w);
|
||||
DECLARE_READ16_MEMBER(NAMCO_C139_SCI_register_r);
|
||||
DECLARE_READ16_MEMBER(winrun_dspcomram_r);
|
||||
DECLARE_WRITE16_MEMBER(winrun_dspcomram_w);
|
||||
DECLARE_READ16_MEMBER(winrun_cuskey_r);
|
||||
@ -159,9 +158,12 @@ public:
|
||||
DECLARE_WRITE16_MEMBER(winrun_gpu_register_w);
|
||||
DECLARE_WRITE16_MEMBER(winrun_gpu_videoram_w);
|
||||
DECLARE_READ16_MEMBER(winrun_gpu_videoram_r);
|
||||
|
||||
TIMER_DEVICE_CALLBACK_MEMBER(screen_scanline);
|
||||
|
||||
uint8_t m_gearbox_state;
|
||||
DECLARE_CUSTOM_INPUT_MEMBER(driveyes_gearbox_r);
|
||||
|
||||
DECLARE_DRIVER_INIT(driveyes);
|
||||
DECLARE_DRIVER_INIT(winrun);
|
||||
DECLARE_DRIVER_INIT(starblad);
|
||||
@ -176,6 +178,7 @@ public:
|
||||
void allocate_poly_framebuffer();
|
||||
void clear_poly_framebuffer();
|
||||
void copy_visible_poly_framebuffer(bitmap_ind16 &bitmap, const rectangle &clip, int zlo, int zhi);
|
||||
void winrun_bitmap_draw(bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void renderscanline_flat(const edge *e1, const edge *e2, int sy, unsigned color, int depthcueenable);
|
||||
void rendertri(const n21_vertex *v0, const n21_vertex *v1, const n21_vertex *v2, unsigned color, int depthcueenable);
|
||||
void draw_quad(int sx[4], int sy[4], int zcode[4], int color);
|
||||
@ -187,6 +190,5 @@ public:
|
||||
int init_dsp();
|
||||
void render_slave_output(uint16_t data);
|
||||
void winrun_flush_poly();
|
||||
void winrun_bitmap_draw(bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
void init(int game_type);
|
||||
};
|
||||
|
||||
107
src/mame/machine/namco_c139.cpp
Normal file
107
src/mame/machine/namco_c139.cpp
Normal file
@ -0,0 +1,107 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Angelo Salese
|
||||
/***************************************************************************
|
||||
|
||||
Namco C139 - Serial I/F Controller
|
||||
|
||||
|
||||
TODO:
|
||||
- Make this to actually work!
|
||||
- Is RAM shared with a specific CPU other than master/slave?
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "namco_c139.h"
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// GLOBAL VARIABLES
|
||||
//**************************************************************************
|
||||
|
||||
// device type definition
|
||||
const device_type NAMCO_C139 = &device_creator<namco_c139_device>;
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// LIVE DEVICE
|
||||
//**************************************************************************
|
||||
|
||||
static ADDRESS_MAP_START( data_map, AS_DATA, 16, namco_c139_device )
|
||||
AM_RANGE(0x0000, 0x3fff) AM_RAM AM_SHARE("sharedram")
|
||||
ADDRESS_MAP_END
|
||||
|
||||
DEVICE_ADDRESS_MAP_START( regs_map, 16, namco_c139_device )
|
||||
AM_RANGE(0x00, 0x00) AM_READ(status_r) // WRITE clears flags
|
||||
AM_RANGE(0x02, 0x02) AM_NOP // settings?
|
||||
// AM_RANGE(0x0a, 0x0a) // WRITE tx_w
|
||||
// AM_RANGE(0x0c, 0x0c) // READ rx_r
|
||||
// AM_RANGE(0x0e, 0x0e) //
|
||||
ADDRESS_MAP_END
|
||||
|
||||
//-------------------------------------------------
|
||||
// namco_c139_device - constructor
|
||||
//-------------------------------------------------
|
||||
|
||||
namco_c139_device::namco_c139_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
: device_t(mconfig, NAMCO_C139, "namco_c139_longname", tag, owner, clock, "namco_c139", __FILE__),
|
||||
device_memory_interface(mconfig, *this),
|
||||
m_space_config("data", ENDIANNESS_BIG, 16, 14, 0, *ADDRESS_MAP_NAME(data_map))
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_start - device-specific startup
|
||||
//-------------------------------------------------
|
||||
|
||||
void namco_c139_device::device_start()
|
||||
{
|
||||
m_ram = (uint16_t*)memshare("sharedram")->ptr();
|
||||
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_reset - device-specific reset
|
||||
//-------------------------------------------------
|
||||
|
||||
void namco_c139_device::device_reset()
|
||||
{
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// memory_space_config - return a description of
|
||||
// any address spaces owned by this device
|
||||
//-------------------------------------------------
|
||||
|
||||
const address_space_config *namco_c139_device::memory_space_config(address_spacenum spacenum) const
|
||||
{
|
||||
return (spacenum == AS_DATA) ? &m_space_config : nullptr;
|
||||
}
|
||||
|
||||
//**************************************************************************
|
||||
// READ/WRITE HANDLERS
|
||||
//**************************************************************************
|
||||
|
||||
READ16_MEMBER(namco_c139_device::ram_r)
|
||||
{
|
||||
return m_ram[offset];
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(namco_c139_device::ram_w)
|
||||
{
|
||||
COMBINE_DATA(&m_ram[offset]);
|
||||
}
|
||||
|
||||
READ16_MEMBER(namco_c139_device::status_r)
|
||||
{
|
||||
/*
|
||||
x-- RX READY or irq pending?
|
||||
-x- IRQ direction: 1 RX cause - 0 TX cause
|
||||
*/
|
||||
return 4; // STATUS bit?
|
||||
}
|
||||
67
src/mame/machine/namco_c139.h
Normal file
67
src/mame/machine/namco_c139.h
Normal file
@ -0,0 +1,67 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Angelo Salese
|
||||
/***************************************************************************
|
||||
|
||||
Namco C139 - Serial I/F Controller
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifndef __NAMCO_C139DEV_H__
|
||||
#define __NAMCO_C139DEV_H__
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// INTERFACE CONFIGURATION MACROS
|
||||
//**************************************************************************
|
||||
|
||||
#define MCFG_NAMCO_C139_ADD(_tag) \
|
||||
MCFG_DEVICE_ADD(_tag, NAMCO_C139, 0)
|
||||
|
||||
//**************************************************************************
|
||||
// TYPE DEFINITIONS
|
||||
//**************************************************************************
|
||||
|
||||
// ======================> namco_c139_device
|
||||
|
||||
class namco_c139_device : public device_t,
|
||||
public device_memory_interface
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
namco_c139_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
// I/O operations
|
||||
DECLARE_ADDRESS_MAP(regs_map, 16);
|
||||
|
||||
DECLARE_READ16_MEMBER(status_r);
|
||||
|
||||
DECLARE_READ16_MEMBER(ram_r);
|
||||
DECLARE_WRITE16_MEMBER(ram_w);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
// virtual void device_validity_check(validity_checker &valid) const;
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_DATA) const override;
|
||||
private:
|
||||
const address_space_config m_space_config;
|
||||
uint16_t* m_ram;
|
||||
};
|
||||
|
||||
|
||||
// device type definition
|
||||
extern const device_type NAMCO_C139;
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// GLOBAL VARIABLES
|
||||
//**************************************************************************
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
250
src/mame/machine/namco_c148.cpp
Normal file
250
src/mame/machine/namco_c148.cpp
Normal file
@ -0,0 +1,250 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Angelo Salese
|
||||
/***************************************************************************
|
||||
|
||||
Namco C148 - CPU Bus Manager
|
||||
|
||||
Does some Memory Decode, Interrupt Handling, 3 bit PIO port, Bus Controller
|
||||
|
||||
Based off implementation from K.Wilkins and Phil Stroffolino
|
||||
|
||||
TODO:
|
||||
- hookup C116 device, @see mame/includes/namcoic.h
|
||||
|
||||
=============================================================================
|
||||
Interrupt Controller C148 1C0000-1FFFFF R/W D00-D02
|
||||
Bus Controller? 1C0XXX
|
||||
???????? 1C2XXX
|
||||
???????? 1C4XXX
|
||||
-x- master priority bit?
|
||||
Master/Slave IRQ level 1C6XXX D00-D02
|
||||
EXIRQ level 1C8XXX D00-D02
|
||||
POSIRQ level 1CAXXX D00-D02
|
||||
SCIRQ level 1CCXXX D00-D02
|
||||
VBLANK IRQ level 1CEXXX D00-D02
|
||||
xxx irq level for specific irq.
|
||||
???????? 1D0XXX
|
||||
???????? 1D4000 trigger master/slave INT?
|
||||
|
||||
Acknowlegde Master/Slave IRQ 1D6XXX ack master/slave INT
|
||||
Acknowledge EXIRQ 1D8XXX
|
||||
Acknowledge POSIRQ 1DAXXX
|
||||
Acknowledge SCIRQ 1DCXXX
|
||||
Acknowledge VBLANK IRQ 1DEXXX
|
||||
|
||||
EEPROM Ready status 1E0XXX R D01
|
||||
Sound CPU Reset control 1E2XXX W D01
|
||||
Slave 68000 & IO CPU Reset 1E4XXX W D01
|
||||
xxx PIO ports, per-HW / CPU specific
|
||||
Watchdog reset kicker 1E6XXX W
|
||||
xxx Unknown at current stage if internal or external to the C148
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "namco_c148.h"
|
||||
|
||||
#define VERBOSE 0
|
||||
#define LOG(x) do { if (VERBOSE) printf x; } while (0)
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// GLOBAL VARIABLES
|
||||
//**************************************************************************
|
||||
|
||||
// device type definition
|
||||
const device_type NAMCO_C148 = &device_creator<namco_c148_device>;
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// LIVE DEVICE
|
||||
//**************************************************************************
|
||||
|
||||
//-------------------------------------------------
|
||||
// namco_c148_device - constructor
|
||||
//-------------------------------------------------
|
||||
|
||||
namco_c148_device::namco_c148_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
: device_t(mconfig, NAMCO_C148, "Namco C148 Interrupt Controller", tag, owner, clock, "namco_c148", __FILE__),
|
||||
m_out_ext1_cb(*this),
|
||||
m_out_ext2_cb(*this),
|
||||
m_hostcpu_tag(nullptr),
|
||||
m_linked_c148_tag(nullptr)
|
||||
{
|
||||
}
|
||||
|
||||
// (*) denotes master CPU only
|
||||
DEVICE_ADDRESS_MAP_START( map, 16, namco_c148_device )
|
||||
AM_RANGE(0x04000, 0x05fff) AM_READWRITE8(bus_ctrl_r, bus_ctrl_w, 0x00ff)
|
||||
AM_RANGE(0x06000, 0x07fff) AM_READWRITE8(cpu_irq_level_r,cpu_irq_level_w,0x00ff) // CPUIRQ lv
|
||||
AM_RANGE(0x08000, 0x09fff) AM_READWRITE8(ex_irq_level_r,ex_irq_level_w,0x00ff) // EXIRQ lv
|
||||
AM_RANGE(0x0a000, 0x0bfff) AM_READWRITE8(pos_irq_level_r,pos_irq_level_w,0x00ff) // POSIRQ lv
|
||||
AM_RANGE(0x0c000, 0x0dfff) AM_READWRITE8(sci_irq_level_r,sci_irq_level_w,0x00ff) // SCIRQ lv
|
||||
AM_RANGE(0x0e000, 0x0ffff) AM_READWRITE8(vblank_irq_level_r,vblank_irq_level_w,0x00ff) // VBlank IRQ lv
|
||||
|
||||
AM_RANGE(0x10000, 0x11fff) AM_WRITE(cpu_irq_assert_w)
|
||||
AM_RANGE(0x16000, 0x17fff) AM_READWRITE(cpu_irq_ack_r, cpu_irq_ack_w) // CPUIRQ ack
|
||||
AM_RANGE(0x18000, 0x19fff) AM_READWRITE(ex_irq_ack_r, ex_irq_ack_w) // EXIRQ ack
|
||||
AM_RANGE(0x1a000, 0x1bfff) AM_READWRITE(pos_irq_ack_r, pos_irq_ack_w) // POSIRQ ack
|
||||
AM_RANGE(0x1c000, 0x1dfff) AM_READWRITE(sci_irq_ack_r, sci_irq_ack_w) // SCIRQ ack
|
||||
AM_RANGE(0x1e000, 0x1ffff) AM_READWRITE(vblank_irq_ack_r, vblank_irq_ack_w) // VBlank IRQ ack
|
||||
AM_RANGE(0x20000, 0x21fff) AM_READ8(ext_r,0x00ff) // EEPROM ready status (*)
|
||||
AM_RANGE(0x22000, 0x23fff) AM_READNOP AM_WRITE8(ext1_w,0x00ff) // sound CPU reset (*)
|
||||
AM_RANGE(0x24000, 0x25fff) AM_WRITE8(ext2_w,0x00ff) // slave & i/o reset (*)
|
||||
AM_RANGE(0x26000, 0x27fff) AM_NOP // watchdog
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_start - device-specific startup
|
||||
//-------------------------------------------------
|
||||
|
||||
void namco_c148_device::device_start()
|
||||
{
|
||||
m_hostcpu = machine().device<cpu_device>(m_hostcpu_tag);
|
||||
m_linked_c148 = machine().device<namco_c148_device>(m_linked_c148_tag);
|
||||
assert(m_hostcpu != nullptr);
|
||||
|
||||
m_out_ext1_cb.resolve_safe();
|
||||
m_out_ext2_cb.resolve_safe();
|
||||
|
||||
// TODO: link to SCI, EX and the screen device controller devices
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_reset - device-specific reset
|
||||
//-------------------------------------------------
|
||||
|
||||
void namco_c148_device::device_reset()
|
||||
{
|
||||
m_irqlevel.vblank = 0;
|
||||
m_irqlevel.pos = 0;
|
||||
m_irqlevel.sci = 0;
|
||||
m_irqlevel.ex = 0;
|
||||
m_irqlevel.cpu = 0;
|
||||
}
|
||||
|
||||
//**************************************************************************
|
||||
// IRQ section
|
||||
//**************************************************************************
|
||||
|
||||
READ8_MEMBER( namco_c148_device::pos_irq_level_r ) { return m_irqlevel.pos & 7; }
|
||||
READ8_MEMBER( namco_c148_device::vblank_irq_level_r ) { return m_irqlevel.vblank & 7; }
|
||||
READ8_MEMBER( namco_c148_device::cpu_irq_level_r ) { return m_irqlevel.cpu & 7; }
|
||||
READ8_MEMBER( namco_c148_device::ex_irq_level_r ) { return m_irqlevel.ex & 7; }
|
||||
READ8_MEMBER( namco_c148_device::sci_irq_level_r ) { return m_irqlevel.sci & 7; }
|
||||
|
||||
inline void namco_c148_device::flush_irq_acks()
|
||||
{
|
||||
// If writing an IRQ priority register, clear any pending IRQs.
|
||||
// Dirt Fox and Winning Run require this behaviour
|
||||
// TODO: literal behaviour, Winning Run GPU doesn't seem to care about irq ack ports at all?
|
||||
for(int i=0;i<8;i++)
|
||||
m_hostcpu->set_input_line(i,CLEAR_LINE);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( namco_c148_device::pos_irq_level_w ) { m_irqlevel.pos = data & 7; flush_irq_acks(); if(data != 0) { LOG(("%s: pos IRQ level = %02x\n",this->tag(),data)); } }
|
||||
WRITE8_MEMBER( namco_c148_device::vblank_irq_level_w ) { m_irqlevel.vblank = data & 7; flush_irq_acks(); LOG(("%s: vblank IRQ level = %02x\n",this->tag(),data)); }
|
||||
WRITE8_MEMBER( namco_c148_device::cpu_irq_level_w ) { m_irqlevel.cpu = data & 7; flush_irq_acks(); LOG(("%s: cpu IRQ level = %02x\n",this->tag(),data)); }
|
||||
WRITE8_MEMBER( namco_c148_device::ex_irq_level_w ) { m_irqlevel.ex = data & 7; flush_irq_acks(); LOG(("%s: ex IRQ level = %02x\n",this->tag(),data)); }
|
||||
WRITE8_MEMBER( namco_c148_device::sci_irq_level_w ) { m_irqlevel.sci = data & 7; flush_irq_acks(); LOG(("%s: sci IRQ level = %02x\n",this->tag(),data)); }
|
||||
|
||||
READ16_MEMBER( namco_c148_device::vblank_irq_ack_r ) { m_hostcpu->set_input_line(m_irqlevel.vblank, CLEAR_LINE); return 0; }
|
||||
READ16_MEMBER( namco_c148_device::pos_irq_ack_r ) { m_hostcpu->set_input_line(m_irqlevel.pos, CLEAR_LINE); return 0; }
|
||||
READ16_MEMBER( namco_c148_device::cpu_irq_ack_r ) { m_hostcpu->set_input_line(m_irqlevel.cpu, CLEAR_LINE); return 0; }
|
||||
READ16_MEMBER( namco_c148_device::ex_irq_ack_r ) { m_hostcpu->set_input_line(m_irqlevel.ex, CLEAR_LINE); return 0; }
|
||||
READ16_MEMBER( namco_c148_device::sci_irq_ack_r ) { m_hostcpu->set_input_line(m_irqlevel.sci, CLEAR_LINE); return 0; }
|
||||
|
||||
WRITE16_MEMBER( namco_c148_device::vblank_irq_ack_w ) { m_hostcpu->set_input_line(m_irqlevel.vblank, CLEAR_LINE); }
|
||||
WRITE16_MEMBER( namco_c148_device::pos_irq_ack_w ) { m_hostcpu->set_input_line(m_irqlevel.pos, CLEAR_LINE); }
|
||||
WRITE16_MEMBER( namco_c148_device::cpu_irq_ack_w ) { m_hostcpu->set_input_line(m_irqlevel.cpu, CLEAR_LINE); }
|
||||
WRITE16_MEMBER( namco_c148_device::ex_irq_ack_w ) { m_hostcpu->set_input_line(m_irqlevel.ex, CLEAR_LINE); }
|
||||
WRITE16_MEMBER( namco_c148_device::sci_irq_ack_w ) { m_hostcpu->set_input_line(m_irqlevel.sci, CLEAR_LINE); }
|
||||
|
||||
//**************************************************************************
|
||||
// Comm ports
|
||||
//**************************************************************************
|
||||
|
||||
READ8_MEMBER( namco_c148_device::ext_r )
|
||||
{
|
||||
return 0xff; // TODO: bit 0 EEPROM bit ready
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( namco_c148_device::ext1_w )
|
||||
{
|
||||
m_out_ext1_cb(data & 7);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( namco_c148_device::ext2_w )
|
||||
{
|
||||
m_out_ext2_cb(data & 7);
|
||||
// TODO: bit 1/2 in Winning Run GPU might be irq enable?
|
||||
}
|
||||
|
||||
READ8_MEMBER( namco_c148_device::bus_ctrl_r )
|
||||
{
|
||||
return m_bus_reg;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( namco_c148_device::bus_ctrl_w )
|
||||
{
|
||||
m_bus_reg = data & 7;
|
||||
}
|
||||
|
||||
|
||||
WRITE16_MEMBER( namco_c148_device::cpu_irq_assert_w)
|
||||
{
|
||||
// TODO: Starblade relies on this for showing large polygons, is it the right place?
|
||||
m_linked_c148->cpu_irq_trigger();
|
||||
}
|
||||
|
||||
//**************************************************************************
|
||||
// GETTERS/SETTERS
|
||||
//**************************************************************************
|
||||
|
||||
void namco_c148_device::vblank_irq_trigger()
|
||||
{
|
||||
// TODO: Phelios doesn't ack the vblank irq at all!
|
||||
m_hostcpu->set_input_line(m_irqlevel.vblank, HOLD_LINE);
|
||||
}
|
||||
|
||||
void namco_c148_device::pos_irq_trigger()
|
||||
{
|
||||
m_hostcpu->set_input_line(m_irqlevel.pos, ASSERT_LINE);
|
||||
}
|
||||
|
||||
void namco_c148_device::cpu_irq_trigger()
|
||||
{
|
||||
m_hostcpu->set_input_line(m_irqlevel.cpu, ASSERT_LINE);
|
||||
}
|
||||
|
||||
void namco_c148_device::ex_irq_trigger()
|
||||
{
|
||||
m_hostcpu->set_input_line(m_irqlevel.ex, ASSERT_LINE);
|
||||
}
|
||||
|
||||
void namco_c148_device::sci_irq_trigger()
|
||||
{
|
||||
m_hostcpu->set_input_line(m_irqlevel.sci, ASSERT_LINE);
|
||||
}
|
||||
|
||||
// TODO: these doesn't belong here, needs C116 device
|
||||
READ8_MEMBER( namco_c148_device::ext_posirq_line_r )
|
||||
{
|
||||
// TODO: same as regular register? winrun91 reads here and subs with integer 0x39 for a new posirq that never gets triggered.
|
||||
return (m_posirq_line) & 0xff;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER( namco_c148_device::ext_posirq_line_w )
|
||||
{
|
||||
m_posirq_line = data;
|
||||
}
|
||||
|
||||
uint8_t namco_c148_device::get_posirq_line()
|
||||
{
|
||||
return m_posirq_line;
|
||||
}
|
||||
|
||||
143
src/mame/machine/namco_c148.h
Normal file
143
src/mame/machine/namco_c148.h
Normal file
@ -0,0 +1,143 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:Angelo Salese
|
||||
/***************************************************************************
|
||||
|
||||
Namco C148 - CPU Bus Manager
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifndef __NAMCO_C148DEV_H__
|
||||
#define __NAMCO_C148DEV_H__
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// INTERFACE CONFIGURATION MACROS
|
||||
//**************************************************************************
|
||||
|
||||
#define MCFG_NAMCO_C148_ADD(_tag, _cputag, _cpumaster) \
|
||||
MCFG_DEVICE_ADD(_tag, NAMCO_C148, 0) \
|
||||
namco_c148_device::configure_device(*device, _cputag, _cpumaster);
|
||||
|
||||
#define MCFG_NAMCO_C148_EXT1_CB(_cb) \
|
||||
devcb = &namco_c148_device::set_out_ext1_callback(*device, DEVCB_##_cb);
|
||||
|
||||
#define MCFG_NAMCO_C148_EXT2_CB(_cb) \
|
||||
devcb = &namco_c148_device::set_out_ext2_callback(*device, DEVCB_##_cb);
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// TYPE DEFINITIONS
|
||||
//**************************************************************************
|
||||
|
||||
// ======================> namco_c148_device
|
||||
|
||||
class namco_c148_device : public device_t
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
namco_c148_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
DECLARE_ADDRESS_MAP(map, 16);
|
||||
|
||||
static void configure_device(device_t &device, const char *tag, bool is_master)
|
||||
{
|
||||
namco_c148_device &dev = downcast<namco_c148_device &>(device);
|
||||
dev.m_hostcpu_tag = tag;
|
||||
dev.m_hostcpu_master = is_master;
|
||||
}
|
||||
|
||||
static void link_c148_device(device_t &device, const char *tag)
|
||||
{
|
||||
namco_c148_device &dev = downcast<namco_c148_device &>(device);
|
||||
|
||||
dev.m_linked_c148_tag = tag;
|
||||
}
|
||||
|
||||
template<class _Object> static devcb_base &set_out_ext1_callback(device_t &device, _Object object) { return downcast<namco_c148_device &>(device).m_out_ext1_cb.set_callback(object); }
|
||||
template<class _Object> static devcb_base &set_out_ext2_callback(device_t &device, _Object object) { return downcast<namco_c148_device &>(device).m_out_ext2_cb.set_callback(object); }
|
||||
|
||||
devcb_write8 m_out_ext1_cb;
|
||||
devcb_write8 m_out_ext2_cb;
|
||||
|
||||
DECLARE_READ8_MEMBER( vblank_irq_level_r );
|
||||
DECLARE_WRITE8_MEMBER( vblank_irq_level_w );
|
||||
DECLARE_READ16_MEMBER( vblank_irq_ack_r );
|
||||
DECLARE_WRITE16_MEMBER( vblank_irq_ack_w );
|
||||
|
||||
DECLARE_READ8_MEMBER( pos_irq_level_r );
|
||||
DECLARE_WRITE8_MEMBER( pos_irq_level_w );
|
||||
DECLARE_READ16_MEMBER( pos_irq_ack_r );
|
||||
DECLARE_WRITE16_MEMBER( pos_irq_ack_w );
|
||||
|
||||
DECLARE_READ8_MEMBER( cpu_irq_level_r );
|
||||
DECLARE_WRITE8_MEMBER( cpu_irq_level_w );
|
||||
DECLARE_READ16_MEMBER( cpu_irq_ack_r );
|
||||
DECLARE_WRITE16_MEMBER( cpu_irq_ack_w );
|
||||
|
||||
DECLARE_READ8_MEMBER( ex_irq_level_r );
|
||||
DECLARE_WRITE8_MEMBER( ex_irq_level_w );
|
||||
DECLARE_READ16_MEMBER( ex_irq_ack_r );
|
||||
DECLARE_WRITE16_MEMBER( ex_irq_ack_w );
|
||||
|
||||
DECLARE_READ8_MEMBER( sci_irq_level_r );
|
||||
DECLARE_WRITE8_MEMBER( sci_irq_level_w );
|
||||
DECLARE_READ16_MEMBER( sci_irq_ack_r );
|
||||
DECLARE_WRITE16_MEMBER( sci_irq_ack_w );
|
||||
|
||||
DECLARE_READ8_MEMBER( ext_posirq_line_r );
|
||||
DECLARE_WRITE8_MEMBER( ext_posirq_line_w );
|
||||
DECLARE_WRITE16_MEMBER( cpu_irq_assert_w );
|
||||
|
||||
DECLARE_READ8_MEMBER( bus_ctrl_r );
|
||||
DECLARE_WRITE8_MEMBER( bus_ctrl_w );
|
||||
|
||||
DECLARE_READ8_MEMBER( ext_r );
|
||||
DECLARE_WRITE8_MEMBER( ext1_w );
|
||||
DECLARE_WRITE8_MEMBER( ext2_w );
|
||||
void vblank_irq_trigger();
|
||||
void pos_irq_trigger();
|
||||
void ex_irq_trigger();
|
||||
void sci_irq_trigger();
|
||||
uint8_t get_posirq_line();
|
||||
|
||||
protected:
|
||||
void cpu_irq_trigger();
|
||||
// device-level overrides
|
||||
// virtual void device_validity_check(validity_checker &valid) const;
|
||||
virtual void device_start() override;
|
||||
virtual void device_reset() override;
|
||||
private:
|
||||
cpu_device *m_hostcpu; /**< reference to the host cpu */
|
||||
namco_c148_device *m_linked_c148; /**< reference to linked master/slave c148 */
|
||||
const char *m_hostcpu_tag; /**< host cpu tag name */
|
||||
const char *m_linked_c148_tag; /**< other c148 tag name */
|
||||
bool m_hostcpu_master; /**< define if host cpu is master */
|
||||
struct{
|
||||
uint8_t cpu;
|
||||
uint8_t ex;
|
||||
uint8_t sci;
|
||||
uint8_t pos;
|
||||
uint8_t vblank;
|
||||
}m_irqlevel;
|
||||
|
||||
uint8_t m_posirq_line;
|
||||
uint8_t m_bus_reg;
|
||||
void flush_irq_acks();
|
||||
};
|
||||
|
||||
|
||||
// device type definition
|
||||
extern const device_type NAMCO_C148;
|
||||
|
||||
|
||||
|
||||
//**************************************************************************
|
||||
// GLOBAL VARIABLES
|
||||
//**************************************************************************
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
@ -71,6 +71,44 @@ READ16_MEMBER( namcos2_state::namcos2_finallap_prot_r )
|
||||
|
||||
#define m_eeprom_size 0x2000
|
||||
|
||||
WRITE8_MEMBER(namcos2_shared_state::sound_reset_w)
|
||||
{
|
||||
address_space &masterspace = m_maincpu->space(AS_PROGRAM);
|
||||
|
||||
if (data & 0x01)
|
||||
{
|
||||
/* Resume execution */
|
||||
m_audiocpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
||||
masterspace.device().execute().yield();
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Suspend execution */
|
||||
m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||
}
|
||||
|
||||
if (namcos2_kickstart != nullptr)
|
||||
{
|
||||
//printf( "dspkick=0x%x\n", data );
|
||||
if (data & 0x04)
|
||||
{
|
||||
(*namcos2_kickstart)(space.machine(), 1);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// TODO:
|
||||
WRITE8_MEMBER(namcos2_shared_state::system_reset_w)
|
||||
{
|
||||
reset_all_subcpus(data & 1 ? CLEAR_LINE : ASSERT_LINE);
|
||||
|
||||
if (data & 0x01)
|
||||
{
|
||||
address_space &masterspace = m_maincpu->space(AS_PROGRAM);
|
||||
masterspace.device().execute().yield();
|
||||
}
|
||||
}
|
||||
|
||||
void namcos2_shared_state::reset_all_subcpus(int state)
|
||||
{
|
||||
m_slave->set_input_line(INPUT_LINE_RESET, state);
|
||||
@ -104,7 +142,6 @@ MACHINE_START_MEMBER(namcos2_shared_state,namcos2)
|
||||
namcos2_kickstart = nullptr;
|
||||
m_eeprom = std::make_unique<uint8_t[]>(m_eeprom_size);
|
||||
machine().device<nvram_device>("nvram")->set_base(m_eeprom.get(), m_eeprom_size);
|
||||
m_posirq_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(namcos2_shared_state::namcos2_posirq_tick),this));
|
||||
}
|
||||
|
||||
MACHINE_RESET_MEMBER(namcos2_shared_state, namcos2)
|
||||
@ -124,12 +161,6 @@ MACHINE_RESET_MEMBER(namcos2_shared_state, namcos2)
|
||||
/* Place CPU2 & CPU3 into the reset condition */
|
||||
reset_all_subcpus(ASSERT_LINE);
|
||||
|
||||
/* Initialise interrupt handlers */
|
||||
init_c148();
|
||||
|
||||
/* reset POSIRQ timer */
|
||||
m_posirq_timer->adjust(attotime::never);
|
||||
|
||||
m_player_mux = 0;
|
||||
}
|
||||
|
||||
@ -147,40 +178,6 @@ READ8_MEMBER( namcos2_shared_state::namcos2_68k_eeprom_r )
|
||||
return m_eeprom[offset];
|
||||
}
|
||||
|
||||
|
||||
|
||||
/**************************************************************/
|
||||
/* 68000 Shared serial communications processor (CPU5?) */
|
||||
/**************************************************************/
|
||||
|
||||
READ16_MEMBER( namcos2_state::serial_comms_ram_r ){
|
||||
return m_serial_comms_ram[offset];
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( namcos2_state::serial_comms_ram_w ){
|
||||
COMBINE_DATA( &m_serial_comms_ram[offset] );
|
||||
}
|
||||
|
||||
READ16_MEMBER( namcos2_state::serial_comms_ctrl_r )
|
||||
{
|
||||
uint16_t retval = m_serial_comms_ctrl[offset];
|
||||
|
||||
switch(offset){
|
||||
case 0x00:
|
||||
retval |= 0x0004; /* Set READY? status bit */
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return retval;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( namcos2_state::serial_comms_ctrl_w )
|
||||
{
|
||||
COMBINE_DATA( &m_serial_comms_ctrl[offset] );
|
||||
}
|
||||
|
||||
/*************************************************************/
|
||||
/* 68000 Shared protection/random key generator */
|
||||
/*************************************************************
|
||||
@ -435,252 +432,6 @@ bool namcos2_shared_state::is_system21()
|
||||
}
|
||||
}
|
||||
|
||||
void namcos2_shared_state::init_c148()
|
||||
{
|
||||
for(int loop = 0; loop < 0x20; loop++)
|
||||
{
|
||||
m_68k_master_C148[loop] = 0;
|
||||
m_68k_slave_C148[loop] = 0;
|
||||
m_68k_gpu_C148[loop] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
uint16_t namcos2_shared_state::readwrite_c148( address_space &space, offs_t offset, uint16_t data, int bWrite )
|
||||
{
|
||||
offs_t addr = ((offset * 2) + 0x1c0000) & 0x1fe000;
|
||||
device_t *altcpu = nullptr;
|
||||
uint16_t *pC148Reg = nullptr;
|
||||
uint16_t *pC148RegAlt = nullptr;
|
||||
uint16_t result = 0;
|
||||
|
||||
if (&space.device() == m_maincpu)
|
||||
{
|
||||
pC148Reg = m_68k_master_C148;
|
||||
altcpu = m_slave;
|
||||
pC148RegAlt = m_68k_slave_C148;
|
||||
}
|
||||
else if (&space.device() == m_slave)
|
||||
{
|
||||
pC148Reg = m_68k_slave_C148;
|
||||
altcpu = m_maincpu;
|
||||
pC148RegAlt = m_68k_master_C148;
|
||||
}
|
||||
else if (&space.device() == m_gpu)
|
||||
{
|
||||
pC148Reg = m_68k_gpu_C148;
|
||||
altcpu = m_maincpu;
|
||||
pC148RegAlt = m_68k_master_C148;
|
||||
}
|
||||
|
||||
if( bWrite )
|
||||
{
|
||||
int reg = (addr >> 13) & 0x1f;
|
||||
|
||||
// If writing an IRQ priority register, clear any pending IRQs.
|
||||
// Dirt Fox and Winning Run require this behaviour
|
||||
if (reg < 8)
|
||||
space.device().execute().set_input_line(pC148Reg[reg], CLEAR_LINE);
|
||||
|
||||
pC148Reg[reg] = data & 0x0007;
|
||||
}
|
||||
|
||||
switch(addr)
|
||||
{
|
||||
case 0x1c0000: break; /* ? NAMCOS2_C148_0 */
|
||||
case 0x1c2000: break; /* ? NAMCOS2_C148_1 */
|
||||
case 0x1c4000: break; /* ? NAMCOS2_C148_2 */
|
||||
|
||||
/* IRQ level */
|
||||
case 0x1c6000: break; /* NAMCOS2_C148_CPUIRQ */
|
||||
case 0x1c8000: break; /* NAMCOS2_C148_EXIRQ */
|
||||
case 0x1ca000: break; /* NAMCOS2_C148_POSIRQ */
|
||||
case 0x1cc000: break; /* NAMCOS2_C148_SERIRQ */
|
||||
case 0x1ce000: break; /* NAMCOS2_C148_VBLANKIRQ */
|
||||
|
||||
case 0x1d0000: /* ? NAMCOS2_C148_0 */
|
||||
if( bWrite )
|
||||
{
|
||||
// osd_printf_debug( "cpu(%d) RAM[0x%06x] = 0x%x\n", cpu, addr, data );
|
||||
/* Dubious to assert IRQ for other CPU here, but Starblade seems to rely on it.
|
||||
It fails to show large polygons otherwise. */
|
||||
altcpu->execute().set_input_line(pC148RegAlt[NAMCOS2_C148_CPUIRQ], ASSERT_LINE);
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x1d2000: break; /* ? NAMCOS2_C148_1 */
|
||||
|
||||
case 0x1d4000: /* ? NAMCOS2_C148_2 */
|
||||
if( bWrite )
|
||||
{
|
||||
// osd_printf_debug( "cpu(%d) RAM[0x%06x] = 0x%x\n", cpu, addr, data );
|
||||
/* Dubious to assert IRQ for other CPU here: Rolling Thunder 2 and Fine Hour break. */
|
||||
// altcpu->execute().set_input_line(pC148RegAlt[NAMCOS2_C148_CPUIRQ], ASSERT_LINE);
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
/* IRQ ack */
|
||||
case 0x1d6000: /* NAMCOS2_C148_CPUIRQ */
|
||||
// if( bWrite ) osd_printf_debug( "cpu(%d) RAM[0x%06x] = 0x%x\n", cpu, addr, data );
|
||||
space.device().execute().set_input_line(pC148Reg[NAMCOS2_C148_CPUIRQ], CLEAR_LINE);
|
||||
break;
|
||||
|
||||
case 0x1d8000: /* NAMCOS2_C148_EXIRQ */
|
||||
// if( bWrite ) osd_printf_debug( "cpu(%d) RAM[0x%06x] = 0x%x\n", cpu, addr, data );
|
||||
space.device().execute().set_input_line(pC148Reg[NAMCOS2_C148_EXIRQ], CLEAR_LINE);
|
||||
break;
|
||||
|
||||
case 0x1da000: /* NAMCOS2_C148_POSIRQ */
|
||||
// if( bWrite ) osd_printf_debug( "cpu(%d) RAM[0x%06x] = 0x%x\n", cpu, addr, data );
|
||||
space.device().execute().set_input_line(pC148Reg[NAMCOS2_C148_POSIRQ], CLEAR_LINE);
|
||||
break;
|
||||
|
||||
case 0x1dc000: /* NAMCOS2_C148_SERIRQ */
|
||||
// if( bWrite ) osd_printf_debug( "cpu(%d) RAM[0x%06x] = 0x%x\n", cpu, addr, data );
|
||||
space.device().execute().set_input_line(pC148Reg[NAMCOS2_C148_SERIRQ], CLEAR_LINE);
|
||||
break;
|
||||
|
||||
case 0x1de000: /* NAMCOS2_C148_VBLANKIRQ */
|
||||
space.device().execute().set_input_line(pC148Reg[NAMCOS2_C148_VBLANKIRQ], CLEAR_LINE);
|
||||
break;
|
||||
|
||||
|
||||
case 0x1e0000: /* EEPROM Status Register */
|
||||
result = ~0; /* Only BIT0 used: 1=EEPROM READY 0=EEPROM BUSY */
|
||||
break;
|
||||
|
||||
case 0x1e2000: /* Sound CPU Reset control */
|
||||
if (&space.device() == m_maincpu) /* ? */
|
||||
{
|
||||
if (data & 0x01)
|
||||
{
|
||||
/* Resume execution */
|
||||
m_audiocpu->set_input_line(INPUT_LINE_RESET, CLEAR_LINE);
|
||||
space.device().execute().yield();
|
||||
}
|
||||
else
|
||||
{
|
||||
/* Suspend execution */
|
||||
m_audiocpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||
}
|
||||
if (namcos2_kickstart != nullptr)
|
||||
{
|
||||
//printf( "dspkick=0x%x\n", data );
|
||||
if (data & 0x04)
|
||||
{
|
||||
(*namcos2_kickstart)(space.machine(), 1);
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x1e4000: /* Alt 68000 & IO CPU Reset */
|
||||
if (&space.device() == m_maincpu) /* ? */
|
||||
{
|
||||
if (data & 0x01)
|
||||
{ /* Resume execution */
|
||||
reset_all_subcpus(CLEAR_LINE);
|
||||
/* Give the new CPU an immediate slice of the action */
|
||||
space.device().execute().yield();
|
||||
}
|
||||
else
|
||||
{ /* Suspend execution */
|
||||
reset_all_subcpus(ASSERT_LINE);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x1e6000: /* Watchdog reset kicker */
|
||||
/* watchdog_reset_w(0,0); */
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( namcos2_shared_state::namcos2_68k_master_C148_w )
|
||||
{
|
||||
(void)readwrite_c148(space, offset, data, 1);
|
||||
}
|
||||
|
||||
READ16_MEMBER( namcos2_shared_state::namcos2_68k_master_C148_r )
|
||||
{
|
||||
return readwrite_c148(space, offset, 0, 0);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( namcos2_shared_state::namcos2_68k_slave_C148_w )
|
||||
{
|
||||
(void)readwrite_c148(space, offset, data, 1);
|
||||
}
|
||||
|
||||
READ16_MEMBER( namcos2_shared_state::namcos2_68k_slave_C148_r )
|
||||
{
|
||||
return readwrite_c148(space, offset, 0, 0);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER( namcos2_shared_state::namcos21_68k_gpu_C148_w )
|
||||
{
|
||||
(void)readwrite_c148(space, offset, data, 1);
|
||||
}
|
||||
|
||||
READ16_MEMBER( namcos2_shared_state::namcos21_68k_gpu_C148_r )
|
||||
{
|
||||
return readwrite_c148(space, offset, 0, 0);
|
||||
}
|
||||
|
||||
|
||||
int namcos2_shared_state::get_posirq_scanline()
|
||||
{
|
||||
if (is_system21()) return 0;
|
||||
return downcast<namcos2_state *>(this)->get_pos_irq_scanline();
|
||||
}
|
||||
|
||||
TIMER_CALLBACK_MEMBER(namcos2_shared_state::namcos2_posirq_tick)
|
||||
{
|
||||
if (is_system21()) {
|
||||
if (m_68k_gpu_C148[NAMCOS2_C148_POSIRQ]) {
|
||||
m_screen->update_partial(param);
|
||||
m_gpu->set_input_line(m_68k_gpu_C148[NAMCOS2_C148_POSIRQ] , ASSERT_LINE);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
if (m_68k_master_C148[NAMCOS2_C148_POSIRQ]|m_68k_slave_C148[NAMCOS2_C148_POSIRQ]) {
|
||||
m_screen->update_partial(param);
|
||||
if (m_68k_master_C148[NAMCOS2_C148_POSIRQ]) m_maincpu->set_input_line(m_68k_master_C148[NAMCOS2_C148_POSIRQ] , ASSERT_LINE);
|
||||
if (m_68k_slave_C148[NAMCOS2_C148_POSIRQ]) m_slave->set_input_line(m_68k_slave_C148[NAMCOS2_C148_POSIRQ] , ASSERT_LINE);
|
||||
}
|
||||
}
|
||||
|
||||
void namcos2_shared_state::adjust_posirq_timer( int scanline )
|
||||
{
|
||||
m_posirq_timer->adjust(m_screen->time_until_pos(scanline, 80), scanline);
|
||||
}
|
||||
|
||||
INTERRUPT_GEN_MEMBER(namcos2_shared_state::namcos2_68k_master_vblank)
|
||||
{
|
||||
if (!is_system21()) adjust_posirq_timer(get_posirq_scanline());
|
||||
device.execute().set_input_line(m_68k_master_C148[NAMCOS2_C148_VBLANKIRQ], HOLD_LINE);
|
||||
}
|
||||
|
||||
INTERRUPT_GEN_MEMBER(namcos2_shared_state::namcos2_68k_slave_vblank)
|
||||
{
|
||||
if (!is_system21()) adjust_posirq_timer(get_posirq_scanline());
|
||||
device.execute().set_input_line(m_68k_slave_C148[NAMCOS2_C148_VBLANKIRQ], HOLD_LINE);
|
||||
}
|
||||
|
||||
INTERRUPT_GEN_MEMBER(namcos2_shared_state::namcos2_68k_gpu_vblank)
|
||||
{
|
||||
/* only used by namcos21 */
|
||||
//int scanline = get_posirq_scanline();
|
||||
int32_t scanline = 0x50+0x89; /* HACK for Winning Run */
|
||||
|
||||
//printf( "namcos2_68k_gpu_vblank(%d)\n",m_68k_gpu_C148[NAMCOS2_C148_POSIRQ] );
|
||||
adjust_posirq_timer(scanline);
|
||||
device.execute().set_input_line(m_68k_gpu_C148[NAMCOS2_C148_VBLANKIRQ], HOLD_LINE);
|
||||
}
|
||||
|
||||
/**************************************************************/
|
||||
/* Sound sub-system */
|
||||
|
||||
@ -66,8 +66,9 @@ i960 CPU, needs to write its clip and raster values byteswapped.
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
#include "video/c116.h"
|
||||
#include "video/namco_c116.h"
|
||||
|
||||
const device_type NAMCO_C116 = &device_creator<namco_c116_device>;
|
||||
|
||||
//-------------------------------------------------
|
||||
// namco_c116_device -- constructor
|
||||
@ -158,6 +159,3 @@ WRITE8_MEMBER(namco_c116_device::write)
|
||||
RAM[color] = data;
|
||||
palette().set_pen_color(color,m_ram_r[color],m_ram_g[color],m_ram_b[color]);
|
||||
}
|
||||
|
||||
|
||||
const device_type NAMCO_C116 = &device_creator<namco_c116_device>;
|
||||
@ -348,10 +348,9 @@ WRITE16_MEMBER( namcos2_state::paletteram_word_w )
|
||||
|
||||
/* register 5: POSIRQ scanline (only 8 bits used) */
|
||||
/*case 0x180a:*/ case 0x180b:
|
||||
if (data^m_paletteram[offset]) {
|
||||
//if (data^m_paletteram[offset]) {
|
||||
m_paletteram[offset] = data;
|
||||
adjust_posirq_timer(get_pos_irq_scanline());
|
||||
}
|
||||
//}
|
||||
break;
|
||||
|
||||
/* registers 6,7: nothing? */
|
||||
|
||||
@ -48,11 +48,11 @@ READ16_MEMBER(namcos21_state::winrun_gpu_register_r)
|
||||
WRITE16_MEMBER(namcos21_state::winrun_gpu_register_w)
|
||||
{
|
||||
COMBINE_DATA( &m_winrun_gpu_register[offset] );
|
||||
m_screen->update_partial(m_screen->vpos());
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(namcos21_state::winrun_gpu_videoram_w)
|
||||
{
|
||||
uint8_t *videoram = m_videoram.get();
|
||||
int color = data>>8;
|
||||
int mask = data&0xff;
|
||||
int i;
|
||||
@ -60,15 +60,15 @@ WRITE16_MEMBER(namcos21_state::winrun_gpu_videoram_w)
|
||||
{
|
||||
if( mask&(0x01<<i) )
|
||||
{
|
||||
videoram[(offset+i)&0x7ffff] = color;
|
||||
m_videoram[(offset+i)&0x7ffff] = color;
|
||||
m_maskram[(offset+i)&0x7ffff] = mask;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
READ16_MEMBER(namcos21_state::winrun_gpu_videoram_r)
|
||||
{
|
||||
uint8_t *videoram = m_videoram.get();
|
||||
return videoram[offset]<<8;
|
||||
return (m_videoram[offset]<<8) | m_maskram[offset];
|
||||
}
|
||||
|
||||
void namcos21_state::allocate_poly_framebuffer()
|
||||
@ -363,6 +363,7 @@ VIDEO_START_MEMBER(namcos21_state,namcos21)
|
||||
if( m_gametype == NAMCOS21_WINRUN91 )
|
||||
{
|
||||
m_videoram = std::make_unique<uint8_t[]>(0x80000);
|
||||
m_maskram = std::make_unique<uint8_t[]>(0x80000);
|
||||
}
|
||||
allocate_poly_framebuffer();
|
||||
c355_obj_init(
|
||||
@ -426,7 +427,10 @@ uint32_t namcos21_state::screen_update_driveyes(screen_device &screen, bitmap_in
|
||||
void namcos21_state::winrun_bitmap_draw(bitmap_ind16 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
uint8_t *videoram = m_videoram.get();
|
||||
//printf("%d %d (%d %d) - %04x %04x %04x|%04x %04x\n",cliprect.min_y,cliprect.max_y,m_screen->vpos(),m_gpu_intc->get_posirq_line(),m_winrun_gpu_register[0],m_winrun_gpu_register[2/2],m_winrun_gpu_register[4/2],m_winrun_gpu_register[0xa/2],m_winrun_gpu_register[0xc/2]);
|
||||
|
||||
int yscroll = -cliprect.min_y+(int16_t)m_winrun_gpu_register[0x2/2];
|
||||
int xscroll = 0;//m_winrun_gpu_register[0xc/2] >> 7;
|
||||
int base = 0x1000+0x100*(m_winrun_color&0xf);
|
||||
int sx,sy;
|
||||
for( sy=cliprect.min_y; sy<=cliprect.max_y; sy++ )
|
||||
@ -435,11 +439,12 @@ void namcos21_state::winrun_bitmap_draw(bitmap_ind16 &bitmap, const rectangle &c
|
||||
uint16_t *pDest = &bitmap.pix16(sy);
|
||||
for( sx=cliprect.min_x; sx<=cliprect.max_x; sx++ )
|
||||
{
|
||||
int pen = pSource[sx];
|
||||
int pen = pSource[(sx+xscroll) & 0x1ff];
|
||||
switch( pen )
|
||||
{
|
||||
case 0xff:
|
||||
break;
|
||||
// TODO: additive blending? winrun car select uses register [0xc] for a xscroll value
|
||||
case 0x00:
|
||||
pDest[sx] = (pDest[sx]&0x1fff)+0x4000;
|
||||
break;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user