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Cleanups and version bump

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This commit is contained in:
Miodrag Milanovic 2014-12-31 07:53:27 +01:00
parent bfd87ef73a
commit e6f78d5ed2
156 changed files with 4939 additions and 5018 deletions
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40
hash/adam_cass.xml
View File

@ -968,29 +968,29 @@
</software>
<!--
<software name="macadam">
<description>MacADAM (Fra)</description>
<year>1984</year>
<publisher>CBS Loisors - Coleco of France</publisher>
<software name="macadam">
<description>MacADAM (Fra)</description>
<year>1984</year>
<publisher>CBS Loisors - Coleco of France</publisher>
<part name="cass1" interface="adam_cass">
<dataarea name="cass" size="262144">
<rom name="macadam (1984) (cbs loisors - coleco of france).ddp" size="262144" crc="2fe95d33" sha1="e27e3515644c2fcd28b94b1aed69ae0b2cb76afc" offset="0" />
</dataarea>
</part>
</software>
<part name="cass1" interface="adam_cass">
<dataarea name="cass" size="262144">
<rom name="macadam (1984) (cbs loisors - coleco of france).ddp" size="262144" crc="2fe95d33" sha1="e27e3515644c2fcd28b94b1aed69ae0b2cb76afc" offset="0" />
</dataarea>
</part>
</software>
<software name="macadama" cloneof="macadam">
<description>MacADAM (Fra, Alt)</description>
<year>1984</year>
<publisher>CBS Loisors - Coleco of France</publisher>
<software name="macadama" cloneof="macadam">
<description>MacADAM (Fra, Alt)</description>
<year>1984</year>
<publisher>CBS Loisors - Coleco of France</publisher>
<part name="cass1" interface="adam_cass">
<dataarea name="cass" size="262144">
<rom name="macadam (1984) (cbs loisors - coleco of france) [a1].ddp" size="262144" crc="5288e332" sha1="4c1de35afefc356db7303f8f584946bbf0f7c528" offset="0" />
</dataarea>
</part>
</software>
<part name="cass1" interface="adam_cass">
<dataarea name="cass" size="262144">
<rom name="macadam (1984) (cbs loisors - coleco of france) [a1].ddp" size="262144" crc="5288e332" sha1="4c1de35afefc356db7303f8f584946bbf0f7c528" offset="0" />
</dataarea>
</part>
</software>
-->

106
hash/adam_flop.xml
View File

@ -2,14 +2,14 @@
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="adam_flop" description="Coleco ADAM diskettes">
<!--
<!--
Thanks to SacNews.net for their very comprehensive software database!
TODO:
Add rest of images outside of TOSEC/SacNews databases
Proper testing for correct info? (current info is just copy-pasted from filenames)
Add rest of images outside of TOSEC/SacNews databases
Proper testing for correct info? (current info is just copy-pasted from filenames)
-->
<!-- EOS Drivers -->
<software name="homeauto">
@ -841,11 +841,11 @@
<dataarea name="flop" size="163840">
<rom name="world geography (1985) (a-ware educational software) [a1].dsk" size="163840" crc="c7d26848" sha1="c9581253ac1de95bbb45092bf3aeaa932f4006d7" offset="0" />
</dataarea>
</part>
</part>
</software>
<!-- EOS Games -->
<software name="2010">
<description>2010 - The Text Adventure Game</description>
<year>1984</year>
@ -857,7 +857,7 @@
</dataarea>
</part>
</software>
<software name="2010a" cloneof="2010">
<description>2010 - The Text Adventure Game (Alt)</description>
<year>1984</year>
@ -1083,7 +1083,7 @@
<dataarea name="flop" size="163840">
<rom name="adventure pack i (1984) (victory software) [a1].dsk" size="163840" crc="1754bbf4" sha1="a38a4ab0689917e66b3b6dda874f5a4f9ab9415a" offset="0" />
</dataarea>
</part>
</part>
</software>
<software name="advpak2v">
@ -2409,24 +2409,24 @@
</part>
</software>
<!-- From NIAD's blog:
<!-- From NIAD's blog:
Jeopardy for the ADAM Computer is in fact a finshed product which was copyrighted 1984, but for whatever reason (probably
completed just prior to Coleco's announcement in Jan. '85 that they were abandoning the ColecoVision and ADAM), Coleco
decided not to release it commercially. They instead made it available to ADAM Users Groups circa 1985/1986 to share with
the ADAM Community with the requirement that all copyright information would be removed from the program. Because of
this requirement by Coleco, you will see multiple versions of Jeopardy available for download that have been hacked to
change two title screens. This hacking actually eliminated the first title screen and then replaced the copyright information on
completed just prior to Coleco's announcement in Jan. '85 that they were abandoning the ColecoVision and ADAM), Coleco
decided not to release it commercially. They instead made it available to ADAM Users Groups circa 1985/1986 to share with
the ADAM Community with the requirement that all copyright information would be removed from the program. Because of
this requirement by Coleco, you will see multiple versions of Jeopardy available for download that have been hacked to
change two title screens. This hacking actually eliminated the first title screen and then replaced the copyright information on
the second.
When the original Jeopardy program was copied from data pack (256K max size) to disk (160K max size) a portion of the
program that contained game play data/questions was lost to the ages. This disk version which floated around for a while
would eventually crash due to the missing data, but this was later patched by Walters Software Co.'s Jim Walters to recycle to
When the original Jeopardy program was copied from data pack (256K max size) to disk (160K max size) a portion of the
program that contained game play data/questions was lost to the ages. This disk version which floated around for a while
would eventually crash due to the missing data, but this was later patched by Walters Software Co.'s Jim Walters to recycle to
the beginning of the questions.
In 1992, a member of NIAD had the tremendous fortune to come in contact with a former Coleco employee who was looking
to sell off his entire lot of ADAM gear... a number of never before seen hardware and software protos included. In this lot was
[...] a 2-disk version of Jeopardy. I have not tested this 2-disk version thoroughly, but it does seem to work properly and
should be the version that you use as more than likely it is the complete version that would have been released for
commercial sale.
In 1992, a member of NIAD had the tremendous fortune to come in contact with a former Coleco employee who was looking
to sell off his entire lot of ADAM gear... a number of never before seen hardware and software protos included. In this lot was
[...] a 2-disk version of Jeopardy. I have not tested this 2-disk version thoroughly, but it does seem to work properly and
should be the version that you use as more than likely it is the complete version that would have been released for
commercial sale.
-->
<software name="jeopardy">
@ -3195,7 +3195,7 @@
<dataarea name="flop" size="163840">
<rom name="robothief (1991) (steve pitman software) [a1].dsk" size="163840" crc="8df50a33" sha1="69fde2a68c6c22ae268a209bc9054f6e7206c541" offset="0" />
</dataarea>
</part>
</part>
</software>
<software name="rubychal">
@ -3450,12 +3450,12 @@
</part>
</software>
<!-- From NIAD's blog:
The original prototype/demo/unreleased version as was obtained from Epyx was indeed buggy, but this mainly dealt with the
inability to get it working on a disk, it was originally supplied on data pack, the save feature was a mess and there were a
number of menu (especially at the start of the game) that were messed up. A programmer by the name of Joe Waters spent
considerable time fixing these issues or most of them to get it to the state we now know. He actually lived in Albuquerque and
released software for the ADAM under the Federation Software label and did the Temple hack and some others under the
<!-- From NIAD's blog:
The original prototype/demo/unreleased version as was obtained from Epyx was indeed buggy, but this mainly dealt with the
inability to get it working on a disk, it was originally supplied on data pack, the save feature was a mess and there were a
number of menu (especially at the start of the game) that were messed up. A programmer by the name of Joe Waters spent
considerable time fixing these issues or most of them to get it to the state we now know. He actually lived in Albuquerque and
released software for the ADAM under the Federation Software label and did the Temple hack and some others under the
Falcon Federation Hack Group (or something like that) label.
-->
<software name="apshai">
@ -4000,7 +4000,7 @@
</software>
<!-- EOS Graphics Design -->
<software name="adamgfx">
<description>ADAM Graphics</description>
<year>199?</year>
@ -5421,7 +5421,7 @@
</software>
<!-- EOS Productivity -->
<software name="atgradeb">
<description>A-Tech Gradebook</description>
<year>198?</year>
@ -5433,7 +5433,7 @@
</dataarea>
</part>
</software>
<software name="atgradeba" cloneof="atgradeb">
<description>A-Tech Gradebook (Alt)</description>
<year>198?</year>
@ -5467,7 +5467,7 @@
<dataarea name="flop" size="163840">
<rom name="adam agenda - the personal schedule keeper (198x) (jeff harris) [a1].dsk" size="163840" crc="057fd444" sha1="21b76438a43a4e19a1b996789f2073cf25654a19" offset="0" />
</dataarea>
</part>
</part>
</software>
<software name="fbanalyz">
@ -7231,7 +7231,7 @@
<!-- EOS Programming -->
<software name="adambas">
<description>ADAM Basic (v1.6)</description>
<year>198?</year>
@ -7842,7 +7842,7 @@
</dataarea>
</part>
</software>
<software name="smartlog">
<description>SmartLOGO</description>
<year>1984</year>
@ -7854,7 +7854,7 @@
</dataarea>
</part>
</software>
<software name="smartloga" cloneof="smartlog">
<description>SmartLOGO (Alt)</description>
<year>1984</year>
@ -7866,7 +7866,7 @@
</dataarea>
</part>
</software>
<software name="smartlogb" cloneof="smartlog">
<description>SmartLOGO (Alt 2)</description>
<year>1984</year>
@ -8015,7 +8015,7 @@
</dataarea>
</part>
</software>
<software name="anetdata">
<description>A-Net ADAM BBS - Data Files</description>
<year>1990</year>
@ -9816,7 +9816,7 @@
<dataarea name="flop" size="163840">
<rom name="turbodisk v1.0 (1987) (digital express inc.) [a1].dsk" size="163840" crc="bf60a7bb" sha1="ca04851345a882589f1b8d97b11df1643ad4e947" offset="0" />
</dataarea>
</part>
</part>
</software>
<software name="turbload">
@ -9936,7 +9936,7 @@
<dataarea name="flop" size="163840">
<rom name="xrampak i (1987) (digital express inc.) [a1].dsk" size="163840" crc="dc40400b" sha1="aeebdcf76d6fd369fe1720b0a57a48089ac8e050" offset="0" />
</dataarea>
</part>
</part>
</software>
<!-- EOS Public Domain - ADAMLand -->
@ -9966,7 +9966,7 @@
</software>
<!-- EOS Public Domain - ADAM Users Group -->
<software name="augutils">
<description>A.U.G. - Utilities</description>
<year>198?</year>
@ -12328,7 +12328,7 @@
</software>
<!-- EOS Public Domain - Nibbles & Bits -->
<software name="nbbas01">
<description>N&amp;B - Basic Vol. #01</description>
<year>198?</year>
@ -13582,7 +13582,7 @@
</software>
<!-- EOS Public Domain - Puget Sound ADAM Network -->
<software name="psanutil">
<description>P.S.A.N. - Utilities</description>
<year>198?</year>
@ -13807,7 +13807,7 @@
</software>
<!-- CP/M Drivers -->
<software name="evecpm">
<description>EVE CP/M Utilities</description>
<year>198?</year>
@ -13846,7 +13846,7 @@
<!-- CP/M Games -->
<!-- This is a collection of Scott Adams' adventures -->
<!-- This is a collection of Scott Adams' adventures -->
<software name="adventur">
<description>Adventure (Scott Adams)</description>
<year>198?</year>
@ -14269,7 +14269,7 @@
</software>
<!-- CP/M Public Domain - Misc -->
<software name="cpmpd01">
<description>CP-M 2.2 or T-DOS P.D. Vol. #01</description>
<year>198?</year>
@ -14331,7 +14331,7 @@
</software>
<!-- CP/M Public Domain - Northern Illiana ADAM User's Group -->
<software name="cndv01">
<description>N.I.A.D. - CP/M CNDV #01</description>
<year>198?</year>
@ -15111,7 +15111,7 @@
</software>
<!-- CP/M PrintMaster Artwork -->
<software name="printm01">
<description>PrintMaster Artwork - ADAMGR01</description>
<year>198?</year>
@ -15869,7 +15869,7 @@
</software>
<!-- CP/M Productivity -->
<software name="abovepls">
<description>Above Plus</description>
<year>198?</year>
@ -16046,7 +16046,7 @@
</software>
<!-- CP/M Programming -->
<software name="dazzstar">
<description>DazzleStar Disassembler</description>
<year>1986</year>
@ -16194,7 +16194,7 @@
</software>
<!-- CP/M Utilities -->
<software name="1kutils">
<description>1K Utilities</description>
<year>198?</year>
@ -16256,7 +16256,7 @@
</software>
<!-- ADAM News Network -->
<software name="ann9103">
<description>ANN Disk - 1991-03 - E.O.S. Files</description>
<year>1991</year>

4
hash/apollo_ctape.xml
View File

@ -3,8 +3,8 @@
<!-- Domain/OS Known Undumped Versions (from http://www.hpmuseum.net/exhibit.php?swc=24)
Domain/OS SR10.3 (1990) Product Number 018847 + 018848
Domain/OS Quarterly PSK Q3-91 SR10.3 (1991) Product Number 19437 + 19439
Domain/OS SR10.3 (1990) Product Number 018847 + 018848
Domain/OS Quarterly PSK Q3-91 SR10.3 (1991) Product Number 19437 + 19439
-->

12
hash/archimedes.xml
View File

@ -786,7 +786,7 @@ Zelanites: The Onslaught by Micro Power (RiscOS2)
<dataarea name="flop" size="819200">
<rom name="enigma (1993)(archimedes world)[a].adf" size="819200" crc="9277d658" sha1="2bdd2d1f53ee5f359f12adb8b20e915d12978de0" offset="0" />
</dataarea>
</part>
</part>
</software>
<software name="enigmab" cloneof="enigma" supported="no">
@ -1075,7 +1075,7 @@ Zelanites: The Onslaught by Micro Power (RiscOS2)
<dataarea name="flop" size="819200">
<rom name="mad professor mariarti (1990)(krisalis)[a].adf" size="819200" crc="020e0e93" sha1="e64f832705c6923edcec7e85df4cceafe30b817e" offset="0" />
</dataarea>
</part>
</part>
</software>
<software name="mariartib" cloneof="mariarti" supported="no">
@ -1504,7 +1504,7 @@ Zelanites: The Onslaught by Micro Power (RiscOS2)
<dataarea name="flop" size="819200">
<rom name="super pool (1991)(fourth dimension)[a].adf" size="819200" crc="8fa28978" sha1="10d451076f38ab48e4b9bd754fdcb4c634935c36" offset="0" />
</dataarea>
</part>
</part>
</software>
<software name="suprpoolb" cloneof="suprpool" supported="no">
@ -1769,7 +1769,7 @@ Zelanites: The Onslaught by Micro Power (RiscOS2)
</dataarea>
</part>
</software>
<!-- Other disks to sort (homebrew?!?) -->
@ -2001,7 +2001,7 @@ Zelanites: The Onslaught by Micro Power (RiscOS2)
<dataarea name="flop" size="819200">
<rom name="hacker, the v3.05 (1993)(doggysoft)[a].adf" size="819200" crc="c6a88514" sha1="b02d6495f6a9a1099cb06cac7d0e0d1756f175a0" offset="0" />
</dataarea>
</part>
</part>
</software>
<software name="hackerb" cloneof="hacker" supported="no">
@ -2213,7 +2213,7 @@ Zelanites: The Onslaught by Micro Power (RiscOS2)
<dataarea name="flop" size="820224">
<rom name="acorn archimedes risc os application suite v1.00 (19xx)(acorn)(disk 2 of 2)[req risc os].adf" size="820224" crc="d5fdf2ca" sha1="bfc96eff8cab5b61f6db82dd135dd95b32f40d4f" offset="0" />
</dataarea>
</part>
</part>
</software>
<software name="riscappsa" cloneof="riscapps" supported="no">

2
hash/gamate.xml
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@ -1,7 +1,7 @@
<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<!--
<!--
Undumped carts, based on Wikipedia list
C1010 - Bump N' Run (Unreleased?)
C1016 - Volcano Panic

2
hash/mtx_cass.xml
View File

@ -3,7 +3,7 @@
<softwarelist name="mtx_cass" description="Memotech MTX cassettes">
<!--
<!--
TODO: find out why the driver does not recognize the program on the tapes...
-->

4
hash/n64.xml
View File

@ -3109,8 +3109,8 @@ Info on N64 chip labels (from The Cart Scan Repository)
<!--
Note from marshallh about the dongle present in the Rare proto/demo above
"The dongle is a pass-through, except that there is an Altera
MAX7000 series CPLD intercepting the AD16 bus. This lets
all normal bus transactions through, but in the special case
MAX7000 series CPLD intercepting the AD16 bus. This lets
all normal bus transactions through, but in the special case
mentioned below, takes control of the bus and gives its own data."
We currently don't emulate this, and thus we include also versions where the dongle checks have been

4
hash/neogeo.xml
View File

@ -438,7 +438,7 @@
<dataarea name="mcu" size="0x2000">
<!-- Hitachi HD6301V1 MCU -->
<rom offset="0x000000" size="0x02000" name="rhcom.bin" crc="e5cd6306" sha1="f6bbb8ae562804d67e137290c765c3589fa334c0" />
<!-- dumped from a prototype with external ROM, not 100% confirmed as being the same on a final, or other games (lbowling, trally) -->
<!-- dumped from a prototype with external ROM, not 100% confirmed as being the same on a final, or other games (lbowling, trally) -->
</dataarea>
<dataarea name="fixed" size="0x040000">
<rom offset="0x000000" size="0x020000" name="006-s1.s1" crc="eb5189f0" sha1="0239c342ea62e73140a2306052f226226461a478" />
@ -491,7 +491,7 @@
<dataarea name="mcu" size="0x2000">
<!-- Hitachi HD6301V1 MCU -->
<rom offset="0x000000" size="0x02000" name="rhcom.bin" crc="e5cd6306" sha1="f6bbb8ae562804d67e137290c765c3589fa334c0" />
<!-- dumped from a prototype with external ROM, not 100% confirmed as being the same on a final, or other games (lbowling, trally) -->
<!-- dumped from a prototype with external ROM, not 100% confirmed as being the same on a final, or other games (lbowling, trally) -->
</dataarea>
<dataarea name="fixed" size="0x040000">
<rom offset="0x000000" size="0x020000" name="006-s1.s1" crc="eb5189f0" sha1="0239c342ea62e73140a2306052f226226461a478" />

6
hash/nes.xml
View File

@ -76632,7 +76632,7 @@ be better to redump them properly. -->
<year>19??</year>
<publisher>&lt;pirate&gt;</publisher>
<part name="cart" interface="nes_cart">
<feature name="slot" value="bmc_hik300" /> <!-- mapper says 217 but it's not gc6in1 either! -->
<feature name="slot" value="bmc_hik300" /> <!-- mapper says 217 but it's not gc6in1 either! -->
<dataarea name="chr" size="65536">
<rom name="500-in-1 (anim splash, no rev, alt mapper)[p1][!].chr" size="65536" crc="25bdd64a" sha1="1f95eaf20fec9058b6917aa47dbdcec4b7a5b87d" offset="00000" status="baddump" />
</dataarea>
@ -76647,7 +76647,7 @@ be better to redump them properly. -->
<year>19??</year>
<publisher>&lt;pirate&gt;</publisher>
<part name="cart" interface="nes_cart">
<feature name="slot" value="bmc_hik300" /> <!-- mapper says 217 but it's not gc6in1 either! -->
<feature name="slot" value="bmc_hik300" /> <!-- mapper says 217 but it's not gc6in1 either! -->
<dataarea name="chr" size="65536">
<rom name="500-in-1 (static splash, no rev, alt mapper)[p1][!].chr" size="65536" crc="e7dacb8a" sha1="ece1b9c7fd8be955a1df6c8505533b4fac194eeb" offset="00000" status="baddump" />
</dataarea>
@ -77576,7 +77576,7 @@ be better to redump them properly. -->
<year>19??</year>
<publisher>&lt;pirate&gt;</publisher>
<part name="cart" interface="nes_cart">
<feature name="slot" value="bmc_hik300" /> <!-- mapper says 217 but it's not gc6in1 either! -->
<feature name="slot" value="bmc_hik300" /> <!-- mapper says 217 but it's not gc6in1 either! -->
<dataarea name="chr" size="65536">
<rom name="9999999-in-1 (static splash, no rev, alt mapper)[p1][!].chr" size="65536" crc="25bdd64a" sha1="1f95eaf20fec9058b6917aa47dbdcec4b7a5b87d" offset="00000" status="baddump" />
</dataarea>

2
hash/pico.xml
View File

@ -736,7 +736,7 @@ Published by Others (T-yyy*** serial codes, for yyy depending on the publisher)
<publisher>Samsung</publisher>
<info name="serial" value="T-102021-08 ~ PICO-9507S"/>
<part name="cart" interface="pico_cart">
<feature name="pcb" value="??" /> <!-- non-Sega PCB, probably by Samsung -->
<feature name="pcb" value="??" /> <!-- non-Sega PCB, probably by Samsung -->
<feature name="ic1" value="PICO-9507S" />
<dataarea name="rom" size="524288">
<rom name="pico-9507s.ic1" size="524288" crc="042520ce" sha1="5dd748a1bdfc661d0b96f6a1d26babc6a0ae7f2d" offset="000000" loadflag="load16_word_swap" />

6
hash/sms.xml
View File

@ -868,9 +868,9 @@
</software>
<!--
The labelling of Hi-Com multigame carts is arbitrary. The boxes appears to what was intended as unique product number
but boxes are typically mixed up and patched with stickers added to change game titles (on both boxes and cartridges)
making the product number rather unreliable AND realistically we may never find out the correct numbers.
The labelling of Hi-Com multigame carts is arbitrary. The boxes appears to what was intended as unique product number
but boxes are typically mixed up and patched with stickers added to change game titles (on both boxes and cartridges)
making the product number rather unreliable AND realistically we may never find out the correct numbers.
-->
<software name="hicom3a">
<description>The Best Game Collection - Hang On + Pit Pot + Spy vs Spy (Kor)</description>

122
hash/vz_cass.xml
View File

@ -5,67 +5,67 @@
List of known tape releases by Dick Smith in Australia:
X-7274 Attack of the Killer Tomatoes
X-7231 Match Box
X-7232 Poker
X-7233 Hangman
X-7234 Slot Machine/Knock Off/Russian Roulette
X-7235 Blackjack
X-7236 Circus (*)
X-7237 Biorhythm/Pair Matching/Calendar
X-7238 Horse Race
X-7239 Invaders (*)
X-7240 Dynasty Derby
X-7241 Learjet
X-7242 Ghost Hunter (*)
X-7243 Hoppy (*)
X-7244 Super Snake
X-7245 Knights and Dragons
X-7247 Star Blaster (*)
X-7248 VZ-Asteroids
X-7249 Air Traffic Controller
X-7250 Lunar Lander
X-7251 Statistics 1
X-7252 Statistics 2
X-7253 Matrix
X-7254 Tennis Lesson/Golf Lesson
X-7255 Introduction to BASIC
X-7256 Elementary Geometry
X-7257 Speed Reading
X-7258 Typing Teacher
X-7259 Mailing List
X-7261 Portfolio Management
X-7262 Discounted Cash Flow Analysis
X-7263 Financial Ratio Analysis
X-7264 Tennis (*)
X-7265 Checkers
X-7266 Planet Patrol (*)
X-7268 Ladder Challenge (*)
X-7270 Panik (*)
X-7271 Othello
X-7272 Dracula's Castle
X-7273 Backgammon
X-7275 VZ Chess (*)
X-7276 Music Writer
X-7278 Disassembler
X-7279 Duel
X-7280 Hex Utilities
X-7281 Word Processor
X-7282 Editor Assembler
X-7285 Spell'O'Matic 1 & 2
X-7286 Spell'O'Matic 3 & 4
X-7287 Flashword 1 & 2
X-7288 Flashword 3 & 4
X-7289 Metric Spycatcher
X-7290 Whizkid Spycatcher
X-7330 Sprite Generator
X-7331 Formula One
X-7332 Galaxon (*)
X-7333 Dawn Patrol (*)
X-7339 Space RAM
X-7342 Crash
X-7344 Maze of Argon
X-7345 Word Matching
X-7274 Attack of the Killer Tomatoes
X-7231 Match Box
X-7232 Poker
X-7233 Hangman
X-7234 Slot Machine/Knock Off/Russian Roulette
X-7235 Blackjack
X-7236 Circus (*)
X-7237 Biorhythm/Pair Matching/Calendar
X-7238 Horse Race
X-7239 Invaders (*)
X-7240 Dynasty Derby
X-7241 Learjet
X-7242 Ghost Hunter (*)
X-7243 Hoppy (*)
X-7244 Super Snake
X-7245 Knights and Dragons
X-7247 Star Blaster (*)
X-7248 VZ-Asteroids
X-7249 Air Traffic Controller
X-7250 Lunar Lander
X-7251 Statistics 1
X-7252 Statistics 2
X-7253 Matrix
X-7254 Tennis Lesson/Golf Lesson
X-7255 Introduction to BASIC
X-7256 Elementary Geometry
X-7257 Speed Reading
X-7258 Typing Teacher
X-7259 Mailing List
X-7261 Portfolio Management
X-7262 Discounted Cash Flow Analysis
X-7263 Financial Ratio Analysis
X-7264 Tennis (*)
X-7265 Checkers
X-7266 Planet Patrol (*)
X-7268 Ladder Challenge (*)
X-7270 Panik (*)
X-7271 Othello
X-7272 Dracula's Castle
X-7273 Backgammon
X-7275 VZ Chess (*)
X-7276 Music Writer
X-7278 Disassembler
X-7279 Duel
X-7280 Hex Utilities
X-7281 Word Processor
X-7282 Editor Assembler
X-7285 Spell'O'Matic 1 & 2
X-7286 Spell'O'Matic 3 & 4
X-7287 Flashword 1 & 2
X-7288 Flashword 3 & 4
X-7289 Metric Spycatcher
X-7290 Whizkid Spycatcher
X-7330 Sprite Generator
X-7331 Formula One
X-7332 Galaxon (*)
X-7333 Dawn Patrol (*)
X-7339 Space RAM
X-7342 Crash
X-7344 Maze of Argon
X-7345 Word Matching
* = dumped

3
src/emu/bus/centronics/epson_lx810l.c
View File

@ -176,7 +176,7 @@ static MACHINE_CONFIG_FRAGMENT( epson_lx810l )
MCFG_STEPPER_END_INDEX(24)
MCFG_STEPPER_INDEX_PATTERN(0x00)
MCFG_STEPPER_INIT_PHASE(2)
MACHINE_CONFIG_END
//-------------------------------------------------
@ -345,7 +345,6 @@ epson_ap2000_t::epson_ap2000_t(const machine_config &mconfig, const char *tag, d
void epson_lx810l_t::device_start()
{
}

4
src/emu/bus/ieee488/c8050fdc.c
View File

@ -20,10 +20,10 @@
#define LOG 1
#define GCR_DECODE(_e, _i) \
((BIT(_e, 6) << 7) | (BIT(_i, 7) << 6) | (_e & 0x33) | (BIT(_e, 2) << 3) | (_i & 0x04))
((BIT(_e, 6) << 7) | (BIT(_i, 7) << 6) | (_e & 0x33) | (BIT(_e, 2) << 3) | (_i & 0x04))
#define GCR_ENCODE(_e, _i) \
((_e & 0xc0) << 2 | (_i & 0x80) | (_e & 0x3c) << 1 | (_i & 0x04) | (_e & 0x03))
((_e & 0xc0) << 2 | (_i & 0x80) | (_e & 0x3c) << 1 | (_i & 0x04) | (_e & 0x03))

4
src/emu/bus/isa/cga.c
View File

@ -365,7 +365,7 @@ void isa8_cga_device::device_start()
astring tempstring;
m_chr_gen_base = memregion(subtag(tempstring, "gfx1"))->base();
m_chr_gen = m_chr_gen_base + m_chr_gen_offset[1];
save_item(NAME(m_framecnt));
save_item(NAME(m_mode_control));
save_item(NAME(m_color_select));
@ -374,7 +374,7 @@ void isa8_cga_device::device_start()
save_item(NAME(m_vsync));
save_item(NAME(m_hsync));
save_item(NAME(m_vram));
save_item(NAME(m_plantronics));
save_item(NAME(m_plantronics));
}

4
src/emu/bus/isa/sc499.h
View File

@ -28,13 +28,13 @@ class sc499_ctape_image_device : public device_t, public device_image_interface
public:
// construction/destruction
sc499_ctape_image_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// image-level overrides
virtual bool call_load();
virtual bool call_softlist_load(software_list_device &swlist, const char *swname, const rom_entry *start_entry) { return load_software(swlist, swname, start_entry); }
virtual void call_unload();
virtual iodevice_t image_type() const { return IO_MAGTAPE; }
virtual bool is_readable() const { return 1; }
virtual bool is_writeable() const { return 1; }
virtual bool is_creatable() const { return 1; }

6
src/emu/bus/sega8/rom.c
View File

@ -899,17 +899,17 @@ WRITE8_MEMBER(sega8_janggun_device::write_mapper)
/*-------------------------------------------------
Hi-Com X-in-1 cart, uses writes to 0xffff to
change program bank in 0x0000-0x7fff
-------------------------------------------------*/
READ8_MEMBER(sega8_hicom_device::read_cart)
{
if (offset >= 0x8000)
return m_rom[offset & 0x3fff];
return m_rom[(m_rom_bank_base * 0x8000) + offset];
}

8
src/emu/bus/sega8/rom.h
View File

@ -318,17 +318,17 @@ class sega8_hicom_device : public sega8_rom_device
public:
// construction/destruction
sega8_hicom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// device-level overrides
virtual void device_start() { save_item(NAME(m_rom_bank_base)); }
virtual void late_bank_setup();
// reading and writing
virtual DECLARE_READ8_MEMBER(read_cart);
virtual DECLARE_WRITE8_MEMBER(write_cart) {}
virtual DECLARE_WRITE8_MEMBER(write_mapper);
protected:
UINT8 m_rom_bank_base;
};

1
src/emu/cpu/arc/arc.c
View File

@ -99,7 +99,6 @@ void arc_device::device_reset()
void arc_device::execute_set_input(int irqline, int state)
{
}

4
src/emu/cpu/arc/arcdasm.c
View File

@ -68,7 +68,7 @@ static const char *conditions[0x20] =
/* 03 */ "PL", // (aka P - Positive)
/* 04 */ "MI", // (aka N - Negative)
/* 05 */ "CS", // (aka C, LO - Carry set / Lower than) (unsigned)
/* 06 */ "CC", // (aka CC, NC, HS - Carry Clear / Higher or Same) (unsigned)
/* 06 */ "CC", // (aka CC, NC, HS - Carry Clear / Higher or Same) (unsigned)
/* 07 */ "VS", // (aka V - Overflow set)
/* 08 */ "VC", // (aka NV - Overflow clear)
/* 09 */ "GT", // ( - Greater than) (signed)
@ -204,7 +204,7 @@ CPU_DISASSEMBLE(arc)
case 0x05: // BL
print("%s(%s)(%s) %08x", basic[opcode], conditions[ARC_CONDITION], delaytype[ARC_BRANCH_DELAY], (ARC_BRANCH_ADDR<<2)+pc+4);
break;
case 0x08: // ADD
// todo, short / long immediate formats
print("%s %s , %s , %s (%08x)", basic[opcode], regnames[ARC_REGOP_DEST], regnames[ARC_REGOP_OP1], regnames[ARC_REGOP_OP2], op &~ 0xfffffe00);

3
src/emu/cpu/arcompact/arcompact.c
View File

@ -164,9 +164,8 @@ void arcompact_device::device_reset()
/*****************************************************************************/
void arcompact_device::execute_set_input(int irqline, int state)
{
}

69
src/emu/cpu/arcompact/arcompact.h
View File

@ -21,16 +21,15 @@
ARCOMPACT_RETTYPE arcompact_handle##name##_p11(OPS_32) \
{ \
int M = (op & 0x00000020) >> 5; \
\
\
switch (M) \
{ \
case 0x00: return arcompact_handle##name##_p11_m0(PARAMS); \
case 0x01: return arcompact_handle##name##_p11_m1(PARAMS); \
} \
\
\
return 0; \
}; \
};
#define ARCOMPACT_HANDLER04_TYPE(name) \
ARCOMPACT_RETTYPE arcompact_handle##name(OPS_32) \
{ \
@ -45,8 +44,7 @@ ARCOMPACT_RETTYPE arcompact_handle##name(OPS_32) \
} \
\
return 0; \
}; \
};
#define ARCOMPACT_HANDLER04_TYPE_PM(name) \
ARCOMPACT_RETTYPE arcompact_handle##name##_p00(OPS_32); \
@ -55,8 +53,7 @@ ARCOMPACT_RETTYPE arcompact_handle##name(OPS_32) \
ARCOMPACT_RETTYPE arcompact_handle##name##_p11_m0(OPS_32); \
ARCOMPACT_RETTYPE arcompact_handle##name##_p11_m1(OPS_32); \
ARCOMPACT_HANDLER04_P11_TYPE(name); \
ARCOMPACT_HANDLER04_TYPE(name); \
ARCOMPACT_HANDLER04_TYPE(name);
class arcompact_device : public cpu_device
{
@ -146,53 +143,53 @@ protected:
ARCOMPACT_RETTYPE arcompact_handle01_01_01_0f(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle02(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle03(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_00(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_00(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_01(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_02(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_02(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_03(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_04(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_05(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_06(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_07(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_04(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_05(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_06(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_07(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_08(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_09(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_0a(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_0a(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_0b(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_0c(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_0d(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_0e(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_0f(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_0e(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_0f(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_10(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_11(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_12(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_13(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_14(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_15(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_16(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_17(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_18(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_19(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_13(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_14(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_15(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_16(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_17(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_18(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_19(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_1a(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_1b(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_1c(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_1d(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_20(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_20(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_21(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_22(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_23(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_28(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_29(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2a(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_2b(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_2b(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_00(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_01(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_2f_02(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_2f_02(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_03(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_04(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_05(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_06(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_2f_07(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_2f_08(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_2f_07(OPS_32);
// ARCOMPACT_RETTYPE arcompact_handle04_2f_08(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_09(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_0a(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_0b(OPS_32);
@ -779,9 +776,9 @@ protected:
ARCOMPACT_HANDLER04_TYPE_PM(04_14);
ARCOMPACT_HANDLER04_TYPE_PM(04_15);
ARCOMPACT_HANDLER04_TYPE_PM(04_16);
ARCOMPACT_HANDLER04_TYPE_PM(04_17);
ARCOMPACT_HANDLER04_TYPE_PM(04_17);
ARCOMPACT_HANDLER04_TYPE_PM(04_18);
ARCOMPACT_HANDLER04_TYPE_PM(04_19);
ARCOMPACT_HANDLER04_TYPE_PM(04_19);
ARCOMPACT_HANDLER04_TYPE_PM(04_20);
ARCOMPACT_HANDLER04_TYPE_PM(04_2b);
@ -811,10 +808,10 @@ private:
inline UINT32 READ32(UINT32 address) { return m_program->read_dword(address << 2); }
inline void WRITE32(UINT32 address, UINT32 data) { m_program->write_dword(address << 2, data); }
inline UINT16 READ16(UINT32 address) { return m_program->read_word(address << 1); }
inline void WRITE16(UINT32 address, UINT16 data){ m_program->write_word(address << 1, data); }
inline void WRITE16(UINT32 address, UINT16 data){ m_program->write_word(address << 1, data); }
inline UINT8 READ8(UINT32 address) { return m_program->read_byte(address << 0); }
inline void WRITE8(UINT32 address, UINT8 data){ m_program->write_byte(address << 0, data); }
inline void WRITE8(UINT32 address, UINT8 data){ m_program->write_byte(address << 0, data); }
inline UINT64 READAUX(UINT64 address) { return m_io->read_dword(address *4); }
inline void WRITEAUX(UINT64 address, UINT32 data) { m_io->write_dword(address *4, data); }
@ -827,7 +824,7 @@ private:
int m_delaylinks;
UINT32 m_delayjump;
// f e d c| b a 9 8| 7 6 5 4| 3 2 1 0
// f e d c| b a 9 8| 7 6 5 4| 3 2 1 0
// - - - L| Z N C V| U DE AE A2|A1 E2 E1 H
UINT32 m_status32;
@ -862,7 +859,7 @@ private:
#define STATUS32_CHECK_Z (m_status32 & Z_ZERO_FLAG)
// Condition 0x0c (LE)
#define CONDITION_LE ((STATUS32_CHECK_Z) || (STATUS32_CHECK_N && !STATUS32_CHECK_V) || (!STATUS32_CHECK_N && STATUS32_CHECK_V)) // Z or (N and /V) or (/N and V)
#define CONDITION_LE ((STATUS32_CHECK_Z) || (STATUS32_CHECK_N && !STATUS32_CHECK_V) || (!STATUS32_CHECK_N && STATUS32_CHECK_V)) // Z or (N and /V) or (/N and V)
#define CONDITION_EQ (STATUS32_CHECK_Z)
#define CONDITION_CS (STATUS32_CHECK_C)
#define CONDITION_LT ((STATUS32_CHECK_N && !STATUS32_CHECK_V) || (!STATUS32_CHECK_N && STATUS32_CHECK_V))

13
src/emu/cpu/arcompact/arcompact_common.c
View File

@ -4,7 +4,7 @@
\*********************************/
// condition codes (basic ones are the same as arc
// condition codes (basic ones are the same as arc
const char *conditions[0x20] =
{
/* 00 */ "AL", // (aka RA - Always)
@ -13,7 +13,7 @@ const char *conditions[0x20] =
/* 03 */ "PL", // (aka P - Positive)
/* 04 */ "MI", // (aka N - Negative)
/* 05 */ "CS", // (aka C, LO - Carry set / Lower than) (unsigned)
/* 06 */ "CC", // (aka CC, NC, HS - Carry Clear / Higher or Same) (unsigned)
/* 06 */ "CC", // (aka CC, NC, HS - Carry Clear / Higher or Same) (unsigned)
/* 07 */ "VS", // (aka V - Overflow set)
/* 08 */ "VC", // (aka NV - Overflow clear)
/* 09 */ "GT", // ( - Greater than) (signed)
@ -44,7 +44,7 @@ const char *conditions[0x20] =
#define UNUSED_REG "unusedreg"
#define AUX_UNUSED_16 \
/* 0xxx0 */ UNUSED_REG, /* 0xxx1 */ UNUSED_REG, /* 0xxx2 */ UNUSED_REG, /* 0xxx3 */ UNUSED_REG, /* 0xxx4 */ UNUSED_REG, /* 0xxx5 */ UNUSED_REG, /* 0xxx6 */ UNUSED_REG, /* 0xxx7 */ UNUSED_REG, /* 0xxx8 */ UNUSED_REG, /* 0xxx9 */ UNUSED_REG, /* 0xxxa */ UNUSED_REG, /* 0xxxb */ UNUSED_REG, /* 0xxxc */ UNUSED_REG, /* 0xxxd */ UNUSED_REG, /* 0xxxe */ UNUSED_REG, /* 0xxxf */ UNUSED_REG,
/* 0xxx0 */ UNUSED_REG, /* 0xxx1 */ UNUSED_REG, /* 0xxx2 */ UNUSED_REG, /* 0xxx3 */ UNUSED_REG, /* 0xxx4 */ UNUSED_REG, /* 0xxx5 */ UNUSED_REG, /* 0xxx6 */ UNUSED_REG, /* 0xxx7 */ UNUSED_REG, /* 0xxx8 */ UNUSED_REG, /* 0xxx9 */ UNUSED_REG, /* 0xxxa */ UNUSED_REG, /* 0xxxb */ UNUSED_REG, /* 0xxxc */ UNUSED_REG, /* 0xxxd */ UNUSED_REG, /* 0xxxe */ UNUSED_REG, /* 0xxxf */ UNUSED_REG,
// the Auxiliary Register set is actually a 2^32 dword address space (so 16 GB / 34-bit)
// this table just allows us to improve the debugger display for some of the common core / internal ones
@ -125,7 +125,7 @@ const char *auxregnames[0x420] =
AUX_UNUSED_16 /* 0x090 - 0x09f */
AUX_UNUSED_16 /* 0x0a0 - 0x0af */
AUX_UNUSED_16 /* 0x0b0 - 0x0bf */
// build configuration registers 0x0c0 - 0x0ff
// build configuration registers 0x0c0 - 0x0ff
/* 0x0c0 */ "RESERVED AUX 0xc0",/* 0x0c1 */ "RESERVED AUX 0xc1",/* 0x0c2 */ "RESERVED AUX 0xc2",/* 0x0c3 */ "RESERVED AUX 0xc3",/* 0x0c4 */ "RESERVED AUX 0xc4",/* 0x0c5 */ "RESERVED AUX 0xc5",/* 0x0c6 */ "RESERVED AUX 0xc6",/* 0x0c7 */ "RESERVED AUX 0xc7",/* 0x0c8 */ "RESERVED AUX 0xc8",/* 0x0c9 */ "RESERVED AUX 0xc9",/* 0x0ca */ "RESERVED AUX 0xca",/* 0x0cb */ "RESERVED AUX 0xcb",/* 0x0cc */ "RESERVED AUX 0xcc",/* 0x0cd */ "RESERVED AUX 0xcd",/* 0x0ce */ "RESERVED AUX 0xce",/* 0x0cf */ "RESERVED AUX 0xcf",
/* 0x0d0 */ "RESERVED AUX 0xd0",/* 0x0d1 */ "RESERVED AUX 0xd1",/* 0x0d2 */ "RESERVED AUX 0xd2",/* 0x0d3 */ "RESERVED AUX 0xd3",/* 0x0d4 */ "RESERVED AUX 0xd4",/* 0x0d5 */ "RESERVED AUX 0xd5",/* 0x0d6 */ "RESERVED AUX 0xd6",/* 0x0d7 */ "RESERVED AUX 0xd7",/* 0x0d8 */ "RESERVED AUX 0xd8",/* 0x0d9 */ "RESERVED AUX 0xd9",/* 0x0da */ "RESERVED AUX 0xda",/* 0x0db */ "RESERVED AUX 0xdb",/* 0x0dc */ "RESERVED AUX 0xdc",/* 0x0dd */ "RESERVED AUX 0xdd",/* 0x0de */ "RESERVED AUX 0xde",/* 0x0df */ "RESERVED AUX 0xdf",
/* 0x0e0 */ "RESERVED AUX 0xe0",/* 0x0e1 */ "RESERVED AUX 0xe1",/* 0x0e2 */ "RESERVED AUX 0xe2",/* 0x0e3 */ "RESERVED AUX 0xe3",/* 0x0e4 */ "RESERVED AUX 0xe4",/* 0x0e5 */ "RESERVED AUX 0xe5",/* 0x0e6 */ "RESERVED AUX 0xe6",/* 0x0e7 */ "RESERVED AUX 0xe7",/* 0x0e8 */ "RESERVED AUX 0xe8",/* 0x0e9 */ "RESERVED AUX 0xe9",/* 0x0ea */ "RESERVED AUX 0xea",/* 0x0eb */ "RESERVED AUX 0xeb",/* 0x0ec */ "RESERVED AUX 0xec",/* 0x0ed */ "RESERVED AUX 0xed",/* 0x0ee */ "RESERVED AUX 0xee",/* 0x0ef */ "RESERVED AUX 0xef",
@ -371,8 +371,8 @@ const char *regnames[0x40] =
/* 37 */ "r55(ext)",
/* 38 */ "r56(ext)",
/* 39 */ "r57(M-LO)", // MLO (result registers for optional multply functions)
/* 3a */ "r58(M-MID)", // MMID
/* 3b */ "r59(M-HI)", // MHI
/* 3a */ "r58(M-MID)", // MMID
/* 3b */ "r59(M-HI)", // MHI
/* 3c */ "r60(LP_COUNT)",
/* 3d */ "r61(reserved)",
/* 3e */ "r62(LIMM)", // use Long Immediate Data instead of register
@ -523,4 +523,3 @@ const char *opcodes_04[0x40] =
/* 3e */ "0x3e",
/* 3f */ "0x3f",
};

384
src/emu/cpu/arcompact/arcompact_execute.c
View File

File diff suppressed because it is too large Load Diff

66
src/emu/cpu/arcompact/arcompactdasm.c
View File

@ -41,48 +41,48 @@ CPU_DISASSEMBLE(arcompact)
switch (instruction) // 32-bit instructions (with optional extra dword for immediate data)
{
case 0x00: size = arcompact_handle00_dasm(DASM_PARAMS); break; // Bcc
case 0x01: size = arcompact_handle01_dasm(DASM_PARAMS); break; // BLcc/BRcc
case 0x02: size = arcompact_handle02_dasm(DASM_PARAMS); break; // LD r+o
case 0x03: size = arcompact_handle03_dasm(DASM_PARAMS); break; // ST r+o
case 0x04: size = arcompact_handle04_dasm(DASM_PARAMS); break; // op a,b,c (basecase)
case 0x05: size = arcompact_handle05_dasm(DASM_PARAMS); break; // op a,b,c (05 ARC ext)
case 0x06: size = arcompact_handle06_dasm(DASM_PARAMS); break; // op a,b,c (06 ARC ext)
case 0x07: size = arcompact_handle07_dasm(DASM_PARAMS); break; // op a,b,c (07 User ext)
case 0x08: size = arcompact_handle08_dasm(DASM_PARAMS); break; // op a,b,c (08 User ext)
case 0x09: size = arcompact_handle09_dasm(DASM_PARAMS); break; // op a,b,c (09 Market ext)
case 0x0a: size = arcompact_handle0a_dasm(DASM_PARAMS); break; // op a,b,c (0a Market ext)
case 0x0b: size = arcompact_handle0b_dasm(DASM_PARAMS); break; // op a,b,c (0b Market ext)
case 0x00: size = arcompact_handle00_dasm(DASM_PARAMS); break; // Bcc
case 0x01: size = arcompact_handle01_dasm(DASM_PARAMS); break; // BLcc/BRcc
case 0x02: size = arcompact_handle02_dasm(DASM_PARAMS); break; // LD r+o
case 0x03: size = arcompact_handle03_dasm(DASM_PARAMS); break; // ST r+o
case 0x04: size = arcompact_handle04_dasm(DASM_PARAMS); break; // op a,b,c (basecase)
case 0x05: size = arcompact_handle05_dasm(DASM_PARAMS); break; // op a,b,c (05 ARC ext)
case 0x06: size = arcompact_handle06_dasm(DASM_PARAMS); break; // op a,b,c (06 ARC ext)
case 0x07: size = arcompact_handle07_dasm(DASM_PARAMS); break; // op a,b,c (07 User ext)
case 0x08: size = arcompact_handle08_dasm(DASM_PARAMS); break; // op a,b,c (08 User ext)
case 0x09: size = arcompact_handle09_dasm(DASM_PARAMS); break; // op a,b,c (09 Market ext)
case 0x0a: size = arcompact_handle0a_dasm(DASM_PARAMS); break; // op a,b,c (0a Market ext)
case 0x0b: size = arcompact_handle0b_dasm(DASM_PARAMS); break; // op a,b,c (0b Market ext)
}
}
else
{
{
size = 2;
op &= ~0xf800;
switch (instruction) // 16-bit instructions
{
case 0x0c: size = arcompact_handle0c_dasm(DASM_PARAMS); break; // Load/Add reg-reg
case 0x0d: size = arcompact_handle0d_dasm(DASM_PARAMS); break; // Add/Sub/Shft imm
case 0x0e: size = arcompact_handle0e_dasm(DASM_PARAMS); break; // Mov/Cmp/Add
case 0x0f: size = arcompact_handle0f_dasm(DASM_PARAMS); break; // op_S b,b,c (single 16-bit ops)
case 0x10: size = arcompact_handle10_dasm(DASM_PARAMS); break; // LD_S
case 0x11: size = arcompact_handle11_dasm(DASM_PARAMS); break; // LDB_S
case 0x12: size = arcompact_handle12_dasm(DASM_PARAMS); break; // LDW_S
case 0x13: size = arcompact_handle13_dasm(DASM_PARAMS); break; // LSW_S.X
case 0x14: size = arcompact_handle14_dasm(DASM_PARAMS); break; // ST_S
case 0x15: size = arcompact_handle15_dasm(DASM_PARAMS); break; // STB_S
case 0x16: size = arcompact_handle16_dasm(DASM_PARAMS); break; // STW_S
case 0x17: size = arcompact_handle17_dasm(DASM_PARAMS); break; // Shift/Sub/Bit
case 0x18: size = arcompact_handle18_dasm(DASM_PARAMS); break; // Stack Instr
case 0x19: size = arcompact_handle19_dasm(DASM_PARAMS); break; // GP Instr
case 0x1a: size = arcompact_handle1a_dasm(DASM_PARAMS); break; // PCL Instr
case 0x1b: size = arcompact_handle1b_dasm(DASM_PARAMS); break; // MOV_S
case 0x1c: size = arcompact_handle1c_dasm(DASM_PARAMS); break; // ADD_S/CMP_S
case 0x1d: size = arcompact_handle1d_dasm(DASM_PARAMS); break; // BRcc_S
case 0x1e: size = arcompact_handle1e_dasm(DASM_PARAMS); break; // Bcc_S
case 0x1f: size = arcompact_handle1f_dasm(DASM_PARAMS); break; // BL_S
case 0x0c: size = arcompact_handle0c_dasm(DASM_PARAMS); break; // Load/Add reg-reg
case 0x0d: size = arcompact_handle0d_dasm(DASM_PARAMS); break; // Add/Sub/Shft imm
case 0x0e: size = arcompact_handle0e_dasm(DASM_PARAMS); break; // Mov/Cmp/Add
case 0x0f: size = arcompact_handle0f_dasm(DASM_PARAMS); break; // op_S b,b,c (single 16-bit ops)
case 0x10: size = arcompact_handle10_dasm(DASM_PARAMS); break; // LD_S
case 0x11: size = arcompact_handle11_dasm(DASM_PARAMS); break; // LDB_S
case 0x12: size = arcompact_handle12_dasm(DASM_PARAMS); break; // LDW_S
case 0x13: size = arcompact_handle13_dasm(DASM_PARAMS); break; // LSW_S.X
case 0x14: size = arcompact_handle14_dasm(DASM_PARAMS); break; // ST_S
case 0x15: size = arcompact_handle15_dasm(DASM_PARAMS); break; // STB_S
case 0x16: size = arcompact_handle16_dasm(DASM_PARAMS); break; // STW_S
case 0x17: size = arcompact_handle17_dasm(DASM_PARAMS); break; // Shift/Sub/Bit
case 0x18: size = arcompact_handle18_dasm(DASM_PARAMS); break; // Stack Instr
case 0x19: size = arcompact_handle19_dasm(DASM_PARAMS); break; // GP Instr
case 0x1a: size = arcompact_handle1a_dasm(DASM_PARAMS); break; // PCL Instr
case 0x1b: size = arcompact_handle1b_dasm(DASM_PARAMS); break; // MOV_S
case 0x1c: size = arcompact_handle1c_dasm(DASM_PARAMS); break; // ADD_S/CMP_S
case 0x1d: size = arcompact_handle1d_dasm(DASM_PARAMS); break; // BRcc_S
case 0x1e: size = arcompact_handle1e_dasm(DASM_PARAMS); break; // Bcc_S
case 0x1f: size = arcompact_handle1f_dasm(DASM_PARAMS); break; // BL_S
}
}

47
src/emu/cpu/arcompact/arcompactdasm_dispatch.c
View File

@ -141,9 +141,9 @@ int arcompact_handle04_dasm(DASM_OPS_32)
// 00100 bbb 00 iiiiii F BBB CCCCCC A AAAAA General Operations *UN*Conditional Register to Register
// 00100 bbb 01 iiiiii F BBB UUUUUU A AAAAA General Operations *UN*Conditional Register (Unsigned 6-bit IMM)
// 00100 bbb 10 iiiiii F BBB ssssss S SSSSS General Operations *UN*Conditional Register (Signed 12-bit IMM)
// 00100 bbb 11 iiiiii F BBB CCCCCC 0 QQQQQ General Operations Conditional Register
// 00100 bbb 11 iiiiii F BBB UUUUUU 1 QQQQQ General Operations Conditional Register (Unsigned 6-bit IMM)
// 00100 bbb 11 iiiiii F BBB CCCCCC 0 QQQQQ General Operations Conditional Register
// 00100 bbb 11 iiiiii F BBB UUUUUU 1 QQQQQ General Operations Conditional Register (Unsigned 6-bit IMM)
UINT8 subinstr = (op & 0x003f0000) >> 16;
op &= ~0x003f0000;
@ -304,15 +304,15 @@ int arcompact_handle05_2f_dasm(DASM_OPS_32)
switch (subinstr2)
{
case 0x00: size = arcompact_handle05_2f_00_dasm(DASM_PARAMS); break; // SWAP
case 0x01: size = arcompact_handle05_2f_01_dasm(DASM_PARAMS); break; // NORM
case 0x00: size = arcompact_handle05_2f_00_dasm(DASM_PARAMS); break; // SWAP
case 0x01: size = arcompact_handle05_2f_01_dasm(DASM_PARAMS); break; // NORM
case 0x02: size = arcompact_handle05_2f_02_dasm(DASM_PARAMS); break; // SAT16
case 0x03: size = arcompact_handle05_2f_03_dasm(DASM_PARAMS); break; // RND16
case 0x04: size = arcompact_handle05_2f_04_dasm(DASM_PARAMS); break; // ABSSW
case 0x05: size = arcompact_handle05_2f_05_dasm(DASM_PARAMS); break; // ABSS
case 0x06: size = arcompact_handle05_2f_06_dasm(DASM_PARAMS); break; // NEGSW
case 0x07: size = arcompact_handle05_2f_07_dasm(DASM_PARAMS); break; // NEGS
case 0x08: size = arcompact_handle05_2f_08_dasm(DASM_PARAMS); break; // NORMW
case 0x03: size = arcompact_handle05_2f_03_dasm(DASM_PARAMS); break; // RND16
case 0x04: size = arcompact_handle05_2f_04_dasm(DASM_PARAMS); break; // ABSSW
case 0x05: size = arcompact_handle05_2f_05_dasm(DASM_PARAMS); break; // ABSS
case 0x06: size = arcompact_handle05_2f_06_dasm(DASM_PARAMS); break; // NEGSW
case 0x07: size = arcompact_handle05_2f_07_dasm(DASM_PARAMS); break; // NEGS
case 0x08: size = arcompact_handle05_2f_08_dasm(DASM_PARAMS); break; // NORMW
case 0x09: size = arcompact_handle05_2f_09_dasm(DASM_PARAMS); break; // illegal
case 0x0a: size = arcompact_handle05_2f_0a_dasm(DASM_PARAMS); break; // illegal
case 0x0b: size = arcompact_handle05_2f_0b_dasm(DASM_PARAMS); break; // illegal
@ -759,13 +759,13 @@ int arcompact_handle17_dasm(DASM_OPS_16)
switch (subinstr)
{
case 0x00: size = arcompact_handle17_00_dasm(DASM_PARAMS); break; // ASL_S
case 0x01: size = arcompact_handle17_01_dasm(DASM_PARAMS); break; // LSR_S
case 0x00: size = arcompact_handle17_00_dasm(DASM_PARAMS); break; // ASL_S
case 0x01: size = arcompact_handle17_01_dasm(DASM_PARAMS); break; // LSR_S
case 0x02: size = arcompact_handle17_02_dasm(DASM_PARAMS); break; // ASR_S
case 0x03: size = arcompact_handle17_03_dasm(DASM_PARAMS); break; // SUB_S
case 0x04: size = arcompact_handle17_04_dasm(DASM_PARAMS); break; // BSET_S
case 0x05: size = arcompact_handle17_05_dasm(DASM_PARAMS); break; // BCLR_S
case 0x06: size = arcompact_handle17_06_dasm(DASM_PARAMS); break; // BMSK_S
case 0x03: size = arcompact_handle17_03_dasm(DASM_PARAMS); break; // SUB_S
case 0x04: size = arcompact_handle17_04_dasm(DASM_PARAMS); break; // BSET_S
case 0x05: size = arcompact_handle17_05_dasm(DASM_PARAMS); break; // BCLR_S
case 0x06: size = arcompact_handle17_06_dasm(DASM_PARAMS); break; // BMSK_S
case 0x07: size = arcompact_handle17_07_dasm(DASM_PARAMS); break; // BTST_S
}
@ -795,7 +795,7 @@ int arcompact_handle18_dasm(DASM_OPS_16)
return size;
}
int arcompact_handle18_05_dasm(DASM_OPS_16)
int arcompact_handle18_05_dasm(DASM_OPS_16)
{
int size = 2;
UINT8 subinstr2 = (op & 0x0700) >> 8;
@ -805,7 +805,7 @@ int arcompact_handle18_05_dasm(DASM_OPS_16)
{
case 0x00: size = arcompact_handle18_05_00_dasm(DASM_PARAMS); break; // ADD_S (SP)
case 0x01: size = arcompact_handle18_05_01_dasm(DASM_PARAMS); break; // SUB_S (SP)
case 0x02: size = arcompact_handle18_05_02_dasm(DASM_PARAMS); break; // <illegal 0x18_05_02>
case 0x02: size = arcompact_handle18_05_02_dasm(DASM_PARAMS); break; // <illegal 0x18_05_02>
case 0x03: size = arcompact_handle18_05_03_dasm(DASM_PARAMS); break; // <illegal 0x18_05_03>
case 0x04: size = arcompact_handle18_05_04_dasm(DASM_PARAMS); break; // <illegal 0x18_05_04>
case 0x05: size = arcompact_handle18_05_05_dasm(DASM_PARAMS); break; // <illegal 0x18_05_05>
@ -816,7 +816,7 @@ int arcompact_handle18_05_dasm(DASM_OPS_16)
return size;
}
int arcompact_handle18_06_dasm(DASM_OPS_16)
int arcompact_handle18_06_dasm(DASM_OPS_16)
{
int size = 2;
UINT8 subinstr2 = (op & 0x001f) >> 0;
@ -861,7 +861,7 @@ int arcompact_handle18_06_dasm(DASM_OPS_16)
return size;
}
int arcompact_handle18_07_dasm(DASM_OPS_16)
int arcompact_handle18_07_dasm(DASM_OPS_16)
{
int size = 2;
UINT8 subinstr2 = (op & 0x001f) >> 0;
@ -968,7 +968,6 @@ int arcompact_handle1e_dasm(DASM_OPS_16)
int arcompact_handle1e_03_dasm(DASM_OPS_16)
{
int size = 2;
UINT8 subinstr2 = (op & 0x01c0) >> 6;
op &= ~0x01c0;
@ -976,13 +975,13 @@ int arcompact_handle1e_03_dasm(DASM_OPS_16)
switch (subinstr2)
{
case 0x00: size = arcompact_handle1e_03_00_dasm(DASM_PARAMS); break; // BGT_S
case 0x01: size = arcompact_handle1e_03_01_dasm(DASM_PARAMS); break; // BGE_S
case 0x01: size = arcompact_handle1e_03_01_dasm(DASM_PARAMS); break; // BGE_S
case 0x02: size = arcompact_handle1e_03_02_dasm(DASM_PARAMS); break; // BLT_S
case 0x03: size = arcompact_handle1e_03_03_dasm(DASM_PARAMS); break; // BLE_S
case 0x04: size = arcompact_handle1e_03_04_dasm(DASM_PARAMS); break; // BHI_S
case 0x05: size = arcompact_handle1e_03_05_dasm(DASM_PARAMS); break; // BHS_S
case 0x06: size = arcompact_handle1e_03_06_dasm(DASM_PARAMS); break; // BLO_S
case 0x07: size = arcompact_handle1e_03_07_dasm(DASM_PARAMS); break; // BLS_S
case 0x07: size = arcompact_handle1e_03_07_dasm(DASM_PARAMS); break; // BLS_S
}
return size;

3
src/emu/cpu/arcompact/arcompactdasm_dispatch.h
View File

@ -12,8 +12,7 @@
#define GET_LIMM_32 \
limm = oprom[6] | (oprom[7] << 8); \
limm |= (oprom[4] << 16) | (oprom[5] << 24); \
limm |= (oprom[4] << 16) | (oprom[5] << 24);
int arcompact_handle00_dasm(DASM_OPS_32);

260
src/emu/cpu/arcompact/arcompactdasm_ops.c
View File

@ -31,87 +31,68 @@ static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
#define GROUP_0e_GET_h \
h = ((op & 0x0007) << 3); \
h |= ((op & 0x00e0) >> 5); \
op &= ~0x00e7; \
h |= ((op & 0x00e0) >> 5); \
op &= ~0x00e7;
#define COMMON32_GET_breg \
int b_temp = (op & 0x07000000) >> 24; op &= ~0x07000000; \
int B_temp = (op & 0x00007000) >> 12; op &= ~0x00007000; \
int breg = b_temp | (B_temp << 3); \
int breg = b_temp | (B_temp << 3);
#define COMMON32_GET_creg \
int creg = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0; \
int creg = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0;
#define COMMON32_GET_u6 \
int u = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0; \
int u = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0;
#define COMMON32_GET_areg \
int areg = (op & 0x0000003f) >> 0; op &= ~0x0000003f; \
int areg = (op & 0x0000003f) >> 0; op &= ~0x0000003f;
#define COMMON32_GET_areg_reserved \
int ares = (op & 0x0000003f) >> 0; op &= ~0x0000003f; \
int ares = (op & 0x0000003f) >> 0; op &= ~0x0000003f;
#define COMMON32_GET_F \
int F = (op & 0x00008000) >> 15; op &= ~0x00008000; \
int F = (op & 0x00008000) >> 15; op &= ~0x00008000;
#define COMMON32_GET_p \
int p = (op & 0x00c00000) >> 22; op &= ~0x00c00000; \
int p = (op & 0x00c00000) >> 22; op &= ~0x00c00000;
#define COMMON32_GET_s12 \
int S_temp = (op & 0x0000003f) >> 0; op &= ~0x0000003f; \
int s_temp = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0; \
int S = s_temp | (S_temp<<6); \
int S = s_temp | (S_temp<<6);
#define COMMON32_GET_CONDITION \
UINT8 condition = op & 0x0000001f; op &= ~0x0000001f;
#define COMMON16_GET_breg \
breg = ((op & 0x0700) >>8); \
op &= ~0x0700; \
op &= ~0x0700;
#define COMMON16_GET_creg \
creg = ((op & 0x00e0) >>5); \
op &= ~0x00e0; \
op &= ~0x00e0;
#define COMMON16_GET_areg \
areg = ((op & 0x0007) >>0); \
op &= ~0x0007; \
op &= ~0x0007;
#define COMMON16_GET_u3 \
u = ((op & 0x0007) >>0); \
op &= ~0x0007; \
op &= ~0x0007;
#define COMMON16_GET_u5 \
u = ((op & 0x001f) >>0); \
op &= ~0x001f; \
op &= ~0x001f;
#define COMMON16_GET_u8 \
u = ((op & 0x00ff) >>0); \
op &= ~0x00ff; \
op &= ~0x00ff;
#define COMMON16_GET_u7 \
u = ((op & 0x007f) >>0); \
op &= ~0x007f; \
op &= ~0x007f;
#define COMMON16_GET_s9 \
s = ((op & 0x01ff) >>0); \
op &= ~0x01ff; \
op &= ~0x01ff;
// registers used in 16-bit opcodes hae a limited range
// and can only address registers r0-r3 and r12-r15
#define REG_16BIT_RANGE(_reg_) \
if (_reg_>3) _reg_+= 8; \
if (_reg_>3) _reg_+= 8;
// this is as messed up as the rest of the 16-bit alignment in LE mode...
#define GET_LIMM \
limm = oprom[4] | (oprom[5] << 8); \
limm |= (oprom[2] << 16) | (oprom[3] << 24); \
limm |= (oprom[2] << 16) | (oprom[3] << 24);
#define PC_ALIGNED32 \
(pc&0xfffffffc)
@ -163,7 +144,7 @@ int arcompact_handle01_00_00dasm(DASM_OPS_32)
// 00001 sssssssss 00 SSSSSSSSSS N QQQQQ
INT32 address = (op & 0x07fc0000) >> 17;
address |= ((op & 0x0000ffc0) >> 6) << 10;
if (address & 0x800000) address = -0x800000 + (address&0x7fffff);
if (address & 0x800000) address = -0x800000 + (address&0x7fffff);
int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
COMMON32_GET_CONDITION
@ -180,7 +161,7 @@ int arcompact_handle01_00_01dasm(DASM_OPS_32)
INT32 address = (op & 0x07fc0000) >> 17;
address |= ((op & 0x0000ffc0) >> 6) << 10;
address |= ((op & 0x0000000f) >> 0) << 20;
if (address & 0x800000) address = -0x800000 + (address&0x7fffff);
if (address & 0x800000) address = -0x800000 + (address&0x7fffff);
int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
int res = (op & 0x00000010) >> 4; op &= ~0x00000010;
@ -265,7 +246,7 @@ int arcompact_01_01_01_helper(DASM_OPS_32, const char* optext)
op &= ~0x07007fe0;
print("%s%s %s, 0x%02x %08x (%08x)", optext, delaybit[n], regnames[breg], u, PC_ALIGNED32 + (address * 2), op & ~0xf8fe800f);
return size;
}
@ -327,7 +308,7 @@ int arcompact_handle03_dasm(DASM_OPS_32)
{
int size = 4;
UINT32 limm = 0;
int got_limm = 0;
int got_limm = 0;
// bitpos
// 1111 1111 1111 1111 0000 0000 0000 0000
// fedc ba98 7654 3210 fedc ba98 7654 3210
@ -401,7 +382,7 @@ int arcompact_handle04_p00_helper_dasm(DASM_OPS_32, const char* optext, int igno
output += sprintf(output, "%s", optext);
output += sprintf(output, "%s", flagbit[F]);
// output += sprintf( output, " p(%d)", p);
// output += sprintf( output, " p(%d)", p);
if ((!b_reserved) && (breg == LIMM_REG))
@ -429,7 +410,7 @@ int arcompact_handle04_p00_helper_dasm(DASM_OPS_32, const char* optext, int igno
}
else if (ignore_dst == 1) // certain opcode types ignore the 'a' field entirely, it should be set to 0.
{
if (areg) output += sprintf(output, " <reserved %d> <-", areg);
if (areg) output += sprintf(output, " <reserved %d> <-", areg);
}
else if (ignore_dst == 2) // for multiply operations areg should always be set to LIMM
{
@ -464,7 +445,7 @@ int arcompact_handle04_p01_helper_dasm(DASM_OPS_32, const char* optext, int igno
// 0010 0bbb 01ii iiii FBBB uuuu uuAA AAAA
int size = 4;
UINT32 limm = 0;
// int got_limm = 0;
// int got_limm = 0;
COMMON32_GET_breg;
COMMON32_GET_F;
@ -473,14 +454,14 @@ int arcompact_handle04_p01_helper_dasm(DASM_OPS_32, const char* optext, int igno
output += sprintf(output, "%s", optext);
output += sprintf(output, "%s", flagbit[F]);
// output += sprintf( output, " p(%d)", p);
// output += sprintf( output, " p(%d)", p);
if ((!b_reserved) && (breg == LIMM_REG))
{
GET_LIMM_32;
size = 8;
// got_limm = 1;
// got_limm = 1;
}
// areg can be LIMM too, but in that case LIMM indicates 'no destination' rather than an actual LIMM value following
@ -492,7 +473,7 @@ int arcompact_handle04_p01_helper_dasm(DASM_OPS_32, const char* optext, int igno
}
else if (ignore_dst == 1) // certain opcode types ignore the 'a' field entirely, it should be set to 0.
{
if (areg) output += sprintf(output, " <reserved %d> <-", areg);
if (areg) output += sprintf(output, " <reserved %d> <-", areg);
}
else if (ignore_dst == 2) // for multiply operations areg should always be set to LIMM
{
@ -530,7 +511,7 @@ int arcompact_handle04_p10_helper_dasm(DASM_OPS_32, const char* optext, int b_re
output += sprintf(output, "%s", optext);
output += sprintf(output, "%s", flagbit[F]);
// output += sprintf( output, " p(%d)", p);
// output += sprintf( output, " p(%d)", p);
if (!b_reserved)
@ -570,7 +551,7 @@ int arcompact_handle04_p11_m0_helper_dasm(DASM_OPS_32, const char* optext, int b
output += sprintf(output, "%s", optext);
output += sprintf(output, "%s", flagbit[F]);
// output += sprintf( output, " p(%d)", p);
// output += sprintf( output, " p(%d)", p);
if (!b_reserved)
{
@ -594,7 +575,7 @@ int arcompact_handle04_p11_m0_helper_dasm(DASM_OPS_32, const char* optext, int b
output += sprintf(output, " Cond<%s> ", conditions[condition]);
if (creg == LIMM_REG)
{
@ -626,7 +607,7 @@ int arcompact_handle04_p11_m1_helper_dasm(DASM_OPS_32, const char* optext, int b
output += sprintf(output, "%s", optext);
output += sprintf(output, "%s", flagbit[F]);
// output += sprintf( output, " p(%d)", p);
// output += sprintf( output, " p(%d)", p);
if (!b_reserved)
{
@ -685,52 +666,52 @@ int arcompact_handle04_helper_dasm(DASM_OPS_32, const char* optext, int ignore_d
return 0;
}
int arcompact_handle04_00_dasm(DASM_OPS_32)
int arcompact_handle04_00_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "ADD", 0,0);
}
int arcompact_handle04_01_dasm(DASM_OPS_32)
{
int arcompact_handle04_01_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "ADC", 0,0);
}
int arcompact_handle04_02_dasm(DASM_OPS_32)
{
int arcompact_handle04_02_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "SUB", 0,0);
}
int arcompact_handle04_03_dasm(DASM_OPS_32)
int arcompact_handle04_03_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "SBC", 0,0);
}
int arcompact_handle04_04_dasm(DASM_OPS_32)
int arcompact_handle04_04_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "AND", 0,0);
}
int arcompact_handle04_05_dasm(DASM_OPS_32)
int arcompact_handle04_05_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "OR", 0,0);
}
int arcompact_handle04_06_dasm(DASM_OPS_32)
int arcompact_handle04_06_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "BIC", 0,0);
}
int arcompact_handle04_07_dasm(DASM_OPS_32)
int arcompact_handle04_07_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "XOR", 0,0);
}
int arcompact_handle04_08_dasm(DASM_OPS_32)
int arcompact_handle04_08_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "MAX", 0,0);
}
int arcompact_handle04_09_dasm(DASM_OPS_32)
int arcompact_handle04_09_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "MIN", 0,0);
}
@ -752,87 +733,87 @@ int arcompact_handle04_0c_dasm(DASM_OPS_32)
}
int arcompact_handle04_0d_dasm(DASM_OPS_32)
{
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "RCMP", 1,0);
}
int arcompact_handle04_0e_dasm(DASM_OPS_32)
{
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "RSUB", 0,0);
}
int arcompact_handle04_0f_dasm(DASM_OPS_32)
{
int arcompact_handle04_0f_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "BSET", 0,0);
}
int arcompact_handle04_10_dasm(DASM_OPS_32)
{
int arcompact_handle04_10_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "BCLR", 0,0);
}
int arcompact_handle04_11_dasm(DASM_OPS_32)
{
int arcompact_handle04_11_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "BTST", 0,0);
}
int arcompact_handle04_12_dasm(DASM_OPS_32)
{
int arcompact_handle04_12_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "BXOR", 0,0);
}
int arcompact_handle04_13_dasm(DASM_OPS_32)
{
int arcompact_handle04_13_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "BMSK", 0,0);
}
int arcompact_handle04_14_dasm(DASM_OPS_32)
{
int arcompact_handle04_14_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "ADD1", 0,0);
}
int arcompact_handle04_15_dasm(DASM_OPS_32)
{
int arcompact_handle04_15_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "ADD2", 0,0);
}
int arcompact_handle04_16_dasm(DASM_OPS_32)
{
int arcompact_handle04_16_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "ADD3", 0,0);
}
int arcompact_handle04_17_dasm(DASM_OPS_32)
{
int arcompact_handle04_17_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "SUB1", 0,0);
}
int arcompact_handle04_18_dasm(DASM_OPS_32)
{
int arcompact_handle04_18_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "SUB2", 0,0);
}
int arcompact_handle04_19_dasm(DASM_OPS_32)
{
int arcompact_handle04_19_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "SUB3", 0,0);
}
int arcompact_handle04_1a_dasm(DASM_OPS_32)
{
int arcompact_handle04_1a_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "MPY", 0,0);
} // *
int arcompact_handle04_1b_dasm(DASM_OPS_32)
{
int arcompact_handle04_1b_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "MPYH", 0,0);
} // *
int arcompact_handle04_1c_dasm(DASM_OPS_32)
{
int arcompact_handle04_1c_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "MPYHU", 0,0);
} // *
int arcompact_handle04_1d_dasm(DASM_OPS_32)
{
int arcompact_handle04_1d_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "MPYU", 0,0);
} // *
@ -890,7 +871,7 @@ int arcompact_handle04_28_dasm(DASM_OPS_32) // LPcc (loop setup)
output += sprintf(output, "LP<%s> (start %08x, end %08x)", conditions[condition], pc + 4, PC_ALIGNED32 + u*2);
int unused = (op & 0x00000020)>>5;
if (unused==0) output += sprintf(output, "(unused bit not set)");
if (unused==0) output += sprintf(output, "(unused bit not set)");
}
@ -908,11 +889,9 @@ int arcompact_handle04_28_dasm(DASM_OPS_32) // LPcc (loop setup)
output += sprintf( output, "[%03x]", auxreg); \
} \
else \
output += sprintf( output, "[%03x]", auxreg); \
output += sprintf( output, "[%03x]", auxreg);
int arcompact_handle04_2a_dasm(DASM_OPS_32) // Load FROM Auxiliary register TO register
{
// pp F
// 0010 0bbb 0010 1010 0BBB CCCC CCRR RRRR
// 0010 0bbb 0010 1010 0BBB 1111 10RR RRRR
@ -930,9 +909,9 @@ int arcompact_handle04_2a_dasm(DASM_OPS_32) // Load FROM Auxiliary register TO
output += sprintf( output, "LR");
if (F) output += sprintf( output, ".<F set, illegal>");
// output += sprintf( output, " p(%d)", p);
// output += sprintf( output, " p(%d)", p);
if (breg == LIMM_REG)
{
@ -947,7 +926,6 @@ int arcompact_handle04_2a_dasm(DASM_OPS_32) // Load FROM Auxiliary register TO
if (p == 0)
{
COMMON32_GET_creg
COMMON32_GET_areg_reserved
@ -960,7 +938,7 @@ int arcompact_handle04_2a_dasm(DASM_OPS_32) // Load FROM Auxiliary register TO
}
output += sprintf( output, "(%08x) ", limm );
}
else
{
@ -976,7 +954,7 @@ int arcompact_handle04_2a_dasm(DASM_OPS_32) // Load FROM Auxiliary register TO
int auxreg = u;
PRINT_AUX_REGNAME
if (ares) output += sprintf( output, "reserved(%02x) ", ares );
}
else if (p == 2)
@ -996,7 +974,7 @@ int arcompact_handle04_2a_dasm(DASM_OPS_32) // Load FROM Auxiliary register TO
}
int arcompact_handle04_2b_dasm(DASM_OPS_32) // Store TO Auxiliary register FROM register
{
{
// code at ~ 40073DFE in leapster bios is manually setting up a loop this way
// rather than using the lPcc opcode
@ -1010,9 +988,9 @@ int arcompact_handle04_2b_dasm(DASM_OPS_32) // Store TO Auxiliary register FROM
output += sprintf( output, "SR");
if (F) output += sprintf( output, ".<F set, illegal>");
// output += sprintf( output, " p(%d)", p);
// output += sprintf( output, " p(%d)", p);
if (breg == LIMM_REG)
{
@ -1031,7 +1009,6 @@ int arcompact_handle04_2b_dasm(DASM_OPS_32) // Store TO Auxiliary register FROM
if (p == 0)
{
COMMON32_GET_creg
COMMON32_GET_areg_reserved
@ -1095,7 +1072,7 @@ int arcompact_handle04_29_dasm(DASM_OPS_32)
int arcompact_handle04_2f_helper_dasm(DASM_OPS_32, const char* optext)
{
//
//
// 0010 0bbb pp10 1111 FBBB CCCC CCII IIII
int size = 4;
@ -1105,8 +1082,8 @@ int arcompact_handle04_2f_helper_dasm(DASM_OPS_32, const char* optext)
output += sprintf( output, "%s", optext);
output += sprintf( output, "%s", flagbit[F]);
// output += sprintf( output, " p(%d)", p);
// output += sprintf( output, " p(%d)", p);
if (breg == LIMM_REG)
{
output += sprintf(output, " <no dst>, ");
@ -1125,7 +1102,7 @@ int arcompact_handle04_2f_helper_dasm(DASM_OPS_32, const char* optext)
{
UINT32 limm;
GET_LIMM_32;
size = 8;
size = 8;
output += sprintf( output, "(%08x) ", limm );
}
@ -1232,11 +1209,11 @@ int arcompact_handle04_3x_helper_dasm(DASM_OPS_32, int dsize, int extend)
else
{
output += sprintf( output, "%s]", regnames[creg]);
}
}
return size;
}
@ -1279,7 +1256,7 @@ int arcompact_handle05_29_dasm(DASM_OPS_32) { return arcompact_handle04_helper_
int arcompact_handle05_2f_0x_helper_dasm(DASM_OPS_32, const char* optext)
{
//
//
// 0010 1bbb pp10 1111 FBBB CCCC CCII IIII when pp == 0x00
// or
// 0010 1bbb pp10 1111 FBBB UUUU UUII IIII when pp == 0x01
@ -1293,9 +1270,9 @@ int arcompact_handle05_2f_0x_helper_dasm(DASM_OPS_32, const char* optext)
output += sprintf( output, "%s", optext);
output += sprintf( output, "%s", flagbit[F]);
// output += sprintf( output, " p(%d)", p);
// output += sprintf( output, " p(%d)", p);
output += sprintf(output, " %s, ", regnames[breg]);
if (p == 0)
@ -1306,7 +1283,7 @@ int arcompact_handle05_2f_0x_helper_dasm(DASM_OPS_32, const char* optext)
{
UINT32 limm;
GET_LIMM_32;
size = 8;
size = 8;
output += sprintf( output, "(%08x) ", limm );
}
@ -1469,7 +1446,7 @@ int arcompact_handle0e_0x_helper_dasm(DASM_OPS_16, const char* optext, int revop
GROUP_0e_GET_h;
COMMON16_GET_breg;
REG_16BIT_RANGE(breg);
if (h == LIMM_REG)
{
UINT32 limm;
@ -1517,7 +1494,7 @@ int arcompact_handle0f_00_0x_helper_dasm(DASM_OPS_16, const char* optext)
COMMON16_GET_breg;
REG_16BIT_RANGE(breg);
print("%s %s", optext, regnames[breg]);
return 2;
@ -1724,7 +1701,7 @@ int arcompact_handle17_07_dasm(DASM_OPS_16)
}
// op bits remaining for 0x18_xx subgroups 0x071f
// op bits remaining for 0x18_xx subgroups 0x071f
int arcompact_handle18_0x_helper_dasm(DASM_OPS_16, const char* optext, int st, int format)
{
@ -1746,27 +1723,27 @@ int arcompact_handle18_0x_helper_dasm(DASM_OPS_16, const char* optext, int st, i
return 2;
}
int arcompact_handle18_00_dasm(DASM_OPS_16)
int arcompact_handle18_00_dasm(DASM_OPS_16)
{
return arcompact_handle18_0x_helper_dasm(DASM_PARAMS, "LD_S", 0,0);
}
int arcompact_handle18_01_dasm(DASM_OPS_16)
int arcompact_handle18_01_dasm(DASM_OPS_16)
{
return arcompact_handle18_0x_helper_dasm(DASM_PARAMS, "LDB_S", 0,0);
}
int arcompact_handle18_02_dasm(DASM_OPS_16)
int arcompact_handle18_02_dasm(DASM_OPS_16)
{
return arcompact_handle18_0x_helper_dasm(DASM_PARAMS, "ST_S", 1,0);
}
int arcompact_handle18_03_dasm(DASM_OPS_16)
int arcompact_handle18_03_dasm(DASM_OPS_16)
{
return arcompact_handle18_0x_helper_dasm(DASM_PARAMS, "STB_S", 1,0);
}
int arcompact_handle18_04_dasm(DASM_OPS_16)
int arcompact_handle18_04_dasm(DASM_OPS_16)
{
return arcompact_handle18_0x_helper_dasm(DASM_PARAMS, "ADD_S", 1,1); // check format
}
@ -1791,8 +1768,8 @@ int arcompact_handle18_05_01_dasm(DASM_OPS_16)
return 2;
}
// op bits remaining for 0x18_06_xx subgroups 0x0700
int arcompact_handle18_06_01_dasm(DASM_OPS_16)
// op bits remaining for 0x18_06_xx subgroups 0x0700
int arcompact_handle18_06_01_dasm(DASM_OPS_16)
{
int breg;
COMMON16_GET_breg
@ -1803,7 +1780,7 @@ int arcompact_handle18_06_01_dasm(DASM_OPS_16)
return 2;
}
int arcompact_handle18_06_11_dasm(DASM_OPS_16)
int arcompact_handle18_06_11_dasm(DASM_OPS_16)
{
int res = (op & 0x0700) >> 8;
op &= ~0x0700; // all bits now used
@ -1816,8 +1793,8 @@ int arcompact_handle18_06_11_dasm(DASM_OPS_16)
return 2;
}
// op bits remaining for 0x18_07_xx subgroups 0x0700
int arcompact_handle18_07_01_dasm(DASM_OPS_16)
// op bits remaining for 0x18_07_xx subgroups 0x0700
int arcompact_handle18_07_01_dasm(DASM_OPS_16)
{
int breg;
COMMON16_GET_breg
@ -1829,7 +1806,7 @@ int arcompact_handle18_07_01_dasm(DASM_OPS_16)
}
int arcompact_handle18_07_11_dasm(DASM_OPS_16)
int arcompact_handle18_07_11_dasm(DASM_OPS_16)
{
int res = (op & 0x0700) >> 8;
op &= ~0x0700; // all bits now used
@ -1921,7 +1898,7 @@ int arcompact_handle1d_helper_dasm(DASM_OPS_16, const char* optext)
COMMON16_GET_breg;
REG_16BIT_RANGE(breg);
int s = (op & 0x007f) >> 0; op &= ~0x007f;
int s = (op & 0x007f) >> 0; op &= ~0x007f;
if (s & 0x40) s = -0x40 + (s & 0x3f);
print("%s %s, 0 to 0x%08x", optext, regnames[breg], PC_ALIGNED32 + s*2);
@ -1935,7 +1912,7 @@ int arcompact_handle1d_01_dasm(DASM_OPS_16) { return arcompact_handle1d_helper_
int arcompact_handle1e_0x_helper_dasm(DASM_OPS_16, const char* optext)
{
int s = (op & 0x01ff) >> 0; op &= ~0x01ff;
int s = (op & 0x01ff) >> 0; op &= ~0x01ff;
if (s & 0x100) s = -0x100 + (s & 0xff);
print("%s %08x", optext, PC_ALIGNED32 + s*2);
@ -1950,7 +1927,7 @@ int arcompact_handle1e_02_dasm(DASM_OPS_16) { return arcompact_handle1e_0x_help
int arcompact_handle1e_03_0x_helper_dasm(DASM_OPS_16, const char* optext)
{
int s = (op & 0x003f) >> 0; op &= ~0x003f;
int s = (op & 0x003f) >> 0; op &= ~0x003f;
if (s & 0x020) s = -0x20 + (s & 0x1f);
print("%s %08x", optext, PC_ALIGNED32 + s*2);
@ -1968,7 +1945,7 @@ int arcompact_handle1e_03_07_dasm(DASM_OPS_16) { return arcompact_handle1e_03_0
int arcompact_handle1f_dasm(DASM_OPS_16)
{
int s = (op & 0x07ff) >> 0; op &= ~0x07ff;
int s = (op & 0x07ff) >> 0; op &= ~0x07ff;
if (s & 0x400) s = -0x400 + (s & 0x3ff);
print("BL_S %08x", PC_ALIGNED32 + (s*4));
@ -2389,4 +2366,3 @@ int arcompact_handle18_07_1c_dasm(DASM_OPS_16) { print("<illegal 0x18_07_1c> (%
int arcompact_handle18_07_1d_dasm(DASM_OPS_16) { print("<illegal 0x18_07_1d> (%04x)", op); return 2;}
int arcompact_handle18_07_1e_dasm(DASM_OPS_16) { print("<illegal 0x18_07_1e> (%04x)", op); return 2;}
int arcompact_handle18_07_1f_dasm(DASM_OPS_16) { print("<illegal 0x18_07_1f> (%04x)", op); return 2;}

7
src/emu/cpu/arcompact/arcompactdasm_ops.h
View File

@ -15,8 +15,7 @@
#define GET_LIMM_32 \
limm = oprom[6] | (oprom[7] << 8); \
limm |= (oprom[4] << 16) | (oprom[5] << 24); \
limm |= (oprom[4] << 16) | (oprom[5] << 24);
int arcompact_handle00_00_dasm(DASM_OPS_32);
int arcompact_handle00_01_dasm(DASM_OPS_32);
@ -367,7 +366,7 @@ int arcompact_handle04_2f_3f_3a_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_3b_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_3c_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_3d_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_3e_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_3e_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_3f_dasm(DASM_OPS_32);
int arcompact_handle05_2f_00_dasm(DASM_OPS_32);
@ -632,7 +631,7 @@ int arcompact_handle18_07_15_dasm(DASM_OPS_16);
int arcompact_handle18_07_16_dasm(DASM_OPS_16);
int arcompact_handle18_07_17_dasm(DASM_OPS_16);
int arcompact_handle18_07_18_dasm(DASM_OPS_16);
int arcompact_handle18_07_19_dasm(DASM_OPS_16);
int arcompact_handle18_07_19_dasm(DASM_OPS_16);
int arcompact_handle18_07_1a_dasm(DASM_OPS_16);
int arcompact_handle18_07_1b_dasm(DASM_OPS_16);
int arcompact_handle18_07_1c_dasm(DASM_OPS_16);

2
src/emu/cpu/cpu.mak
View File

@ -129,7 +129,7 @@ $(CPUOBJ)/arcompact/arcompact_common.o: $(CPUSRC)/arcompact/arcompact_common.c
$(CPUOBJ)/arcompact/arcompact.inc: $(CPUSRC)/arcompact/arcompact_make.py
@echo Generating arcompact source .inc files...
$(PYTHON) $(CPUSRC)/arcompact/arcompact_make.py $@
#-------------------------------------------------
# Acorn ARM series
#

2
src/emu/cpu/h8/h8_timer16.c
View File

@ -347,7 +347,7 @@ void h8_timer16_device::device_start()
sprintf(tm, "%d", i);
timer_channel[i] = subdevice<h8_timer16_channel_device>(tm);
}
save_item(NAME(tstr));
}

2
src/emu/cpu/m68000/m68kcpu.c
View File

@ -699,7 +699,7 @@ static void m68k_cause_bus_error(m68000_base_device *m68k)
{
/* only the 68010 throws this unique type-1000 frame */
m68ki_stack_frame_1000(m68k, REG_PPC(m68k), sr, EXCEPTION_BUS_ERROR);
}
}
else if (m68k->mmu_tmp_buserror_address == REG_PPC(m68k))
{
m68ki_stack_frame_1010(m68k, sr, EXCEPTION_BUS_ERROR, REG_PPC(m68k), m68k->mmu_tmp_buserror_address);

4
src/emu/cpu/m68000/m68kdasm.c
View File

@ -1728,12 +1728,12 @@ static void d68881_ftrap(void)
switch (g_cpu_ir & 0x7)
{
case 2: // word operand
case 2: // word operand
w3 = read_imm_16();
sprintf(g_dasm_str, "ftrap%s.w $%04x", g_cpcc[w2 & 0x3f], w3);
break;
case 3: // long word operand
case 3: // long word operand
l2 = read_imm_32();
sprintf(g_dasm_str, "ftrap%s.l $%08x", g_cpcc[w2 & 0x3f], l2);
break;

872
src/emu/cpu/pps4/pps4.c
View File

File diff suppressed because it is too large Load Diff

242
src/emu/cpu/pps4/pps4.h
View File

@ -9,22 +9,22 @@
***************************************************************************/
enum
{
PPS4_PC,
PPS4_A,
PPS4_X,
PPS4_SA,
PPS4_SB,
PPS4_B,
PPS4_Skip,
PPS4_SAG,
PPS4_I1,
PPS4_I2,
PPS4_Ip,
PPS4_GENPC = STATE_GENPC,
PPS4_GENSP = STATE_GENSP,
PPS4_GENPCBASE = STATE_GENPCBASE,
PPS4_PORT_A = 256,
PPS4_PORT_B = 257
PPS4_PC,
PPS4_A,
PPS4_X,
PPS4_SA,
PPS4_SB,
PPS4_B,
PPS4_Skip,
PPS4_SAG,
PPS4_I1,
PPS4_I2,
PPS4_Ip,
PPS4_GENPC = STATE_GENPC,
PPS4_GENSP = STATE_GENSP,
PPS4_GENPCBASE = STATE_GENPCBASE,
PPS4_PORT_A = 256,
PPS4_PORT_B = 257
};
/***************************************************************************
@ -40,128 +40,128 @@ extern const device_type PPS4;
class pps4_device : public cpu_device
{
public:
// construction/destruction
pps4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// construction/destruction
pps4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
// device-level overrides
virtual void device_start();
virtual void device_reset();
// device_execute_interface overrides
virtual UINT32 execute_min_cycles() const { return 1; }
virtual UINT32 execute_max_cycles() const { return 3; }
virtual UINT32 execute_input_lines() const { return 0; }
virtual UINT32 execute_default_irq_vector() const { return 0; }
virtual void execute_run();
// device_execute_interface overrides
virtual UINT32 execute_min_cycles() const { return 1; }
virtual UINT32 execute_max_cycles() const { return 3; }
virtual UINT32 execute_input_lines() const { return 0; }
virtual UINT32 execute_default_irq_vector() const { return 0; }
virtual void execute_run();
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const
{
return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : ( (spacenum == AS_DATA) ? &m_data_config : NULL ) );
}
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const
{
return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : ( (spacenum == AS_DATA) ? &m_data_config : NULL ) );
}
// device_state_interface overrides
void state_string_export(const device_state_entry &entry, astring &string);
// device_state_interface overrides
void state_string_export(const device_state_entry &entry, astring &string);
// device_disasm_interface overrides
virtual UINT32 disasm_min_opcode_bytes() const { return 1; }
virtual UINT32 disasm_max_opcode_bytes() const { return 2; }
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
// device_disasm_interface overrides
virtual UINT32 disasm_min_opcode_bytes() const { return 1; }
virtual UINT32 disasm_max_opcode_bytes() const { return 2; }
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
private:
address_space_config m_program_config;
address_space_config m_data_config;
address_space_config m_io_config;
address_space_config m_program_config;
address_space_config m_data_config;
address_space_config m_io_config;
address_space *m_program;
direct_read_data *m_direct;
address_space *m_data;
address_space *m_io;
int m_icount;
address_space *m_program;
direct_read_data *m_direct;
address_space *m_data;
address_space *m_io;
int m_icount;
UINT8 m_A; //!< Accumulator A(4:1)
UINT8 m_X; //!< X register X(4:1)
UINT16 m_P; //!< program counter P(12:1)
UINT16 m_SA; //!< Shift register SA(12:1)
UINT16 m_SB; //!< Shift register SB(12:1)
UINT8 m_Skip; //!< Skip next instruction
UINT16 m_SAG; //!< Special address generation mask
UINT16 m_B; //!< B register B(12:1) (BL, BM and BH)
UINT8 m_C; //!< Carry flip-flop
UINT8 m_FF1; //!< Flip-flop 1
UINT8 m_FF2; //!< Flip-flop 2
UINT8 m_I1; //!< Most recent instruction I(8:1)
UINT8 m_I2; //!< Most recent parameter I2(8:1)
UINT8 m_Ip; //!< Previous instruction I(8:1)
UINT8 m_A; //!< Accumulator A(4:1)
UINT8 m_X; //!< X register X(4:1)
UINT16 m_P; //!< program counter P(12:1)
UINT16 m_SA; //!< Shift register SA(12:1)
UINT16 m_SB; //!< Shift register SB(12:1)
UINT8 m_Skip; //!< Skip next instruction
UINT16 m_SAG; //!< Special address generation mask
UINT16 m_B; //!< B register B(12:1) (BL, BM and BH)
UINT8 m_C; //!< Carry flip-flop
UINT8 m_FF1; //!< Flip-flop 1
UINT8 m_FF2; //!< Flip-flop 2
UINT8 m_I1; //!< Most recent instruction I(8:1)
UINT8 m_I2; //!< Most recent parameter I2(8:1)
UINT8 m_Ip; //!< Previous instruction I(8:1)
//! return the contents of B register (made of BU, BM and BL)
inline UINT16 B() const;
//! return the contents of B register (made of BU, BM and BL)
inline UINT16 B() const;
//! return memory at address B(12:1)
inline UINT8 M();
//! return memory at address B(12:1)
inline UINT8 M();
//! write to memory at address B(12:1)
inline void W(UINT8 data);
//! write to memory at address B(12:1)
inline void W(UINT8 data);
//! return the next opcode (also in m_I)
inline UINT8 ROP();
//! return the next opcode (also in m_I)
inline UINT8 ROP();
//! return the next argument (also in m_I2)
inline UINT8 ARG();
//! return the next argument (also in m_I2)
inline UINT8 ARG();
void iAD(); //!< Add
void iADC(); //!< Add with carry-in
void iADSK(); //!< Add and skip on carry-out
void iADCSK(); //!< Add with carry-in and skip on carry-out
void iADI(); //!< Add immediate
void iDC(); //!< Decimal correction
void iAND(); //!< Logical AND
void iOR(); //!< Logical OR
void iEOR(); //!< Logical Exclusive-OR
void iCOMP(); //!< Complement
void iSC(); //!< Set Carry flip-flop
void iRC(); //!< Reset Carry flip-flop
void iSF1(); //!< Set FF1
void iRF1(); //!< Reset FF1
void iSF2(); //!< Set FF2
void iRF2(); //!< Reset FF2
void iLD(); //!< Load accumulator from memory
void iEX(); //!< Exchange accumulator and memory
void iEXD(); //!< Exchange accumulator and memory and decrement BL
void iLDI(); //!< Load accumulator immediate
void iLAX(); //!< Load accumulator from X register
void iLXA(); //!< Load X register from accumulator
void iLABL(); //!< Load accumulator with BL
void iLBMX(); //!< Load BM with X
void iLBUA(); //!< Load BU with A
void iXABL(); //!< Exchange accumulator and BL
void iXBMX(); //!< Exchange BM and X registers
void iXAX(); //!< Exchange accumulator and X
void iXS(); //!< Eychange SA and SB registers
void iCYS(); //!< Cycle SA register and accumulaor
void iLB(); //!< Load B indirect
void iLBL(); //!< Load B long
void iINCB(); //!< Increment BL
void iDECB(); //!< Decrement BL
void iT(); //!< Transfer
void iTM(); //!< Transfer and mark indirect
void iTL(); //!< Transfer long
void iTML(); //!< Transfer and mark long
void iSKC(); //!< Skip on carry flip-flop
void iSKZ(); //!< Skip on accumulator zero
void iSKBI(); //!< Skip if BL equal to immediate
void iSKF1(); //!< Skip if FF1 equals 1
void iSKF2(); //!< Skip if FF2 equals 1
void iRTN(); //!< Return
void iRTNSK(); //!< Return and skip
void iIOL(); //!< Input/Output long
void iDIA(); //!< Discrete input group A
void iDIB(); //!< Discrete input group B
void iDOA(); //!< Discrete output group A
void iSAG(); //!< Special address generation
void iAD(); //!< Add
void iADC(); //!< Add with carry-in
void iADSK(); //!< Add and skip on carry-out
void iADCSK(); //!< Add with carry-in and skip on carry-out
void iADI(); //!< Add immediate
void iDC(); //!< Decimal correction
void iAND(); //!< Logical AND
void iOR(); //!< Logical OR
void iEOR(); //!< Logical Exclusive-OR
void iCOMP(); //!< Complement
void iSC(); //!< Set Carry flip-flop
void iRC(); //!< Reset Carry flip-flop
void iSF1(); //!< Set FF1
void iRF1(); //!< Reset FF1
void iSF2(); //!< Set FF2
void iRF2(); //!< Reset FF2
void iLD(); //!< Load accumulator from memory
void iEX(); //!< Exchange accumulator and memory
void iEXD(); //!< Exchange accumulator and memory and decrement BL
void iLDI(); //!< Load accumulator immediate
void iLAX(); //!< Load accumulator from X register
void iLXA(); //!< Load X register from accumulator
void iLABL(); //!< Load accumulator with BL
void iLBMX(); //!< Load BM with X
void iLBUA(); //!< Load BU with A
void iXABL(); //!< Exchange accumulator and BL
void iXBMX(); //!< Exchange BM and X registers
void iXAX(); //!< Exchange accumulator and X
void iXS(); //!< Eychange SA and SB registers
void iCYS(); //!< Cycle SA register and accumulaor
void iLB(); //!< Load B indirect
void iLBL(); //!< Load B long
void iINCB(); //!< Increment BL
void iDECB(); //!< Decrement BL
void iT(); //!< Transfer
void iTM(); //!< Transfer and mark indirect
void iTL(); //!< Transfer long
void iTML(); //!< Transfer and mark long
void iSKC(); //!< Skip on carry flip-flop
void iSKZ(); //!< Skip on accumulator zero
void iSKBI(); //!< Skip if BL equal to immediate
void iSKF1(); //!< Skip if FF1 equals 1
void iSKF2(); //!< Skip if FF2 equals 1
void iRTN(); //!< Return
void iRTNSK(); //!< Return and skip
void iIOL(); //!< Input/Output long
void iDIA(); //!< Discrete input group A
void iDIB(); //!< Discrete input group B
void iDOA(); //!< Discrete output group A
void iSAG(); //!< Special address generation
void execute_one(); //!< execute one instruction
void execute_one(); //!< execute one instruction
};
#endif // __PPS4_H__

262
src/emu/cpu/pps4/pps4dasm.c
View File

@ -16,81 +16,81 @@
#define ARG(A) opram[(A) - PC]
typedef enum pps4_token_e {
t_AD, t_ADC, t_ADSK, t_ADCSK, t_ADI,
t_DC, t_AND, t_OR, t_EOR, t_COMP,
t_SC, t_RC, t_SF1, t_RF1, t_SF2,
t_RF2, t_LD, t_EX, t_EXD, t_LDI,
t_LAX, t_LXA, t_LABL, t_LBMX, t_LBUA,
t_XABL, t_XBMX, t_XAX, t_XS, t_CYS,
t_LB, t_LBL, t_INCB, t_DECB, t_T,
t_TM, t_TL, t_TML, t_SKC, t_SKZ,
t_SKBI, t_SKF1, t_SKF2, t_RTN, t_RTNSK,
t_IOL, t_DIA, t_DIB, t_DOA, t_SAG,
t_COUNT,
t_MASK = (1 << 6) - 1,
t_I3c = 1 << 6, /* immediate 3 bit constant, complemented */
t_I4 = 1 << 7, /* immediate 4 bit constant */
t_I4c = 1 << 8, /* immediate 4 bit constant, complemented */
t_I4p = 1 << 9, /* immediate 4 bit offset into page 3 */
t_I6p = 1 << 10, /* immediate 6 bit constant; address in current page */
t_I6i = 1 << 11, /* immediate 6 bit indirect page 3 offset (16 ... 63) + followed by page 1 address */
t_I8 = 1 << 12, /* immediate 8 bit constant (I/O port number) */
t_I8c = 1 << 13, /* immediate 8 bit constant inverted */
t_OVER = 1 << 14, /* Debugger step over (CALL) */
t_OUT = 1 << 15 /* Debugger step out (RETURN) */
t_AD, t_ADC, t_ADSK, t_ADCSK, t_ADI,
t_DC, t_AND, t_OR, t_EOR, t_COMP,
t_SC, t_RC, t_SF1, t_RF1, t_SF2,
t_RF2, t_LD, t_EX, t_EXD, t_LDI,
t_LAX, t_LXA, t_LABL, t_LBMX, t_LBUA,
t_XABL, t_XBMX, t_XAX, t_XS, t_CYS,
t_LB, t_LBL, t_INCB, t_DECB, t_T,
t_TM, t_TL, t_TML, t_SKC, t_SKZ,
t_SKBI, t_SKF1, t_SKF2, t_RTN, t_RTNSK,
t_IOL, t_DIA, t_DIB, t_DOA, t_SAG,
t_COUNT,
t_MASK = (1 << 6) - 1,
t_I3c = 1 << 6, /* immediate 3 bit constant, complemented */
t_I4 = 1 << 7, /* immediate 4 bit constant */
t_I4c = 1 << 8, /* immediate 4 bit constant, complemented */
t_I4p = 1 << 9, /* immediate 4 bit offset into page 3 */
t_I6p = 1 << 10, /* immediate 6 bit constant; address in current page */
t_I6i = 1 << 11, /* immediate 6 bit indirect page 3 offset (16 ... 63) + followed by page 1 address */
t_I8 = 1 << 12, /* immediate 8 bit constant (I/O port number) */
t_I8c = 1 << 13, /* immediate 8 bit constant inverted */
t_OVER = 1 << 14, /* Debugger step over (CALL) */
t_OUT = 1 << 15 /* Debugger step out (RETURN) */
} pps4_token_e;
static const char *token_str[t_COUNT] = {
"ad", /* add */
"adc", /* add with carry-in */
"adsk", /* add and skip on carry-out */
"adcsk", /* add with carry-in and skip on carry-out */
"adi", /* add immediate */
"dc", /* decimal correction */
"and", /* logical and */
"or", /* logical or */
"eor", /* logical exclusive-orf */
"comp", /* complement */
"sc", /* set C flip-flop */
"rc", /* reset C flip-flop */
"sf1", /* set FF1 flip-flop */
"rf1", /* reset FF1 flip-flop */
"sf2", /* set FF2 flip-flop */
"rf2", /* reset FF2 flip-flop */
"ld", /* load accumulator from memory */
"ex", /* exchange accumulator and memory */
"exd", /* exchange accumulator and memory and decrement BL */
"ldi", /* load accumulator immediate */
"lax", /* load accumulator from X register */
"lxa", /* load X register from accumulator */
"labl", /* load accumulator with BL */
"lbmx", /* load BM with X */
"lbua", /* load BU with A */
"xabl", /* exchange accumulator and BL */
"xbmx", /* exchange BM and X */
"xax", /* exchange accumulator and X */
"xs", /* exchange SA and SB */
"cys", /* cycle SA register and accumulator */
"lb", /* load B indirect */
"lbl", /* load B long */
"incb", /* increment BL */
"decb", /* decrement BL */
"t", /* transfer */
"tm", /* transfer and mark indirect */
"tl", /* transfer long */
"tml", /* transfer and mark long */
"skc", /* skip on C flip-flop equals 1 */
"skz", /* skip on accumulator zero */
"skbi", /* skip on BL equal to immediate */
"skf1", /* skip on FF1 flip-flop equals 1 */
"skf2", /* skip on FF2 flip-flop equals 1 */
"rtn", /* return */
"rtnsk", /* return and skip */
"iol", /* input/output long */
"dia", /* discrete input group A */
"dib", /* discrete input group B */
"doa", /* discrete output */
"sag" /* special address generation */
"ad", /* add */
"adc", /* add with carry-in */
"adsk", /* add and skip on carry-out */
"adcsk", /* add with carry-in and skip on carry-out */
"adi", /* add immediate */
"dc", /* decimal correction */
"and", /* logical and */
"or", /* logical or */
"eor", /* logical exclusive-orf */
"comp", /* complement */
"sc", /* set C flip-flop */
"rc", /* reset C flip-flop */
"sf1", /* set FF1 flip-flop */
"rf1", /* reset FF1 flip-flop */
"sf2", /* set FF2 flip-flop */
"rf2", /* reset FF2 flip-flop */
"ld", /* load accumulator from memory */
"ex", /* exchange accumulator and memory */
"exd", /* exchange accumulator and memory and decrement BL */
"ldi", /* load accumulator immediate */
"lax", /* load accumulator from X register */
"lxa", /* load X register from accumulator */
"labl", /* load accumulator with BL */
"lbmx", /* load BM with X */
"lbua", /* load BU with A */
"xabl", /* exchange accumulator and BL */
"xbmx", /* exchange BM and X */
"xax", /* exchange accumulator and X */
"xs", /* exchange SA and SB */
"cys", /* cycle SA register and accumulator */
"lb", /* load B indirect */
"lbl", /* load B long */
"incb", /* increment BL */
"decb", /* decrement BL */
"t", /* transfer */
"tm", /* transfer and mark indirect */
"tl", /* transfer long */
"tml", /* transfer and mark long */
"skc", /* skip on C flip-flop equals 1 */
"skz", /* skip on accumulator zero */
"skbi", /* skip on BL equal to immediate */
"skf1", /* skip on FF1 flip-flop equals 1 */
"skf2", /* skip on FF2 flip-flop equals 1 */
"rtn", /* return */
"rtnsk", /* return and skip */
"iol", /* input/output long */
"dia", /* discrete input group A */
"dib", /* discrete input group B */
"doa", /* discrete output */
"sag" /* special address generation */
};
static const UINT16 table[] = {
@ -369,75 +369,75 @@ static const UINT16 table[] = {
CPU_DISASSEMBLE( pps4 )
{
UINT32 flags = 0;
unsigned PC = pc;
UINT8 op = OP(pc++);
UINT32 tok = table[op];
char *dst = 0;
UINT32 flags = 0;
unsigned PC = pc;
UINT8 op = OP(pc++);
UINT32 tok = table[op];
char *dst = 0;
if (0 == (tok & t_MASK)) {
sprintf(buffer, "%s", token_str[tok & t_MASK]);
} else {
dst = buffer + sprintf(buffer, "%-7s", token_str[tok & t_MASK]);
}
if (0 == (tok & t_MASK)) {
sprintf(buffer, "%s", token_str[tok & t_MASK]);
} else {
dst = buffer + sprintf(buffer, "%-7s", token_str[tok & t_MASK]);
}
if (tok & t_I3c) {
// 3 bit immediate, complemented
UINT8 i = ~op & 7;
if (0 != i) // only print if non-zero
dst += sprintf(dst, "%x", i);
}
if (tok & t_I3c) {
// 3 bit immediate, complemented
UINT8 i = ~op & 7;
if (0 != i) // only print if non-zero
dst += sprintf(dst, "%x", i);
}
if (tok & t_I4) {
// 4 bit immediate
UINT8 i = op & 15;
dst += sprintf(dst, "%x", i);
}
if (tok & t_I4) {
// 4 bit immediate
UINT8 i = op & 15;
dst += sprintf(dst, "%x", i);
}
if (tok & t_I4c) {
// 4 bit immediate, complemented
UINT8 i = ~op & 15;
dst += sprintf(dst, "%x", i);
}
if (tok & t_I4c) {
// 4 bit immediate, complemented
UINT8 i = ~op & 15;
dst += sprintf(dst, "%x", i);
}
if (tok & t_I4p) {
// 4 bit immediate offset into page 3
UINT8 i = op & 15;
dst += sprintf(dst, "[%x]", 0x0c0 | i);
}
if (tok & t_I4p) {
// 4 bit immediate offset into page 3
UINT8 i = op & 15;
dst += sprintf(dst, "[%x]", 0x0c0 | i);
}
if (tok & t_I6p) {
// 6 bit immediate offset into current page
UINT8 i = op & 63;
dst += sprintf(dst, "%x", (PC & ~63) | i);
}
if (tok & t_I6p) {
// 6 bit immediate offset into current page
UINT8 i = op & 63;
dst += sprintf(dst, "%x", (PC & ~63) | i);
}
if (tok & t_I6i) {
// 6 bit immediate offset into page 3
UINT16 i6p3 = (3 << 6) | (op & 63);
// 8 bit absolute offset at 0x0100
UINT16 addr = (1 << 8) | 0; // ROM[ip3] can't be reached!?
(void)addr; // avoid unused variable warning
dst += sprintf(dst, "[%x]", i6p3);
}
if (tok & t_I6i) {
// 6 bit immediate offset into page 3
UINT16 i6p3 = (3 << 6) | (op & 63);
// 8 bit absolute offset at 0x0100
UINT16 addr = (1 << 8) | 0; // ROM[ip3] can't be reached!?
(void)addr; // avoid unused variable warning
dst += sprintf(dst, "[%x]", i6p3);
}
if (tok & t_I8) {
// 8 bit immediate I/O port address
UINT8 arg = ARG(pc++);
dst += sprintf(dst, "%02x", arg);
}
if (tok & t_I8) {
// 8 bit immediate I/O port address
UINT8 arg = ARG(pc++);
dst += sprintf(dst, "%02x", arg);
}
if (tok & t_I8c) {
// 8 bit immediate offset into page
UINT16 arg = ~ARG(pc++) & 255;
dst += sprintf(dst, "%02x", arg);
}
if (tok & t_I8c) {
// 8 bit immediate offset into page
UINT16 arg = ~ARG(pc++) & 255;
dst += sprintf(dst, "%02x", arg);
}
if (tok & t_OVER) // TL or TML
flags |= DASMFLAG_STEP_OVER;
if (tok & t_OVER) // TL or TML
flags |= DASMFLAG_STEP_OVER;
if (tok & t_OUT) // RTN or RTNSK
flags |= DASMFLAG_STEP_OUT;
if (tok & t_OUT) // RTN or RTNSK
flags |= DASMFLAG_STEP_OUT;
return (pc - PC) | flags | DASMFLAG_SUPPORTED;
return (pc - PC) | flags | DASMFLAG_SUPPORTED;
}

2
src/emu/cpu/sh2/sh2comn.c
View File

@ -699,7 +699,7 @@ READ32_MEMBER( sh2_device::sh2_internal_r )
case 0x00:
break;
case 0x01:
// return m_m[1] | 0; // bit31 is TDRE: Trasmit Data Register Empty. Forcing it to be '1' breaks Saturn ...
// return m_m[1] | 0; // bit31 is TDRE: Trasmit Data Register Empty. Forcing it to be '1' breaks Saturn ...
return m_m[1] | (0x84 << 24); // ... but this is actually needed to make EGWord on SS to boot?
case 0x04: // TIER, FTCSR, FRC

76
src/emu/cpu/tms0980/tms0980.c
View File

@ -250,7 +250,7 @@ tms0270_cpu_device::tms0270_cpu_device(const machine_config &mconfig, const char
static MACHINE_CONFIG_FRAGMENT(tms1000)
// microinstructions PLA, output PLA
MCFG_PLA_ADD("mpla", 8, 16, 30)
MCFG_PLA_FILEFORMAT(PLA_FMT_BERKELEY)
@ -374,7 +374,7 @@ void tms1xxx_cpu_device::device_start()
m_r_mask = (1 << m_r_pins) - 1;
m_pc_mask = (1 << m_pc_bits) - 1;
m_x_mask = (1 << m_x_bits) - 1;
// zerofill
m_pc = 0;
m_sr = 0;
@ -401,7 +401,7 @@ void tms1xxx_cpu_device::device_start()
m_clatch = 0;
m_add = 0;
m_bl = 0;
m_ram_in = 0;
m_dam_in = 0;
m_ram_out = 0;
@ -484,7 +484,7 @@ void tms0270_cpu_device::device_start()
m_o_latch_low = 0;
m_o_latch = 0;
m_o_latch_prev = 0;
// register for savestates
save_item(NAME(m_r_prev));
save_item(NAME(m_chipsel));
@ -535,18 +535,18 @@ void tms1000_cpu_device::device_reset()
{
// common reset
tms1xxx_cpu_device::device_reset();
// pre-decode instructionset
m_fixed_decode.resize_and_clear(0x100);
m_micro_decode.resize_and_clear(0x100);
for (int op = 0; op < 0x100; op++)
{
// _____ _____ ______ _____ ______ _____ _____ _____ _____
const UINT32 md[16] = { M_STSL, M_AUTY, M_AUTA, M_CIN, M_C8, M_NE, M_CKN, M_15TN, M_MTN, M_NATN, M_ATN, M_MTP, M_YTP, M_CKP, M_CKM, M_STO };
UINT16 mask = m_mpla->read(op);
mask ^= 0x3fc8; // invert active-negative
for (int bit = 0; bit < 16; bit++)
if (mask & (1 << bit))
m_micro_decode[op] |= md[bit];
@ -559,7 +559,7 @@ void tms1000_cpu_device::device_reset()
m_fixed_decode[0x0c] = F_RSTR;
m_fixed_decode[0x0d] = F_SETR;
m_fixed_decode[0x0f] = F_RETN;
for (int i = 0x10; i < 0x20; i++) m_fixed_decode[i] = F_LDP;
for (int i = 0x30; i < 0x34; i++) m_fixed_decode[i] = F_SBIT;
for (int i = 0x34; i < 0x38; i++) m_fixed_decode[i] = F_RBIT;
@ -572,7 +572,7 @@ void tms1000_cpu_device::device_reset()
void tms1100_cpu_device::device_reset()
{
tms1000_cpu_device::device_reset();
// small differences in 00-3f area
m_fixed_decode[0x00] = 0;
m_fixed_decode[0x09] = F_COMX8; // !
@ -597,29 +597,29 @@ void tms0970_cpu_device::device_reset()
// upper half of the opcodes is always branch/call
if (op & 0x80)
m_fixed_decode[op] = (op & 0x40) ? F_CALL: F_BR;
// 5 output bits select a microinstruction index
UINT32 imask = m_ipla->read(op);
UINT8 msel = imask & 0x1f;
// but if (from bottom to top) term 1 is active and output bit 5 is 0, R2,R4-R7 directly select a microinstruction index
if (imask & 0x40 && (imask & 0x20) == 0)
msel = (op & 0xf) | (op >> 1 & 0x10);
msel = BITSWAP8(msel,7,6,5,0,1,2,3,4); // lines are reversed
UINT32 mmask = m_mpla->read(msel);
mmask ^= 0x09fe; // invert active-negative
// _____ _____ _____ _____ ______ _____ ______ _____ _____
const UINT32 md[15] = { M_CKM, M_CKP, M_YTP, M_MTP, M_ATN, M_NATN, M_MTN, M_15TN, M_CKN, M_NE, M_C8, M_CIN, M_AUTA, M_AUTY, M_STO };
for (int bit = 0; bit < 15; bit++)
if (mmask & (1 << bit))
m_micro_decode[op] |= md[bit];
// the other ipla terms each select a fixed instruction
const UINT32 id[8] = { F_LDP, F_TDO, F_COMX, F_LDX, F_SBIT, F_RBIT, F_SETR, F_RETN };
for (int bit = 0; bit < 8; bit++)
if (imask & (0x80 << bit))
m_fixed_decode[op] |= id[bit];
@ -630,20 +630,20 @@ void tms0970_cpu_device::device_reset()
UINT32 tms0980_cpu_device::decode_micro(UINT8 sel)
{
UINT32 decode = 0;
sel = BITSWAP8(sel,7,6,0,1,2,3,4,5); // lines are reversed
UINT32 mask = m_mpla->read(sel);
mask ^= 0x43fc3; // invert active-negative
// M_RSTR is specific to TMS02x0, it redirects to F_RSTR
// M_UNK1 is specific to TMS0270, unknown yet
// _______ ______ _____ _____ _____ _____ ______ _____ ______ _____ _____
const UINT32 md[22] = { M_NDMTP, M_DMTP, M_AUTY, M_AUTA, M_CKM, M_SSE, M_CKP, M_YTP, M_MTP, M_ATN, M_NATN, M_MTN, M_15TN, M_CKN, M_NE, M_C8, M_SSS, M_CME, M_CIN, M_STO, M_RSTR, M_UNK1 };
for (int bit = 0; bit < 22 && bit < m_mpla->outputs(); bit++)
if (mask & (1 << bit))
decode |= md[bit];
return decode;
}
@ -651,7 +651,7 @@ void tms0980_cpu_device::device_reset()
{
// common reset
tms1xxx_cpu_device::device_reset();
// pre-decode instructionset
m_fixed_decode.resize_and_clear(0x200);
m_micro_decode.resize_and_clear(0x200);
@ -661,20 +661,20 @@ void tms0980_cpu_device::device_reset()
// upper half of the opcodes is always branch/call
if (op & 0x100)
m_fixed_decode[op] = (op & 0x80) ? F_CALL: F_BR;
UINT32 imask = m_ipla->read(op);
// 6 output bits select a microinstruction index
m_micro_decode[op] = decode_micro(imask & 0x3f);
// the other ipla terms each select a fixed instruction
const UINT32 id[15] = { F_LDP, F_SBL, F_OFF, F_RBIT, F_SAL, F_XDA, F_REAC, F_SETR, F_RETN, F_SBIT, F_TDO, F_COMX8, F_COMX, F_LDX, F_SEAC };
for (int bit = 0; bit < 15; bit++)
if (imask & (0x80 << bit))
m_fixed_decode[op] |= id[bit];
}
// like on TMS0970, one of the terms directly select a microinstruction index (via R4-R8),
// but it can't be pre-determined when it's active
m_micro_direct.resize_and_clear(0x40);
@ -710,7 +710,7 @@ void tms1xxx_cpu_device::next_pc()
fb = 1;
else if (m_pc == m_pc_mask)
fb = 0;
m_pc = (m_pc << 1 | fb) & m_pc_mask;
}
@ -731,9 +731,9 @@ void tms0980_cpu_device::read_opcode()
debugger_instruction_hook(this, m_rom_address << 1);
m_opcode = m_program->read_word(m_rom_address << 1) & 0x1ff;
m_c4 = BITSWAP8(m_opcode,7,6,5,4,0,1,2,3) & 0xf; // opcode operand is bitswapped for most opcodes
m_fixed = m_fixed_decode[m_opcode];
// if ipla term 0 is active, R4-R8 directly select a microinstruction index when R0 or R0^BL is 0
int r0 = m_opcode >> 8 & 1;
if (m_ipla->read(m_opcode) & 0x40 && !((r0 & m_bl) ^ r0))
@ -747,7 +747,7 @@ void tms0980_cpu_device::read_opcode()
void tms0270_cpu_device::read_opcode()
{
tms0980_cpu_device::read_opcode();
// RSTR is on the mpla
if (m_micro & M_RSTR)
m_fixed |= F_RSTR;
@ -780,13 +780,13 @@ void tms0270_cpu_device::dynamic_output()
// R13: power off, trigger on falling edge
if ((m_r_prev >> 13 & 1) && !(m_r >> 13 & 1))
m_power_off(1);
// R11: TMS5100 CTL port direction (0=read from TMS5100, 1=write to TMS5100)
m_ctl_dir = m_r >> 11 & 1;
// R12: chip select (off=display via OPLA, on=TMS5100 via ACC/CKB)
m_chipsel = m_r >> 12 & 1;
if (m_chipsel)
{
// ACC via SEG B,C,D,G: TMS5100 CTL pins
@ -812,7 +812,7 @@ void tms0270_cpu_device::dynamic_output()
m_o_latch_prev = m_o_latch;
}
}
// standard R-output
if (m_r != m_r_prev)
{
@ -860,7 +860,7 @@ void tms1xxx_cpu_device::set_cki_bus()
case 0x30: case 0x38:
m_cki_bus = 1 << (m_c4 >> 2) ^ 0xf;
break;
// 01XXXXXX: constant
case 0x00: // R2,3,4 are NANDed with eachother, and then ORed with R1, making 00000XXX valid too
case 0x40: case 0x48: case 0x50: case 0x58: case 0x60: case 0x68: case 0x70: case 0x78:
@ -886,7 +886,7 @@ void tms0980_cpu_device::set_cki_bus()
case 0x020: case 0x0a0:
m_cki_bus = 1 << (m_c4 >> 2) ^ 0xf;
break;
// 0X1XXXXXX: constant
case 0x040: case 0x048: case 0x050: case 0x058: case 0x060: case 0x068: case 0x070: case 0x078:
case 0x0c0: case 0x0c8: case 0x0d0: case 0x0d8: case 0x0e0: case 0x0e8: case 0x0f0: case 0x0f8:
@ -1080,7 +1080,7 @@ void tms0270_cpu_device::op_tdo()
m_o_latch_low = m_a;
else
m_o_latch = m_o_latch_low | (m_a << 4 & 0x30);
// write to output is done in dynamic_output
}
@ -1111,7 +1111,7 @@ void tms1xxx_cpu_device::execute_run()
if (m_status)
{
UINT8 new_pc = m_opcode & m_pc_mask;
// BR: conditional branch
if (m_fixed & F_BR)
{
@ -1120,7 +1120,7 @@ void tms1xxx_cpu_device::execute_run()
m_ca = m_cb;
m_pc = new_pc;
}
// CALL: conditional call
if (m_fixed & F_CALL)
{
@ -1166,7 +1166,7 @@ void tms1xxx_cpu_device::execute_run()
case 1:
// fetch: rom address 2/2
m_rom_address = (m_ca << (m_pc_bits+4)) | (m_pa << m_pc_bits) | m_pc;
// execute: update alu inputs
// N inputs
if (m_micro & M_15TN) m_n |= 0xf;
@ -1233,7 +1233,7 @@ void tms1xxx_cpu_device::execute_run()
if (m_fixed & F_SAL) op_sal();
if (m_fixed & F_SBL) op_sbl();
if (m_fixed & F_XDA) op_xda();
// after fixed opcode handling: store status, write ram
m_status = status;
if (m_ram_out != -1)

16
src/emu/cpu/tms0980/tms0980.h
View File

@ -77,7 +77,7 @@ public:
template<class _Object> static devcb_base &set_write_r_callback(device_t &device, _Object object) { return downcast<tms1xxx_cpu_device &>(device).m_write_r.set_callback(object); }
template<class _Object> static devcb_base &set_power_off_callback(device_t &device, _Object object) { return downcast<tms1xxx_cpu_device &>(device).m_power_off.set_callback(object); }
static void set_output_pla(device_t &device, const UINT16 *output_pla) { downcast<tms1xxx_cpu_device &>(device).c_output_pla = output_pla; }
protected:
// device-level overrides
virtual void device_start();
@ -184,7 +184,7 @@ protected:
devcb_write16 m_write_o;
devcb_write16 m_write_r;
devcb_write_line m_power_off;
UINT32 m_o_mask;
UINT32 m_r_mask;
UINT32 m_k_mask;
@ -239,7 +239,7 @@ protected:
virtual void device_reset();
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
virtual void op_setr();
virtual void op_rstr();
};
@ -263,7 +263,7 @@ protected:
virtual machine_config_constructor device_mconfig_additions() const;
virtual void write_o_output(UINT8 index);
virtual void op_setr();
virtual void op_tdo();
};
@ -284,11 +284,11 @@ protected:
virtual UINT32 disasm_min_opcode_bytes() const { return 2; }
virtual UINT32 disasm_max_opcode_bytes() const { return 2; }
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
virtual UINT8 read_k_input();
virtual void set_cki_bus();
virtual void read_opcode();
virtual void op_comx();
UINT32 decode_micro(UINT8 sel);
@ -299,7 +299,7 @@ class tms0270_cpu_device : public tms0980_cpu_device
{
public:
tms0270_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
// static configuration helpers
template<class _Object> static devcb_base &set_read_ctl_callback(device_t &device, _Object object) { return downcast<tms0270_cpu_device &>(device).m_read_ctl.set_callback(object); }
template<class _Object> static devcb_base &set_write_ctl_callback(device_t &device, _Object object) { return downcast<tms0270_cpu_device &>(device).m_write_ctl.set_callback(object); }
@ -316,7 +316,7 @@ protected:
virtual UINT8 read_k_input();
virtual void dynamic_output();
virtual void read_opcode();
virtual void op_setr();
virtual void op_rstr();
virtual void op_tdo();

2
src/emu/luaengine.c
View File

@ -348,7 +348,7 @@ luabridge::LuaRef lua_engine::l_machine_get_devices(const running_machine *r)
luabridge::LuaRef devs_table = luabridge::LuaRef::newTable(L);
device_t *root = &(m->root_device());
devs_table = devtree_dfs(root, devs_table);
devs_table = devtree_dfs(root, devs_table);
return devs_table;
}

4
src/emu/machine.c
View File

@ -255,10 +255,10 @@ void running_machine::start()
primary_screen->register_vblank_callback(vblank_state_delegate(FUNC(running_machine::watchdog_vblank), this));
save().save_item(NAME(m_watchdog_enabled));
save().save_item(NAME(m_watchdog_counter));
// save the random seed or save states might be broken in drivers that use the rand() method
save().save_item(NAME(m_rand_seed));
// initialize image devices
image_init(*this);
m_tilemap.reset(global_alloc(tilemap_manager(*this)));

2
src/emu/machine/am9517a.c
View File

@ -523,7 +523,7 @@ void am9517a_device::device_start()
save_item(NAME(m_status));
save_item(NAME(m_temp));
save_item(NAME(m_request));
for (int i = 0; i < 4; i++)
{
save_item(NAME(m_channel[i].m_address), i);

1
src/emu/machine/e05a30.c
View File

@ -151,7 +151,6 @@ void e05a30_device::update_cr_stepper(UINT8 data)
WRITE_LINE_MEMBER( e05a30_device::centronics_input_strobe )
{
if (m_centronics_strobe == TRUE && state == FALSE && !m_centronics_busy) {
m_centronics_data_latch = m_centronics_data;
m_centronics_data_latched = TRUE;

8
src/emu/machine/i6300esb.c
View File

@ -83,12 +83,12 @@ DEVICE_ADDRESS_MAP_START(internal_io_map, 32, i6300esb_lpc_device)
AM_RANGE(0x00ec, 0x00ef) AM_WRITE8( nop_w, 0x0000ff00) // Non-existing, used for delays by the bios/os
ADDRESS_MAP_END
i6300esb_lpc_device::i6300esb_lpc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: pci_device(mconfig, I6300ESB_LPC, "i6300ESB southbridge ISA/LPC bridge", tag, owner, clock, "i6300esb_lpc", __FILE__),
acpi(*this, "acpi"),
rtc (*this, "rtc"),
pit (*this, "pit")
acpi(*this, "acpi"),
rtc (*this, "rtc"),
pit (*this, "pit")
{
}

2
src/emu/machine/i82875p.h
View File

@ -107,7 +107,7 @@ class i82875p_overflow_device : public pci_device {
public:
i82875p_overflow_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_READ8_MEMBER (dram_row_boundary_r);
DECLARE_WRITE8_MEMBER (dram_row_boundary_w);
DECLARE_READ8_MEMBER (dram_row_attribute_r);

198
src/emu/machine/r10696.c
View File

@ -34,7 +34,7 @@
#include "emu.h"
#include "machine/r10696.h"
#define VERBOSE 1
#define VERBOSE 1
#if VERBOSE
#define LOG(x) logerror x
#else
@ -50,9 +50,9 @@
const device_type R10696 = &device_creator<r10696_device>;
r10696_device::r10696_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, R10696, "Rockwell 10696", tag, owner, clock, "r10696", __FILE__),
m_io_a(0), m_io_b(0), m_io_c(0),
m_iord(*this), m_iowr(*this)
: device_t(mconfig, R10696, "Rockwell 10696", tag, owner, clock, "r10696", __FILE__),
m_io_a(0), m_io_b(0), m_io_c(0),
m_iord(*this), m_iowr(*this)
{
}
@ -61,12 +61,12 @@ r10696_device::r10696_device(const machine_config &mconfig, const char *tag, dev
*/
void r10696_device::device_start()
{
m_iord.resolve();
m_iowr.resolve();
m_iord.resolve();
m_iowr.resolve();
save_item(NAME(m_io_a));
save_item(NAME(m_io_b));
save_item(NAME(m_io_c));
save_item(NAME(m_io_a));
save_item(NAME(m_io_b));
save_item(NAME(m_io_c));
}
/**
@ -87,101 +87,101 @@ void r10696_device::device_reset()
WRITE8_MEMBER( r10696_device::io_w )
{
assert(offset < 16);
const UINT8 io_a = m_io_a;
const UINT8 io_b = m_io_b;
const UINT8 io_c = m_io_c;
switch (offset)
{
case 0x0A: // Read Group A
case 0x09: // Read Group B
case 0x03: // Read Group C
case 0x00: // Read Groups A | B | C
case 0x01: // Read Groups B | C
case 0x02: // Read Groups A | C
case 0x08: // Read Groups A | B
break;
assert(offset < 16);
const UINT8 io_a = m_io_a;
const UINT8 io_b = m_io_b;
const UINT8 io_c = m_io_c;
switch (offset)
{
case 0x0A: // Read Group A
case 0x09: // Read Group B
case 0x03: // Read Group C
case 0x00: // Read Groups A | B | C
case 0x01: // Read Groups B | C
case 0x02: // Read Groups A | C
case 0x08: // Read Groups A | B
break;
case 0x0E: // Set Group A
m_io_a = data & 0x0f;
break;
case 0x0D: // Set Group B
m_io_b = data & 0x0f;
break;
case 0x07: // Set Group C
m_io_c = data & 0x0f;
break;
case 0x04: // Set Groups A, B and C
m_io_a = m_io_b = m_io_c = data & 0x0f;
break;
case 0x05: // Set Groups B and C
m_io_b = m_io_c = data & 0x0f;
break;
case 0x06: // Set Groups A and C
m_io_a = m_io_c = data & 0x0f;
break;
case 0x0C: // Set Groups A and B
m_io_a = m_io_b = data & 0x0f;
break;
}
if (io_a != m_io_a)
m_iowr(0, m_io_a, 0x0f);
if (io_b != m_io_b)
m_iowr(1, m_io_b, 0x0f);
if (io_c != m_io_c)
m_iowr(2, m_io_c, 0x0f);
case 0x0E: // Set Group A
m_io_a = data & 0x0f;
break;
case 0x0D: // Set Group B
m_io_b = data & 0x0f;
break;
case 0x07: // Set Group C
m_io_c = data & 0x0f;
break;
case 0x04: // Set Groups A, B and C
m_io_a = m_io_b = m_io_c = data & 0x0f;
break;
case 0x05: // Set Groups B and C
m_io_b = m_io_c = data & 0x0f;
break;
case 0x06: // Set Groups A and C
m_io_a = m_io_c = data & 0x0f;
break;
case 0x0C: // Set Groups A and B
m_io_a = m_io_b = data & 0x0f;
break;
}
if (io_a != m_io_a)
m_iowr(0, m_io_a, 0x0f);
if (io_b != m_io_b)
m_iowr(1, m_io_b, 0x0f);
if (io_c != m_io_c)
m_iowr(2, m_io_c, 0x0f);
}
READ8_MEMBER( r10696_device::io_r )
{
assert(offset < 16);
UINT8 io_a, io_b, io_c;
UINT8 data = 0xf;
switch (offset)
{
case 0x0A: // Read Group A
io_a = m_iord(0);
data = io_a & 0x0f;
break;
case 0x09: // Read Group B
io_b = m_iord(1);
data = io_b & 0x0f;
break;
case 0x03: // Read Group C
io_c = m_iord(2);
data = io_c & 0x0f;
break;
case 0x00: // Read Groups A | B | C
io_a = m_iord(0);
io_b = m_iord(1);
io_c = m_iord(2);
data = (io_a | io_b | io_a) & 0x0f;
break;
case 0x01: // Read Groups B | C
io_b = m_iord(1);
io_c = m_iord(2);
data = (io_b | io_c) & 0x0f;
break;
case 0x02: // Read Groups A | C
io_a = m_iord(0);
io_c = m_iord(2);
data = (io_a | io_c) & 0x0f;
break;
case 0x08: // Read Groups A | B
io_a = m_iord(0);
io_b = m_iord(1);
data = (io_a | io_b) & 0x0f;
break;
assert(offset < 16);
UINT8 io_a, io_b, io_c;
UINT8 data = 0xf;
switch (offset)
{
case 0x0A: // Read Group A
io_a = m_iord(0);
data = io_a & 0x0f;
break;
case 0x09: // Read Group B
io_b = m_iord(1);
data = io_b & 0x0f;
break;
case 0x03: // Read Group C
io_c = m_iord(2);
data = io_c & 0x0f;
break;
case 0x00: // Read Groups A | B | C
io_a = m_iord(0);
io_b = m_iord(1);
io_c = m_iord(2);
data = (io_a | io_b | io_a) & 0x0f;
break;
case 0x01: // Read Groups B | C
io_b = m_iord(1);
io_c = m_iord(2);
data = (io_b | io_c) & 0x0f;
break;
case 0x02: // Read Groups A | C
io_a = m_iord(0);
io_c = m_iord(2);
data = (io_a | io_c) & 0x0f;
break;
case 0x08: // Read Groups A | B
io_a = m_iord(0);
io_b = m_iord(1);
data = (io_a | io_b) & 0x0f;
break;
case 0x0E: // Set Group A
case 0x0D: // Set Group B
case 0x07: // Set Group C
case 0x04: // Set Groups A, B and C
case 0x05: // Set Groups B and C
case 0x06: // Set Groups A and C
case 0x0C: // Set Groups A and B
break;
}
return data;
case 0x0E: // Set Group A
case 0x0D: // Set Group B
case 0x07: // Set Group C
case 0x04: // Set Groups A, B and C
case 0x05: // Set Groups B and C
case 0x06: // Set Groups A and C
case 0x0C: // Set Groups A and B
break;
}
return data;
}

32
src/emu/machine/r10696.h
View File

@ -24,31 +24,31 @@
/* Set the read and write group (4-bit; nibble) delegates */
#define MCFG_R10696_IO(_devcb_rd,_devcb_wr) \
r10696_device::set_iord(*device, DEVCB_##_devcb_rd); \
r10696_device::set_iowr(*device, DEVCB_##_devcb_wr);
r10696_device::set_iord(*device, DEVCB_##_devcb_rd); \
r10696_device::set_iowr(*device, DEVCB_##_devcb_wr);
class r10696_device : public device_t
{
public:
r10696_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~r10696_device() {}
r10696_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~r10696_device() {}
DECLARE_READ8_MEMBER ( io_r );
DECLARE_WRITE8_MEMBER( io_w );
DECLARE_READ8_MEMBER ( io_r );
DECLARE_WRITE8_MEMBER( io_w );
template<class _Object> static devcb_base &set_iord(device_t &device, _Object object) { return downcast<r10696_device &>(device).m_iord.set_callback(object); }
template<class _Object> static devcb_base &set_iowr(device_t &device, _Object object) { return downcast<r10696_device &>(device).m_iowr.set_callback(object); }
template<class _Object> static devcb_base &set_iord(device_t &device, _Object object) { return downcast<r10696_device &>(device).m_iord.set_callback(object); }
template<class _Object> static devcb_base &set_iowr(device_t &device, _Object object) { return downcast<r10696_device &>(device).m_iowr.set_callback(object); }
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
// device-level overrides
virtual void device_start();
virtual void device_reset();
private:
UINT8 m_io_a; //!< input/output flip-flops group A
UINT8 m_io_b; //!< input/output flip-flops group B
UINT8 m_io_c; //!< input/output flip-flops group C
devcb_read8 m_iord; //!< input line (read, offset = group, data = 4 bits)
devcb_write8 m_iowr; //!< output line (write, offset = group, data = 4 bits)
UINT8 m_io_a; //!< input/output flip-flops group A
UINT8 m_io_b; //!< input/output flip-flops group B
UINT8 m_io_c; //!< input/output flip-flops group C
devcb_read8 m_iord; //!< input line (read, offset = group, data = 4 bits)
devcb_write8 m_iowr; //!< output line (write, offset = group, data = 4 bits)
};
extern const device_type R10696;

236
src/emu/machine/r10788.c
View File

@ -41,7 +41,7 @@
#include "emu.h"
#include "machine/r10788.h"
#define VERBOSE 0
#define VERBOSE 0
#if VERBOSE
#define LOG(x) logerror x
#else
@ -57,10 +57,10 @@
const device_type R10788 = &device_creator<r10788_device>;
r10788_device::r10788_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, R10788, "Rockwell 10788", tag, owner, clock, "r10788", __FILE__),
m_ktr(0), m_kts(0), m_kla(0), m_klb(0), m_mask_a(15), m_mask_b(15), m_ker(0),
m_io_counter(0), m_scan_counter(0),
m_display(*this)
: device_t(mconfig, R10788, "Rockwell 10788", tag, owner, clock, "r10788", __FILE__),
m_ktr(0), m_kts(0), m_kla(0), m_klb(0), m_mask_a(15), m_mask_b(15), m_ker(0),
m_io_counter(0), m_scan_counter(0),
m_display(*this)
{
}
@ -69,22 +69,22 @@ r10788_device::r10788_device(const machine_config &mconfig, const char *tag, dev
*/
void r10788_device::device_start()
{
m_display.resolve();
m_display.resolve();
save_item(NAME(m_reg));
save_item(NAME(m_ktr));
save_item(NAME(m_kts));
save_item(NAME(m_kla));
save_item(NAME(m_klb));
save_item(NAME(m_mask_a));
save_item(NAME(m_mask_b));
save_item(NAME(m_ker));
save_item(NAME(m_io_counter));
save_item(NAME(m_scan_counter));
save_item(NAME(m_reg));
save_item(NAME(m_ktr));
save_item(NAME(m_kts));
save_item(NAME(m_kla));
save_item(NAME(m_klb));
save_item(NAME(m_mask_a));
save_item(NAME(m_mask_b));
save_item(NAME(m_ker));
save_item(NAME(m_io_counter));
save_item(NAME(m_scan_counter));
m_timer = timer_alloc(TIMER_DISPLAY);
// recurring timer every 36 cycles
m_timer->adjust(clocks_to_attotime(36), 0, clocks_to_attotime(36));
m_timer = timer_alloc(TIMER_DISPLAY);
// recurring timer every 36 cycles
m_timer->adjust(clocks_to_attotime(36), 0, clocks_to_attotime(36));
}
/**
@ -93,14 +93,14 @@ void r10788_device::device_start()
void r10788_device::device_reset()
{
memset(m_reg, 0x00, sizeof(m_reg));
m_ktr = 0;
m_kts = 0;
m_kla = 0;
m_klb = 0;
m_mask_a = 15;
m_mask_b = 15;
m_ker = 0;
m_scan_counter = 0;
m_ktr = 0;
m_kts = 0;
m_kla = 0;
m_klb = 0;
m_mask_a = 15;
m_mask_b = 15;
m_ker = 0;
m_scan_counter = 0;
}
@ -113,19 +113,19 @@ void r10788_device::device_reset()
*/
void r10788_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
UINT8 data;
switch (id)
{
case TIMER_DISPLAY:
data = (m_reg[0][m_scan_counter] & m_mask_a) +
16 * (m_reg[1][m_scan_counter] & m_mask_b);
LOG(("%s: scan counter:%2d data:%02x\n", __FUNCTION__, m_scan_counter, data));
m_display(m_scan_counter, data, 0xff);
break;
default:
LOG(("%s: invalid timer id:%d\n", __FUNCTION__, id));
}
m_scan_counter = (m_scan_counter + 1) % 16;
UINT8 data;
switch (id)
{
case TIMER_DISPLAY:
data = (m_reg[0][m_scan_counter] & m_mask_a) +
16 * (m_reg[1][m_scan_counter] & m_mask_b);
LOG(("%s: scan counter:%2d data:%02x\n", __FUNCTION__, m_scan_counter, data));
m_display(m_scan_counter, data, 0xff);
break;
default:
LOG(("%s: invalid timer id:%d\n", __FUNCTION__, id));
}
m_scan_counter = (m_scan_counter + 1) % 16;
}
/*************************************
@ -142,87 +142,87 @@ void r10788_device::device_timer(emu_timer &timer, device_timer_id id, int param
WRITE8_MEMBER( r10788_device::io_w )
{
assert(offset < 16);
switch (offset)
{
case KTR: // Transfer Keyboard Return
LOG(("%s: KTR data:%02x\n", __FUNCTION__, data));
m_ktr = data;
break;
case KTS: // Transfer Keyboard Strobe
LOG(("%s: KTS data:%02x\n", __FUNCTION__, data));
m_kts = data;
break;
case KLA: // Load Display Register A
LOG(("%s: KLA [%2d] data:%02x\n", __FUNCTION__, m_io_counter, data));
m_kla = data;
m_reg[0][m_io_counter] = m_kla;
break;
case KLB: // Load Display Register B
LOG(("%s: KLB [%2d] data:%02x\n", __FUNCTION__, m_io_counter, data));
m_klb = data;
m_reg[1][m_io_counter] = m_kla;
break;
case KDN: // Turn On Display
LOG(("%s: KDN data:%02x\n", __FUNCTION__, data));
m_mask_a = 15;
m_mask_b = 15;
break;
case KAF: // Turn Off A
LOG(("%s: KAF data:%02x\n", __FUNCTION__, data));
m_mask_a = 0;
m_mask_b &= ~3;
break;
case KBF: // Turn Off B
LOG(("%s: KBF data:%02x\n", __FUNCTION__, data));
m_mask_b &= ~12;
break;
case KER: // Reset Keyboard Error
LOG(("%s: KER data:%02x\n", __FUNCTION__, data));
m_ker = 10;
break;
}
assert(offset < 16);
switch (offset)
{
case KTR: // Transfer Keyboard Return
LOG(("%s: KTR data:%02x\n", __FUNCTION__, data));
m_ktr = data;
break;
case KTS: // Transfer Keyboard Strobe
LOG(("%s: KTS data:%02x\n", __FUNCTION__, data));
m_kts = data;
break;
case KLA: // Load Display Register A
LOG(("%s: KLA [%2d] data:%02x\n", __FUNCTION__, m_io_counter, data));
m_kla = data;
m_reg[0][m_io_counter] = m_kla;
break;
case KLB: // Load Display Register B
LOG(("%s: KLB [%2d] data:%02x\n", __FUNCTION__, m_io_counter, data));
m_klb = data;
m_reg[1][m_io_counter] = m_kla;
break;
case KDN: // Turn On Display
LOG(("%s: KDN data:%02x\n", __FUNCTION__, data));
m_mask_a = 15;
m_mask_b = 15;
break;
case KAF: // Turn Off A
LOG(("%s: KAF data:%02x\n", __FUNCTION__, data));
m_mask_a = 0;
m_mask_b &= ~3;
break;
case KBF: // Turn Off B
LOG(("%s: KBF data:%02x\n", __FUNCTION__, data));
m_mask_b &= ~12;
break;
case KER: // Reset Keyboard Error
LOG(("%s: KER data:%02x\n", __FUNCTION__, data));
m_ker = 10;
break;
}
}
READ8_MEMBER( r10788_device::io_r )
{
assert(offset < 16);
UINT8 data = 0xf;
switch (offset)
{
case KTR: // Transfer Keyboard Return
data = m_ktr;
LOG(("%s: KTR data:%02x\n", __FUNCTION__, data));
break;
case KTS: // Transfer Keyboard Strobe
data = m_kts;
LOG(("%s: KTS data:%02x\n", __FUNCTION__, data));
break;
case KLA: // Load Display Register A
m_kla = m_reg[0][m_io_counter];
data = m_kla;
LOG(("%s: KLA [%2d] data:%02x\n", __FUNCTION__, m_io_counter, data));
break;
case KLB: // Load Display Register B
m_klb = m_reg[1][m_io_counter];
data = m_klb;
LOG(("%s: KLB [%2d] data:%02x\n", __FUNCTION__, m_io_counter, data));
// FIXME: does it automagically increment at KLB write?
m_io_counter = (m_io_counter + 1) % 16;
break;
case KDN: // Turn On Display
LOG(("%s: KDN data:%02x\n", __FUNCTION__, data));
break;
case KAF: // Turn Off A
LOG(("%s: KAF data:%02x\n", __FUNCTION__, data));
break;
case KBF: // Turn Off B
LOG(("%s: KBF data:%02x\n", __FUNCTION__, data));
break;
case KER: // Reset Keyboard Error
LOG(("%s: KER data:%02x\n", __FUNCTION__, data));
break;
}
return data;
assert(offset < 16);
UINT8 data = 0xf;
switch (offset)
{
case KTR: // Transfer Keyboard Return
data = m_ktr;
LOG(("%s: KTR data:%02x\n", __FUNCTION__, data));
break;
case KTS: // Transfer Keyboard Strobe
data = m_kts;
LOG(("%s: KTS data:%02x\n", __FUNCTION__, data));
break;
case KLA: // Load Display Register A
m_kla = m_reg[0][m_io_counter];
data = m_kla;
LOG(("%s: KLA [%2d] data:%02x\n", __FUNCTION__, m_io_counter, data));
break;
case KLB: // Load Display Register B
m_klb = m_reg[1][m_io_counter];
data = m_klb;
LOG(("%s: KLB [%2d] data:%02x\n", __FUNCTION__, m_io_counter, data));
// FIXME: does it automagically increment at KLB write?
m_io_counter = (m_io_counter + 1) % 16;
break;
case KDN: // Turn On Display
LOG(("%s: KDN data:%02x\n", __FUNCTION__, data));
break;
case KAF: // Turn Off A
LOG(("%s: KAF data:%02x\n", __FUNCTION__, data));
break;
case KBF: // Turn Off B
LOG(("%s: KBF data:%02x\n", __FUNCTION__, data));
break;
case KER: // Reset Keyboard Error
LOG(("%s: KER data:%02x\n", __FUNCTION__, data));
break;
}
return data;
}

66
src/emu/machine/r10788.h
View File

@ -23,50 +23,50 @@
/* Set the writer used to update a display digit */
#define MCFG_R10788_UPDATE(_devcb) \
r10788_device::set_update(*device, DEVCB_##_devcb);
r10788_device::set_update(*device, DEVCB_##_devcb);
class r10788_device : public device_t
{
public:
r10788_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~r10788_device() {}
r10788_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~r10788_device() {}
enum {
KTR = 0xc, //!< Transfer Keyboard Return
KTS = 0xa, //!< Transfer Keyboard Strobe
KLA = 0xe, //!< Load Display Register A
KLB = 0xd, //!< Load Display Register B
KDN = 0x3, //!< Turn On Display
KAF = 0xb, //!< Turn Off A
KBF = 0x7, //!< Turn Off B
KER = 0x6 //!< Reset Keyboard Error
};
enum {
KTR = 0xc, //!< Transfer Keyboard Return
KTS = 0xa, //!< Transfer Keyboard Strobe
KLA = 0xe, //!< Load Display Register A
KLB = 0xd, //!< Load Display Register B
KDN = 0x3, //!< Turn On Display
KAF = 0xb, //!< Turn Off A
KBF = 0x7, //!< Turn Off B
KER = 0x6 //!< Reset Keyboard Error
};
DECLARE_READ8_MEMBER ( io_r );
DECLARE_WRITE8_MEMBER( io_w );
DECLARE_READ8_MEMBER ( io_r );
DECLARE_WRITE8_MEMBER( io_w );
template<class _Object> static devcb_base &set_update(device_t &device, _Object object) { return downcast<r10788_device &>(device).m_display.set_callback(object); }
template<class _Object> static devcb_base &set_update(device_t &device, _Object object) { return downcast<r10788_device &>(device).m_display.set_callback(object); }
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
// device-level overrides
virtual void device_start();
virtual void device_reset();
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
static const device_timer_id TIMER_DISPLAY = 0;
static const device_timer_id TIMER_DISPLAY = 0;
UINT8 m_reg[2][16]; //!< display registers
UINT8 m_ktr; //!< transfer keyboard return value
UINT8 m_kts; //!< transfer keyboard strobe value
UINT8 m_kla; //!< display register A value
UINT8 m_klb; //!< display register B value
UINT8 m_mask_a; //!< display enable bits for A
UINT8 m_mask_b; //!< display enable bits for B
UINT8 m_ker; //!< keyboard error value
int m_io_counter; //!< current I/O register index
int m_scan_counter; //!< current display scan
devcb_write8 m_display; //!< display updater
emu_timer* m_timer; //!< timer running at clock / 18 / 36
UINT8 m_reg[2][16]; //!< display registers
UINT8 m_ktr; //!< transfer keyboard return value
UINT8 m_kts; //!< transfer keyboard strobe value
UINT8 m_kla; //!< display register A value
UINT8 m_klb; //!< display register B value
UINT8 m_mask_a; //!< display enable bits for A
UINT8 m_mask_b; //!< display enable bits for B
UINT8 m_ker; //!< keyboard error value
int m_io_counter; //!< current I/O register index
int m_scan_counter; //!< current display scan
devcb_write8 m_display; //!< display updater
emu_timer* m_timer; //!< timer running at clock / 18 / 36
};
extern const device_type R10788;

68
src/emu/machine/ra17xx.c
View File

@ -40,7 +40,7 @@
#include "emu.h"
#include "machine/ra17xx.h"
#define VERBOSE 1
#define VERBOSE 1
#if VERBOSE
#define LOG(x) logerror x
#else
@ -56,10 +56,10 @@
const device_type RA17XX = &device_creator<ra17xx_device>;
ra17xx_device::ra17xx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: device_t(mconfig, RA17XX, "Rockwell A17XX", tag, owner, clock, "ra17xx", __FILE__),
m_enable(false),
m_iord(*this),
m_iowr(*this)
: device_t(mconfig, RA17XX, "Rockwell A17XX", tag, owner, clock, "ra17xx", __FILE__),
m_enable(false),
m_iord(*this),
m_iowr(*this)
{
}
@ -68,10 +68,10 @@ ra17xx_device::ra17xx_device(const machine_config &mconfig, const char *tag, dev
*/
void ra17xx_device::device_start()
{
m_iord.resolve();
m_iowr.resolve();
m_iord.resolve();
m_iowr.resolve();
save_item(NAME(m_line));
save_item(NAME(m_line));
}
/**
@ -79,7 +79,7 @@ void ra17xx_device::device_start()
*/
void ra17xx_device::device_reset()
{
memset(m_line, 0, sizeof(m_line));
memset(m_line, 0, sizeof(m_line));
}
@ -97,36 +97,36 @@ void ra17xx_device::device_reset()
WRITE8_MEMBER( ra17xx_device::io_w )
{
assert(offset < 16);
m_bl = (data >> 4) & 15; // BL on the data bus most significant bits
if (offset & 1) {
// SOS command
if (data & (1 << 3)) {
m_line[m_bl] = 1; // enable output
assert(offset < 16);
m_bl = (data >> 4) & 15; // BL on the data bus most significant bits
if (offset & 1) {
// SOS command
if (data & (1 << 3)) {
m_line[m_bl] = 1; // enable output
// if (m_enable)
m_iowr(m_bl, 1, 1);
} else {
m_line[m_bl] = 0; // disable output
m_iowr(m_bl, 1, 1);
} else {
m_line[m_bl] = 0; // disable output
// if (m_enable)
m_iowr(m_bl, 0, 1);
}
} else {
// SES command
if (data & (1 << 3)) {
// enable all outputs
m_enable = true;
for (int i = 0; i < 16; i++)
m_iowr(i, m_line[i], 1);
} else {
// disable all outputs
m_enable = false;
}
}
m_iowr(m_bl, 0, 1);
}
} else {
// SES command
if (data & (1 << 3)) {
// enable all outputs
m_enable = true;
for (int i = 0; i < 16; i++)
m_iowr(i, m_line[i], 1);
} else {
// disable all outputs
m_enable = false;
}
}
}
READ8_MEMBER( ra17xx_device::io_r )
{
assert(offset < 16);
return (m_iord(m_bl) & 1) ? 0x0f : 0x07;
assert(offset < 16);
return (m_iord(m_bl) & 1) ? 0x0f : 0x07;
}

34
src/emu/machine/ra17xx.h
View File

@ -23,34 +23,32 @@
/* Set the read line handler */
#define MCFG_RA17XX_READ(_devcb) \
ra17xx_device::set_iord(*device, DEVCB_##_devcb); \
ra17xx_device::set_iord(*device, DEVCB_##_devcb);
/* Set the write line handler */
#define MCFG_RA17XX_WRITE(_devcb) \
ra17xx_device::set_iowr(*device, DEVCB_##_devcb); \
ra17xx_device::set_iowr(*device, DEVCB_##_devcb);
class ra17xx_device : public device_t
{
public:
ra17xx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~ra17xx_device() {}
ra17xx_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~ra17xx_device() {}
DECLARE_READ8_MEMBER ( io_r );
DECLARE_WRITE8_MEMBER( io_w );
DECLARE_READ8_MEMBER ( io_r );
DECLARE_WRITE8_MEMBER( io_w );
template<class _Object> static devcb_base &set_iord(device_t &device, _Object object) { return downcast<ra17xx_device &>(device).m_iord.set_callback(object); }
template<class _Object> static devcb_base &set_iowr(device_t &device, _Object object) { return downcast<ra17xx_device &>(device).m_iowr.set_callback(object); }
template<class _Object> static devcb_base &set_iord(device_t &device, _Object object) { return downcast<ra17xx_device &>(device).m_iord.set_callback(object); }
template<class _Object> static devcb_base &set_iowr(device_t &device, _Object object) { return downcast<ra17xx_device &>(device).m_iowr.set_callback(object); }
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
// device-level overrides
virtual void device_start();
virtual void device_reset();
private:
UINT8 m_line[16]; //!< input/output flip-flops for 16 I/O lines
UINT8 m_bl; //!< value of BL during the most recent output
bool m_enable; //!< true if outputs are enabled
devcb_read8 m_iord; //!< input line (read, offset = line, data = 0/1)
devcb_write8 m_iowr; //!< output line (write, offset = line, data = 0/1)
UINT8 m_line[16]; //!< input/output flip-flops for 16 I/O lines
UINT8 m_bl; //!< value of BL during the most recent output
bool m_enable; //!< true if outputs are enabled
devcb_read8 m_iord; //!< input line (read, offset = line, data = 0/1)
devcb_write8 m_iowr; //!< output line (write, offset = line, data = 0/1)
};
extern const device_type RA17XX;

6
src/emu/machine/smpc.c
View File

@ -393,7 +393,7 @@ void saturn_state::smpc_analog_pad( UINT8 pad_num, UINT8 offset, UINT8 id)
void saturn_state::smpc_keyboard(UINT8 pad_num, UINT8 offset)
{
UINT16 game_key;
game_key = 0xffff;
game_key ^= ((ioport("KEYS_1")->read() & 0x80) << 8); // right
@ -415,8 +415,8 @@ void saturn_state::smpc_keyboard(UINT8 pad_num, UINT8 offset)
m_smpc.OREG[2+pad_num*offset] = game_key>>8; // game buttons, TODO
m_smpc.OREG[3+pad_num*offset] = game_key & 0xff;
/*
Keyboard Status hook-up
TODO: how shift key actually works? EGWord uses it in order to switch between hiragana and katakana modes.
Keyboard Status hook-up
TODO: how shift key actually works? EGWord uses it in order to switch between hiragana and katakana modes.
x--- ---- 0
-x-- ---- caps lock
--x- ---- num lock

2
src/emu/machine/steppers.c
View File

@ -46,7 +46,7 @@ stepper_device::stepper_device(const machine_config &mconfig, const char *tag, d
m_optic_cb(*this)
{
m_max_steps=(48*2);
}
}
///////////////////////////////////////////////////////////////////////////
void stepper_device::update_optic()

40
src/emu/machine/steppers.h
View File

@ -31,29 +31,29 @@
#define MCFG_STEPPER_ADD(_tag)\
MCFG_DEVICE_ADD(_tag, STEPPER, 0)
#define MCFG_STEPPER_REEL_TYPE(_data) \
stepper_device::set_reel_type(*device, _data);
/* total size of reel (in half steps) */
#define MCFG_STEPPER_MAX_STEPS(_write) \
stepper_device::set_max_steps(*device, _write);
stepper_device::set_max_steps(*device, _write);
/* start position of index (in half steps) */
#define MCFG_STEPPER_START_INDEX(_write) \
stepper_device::set_start_index(*device, _write);
stepper_device::set_start_index(*device, _write);
/* end position of index (in half steps) */
/* end position of index (in half steps) */
#define MCFG_STEPPER_END_INDEX(_write) \
stepper_device::set_end_index(*device, _write);
stepper_device::set_end_index(*device, _write);
/* end position of index (in half steps) */
/* end position of index (in half steps) */
#define MCFG_STEPPER_INDEX_PATTERN(_write) \
stepper_device::set_index_pattern(*device, _write);
stepper_device::set_index_pattern(*device, _write);
/* Phase at 0, for opto linkage */
#define MCFG_STEPPER_INIT_PHASE(_write) \
stepper_device::set_init_phase(*device, _write);
stepper_device::set_init_phase(*device, _write);
#define MCFG_STARPOINT_48STEP_ADD(_tag)\
MCFG_STEPPER_ADD(_tag)\
@ -103,9 +103,9 @@ public:
template<class _Object> static devcb_base &set_optic_handler(device_t &device, _Object object) { return downcast<stepper_device &>(device).m_optic_cb.set_callback(object); }
static void set_reel_type(device_t &device, UINT8 type)
{
downcast<stepper_device &>(device).m_type = type;
static void set_reel_type(device_t &device, UINT8 type)
{
downcast<stepper_device &>(device).m_type = type;
switch ( type )
{ default:
case STARPOINT_48STEP_REEL: /* STARPOINT RMxxx */
@ -127,17 +127,17 @@ public:
case ECOIN_200STEP_REEL :
downcast<stepper_device &>(device).m_max_steps = (200*2);
break;
}
}
}
static void set_max_steps(device_t &device, INT16 steps) { downcast<stepper_device &>(device).m_max_steps = steps; }
static void set_start_index(device_t &device, INT16 index) { downcast<stepper_device &>(device).m_index_start = index; }
static void set_end_index(device_t &device, INT16 index) { downcast<stepper_device &>(device).m_index_end = index; }
static void set_index_pattern(device_t &device, INT16 index) { downcast<stepper_device &>(device).m_index_patt = index; }
static void set_init_phase(device_t &device, UINT8 phase)
static void set_end_index(device_t &device, INT16 index) { downcast<stepper_device &>(device).m_index_end = index; }
static void set_index_pattern(device_t &device, INT16 index) { downcast<stepper_device &>(device).m_index_patt = index; }
static void set_init_phase(device_t &device, UINT8 phase)
{
downcast<stepper_device &>(device).m_initphase = phase;
downcast<stepper_device &>(device).m_phase = phase;
downcast<stepper_device &>(device).m_old_phase = phase;
downcast<stepper_device &>(device).m_initphase = phase;
downcast<stepper_device &>(device).m_phase = phase;
downcast<stepper_device &>(device).m_old_phase = phase;
}
/* update a motor */

3080
src/emu/rendlay.c
View File

File diff suppressed because it is too large Load Diff

404
src/emu/rendlay.h
View File

@ -20,14 +20,14 @@
enum item_layer
{
ITEM_LAYER_FIRST = 0,
ITEM_LAYER_BACKDROP = ITEM_LAYER_FIRST,
ITEM_LAYER_SCREEN,
ITEM_LAYER_OVERLAY,
ITEM_LAYER_BEZEL,
ITEM_LAYER_CPANEL,
ITEM_LAYER_MARQUEE,
ITEM_LAYER_MAX
ITEM_LAYER_FIRST = 0,
ITEM_LAYER_BACKDROP = ITEM_LAYER_FIRST,
ITEM_LAYER_SCREEN,
ITEM_LAYER_OVERLAY,
ITEM_LAYER_BEZEL,
ITEM_LAYER_CPANEL,
ITEM_LAYER_MARQUEE,
ITEM_LAYER_MAX
};
DECLARE_ENUM_OPERATORS(item_layer);
@ -43,140 +43,140 @@ DECLARE_ENUM_OPERATORS(item_layer);
// a layout_element is a single named element, which may have multiple components
class layout_element
{
friend class simple_list<layout_element>;
friend class simple_list<layout_element>;
public:
// construction/destruction
layout_element(running_machine &machine, xml_data_node &elemnode, const char *dirname);
virtual ~layout_element();
// construction/destruction
layout_element(running_machine &machine, xml_data_node &elemnode, const char *dirname);
virtual ~layout_element();
// getters
layout_element *next() const { return m_next; }
const char *name() const { return m_name; }
running_machine &machine() const { return m_machine; }
int default_state() const { return m_defstate; }
int maxstate() const { return m_maxstate; }
render_texture *state_texture(int state);
// getters
layout_element *next() const { return m_next; }
const char *name() const { return m_name; }
running_machine &machine() const { return m_machine; }
int default_state() const { return m_defstate; }
int maxstate() const { return m_maxstate; }
render_texture *state_texture(int state);
private:
// a component represents an image, rectangle, or disk in an element
class component
{
friend class layout_element;
friend class simple_list<component>;
// a component represents an image, rectangle, or disk in an element
class component
{
friend class layout_element;
friend class simple_list<component>;
public:
// construction/destruction
component(running_machine &machine, xml_data_node &compnode, const char *dirname);
~component();
public:
// construction/destruction
component(running_machine &machine, xml_data_node &compnode, const char *dirname);
~component();
// getters
component *next() const { return m_next; }
const render_bounds &bounds() const { return m_bounds; }
// getters
component *next() const { return m_next; }
const render_bounds &bounds() const { return m_bounds; }
// operations
void draw(running_machine &machine, bitmap_argb32 &dest, const rectangle &bounds, int state);
// operations
void draw(running_machine &machine, bitmap_argb32 &dest, const rectangle &bounds, int state);
private:
// component types
enum component_type
{
CTYPE_INVALID = 0,
CTYPE_IMAGE,
CTYPE_RECT,
CTYPE_DISK,
CTYPE_TEXT,
CTYPE_LED7SEG,
CTYPE_LED8SEG_GTS1,
CTYPE_LED14SEG,
CTYPE_LED16SEG,
CTYPE_LED14SEGSC,
CTYPE_LED16SEGSC,
CTYPE_DOTMATRIX,
CTYPE_DOTMATRIX5DOT,
CTYPE_DOTMATRIXDOT,
CTYPE_SIMPLECOUNTER,
CTYPE_REEL,
CTYPE_MAX
};
private:
// component types
enum component_type
{
CTYPE_INVALID = 0,
CTYPE_IMAGE,
CTYPE_RECT,
CTYPE_DISK,
CTYPE_TEXT,
CTYPE_LED7SEG,
CTYPE_LED8SEG_GTS1,
CTYPE_LED14SEG,
CTYPE_LED16SEG,
CTYPE_LED14SEGSC,
CTYPE_LED16SEGSC,
CTYPE_DOTMATRIX,
CTYPE_DOTMATRIX5DOT,
CTYPE_DOTMATRIXDOT,
CTYPE_SIMPLECOUNTER,
CTYPE_REEL,
CTYPE_MAX
};
// helpers
void draw_rect(bitmap_argb32 &dest, const rectangle &bounds);
void draw_disk(bitmap_argb32 &dest, const rectangle &bounds);
void draw_text(running_machine &machine, bitmap_argb32 &dest, const rectangle &bounds);
void draw_simplecounter(running_machine &machine, bitmap_argb32 &dest, const rectangle &bounds, int state);
void draw_reel(running_machine &machine, bitmap_argb32 &dest, const rectangle &bounds, int state);
void draw_beltreel(running_machine &machine, bitmap_argb32 &dest, const rectangle &bounds, int state);
void load_bitmap();
void load_reel_bitmap(int number);
void draw_led7seg(bitmap_argb32 &dest, const rectangle &bounds, int pattern);
void draw_led8seg_gts1(bitmap_argb32 &dest, const rectangle &bounds, int pattern);
void draw_led14seg(bitmap_argb32 &dest, const rectangle &bounds, int pattern);
void draw_led14segsc(bitmap_argb32 &dest, const rectangle &bounds, int pattern);
void draw_led16seg(bitmap_argb32 &dest, const rectangle &bounds, int pattern);
void draw_led16segsc(bitmap_argb32 &dest, const rectangle &bounds, int pattern);
void draw_dotmatrix(int dots,bitmap_argb32 &dest, const rectangle &bounds, int pattern);
void draw_segment_horizontal_caps(bitmap_argb32 &dest, int minx, int maxx, int midy, int width, int caps, rgb_t color);
void draw_segment_horizontal(bitmap_argb32 &dest, int minx, int maxx, int midy, int width, rgb_t color);
void draw_segment_vertical_caps(bitmap_argb32 &dest, int miny, int maxy, int midx, int width, int caps, rgb_t color);
void draw_segment_vertical(bitmap_argb32 &dest, int miny, int maxy, int midx, int width, rgb_t color);
void draw_segment_diagonal_1(bitmap_argb32 &dest, int minx, int maxx, int miny, int maxy, int width, rgb_t color);
void draw_segment_diagonal_2(bitmap_argb32 &dest, int minx, int maxx, int miny, int maxy, int width, rgb_t color);
void draw_segment_decimal(bitmap_argb32 &dest, int midx, int midy, int width, rgb_t color);
void draw_segment_comma(bitmap_argb32 &dest, int minx, int maxx, int miny, int maxy, int width, rgb_t color);
void apply_skew(bitmap_argb32 &dest, int skewwidth);
// helpers
void draw_rect(bitmap_argb32 &dest, const rectangle &bounds);
void draw_disk(bitmap_argb32 &dest, const rectangle &bounds);
void draw_text(running_machine &machine, bitmap_argb32 &dest, const rectangle &bounds);
void draw_simplecounter(running_machine &machine, bitmap_argb32 &dest, const rectangle &bounds, int state);
void draw_reel(running_machine &machine, bitmap_argb32 &dest, const rectangle &bounds, int state);
void draw_beltreel(running_machine &machine, bitmap_argb32 &dest, const rectangle &bounds, int state);
void load_bitmap();
void load_reel_bitmap(int number);
void draw_led7seg(bitmap_argb32 &dest, const rectangle &bounds, int pattern);
void draw_led8seg_gts1(bitmap_argb32 &dest, const rectangle &bounds, int pattern);
void draw_led14seg(bitmap_argb32 &dest, const rectangle &bounds, int pattern);
void draw_led14segsc(bitmap_argb32 &dest, const rectangle &bounds, int pattern);
void draw_led16seg(bitmap_argb32 &dest, const rectangle &bounds, int pattern);
void draw_led16segsc(bitmap_argb32 &dest, const rectangle &bounds, int pattern);
void draw_dotmatrix(int dots,bitmap_argb32 &dest, const rectangle &bounds, int pattern);
void draw_segment_horizontal_caps(bitmap_argb32 &dest, int minx, int maxx, int midy, int width, int caps, rgb_t color);
void draw_segment_horizontal(bitmap_argb32 &dest, int minx, int maxx, int midy, int width, rgb_t color);
void draw_segment_vertical_caps(bitmap_argb32 &dest, int miny, int maxy, int midx, int width, int caps, rgb_t color);
void draw_segment_vertical(bitmap_argb32 &dest, int miny, int maxy, int midx, int width, rgb_t color);
void draw_segment_diagonal_1(bitmap_argb32 &dest, int minx, int maxx, int miny, int maxy, int width, rgb_t color);
void draw_segment_diagonal_2(bitmap_argb32 &dest, int minx, int maxx, int miny, int maxy, int width, rgb_t color);
void draw_segment_decimal(bitmap_argb32 &dest, int midx, int midy, int width, rgb_t color);
void draw_segment_comma(bitmap_argb32 &dest, int minx, int maxx, int miny, int maxy, int width, rgb_t color);
void apply_skew(bitmap_argb32 &dest, int skewwidth);
#define MAX_BITMAPS 32
#define MAX_BITMAPS 32
// internal state
component * m_next; // link to next component
component_type m_type; // type of component
int m_state; // state where this component is visible (-1 means all states)
render_bounds m_bounds; // bounds of the element
render_color m_color; // color of the element
astring m_string; // string for text components
int m_digits; // number of digits for simple counters
int m_textalign; // text alignment to box
bitmap_argb32 m_bitmap[MAX_BITMAPS]; // source bitmap for images
astring m_dirname; // directory name of image file (for lazy loading)
auto_pointer<emu_file> m_file[MAX_BITMAPS]; // file object for reading image/alpha files
astring m_imagefile[MAX_BITMAPS]; // name of the image file (for lazy loading)
astring m_alphafile[MAX_BITMAPS]; // name of the alpha file (for lazy loading)
bool m_hasalpha[MAX_BITMAPS]; // is there any alpha component present?
// internal state
component * m_next; // link to next component
component_type m_type; // type of component
int m_state; // state where this component is visible (-1 means all states)
render_bounds m_bounds; // bounds of the element
render_color m_color; // color of the element
astring m_string; // string for text components
int m_digits; // number of digits for simple counters
int m_textalign; // text alignment to box
bitmap_argb32 m_bitmap[MAX_BITMAPS]; // source bitmap for images
astring m_dirname; // directory name of image file (for lazy loading)
auto_pointer<emu_file> m_file[MAX_BITMAPS]; // file object for reading image/alpha files
astring m_imagefile[MAX_BITMAPS]; // name of the image file (for lazy loading)
astring m_alphafile[MAX_BITMAPS]; // name of the alpha file (for lazy loading)
bool m_hasalpha[MAX_BITMAPS]; // is there any alpha component present?
// stuff for fruit machine reels
// basically made up of multiple text strings / gfx
int m_numstops;
astring m_stopnames[MAX_BITMAPS];
int m_stateoffset;
int m_reelreversed;
int m_numsymbolsvisible;
int m_beltreel;
};
// stuff for fruit machine reels
// basically made up of multiple text strings / gfx
int m_numstops;
astring m_stopnames[MAX_BITMAPS];
int m_stateoffset;
int m_reelreversed;
int m_numsymbolsvisible;
int m_beltreel;
};
// a texture encapsulates a texture for a given element in a given state
class texture
{
public:
texture();
~texture();
// a texture encapsulates a texture for a given element in a given state
class texture
{
public:
texture();
~texture();
layout_element * m_element; // pointer back to the element
render_texture * m_texture; // texture for this state
int m_state; // associated state number
};
layout_element * m_element; // pointer back to the element
render_texture * m_texture; // texture for this state
int m_state; // associated state number
};
// internal helpers
static void element_scale(bitmap_argb32 &dest, bitmap_argb32 &source, const rectangle &sbounds, void *param);
// internal helpers
static void element_scale(bitmap_argb32 &dest, bitmap_argb32 &source, const rectangle &sbounds, void *param);
// internal state
layout_element * m_next; // link to next element
running_machine & m_machine; // reference to the owning machine
astring m_name; // name of this element
simple_list<component> m_complist; // list of components
int m_defstate; // default state of this element
int m_maxstate; // maximum state value for all components
dynamic_array<texture> m_elemtex; // array of element textures used for managing the scaled bitmaps
// internal state
layout_element * m_next; // link to next element
running_machine & m_machine; // reference to the owning machine
astring m_name; // name of this element
simple_list<component> m_complist; // list of components
int m_defstate; // default state of this element
int m_maxstate; // maximum state value for all components
dynamic_array<texture> m_elemtex; // array of element textures used for managing the scaled bitmaps
};
@ -185,83 +185,83 @@ private:
// a layout_view encapsulates a named list of items
class layout_view
{
friend class simple_list<layout_view>;
friend class simple_list<layout_view>;
public:
// an item is a single backdrop, screen, overlay, bezel, cpanel, or marquee item
class item
{
friend class layout_view;
friend class simple_list<item>;
// an item is a single backdrop, screen, overlay, bezel, cpanel, or marquee item
class item
{
friend class layout_view;
friend class simple_list<item>;
public:
// construction/destruction
item(running_machine &machine, xml_data_node &itemnode, simple_list<layout_element> &elemlist);
virtual ~item();
public:
// construction/destruction
item(running_machine &machine, xml_data_node &itemnode, simple_list<layout_element> &elemlist);
virtual ~item();
// getters
item *next() const { return m_next; }
layout_element *element() const { return m_element; }
screen_device *screen() { return m_screen; }
const render_bounds &bounds() const { return m_bounds; }
const render_color &color() const { return m_color; }
int orientation() const { return m_orientation; }
render_container *screen_container(running_machine &machine) const;
bool has_input() const { return bool(m_input_tag); }
const char *input_tag_and_mask(ioport_value &mask) const { mask = m_input_mask; return m_input_tag; }
// getters
item *next() const { return m_next; }
layout_element *element() const { return m_element; }
screen_device *screen() { return m_screen; }
const render_bounds &bounds() const { return m_bounds; }
const render_color &color() const { return m_color; }
int orientation() const { return m_orientation; }
render_container *screen_container(running_machine &machine) const;
bool has_input() const { return bool(m_input_tag); }
const char *input_tag_and_mask(ioport_value &mask) const { mask = m_input_mask; return m_input_tag; }
// fetch state based on configured source
int state() const;
// fetch state based on configured source
int state() const;
private:
// internal state
item * m_next; // link to next item
layout_element * m_element; // pointer to the associated element (non-screens only)
astring m_output_name; // name of this item
astring m_input_tag; // input tag of this item
ioport_value m_input_mask; // input mask of this item
screen_device * m_screen; // pointer to screen
int m_orientation; // orientation of this item
render_bounds m_bounds; // bounds of the item
render_bounds m_rawbounds; // raw (original) bounds of the item
render_color m_color; // color of the item
};
private:
// internal state
item * m_next; // link to next item
layout_element * m_element; // pointer to the associated element (non-screens only)
astring m_output_name; // name of this item
astring m_input_tag; // input tag of this item
ioport_value m_input_mask; // input mask of this item
screen_device * m_screen; // pointer to screen
int m_orientation; // orientation of this item
render_bounds m_bounds; // bounds of the item
render_bounds m_rawbounds; // raw (original) bounds of the item
render_color m_color; // color of the item
};
// construction/destruction
layout_view(running_machine &machine, xml_data_node &viewnode, simple_list<layout_element> &elemlist);
virtual ~layout_view();
// construction/destruction
layout_view(running_machine &machine, xml_data_node &viewnode, simple_list<layout_element> &elemlist);
virtual ~layout_view();
// getters
layout_view *next() const { return m_next; }
item *first_item(item_layer layer) const;
const char *name() const { return m_name; }
const render_screen_list &screens() const { return m_screens; }
bool layer_enabled(item_layer layer) const { return m_layenabled[layer]; }
// getters
layout_view *next() const { return m_next; }
item *first_item(item_layer layer) const;
const char *name() const { return m_name; }
const render_screen_list &screens() const { return m_screens; }
bool layer_enabled(item_layer layer) const { return m_layenabled[layer]; }
//
bool has_art() const { return (m_backdrop_list.count() + m_overlay_list.count() + m_bezel_list.count() + m_cpanel_list.count() + m_marquee_list.count() != 0); }
float effective_aspect(render_layer_config config) const { return (config.zoom_to_screen() && m_screens.count() != 0) ? m_scraspect : m_aspect; }
//
bool has_art() const { return (m_backdrop_list.count() + m_overlay_list.count() + m_bezel_list.count() + m_cpanel_list.count() + m_marquee_list.count() != 0); }
float effective_aspect(render_layer_config config) const { return (config.zoom_to_screen() && m_screens.count() != 0) ? m_scraspect : m_aspect; }
// operations
void recompute(render_layer_config layerconfig);
// operations
void recompute(render_layer_config layerconfig);
private:
// internal state
layout_view * m_next; // pointer to next layout in the list
astring m_name; // name of the layout
float m_aspect; // X/Y of the layout
float m_scraspect; // X/Y of the screen areas
render_screen_list m_screens; // list of active screens
render_bounds m_bounds; // computed bounds of the view
render_bounds m_scrbounds; // computed bounds of the screens within the view
render_bounds m_expbounds; // explicit bounds of the view
bool m_layenabled[ITEM_LAYER_MAX]; // is this layer enabled?
simple_list<item> m_backdrop_list; // list of backdrop items
simple_list<item> m_screen_list; // list of screen items
simple_list<item> m_overlay_list; // list of overlay items
simple_list<item> m_bezel_list; // list of bezel items
simple_list<item> m_cpanel_list; // list of marquee items
simple_list<item> m_marquee_list; // list of marquee items
// internal state
layout_view * m_next; // pointer to next layout in the list
astring m_name; // name of the layout
float m_aspect; // X/Y of the layout
float m_scraspect; // X/Y of the screen areas
render_screen_list m_screens; // list of active screens
render_bounds m_bounds; // computed bounds of the view
render_bounds m_scrbounds; // computed bounds of the screens within the view
render_bounds m_expbounds; // explicit bounds of the view
bool m_layenabled[ITEM_LAYER_MAX]; // is this layer enabled?
simple_list<item> m_backdrop_list; // list of backdrop items
simple_list<item> m_screen_list; // list of screen items
simple_list<item> m_overlay_list; // list of overlay items
simple_list<item> m_bezel_list; // list of bezel items
simple_list<item> m_cpanel_list; // list of marquee items
simple_list<item> m_marquee_list; // list of marquee items
};
@ -270,23 +270,23 @@ private:
// a layout_file consists of a list of elements and a list of views
class layout_file
{
friend class simple_list<layout_file>;
friend class simple_list<layout_file>;
public:
// construction/destruction
layout_file(running_machine &machine, xml_data_node &rootnode, const char *dirname);
virtual ~layout_file();
// construction/destruction
layout_file(running_machine &machine, xml_data_node &rootnode, const char *dirname);
virtual ~layout_file();
// getters
layout_file *next() const { return m_next; }
layout_element *first_element() const { return m_elemlist.first(); }
layout_view *first_view() const { return m_viewlist.first(); }
// getters
layout_file *next() const { return m_next; }
layout_element *first_element() const { return m_elemlist.first(); }
layout_view *first_view() const { return m_viewlist.first(); }
private:
// internal state
layout_file * m_next; // pointer to the next file in the list
simple_list<layout_element> m_elemlist; // list of shared layout elements
simple_list<layout_view> m_viewlist; // list of views
// internal state
layout_file * m_next; // pointer to the next file in the list
simple_list<layout_element> m_elemlist; // list of shared layout elements
simple_list<layout_view> m_viewlist; // list of views
};

6
src/emu/sound/tms5110.c
View File

@ -1056,7 +1056,7 @@ READ8_MEMBER( tms5110_device::ctl_r )
else if (m_state == CTL_STATE_OUTPUT)
{
if (DEBUG_5110) logerror("Status read while outputting buffer (buffer=%2d)\n", m_CTL_buffer);
return (m_CTL_buffer);
return (m_CTL_buffer);
}
else // we're reading with the bus in input mode! just return the last thing written to the bus
{
@ -1150,8 +1150,8 @@ void tms5110_device::sound_stream_update(sound_stream &stream, stream_sample_t *
/******************************************************************************
tms5110_set_frequency -- adjusts the playback frequency
TODO: kill this function; we should be adjusting the tms51xx device clock itself,
not setting it here!
TODO: kill this function; we should be adjusting the tms51xx device clock itself,
not setting it here!
******************************************************************************/

2
src/emu/video/315_5124.c
View File

@ -1420,7 +1420,7 @@ void sega315_5378_device::blit_scanline( int *line_buffer, int *priority_selecte
}
while (++x < 208);
}
/* border on right side of the GG active screen */
do
{

4
src/emu/video/stvvdp2.c
View File

@ -5725,10 +5725,10 @@ READ16_MEMBER ( saturn_state::saturn_vdp2_regs_r )
m_vdp2_regs[offset] = (STV_VDP2_VRAMSZ << 15) |
((0 << 0) & 0xf); // VDP2 version
/* Games basically r/w the entire VDP2 register area when this is tripped. (example: Silhouette Mirage)
/* Games basically r/w the entire VDP2 register area when this is tripped. (example: Silhouette Mirage)
Disable log for the time being. */
//if(!space.debugger_access())
// printf("Warning: VDP2 version read\n");
// printf("Warning: VDP2 version read\n");
break;
}

2
src/emu/video/tea1002.c
View File

@ -18,7 +18,7 @@
const float tea1002_device::m_luminance[] =
{
0, 22.5, 44, 66.5, 8.5, 31, 52.5, 100, // INV = 0
0, 22.5, 44, 66.5, 8.5, 31, 52.5, 100, // INV = 0
75, 52.5, 31, 8.5, 66.5, 44, 22.5, 0 // INV = 1
};

56
src/lib/formats/dcp_dsk.c
View File

@ -7,17 +7,17 @@
PC98 DCP & DCU disk images
0xA2 header, followed by track data
header[0] - disk format
header[0] - disk format
header[1-0xA1] - track map (1=track used, 0=track unused/unformatted)
header[0xA2] - all tracks used?
header[0xA2] - all tracks used?
(there seems to be a diff in its usage between DCP and DCU)
TODO:
TODO:
- add support for track map. images available for tests were all
of type 0x01, with all 154 tracks present. combined with pete_j
reporting some images have faulty track map, we need some more
test cases to properly handle these disks!
*********************************************************************/
#include "emu.h"
@ -52,7 +52,7 @@ int dcp_format::identify(io_generic *io, UINT32 form_factor)
io_generic_read(io, h, 0, 0xa2);
// First byte is the disk format (see below in load() for details)
switch (h[0])
switch (h[0])
{
case 0x01:
default:
@ -99,7 +99,7 @@ int dcp_format::identify(io_generic *io, UINT32 form_factor)
if (h[i])
count_tracks++;
// in theory track map should be enough (former check), but some images have it wrong!
// in theory track map should be enough (former check), but some images have it wrong!
// hence, if this check fails, we also allow for images with all tracks and wrong track map
if (size - 0xa2 == (heads * count_tracks * spt * bps) || size - 0xa2 == (heads * tracks * spt * bps))
return 100;
@ -107,7 +107,7 @@ int dcp_format::identify(io_generic *io, UINT32 form_factor)
// for disk type 0x11 the head 0 track 0 has 26 sectors of half width, so we need to compensate calculation
if (is_hdb && (size - 0xa2 + (0x80 * 26) == (heads * count_tracks * spt * bps) || size - 0xa2 + (0x80 * 26) == (heads * tracks * spt * bps)))
return 100;
return 0;
}
@ -116,11 +116,11 @@ bool dcp_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
UINT8 h[0xa2];
int heads, tracks, spt, bps;
bool is_hdb = false;
io_generic_read(io, h, 0, 0xa2);
// First byte is the disk format:
switch (h[0])
switch (h[0])
{
case 0x01:
default:
@ -212,11 +212,11 @@ bool dcp_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
if (!is_hdb)
{
for (int track = 0; track < tracks; track++)
for (int head = 0; head < heads; head++)
for (int head = 0; head < heads; head++)
{
io_generic_read(io, sect_data, 0xa2 + bps * spt * (track * heads + head), bps * spt);
for (int i = 0; i < spt; i++)
for (int i = 0; i < spt; i++)
{
sects[i].track = track;
sects[i].head = head;
@ -227,16 +227,16 @@ bool dcp_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
sects[i].bad_crc = false;
sects[i].data = sect_data + i * bps;
}
build_pc_track_mfm(track, head, image, cell_count, spt, sects, calc_default_pc_gap3_size(form_factor, bps));
}
}
else // FIXME: the code below is untested, because no image was found... there might be some silly mistake in the disk geometry!
else // FIXME: the code below is untested, because no image was found... there might be some silly mistake in the disk geometry!
{
// Read Head 0 Track 0 is FM with 26 sectors of 128bytes instead of 256
io_generic_read(io, sect_data, 0xa2, 128 * spt);
for (int i = 0; i < spt; i++)
for (int i = 0; i < spt; i++)
{
sects[i].track = 0;
sects[i].head = 0;
@ -247,13 +247,13 @@ bool dcp_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
sects[i].bad_crc = false;
sects[i].data = sect_data + i * 128;
}
build_pc_track_fm(0, 0, image, cell_count, spt, sects, calc_default_pc_gap3_size(form_factor, 128));
// Read Head 1 Track 0 is MFM with 26 sectors of 256bytes
io_generic_read(io, sect_data, 0xa2 + 128 * spt, bps * spt);
for (int i = 0; i < spt; i++)
for (int i = 0; i < spt; i++)
{
sects[i].track = 0;
sects[i].head = 1;
@ -264,17 +264,17 @@ bool dcp_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
sects[i].bad_crc = false;
sects[i].data = sect_data + i * bps;
}
build_pc_track_mfm(0, 1, image, cell_count, spt, sects, calc_default_pc_gap3_size(form_factor, bps));
// Read other tracks as usual
UINT32 data_offs = 0xa2 + (26 * 0x80) + (26 * 0x100);
for (int track = 1; track < tracks; track++)
for (int head = 0; head < heads; head++)
for (int head = 0; head < heads; head++)
{
io_generic_read(io, sect_data, data_offs + bps * spt * ((track - 1) * heads + head), bps * spt);
for (int i = 0; i < spt; i++)
for (int i = 0; i < spt; i++)
{
sects[i].track = track;
sects[i].head = head;
@ -285,11 +285,11 @@ bool dcp_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
sects[i].bad_crc = false;
sects[i].data = sect_data + i * bps;
}
build_pc_track_mfm(track, head, image, cell_count, spt, sects, calc_default_pc_gap3_size(form_factor, bps));
}
}
return true;
}

20
src/lib/formats/dip_dsk.c
View File

@ -5,11 +5,11 @@
formats/dip_dsk.h
PC98 DIP disk images
0x100 header, followed by track data
TODO:
- Investigate header structure
- Investigate header structure
- can this format be used to support different disc types?
*********************************************************************/
@ -56,21 +56,21 @@ bool dip_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
tracks = 77;
spt = 8;
bps = 1024;
int cell_count = form_factor == floppy_image::FF_35 ? 200000 : 166666;
int ssize;
for (ssize = 0; (128 << ssize) < bps; ssize++);
desc_pc_sector sects[256];
UINT8 sect_data[65536];
for (int track = 0; track < tracks; track++)
for (int head = 0; head < heads; head++)
for (int head = 0; head < heads; head++)
{
io_generic_read(io, sect_data, 0x100 + bps * spt * (track * heads + head), bps * spt);
for (int i = 0; i < spt; i++)
for (int i = 0; i < spt; i++)
{
sects[i].track = track;
sects[i].head = head;
@ -81,7 +81,7 @@ bool dip_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
sects[i].bad_crc = false;
sects[i].data = sect_data + i * bps;
}
build_pc_track_mfm(track, head, image, cell_count, spt, sects, calc_default_pc_gap3_size(form_factor, bps));
}

38
src/lib/formats/fdd_dsk.c
View File

@ -5,7 +5,7 @@
formats/fdd_dsk.h
PC98 FDD disk images
0xC3FC header, followed by track data
Sector map starts at offset 0xDC, with 12bytes for each sector
@ -15,15 +15,15 @@
- 0x2 = sector number
- 0x3 = sector size (128 << this byte)
- 0x4 = fill byte. if it's not 0xff, then this sector in the original
disk consisted of this single value repeated for the whole
sector size, and the sector is skipped in the .fdd file.
if it's 0xff, then this sector is wholly contained in the .fdd
disk consisted of this single value repeated for the whole
sector size, and the sector is skipped in the .fdd file.
if it's 0xff, then this sector is wholly contained in the .fdd
file
- 0x5 = ??
- 0x6 = ??
- 0x7 = ??
- 0x8-0x0b = absolute offset of the data for this sector, or 0xfffffff
if the sector was skipped in the .fdd (and it has to be
if the sector was skipped in the .fdd (and it has to be
filled with the value at 0x4)
TODO:
@ -55,19 +55,19 @@ const char *fdd_format::extensions() const
int fdd_format::identify(io_generic *io, UINT32 form_factor)
{
UINT8 h[7];
UINT8 h[7];
io_generic_read(io, h, 0, 7);
if (strncmp((const char *)h, "VFD1.0", 6) == 0)
return 100;
return 0;
}
bool fdd_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
{
UINT8 hsec[0x0c];
UINT8 hsec[0x0c];
// sector map
UINT8 num_secs[160];
UINT8 tracks[160 * 26];
@ -76,9 +76,9 @@ bool fdd_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
UINT8 fill_vals[160 * 26];
UINT32 sec_offs[160 * 26];
UINT8 sec_sizes[160 * 26];
int pos = 0xdc;
for (int track = 0; track < 160; track++)
{
int curr_num_sec = 0, curr_track_size = 0;
@ -87,10 +87,10 @@ bool fdd_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
// read sector map for this sector
io_generic_read(io, hsec, pos, 0x0c);
pos += 0x0c;
if (hsec[0] == 0xff) // unformatted/unused sector
if (hsec[0] == 0xff) // unformatted/unused sector
continue;
tracks[(track * 26) + sect] = hsec[0];
heads[(track * 26) + sect] = hsec[1];
secs[(track * 26) + sect] = hsec[2];
@ -110,9 +110,9 @@ bool fdd_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
int cur_sec_map = 0, sector_size;
for (int track = 0; track < 160; track++)
{
{
int cur_pos = 0;
for (int i = 0; i < num_secs[track]; i++)
for (int i = 0; i < num_secs[track]; i++)
{
cur_sec_map = track * 26 + i;
sector_size = 128 << sec_sizes[cur_sec_map];
@ -121,7 +121,7 @@ bool fdd_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
memset(sect_data + cur_pos, fill_vals[cur_sec_map], sector_size);
else
io_generic_read(io, sect_data + cur_pos, sec_offs[cur_sec_map], sector_size);
sects[i].track = tracks[cur_sec_map];
sects[i].head = heads[cur_sec_map];
sects[i].sector = secs[cur_sec_map];
@ -135,7 +135,7 @@ bool fdd_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
build_pc_track_mfm(track / 2, track % 2, image, cell_count, num_secs[track], sects, calc_default_pc_gap3_size(form_factor, (128 << sec_sizes[track * 26])));
}
return true;
}

54
src/lib/formats/nfd_dsk.c
View File

@ -30,22 +30,22 @@
0xA = PDA (disk type)
0xB-0xF = reserved and equal to 0x00 (possibly available for future format extensions?)
Revision 1
Revision 1
==========
header structure (variable length > 0x120, header length = DWORD at 0x110)
0x000-0x11F = same as Rev. 0 format
0x120-0x3AF = 164 DWORDs containing, for each track, the absolute position of the sector maps
0x120-0x3AF = 164 DWORDs containing, for each track, the absolute position of the sector maps
for sectors of the track. for unformatted/unused tracks 0 is used
0x3B0-0x3B3 = absolute position of addintional info in the header, if any
0x3B4-0x3BF = reserved
0x120-EOHeader = sector map + special data for each track:
0x120-EOHeader = sector map + special data for each track:
first 0x10 of each track = #sectors (WORD), #extra data (WORD), reserved 0xc bytes zeroed
then 0x10 for each sector of this track and 0x10 for each extra data chunk
sector map structure
0x0 = track number
0x0 = track number
0x1 = head
0x2 = sector number
0x3 = sector size (in 128byte chunks)
@ -74,7 +74,7 @@
- add support for DDAM in Rev. 0 (need an image which set it in some sector)
- investigate the READ DATA bytes of sector headers
- investigate RETRY DATA chunks
*********************************************************************/
#include "emu.h"
@ -101,9 +101,9 @@ const char *nfd_format::extensions() const
int nfd_format::identify(io_generic *io, UINT32 form_factor)
{
UINT8 h[16];
UINT8 h[16];
io_generic_read(io, h, 0, 16);
if (strncmp((const char *)h, "T98FDDIMAGE.R0", 14) == 0 || strncmp((const char *)h, "T98FDDIMAGE.R1", 14) == 0)
return 100;
@ -113,7 +113,7 @@ int nfd_format::identify(io_generic *io, UINT32 form_factor)
bool nfd_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
{
UINT64 size = io_generic_size(io);
UINT8 h[0x120], hsec[0x10];
UINT8 h[0x120], hsec[0x10];
io_generic_read(io, h, 0, 0x120);
int format_version = !strncmp((const char *)h, "T98FDDIMAGE.R0", 14) ? 0 : 1;
@ -156,17 +156,17 @@ bool nfd_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
for (int sect = 0; sect < num_secs[track]; sect++)
{
io_generic_read(io, hsec, secmap_addr, 0x10);
if (track == 0 && sect == 0)
disk_type = hsec[0xb]; // can this change across the disk? I don't think so...
disk_type = hsec[0xb]; // can this change across the disk? I don't think so...
secmap_addr += 0x10;
tracks[(track * 26) + sect] = hsec[0];
heads[(track * 26) + sect] = hsec[1];
secs[(track * 26) + sect] = hsec[2];
sec_sizes[(track * 26) + sect] = hsec[3];
mfm[(track * 26) + sect] = hsec[4];
curr_track_size += (128 << hsec[3]);
}
@ -174,7 +174,7 @@ bool nfd_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
{
for (int sect = 0; sect < num_specials[track]; sect++)
{
io_generic_read(io, hsec, secmap_addr, 0x10);
io_generic_read(io, hsec, secmap_addr, 0x10);
secmap_addr += 0x10;
curr_track_size += (hsec[9] + 1) * LITTLE_ENDIANIZE_INT32(*(UINT32 *)(hsec + 0x0a));
}
@ -200,18 +200,18 @@ bool nfd_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
io_generic_read(io, hsec, pos, 0x10);
if (track == 0 && sect == 0)
disk_type = hsec[0xa]; // can this change across the disk? I don't think so...
disk_type = hsec[0xa]; // can this change across the disk? I don't think so...
pos += 0x10;
if (hsec[0] == 0xff) // unformatted/unused sector
if (hsec[0] == 0xff) // unformatted/unused sector
continue;
tracks[(track * 26) + sect] = hsec[0];
heads[(track * 26) + sect] = hsec[1];
secs[(track * 26) + sect] = hsec[2];
sec_sizes[(track * 26) + sect] = hsec[3];
mfm[(track * 26) + sect] = hsec[4];
curr_track_size += (128 << hsec[3]);
curr_num_sec++;
}
@ -226,12 +226,12 @@ bool nfd_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
switch (disk_type)
{
case 0x10: // 640K disk, 2DD
case 0x10: // 640K disk, 2DD
image->set_variant(floppy_image::DSDD);
break;
//case 0x30: // 1.44M disk, ?? (no images found)
// break;
case 0x90: // 1.2M disk, 2HD
//case 0x30: // 1.44M disk, ?? (no images found)
// break;
case 0x90: // 1.2M disk, 2HD
default:
image->set_variant(floppy_image::DSHD);
break;
@ -246,7 +246,7 @@ bool nfd_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
{
io_generic_read(io, sect_data, pos, track_sizes[track]);
for (int i = 0; i < num_secs[track]; i++)
for (int i = 0; i < num_secs[track]; i++)
{
cur_sec_map = track * 26 + i;
sector_size = 128 << sec_sizes[cur_sec_map];
@ -261,7 +261,7 @@ bool nfd_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
}
pos += track_sizes[track];
// notice that the operation below might fail if sectors of the same track have variable sec_sizes,
// notice that the operation below might fail if sectors of the same track have variable sec_sizes,
// because the gap3 calculation would account correctly only for the first sector...
// examined images had constant sec_sizes in the each track, so probably this is not an issue
if (mfm[track * 26])
@ -269,7 +269,7 @@ bool nfd_format::load(io_generic *io, UINT32 form_factor, floppy_image *image)
else
build_pc_track_fm(track / 2, track % 2, image, cell_count, num_secs[track], sects, calc_default_pc_gap3_size(form_factor, (128 << sec_sizes[track * 26])));
}
return true;
}

76
src/lib/formats/victor9k_dsk.c
View File

@ -40,61 +40,61 @@
cell 2.13 usec
Boot Disc Label Format
Track 0 Sector 0
Boot Disc Label Format
Track 0 Sector 0
Byte
Offset Name Description
Byte
Offset Name Description
0 System disc ID literally, ff,00h for a system
disc
0 System disc ID literally, ff,00h for a system
disc
2 Load address paragraph to load booted
program at. If zero then boot
loads in high memory.
2 Load address paragraph to load booted
program at. If zero then boot
loads in high memory.
4 Length paragraph count to load.
4 Length paragraph count to load.
6 Entry offset I.P. value for transfer of
control.
6 Entry offset I.P. value for transfer of
control.
8 Entry segment C.S. value for transfer of
control.
8 Entry segment C.S. value for transfer of
control.
10 I.D. disc identifier.
10 I.D. disc identifier.
18 Part number system identifier - displayed
by early versions of boot.
18 Part number system identifier - displayed
by early versions of boot.
26 Sector size byte count for sectors.
26 Sector size byte count for sectors.
28 Data start first data sector on disc
(absolute sectors).
28 Data start first data sector on disc
(absolute sectors).
30 Boot start first absolute sector of
program for boot to load at
'load address' for 'length'
paragraphs.
30 Boot start first absolute sector of
program for boot to load at
'load address' for 'length'
paragraphs.
32 Flags indicators:
bit meaning
15-12 interleave factor
(0-15)
0 0=single sided
1=double sided
32 Flags indicators:
bit meaning
15-12 interleave factor
(0-15)
0 0=single sided
1=double sided
34 Disc type 00 = CP/M
01 = MS-DOS
34 Disc type 00 = CP/M
01 = MS-DOS
35 Reserved
35 Reserved
38 Speed table information for speed control
proc.
38 Speed table information for speed control
proc.
56 Zone table high track for each zone.
56 Zone table high track for each zone.
71 Sector/track sectors per track for each
zone.
71 Sector/track sectors per track for each
zone.
*/
#include "emu.h"

10
src/mame/drivers/5clown.c
View File

@ -471,17 +471,17 @@ public:
required_device<ay8910_device> m_ay8910;
required_device<gfxdecode_device> m_gfxdecode;
required_device<palette_device> m_palette;
required_shared_ptr<UINT8> m_videoram;
required_shared_ptr<UINT8> m_colorram;
UINT8 m_main_latch_d800;
UINT8 m_snd_latch_0800;
UINT8 m_snd_latch_0a02;
UINT8 m_ay8910_addr;
tilemap_t *m_bg_tilemap;
int m_mux_data;
DECLARE_WRITE8_MEMBER(fclown_videoram_w);
DECLARE_WRITE8_MEMBER(fclown_colorram_w);
DECLARE_WRITE8_MEMBER(cpu_c048_w);
@ -505,9 +505,9 @@ public:
};
void _5clown_state::machine_start()
{
{
m_main_latch_d800 = m_snd_latch_0800 = m_snd_latch_0a02 = m_ay8910_addr = m_mux_data = 0;
save_item(NAME(m_main_latch_d800));
save_item(NAME(m_snd_latch_0800));
save_item(NAME(m_snd_latch_0a02));

9
src/mame/drivers/atvtrack.c
View File

@ -409,7 +409,6 @@ void atvtrack_state::machine_reset()
void smashdrv_state::machine_start()
{
}
void smashdrv_state::machine_reset()
@ -423,7 +422,7 @@ void smashdrv_state::machine_reset()
static ADDRESS_MAP_START( atvtrack_main_map, AS_PROGRAM, 64, atvtrack_state )
AM_RANGE(0x00000000, 0x000003ff) AM_RAM AM_SHARE("sharedmem")
AM_RANGE(0x00020000, 0x00020007) AM_READWRITE(control_r, control_w) // control registers
// AM_RANGE(0x00020040, 0x0002007f) // audio DAC buffer
// AM_RANGE(0x00020040, 0x0002007f) // audio DAC buffer
AM_RANGE(0x14000000, 0x14000007) AM_READWRITE(area2_r, area2_w) // data
AM_RANGE(0x14100000, 0x14100007) AM_READWRITE(area3_r, area3_w) // command
AM_RANGE(0x14200000, 0x14200007) AM_READWRITE(area4_r, area4_w) // address
@ -585,9 +584,9 @@ ROM_START( smashdrv )
ROM_LOAD("prg.ic23", 0x0000000, 0x0400000, CRC(5cc6d3ac) SHA1(0c8426774212d891796b59c95b8c70f64db5b67a) )
ROM_REGION( 0x4000000, "maincpu", ROMREGION_ERASEFF)
ROM_LOAD32_WORD("sdra.ic15", 0x00000000, 0x01000000, CRC(cf702287) SHA1(84cd83c339831deff15fe5fcc353e0b596667500) )
ROM_LOAD32_WORD("sdrb.ic14", 0x00000002, 0x01000000, CRC(39b76f0e) SHA1(529943b6075925e5f72c6e966796e04b2c33686c) )
ROM_LOAD32_WORD("sdrc.ic20", 0x02000000, 0x01000000, CRC(c9021dd7) SHA1(1d08aab433614810af858a0fc5d7f03c7b782237) )
ROM_LOAD32_WORD("sdra.ic15", 0x00000000, 0x01000000, CRC(cf702287) SHA1(84cd83c339831deff15fe5fcc353e0b596667500) )
ROM_LOAD32_WORD("sdrb.ic14", 0x00000002, 0x01000000, CRC(39b76f0e) SHA1(529943b6075925e5f72c6e966796e04b2c33686c) )
ROM_LOAD32_WORD("sdrc.ic20", 0x02000000, 0x01000000, CRC(c9021dd7) SHA1(1d08aab433614810af858a0fc5d7f03c7b782237) )
// ic21 unpopulated
ROM_END

52
src/mame/drivers/barata.c
View File

@ -2,35 +2,35 @@
// copyright-holders:FelipeSanches
/*************************************************************************
barata.c
barata.c
"Dona Barata"
"Dona Barata"
Brazilian "whack-a-mole"-style game themed after stepping on cockroaches.
The name "Dona Barata" means "Lady Cockroach" in brazilian portuguese.
Brazilian "whack-a-mole"-style game themed after stepping on cockroaches.
The name "Dona Barata" means "Lady Cockroach" in brazilian portuguese.
Manufactured by Matic: http://maticplay.com.br/
This driver still only emulates an early prototype of the game.
Propper dumps of the actual released game is still lacking.
Photos on the web make us believe that there are at least 2 official
Manufactured by Matic: http://maticplay.com.br/
This driver still only emulates an early prototype of the game.
Propper dumps of the actual released game is still lacking.
Photos on the web make us believe that there are at least 2 official
releases of this game.
http://www.maticplay.com.br/equipamentos.php?equipamento=dona-barata
http://www.valedosduendes.com.br/site/wp-content/uploads/2012/02/barata_1.jpg
http://www.maticplay.com.br/equipamentos.php?equipamento=dona-barata
http://www.valedosduendes.com.br/site/wp-content/uploads/2012/02/barata_1.jpg
Driver by Felipe Sanches <juca@members.fsf.org>
**************************************************************************
TO-DO:
TO-DO:
* at the moment, the portbits for the rows are still a guess
* as we don't have access to actual PCBs, the CPU clock frequency is a guess
(but maybe it can be infered by analysing the 1ms delay routine used)
* we don't have sound samples or background music dumps
(i.e. we lack dumps of all of the sound memory)
* we don't have ROM dumps of the official releases of the game
* it would be nice to add photographic artwork to improve the layout
* at the moment, the portbits for the rows are still a guess
* as we don't have access to actual PCBs, the CPU clock frequency is a guess
(but maybe it can be infered by analysing the 1ms delay routine used)
* we don't have sound samples or background music dumps
(i.e. we lack dumps of all of the sound memory)
* we don't have ROM dumps of the official releases of the game
* it would be nice to add photographic artwork to improve the layout
**************************************************************************/
@ -138,12 +138,12 @@ static UINT8 dec_7seg(int data)
return segment;
}
#define FPGA_PLAY_BGM 0
#define FPGA_STOP_BGM 1
#define FPGA_PLAY_SAMPLE 2
#define FPGA_LAMP 3
#define FPGA_COUNTER 4
#define FPGA_WAITING_FOR_NEW_CMD 5
#define FPGA_PLAY_BGM 0
#define FPGA_STOP_BGM 1
#define FPGA_PLAY_SAMPLE 2
#define FPGA_LAMP 3
#define FPGA_COUNTER 4
#define FPGA_WAITING_FOR_NEW_CMD 5
const char* mode_strings[] = {
"Play background music",
@ -193,7 +193,7 @@ static void fpga_send(unsigned char cmd){
lamp_index = lamp_data & 0x0F;
if (erase_all){
// logerror("LED: ERASE ALL\n");
// logerror("LED: ERASE ALL\n");
for (int i=0; i<16; i++){
output_set_led_value(i, 1);
}
@ -329,4 +329,4 @@ ROM_END
/*************************
* Game Drivers *
*************************/
GAME( 2002, barata, 0, barata, barata, driver_device, 0, ROT0, "Eletro Matic Equipamentos Eletromecânicos", "Dona Barata (early prototype)", GAME_IMPERFECT_GRAPHICS )
GAME( 2002, barata, 0, barata, barata, driver_device, 0, ROT0, "Eletro Matic Equipamentos Eletromec??nicos", "Dona Barata (early prototype)", GAME_IMPERFECT_GRAPHICS )

2
src/mame/drivers/bfm_sc1.c
View File

@ -178,7 +178,7 @@ public:
DECLARE_READ8_MEMBER(nec_r);
DECLARE_WRITE8_MEMBER(nec_reset_w);
DECLARE_WRITE8_MEMBER(nec_latch_w);
void save_state();
DECLARE_DRIVER_INIT(toppoker);

8
src/mame/drivers/bfm_sc2.c
View File

@ -3613,7 +3613,7 @@ static MACHINE_CONFIG_START( scorpion2, bfm_sc2_state )
/* video hardware */
MCFG_DEFAULT_LAYOUT(layout_sc2_vfd)
MCFG_DEVICE_ADD("reel0", STEPPER, 0)
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel0_optic_cb))
MCFG_DEVICE_ADD("reel1", STEPPER, 0)
@ -3621,7 +3621,7 @@ static MACHINE_CONFIG_START( scorpion2, bfm_sc2_state )
MCFG_DEVICE_ADD("reel2", STEPPER, 0)
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel2_optic_cb))
MCFG_DEVICE_ADD("reel3", STEPPER, 0)
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel3_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel3_optic_cb))
MCFG_DEVICE_ADD("reel4", STEPPER, 0)
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel4_optic_cb))
MCFG_DEVICE_ADD("reel5", STEPPER, 0)
@ -3663,7 +3663,7 @@ static MACHINE_CONFIG_START( scorpion2_dm01, bfm_sc2_state )
MCFG_CPU_ADD("matrix", M6809, 2000000 ) /* matrix board 6809 CPU at 2 Mhz ?? I don't know the exact freq.*/
MCFG_CPU_PROGRAM_MAP(bfm_dm01_memmap)
MCFG_CPU_PERIODIC_INT_DRIVER(bfm_sc2_state, nmi_line_assert, 1500 ) /* generate 1500 NMI's per second ?? what is the exact freq?? */
MCFG_DEVICE_ADD("reel0", STEPPER, 0)
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel0_optic_cb))
MCFG_DEVICE_ADD("reel1", STEPPER, 0)
@ -3671,7 +3671,7 @@ static MACHINE_CONFIG_START( scorpion2_dm01, bfm_sc2_state )
MCFG_DEVICE_ADD("reel2", STEPPER, 0)
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel2_optic_cb))
MCFG_DEVICE_ADD("reel3", STEPPER, 0)
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel3_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel3_optic_cb))
MCFG_DEVICE_ADD("reel4", STEPPER, 0)
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(bfm_sc2_state, reel4_optic_cb))
MCFG_DEVICE_ADD("reel5", STEPPER, 0)

2
src/mame/drivers/bfm_sc4.c
View File

@ -28317,7 +28317,7 @@ GAMEL( 200?, sc4paccla ,sc4paccl, sc4_5reel, sc4paccl, sc4_state, sc4paccl, R
GAMEL( 200?, sc4pacclb ,sc4paccl, sc4_5reel, sc4paccl, sc4_state, sc4paccl, ROT0, "Mazooma","Pac Man Club (PR2018, CPAC) (Mazooma) (Scorpion 4) (set 3)", GAME_NOT_WORKING | GAME_CLICKABLE_ARTWORK, layout_bfm_sc4 )
GAMEL( 200?, sc4pacclc ,sc4paccl, sc4_5reel, sc4paccl, sc4_state, sc4paccl, ROT0, "Mazooma","Pac Man Club (PR2018, CPAC) (Mazooma) (Scorpion 4) (set 4)", GAME_NOT_WORKING | GAME_CLICKABLE_ARTWORK, layout_bfm_sc4 )
// REEL 4 ERR 24 (what type should be here??)
DRIVER_INIT_MEMBER(sc4_state,sc4pmani)

90
src/mame/drivers/bfm_sc4h.c
View File

@ -522,8 +522,8 @@ void sc4_state::bfm_sc4_68307_porta_w(address_space &space, bool dedicated, UINT
m_reel1->update( data &0x0f);
awp_draw_reel("reel1", m_reel1);
}
if (m_reel2)
if (m_reel2)
{
m_reel2->update((data>>4)&0x0f);
awp_draw_reel("reel2", m_reel2);
@ -651,8 +651,8 @@ WRITE8_MEMBER(sc4_state::bfm_sc4_duart_output_w)
m_reel5->update( data &0x0f);
awp_draw_reel("reel5", m_reel5);
}
if (m_reel6)
if (m_reel6)
{
m_reel6->update((data>>4)&0x0f);
awp_draw_reel("reel6", m_reel6);
@ -712,11 +712,11 @@ MACHINE_CONFIG_FRAGMENT( sc4_common )
MCFG_YMZ280B_IRQ_HANDLER(WRITELINE(sc4_state, bfm_sc4_irqhandler))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
MACHINE_CONFIG_END
//Standard 6 reels all connected
MACHINE_CONFIG_START( sc4, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_RM20_48STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel2")
@ -734,20 +734,20 @@ MACHINE_CONFIG_END
//Standard 3 reels
MACHINE_CONFIG_START( sc4_3reel, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_RM20_48STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel2")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel2_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel3")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel3_optic_cb))
MACHINE_CONFIG_END
//Standard 4 reels
MACHINE_CONFIG_START( sc4_4reel, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_RM20_48STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel2")
@ -762,14 +762,14 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START( sc4_4reel_alt, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_RM20_48STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel2")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel2_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel3")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel3_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel5")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel5_optic_cb))
MACHINE_CONFIG_END
@ -778,7 +778,7 @@ MACHINE_CONFIG_END
//Standard 5 reels
MACHINE_CONFIG_START( sc4_5reel, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_RM20_48STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel2")
@ -794,26 +794,26 @@ MACHINE_CONFIG_END
//5 reels, with RL4 skipped
MACHINE_CONFIG_START( sc4_5reel_alt, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_RM20_48STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel2")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel2_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel3")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel3_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel5")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel5_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel6")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel6_optic_cb))
MACHINE_CONFIG_END
//6 reels, last 200 steps
MACHINE_CONFIG_START( sc4_200_std, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_RM20_48STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel2")
@ -823,7 +823,7 @@ MACHINE_CONFIG_START( sc4_200_std, sc4_state )
MCFG_STARPOINT_RM20_48STEP_ADD("reel4")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel4_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel5")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel5_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel5_optic_cb))
MCFG_STARPOINT_200STEP_ADD("reel6")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel6_optic_cb))
MACHINE_CONFIG_END
@ -831,7 +831,7 @@ MACHINE_CONFIG_END
//6 reels, last 200 steps
MACHINE_CONFIG_START( sc4_200_alt, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_RM20_48STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel2")
@ -841,7 +841,7 @@ MACHINE_CONFIG_START( sc4_200_alt, sc4_state )
MCFG_STARPOINT_200STEP_ADD("reel4")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel4_optic_cb))
MCFG_STARPOINT_200STEP_ADD("reel5")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel5_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel5_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel6")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel6_optic_cb))
MACHINE_CONFIG_END
@ -849,7 +849,7 @@ MACHINE_CONFIG_END
//6 reels, RL4 200 steps
MACHINE_CONFIG_START( sc4_200_alta, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_RM20_48STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel2")
@ -859,7 +859,7 @@ MACHINE_CONFIG_START( sc4_200_alta, sc4_state )
MCFG_STARPOINT_RM20_48STEP_ADD("reel4")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel4_optic_cb))
MCFG_STARPOINT_200STEP_ADD("reel5")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel5_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel5_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel6")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel6_optic_cb))
MACHINE_CONFIG_END
@ -867,7 +867,7 @@ MACHINE_CONFIG_END
//6 reels, 3 48 step, 3 200 step
MACHINE_CONFIG_START( sc4_200_altb, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_200STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_200STEP_ADD("reel2")
@ -877,7 +877,7 @@ MACHINE_CONFIG_START( sc4_200_altb, sc4_state )
MCFG_STARPOINT_RM20_48STEP_ADD("reel4")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel4_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel5")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel5_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel5_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel6")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel6_optic_cb))
MACHINE_CONFIG_END
@ -885,7 +885,7 @@ MACHINE_CONFIG_END
//5 reels, last one 200 steps
MACHINE_CONFIG_START( sc4_200_5r, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_RM20_48STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel2")
@ -893,9 +893,9 @@ MACHINE_CONFIG_START( sc4_200_5r, sc4_state )
MCFG_STARPOINT_RM20_48STEP_ADD("reel3")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel3_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel4")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel4_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel4_optic_cb))
MCFG_STARPOINT_200STEP_ADD("reel5")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel5_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel5_optic_cb))
MACHINE_CONFIG_END
@ -903,16 +903,16 @@ MACHINE_CONFIG_END
//5 reels, last one 200 steps, RL4 skipped
MACHINE_CONFIG_START( sc4_200_5ra, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_RM20_48STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel2")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel2_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel3")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel3_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel5")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel5_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel5_optic_cb))
MCFG_STARPOINT_200STEP_ADD("reel6")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel6_optic_cb))
MACHINE_CONFIG_END
@ -920,7 +920,7 @@ MACHINE_CONFIG_END
//5 reels, last one 200 steps, RL5 skipped
MACHINE_CONFIG_START( sc4_200_5rb, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_RM20_48STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel2")
@ -937,24 +937,24 @@ MACHINE_CONFIG_END
//5 reels, RL5 200 steps, RL4 skipped
MACHINE_CONFIG_START( sc4_200_5rc, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_RM20_48STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel2")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel2_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel3")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel3_optic_cb))
MCFG_STARPOINT_200STEP_ADD("reel5")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel5_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel6")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel6_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel6_optic_cb))
MACHINE_CONFIG_END
//4 reels, last one 200 steps
MACHINE_CONFIG_START( sc4_200_4r, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_RM20_48STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel2")
@ -962,13 +962,13 @@ MACHINE_CONFIG_START( sc4_200_4r, sc4_state )
MCFG_STARPOINT_RM20_48STEP_ADD("reel3")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel3_optic_cb))
MCFG_STARPOINT_200STEP_ADD("reel4")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel4_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel4_optic_cb))
MACHINE_CONFIG_END
//4 reels, last one 200 steps, RL4 skipped
MACHINE_CONFIG_START( sc4_200_4ra, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_RM20_48STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel2")
@ -984,21 +984,21 @@ MACHINE_CONFIG_END
//4 reels, last one 200 steps, RL4,5 skipped
MACHINE_CONFIG_START( sc4_200_4rb, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_RM20_48STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel2")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel2_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel3")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel3_optic_cb))
MCFG_STARPOINT_200STEP_ADD("reel6")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel6_optic_cb))
MACHINE_CONFIG_END
MACHINE_CONFIG_START( sc4_4reel_200, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_200STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_200STEP_ADD("reel2")
@ -1006,12 +1006,12 @@ MACHINE_CONFIG_START( sc4_4reel_200, sc4_state )
MCFG_STARPOINT_200STEP_ADD("reel3")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel3_optic_cb))
MCFG_STARPOINT_200STEP_ADD("reel4")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel4_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel4_optic_cb))
MACHINE_CONFIG_END
MACHINE_CONFIG_START( sc4_3reel_200, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_200STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_200STEP_ADD("reel2")
@ -1023,7 +1023,7 @@ MACHINE_CONFIG_END
MACHINE_CONFIG_START( sc4_3reel_200_48, sc4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_STARPOINT_200STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_200STEP_ADD("reel2")
@ -1031,7 +1031,7 @@ MACHINE_CONFIG_START( sc4_3reel_200_48, sc4_state )
MCFG_STARPOINT_200STEP_ADD("reel3")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel3_optic_cb))
MCFG_STARPOINT_48STEP_ADD("reel4")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel4_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel4_optic_cb))
MACHINE_CONFIG_END
MACHINE_CONFIG_START( sc4_no_reels, sc4_state )
@ -1047,7 +1047,7 @@ MACHINE_START_MEMBER(sc4_adder4_state,adder4)
MACHINE_CONFIG_START( sc4_adder4, sc4_adder4_state )
MCFG_FRAGMENT_ADD(sc4_common)
MCFG_CPU_ADD("adder4", M68340, 25175000) // 68340 (CPU32 core)
MCFG_CPU_PROGRAM_MAP(sc4_adder4_map)
@ -1066,7 +1066,7 @@ MACHINE_CONFIG_START( sc4dmd, sc4_state )
MCFG_CPU_PERIODIC_INT_DRIVER(sc4_state, nmi_line_assert, 1500 ) /* generate 1500 NMI's per second ?? what is the exact freq?? */
MCFG_MACHINE_START_OVERRIDE(sc4_state, sc4 )
MCFG_STARPOINT_RM20_48STEP_ADD("reel1")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(sc4_state, reel1_optic_cb))
MCFG_STARPOINT_RM20_48STEP_ADD("reel2")

2
src/mame/drivers/bwidow.c
View File

@ -393,7 +393,7 @@ static ADDRESS_MAP_START( spacduel_map, AS_PROGRAM, 8, bwidow_state )
AM_RANGE(0x0900, 0x0907) AM_READ(spacduel_IN3_r) /* IN1 */
AM_RANGE(0x0905, 0x0906) AM_WRITENOP /* ignore? */
AM_RANGE(0x0a00, 0x0a00) AM_DEVREAD("earom", atari_vg_earom_device, read)
AM_RANGE(0x0c00, 0x0c00) AM_WRITE(spacduel_coin_counter_w) /* coin out */
AM_RANGE(0x0c00, 0x0c00) AM_WRITE(spacduel_coin_counter_w) /* coin out */
AM_RANGE(0x0c80, 0x0c80) AM_DEVWRITE("avg", avg_device, go_w)
AM_RANGE(0x0d00, 0x0d00) AM_WRITENOP /* watchdog clear */
AM_RANGE(0x0d80, 0x0d80) AM_DEVWRITE("avg", avg_device, reset_w)

2
src/mame/drivers/cps1.c
View File

@ -11532,7 +11532,7 @@ DRIVER_INIT_MEMBER(cps_state,dinohunt)
m_maincpu->space(AS_PROGRAM).install_read_handler(0xf18000, 0xf19fff, read16_delegate(FUNC(cps_state::dinohunt_sound_r), this));
m_maincpu->space(AS_PROGRAM).install_read_port(0xfc0000, 0xfc0001, "IN2"); ;
// the ym2151 doesn't seem to be used. Is it actually on the PCB?
DRIVER_INIT_CALL(cps1);
}

2
src/mame/drivers/cultures.c
View File

@ -185,7 +185,7 @@ static ADDRESS_MAP_START( oki_map, AS_0, 8, cultures_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( vrambank_map, AS_PROGRAM, 8, cultures_state )
AM_RANGE(0x0000, 0x3fff) AM_RAM_WRITE(bg0_videoram_w) AM_SHARE("bg0_videoram")
AM_RANGE(0x0000, 0x3fff) AM_RAM_WRITE(bg0_videoram_w) AM_SHARE("bg0_videoram")
AM_RANGE(0x4000, 0x6fff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
ADDRESS_MAP_END

74
src/mame/drivers/dreamwld.c
View File

@ -383,14 +383,14 @@ UINT32 dreamwld_state::screen_update_dreamwld(screen_device &screen, bitmap_ind1
READ32_MEMBER(dreamwld_state::dreamwld_protdata_r)
{
// static int count = 0;
// static int count = 0;
UINT8 *protdata = memregion("user1")->base();
size_t protsize = memregion("user1")->bytes();
UINT8 dat = protdata[(m_protindex++) % protsize];
// printf("protection read %04x %02x\n", count, dat);
// count++;
// printf("protection read %04x %02x\n", count, dat);
// count++;
// real hw returns 00 after end of data, I haven't checked if it's possible to overflow the read counter
// and read out the internal rom.
@ -614,39 +614,39 @@ static INPUT_PORTS_START( cutefght )
PORT_START("DSW")
PORT_DIPUNUSED_DIPLOC( 0x0001, IP_ACTIVE_LOW, "SW2:1" ) /* As listed in service mode, but tested */
PORT_DIPUNUSED_DIPLOC( 0x0002, IP_ACTIVE_LOW, "SW2:2" ) /* These might have some use, requires investigation of code */
PORT_DIPUNUSED_DIPLOC( 0x0004, IP_ACTIVE_LOW, "SW2:3" )
PORT_DIPUNUSED_DIPLOC( 0x0008, IP_ACTIVE_LOW, "SW2:4" )
PORT_DIPUNUSED_DIPLOC( 0x0010, IP_ACTIVE_LOW, "SW2:5" )
PORT_DIPNAME( 0x0060, 0x0060, "Ticket Payout" ) PORT_DIPLOCATION("SW2:6,7")
PORT_DIPSETTING( 0x0000, DEF_STR( No ) )
PORT_DIPSETTING( 0x0020, "Little" )
PORT_DIPSETTING( 0x0060, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0040, "Much" )
PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x0100, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:1") /* Has no effect?? */
PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x0e00, 0x0e00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:2,3,4")
PORT_DIPSETTING( 0x0000, DEF_STR( 5C_1C ) )
PORT_DIPSETTING( 0x0200, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0400, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x0600, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0e00, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x0a00, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x0c00, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x0800, DEF_STR( 1C_3C ) )
PORT_DIPNAME( 0x7000, 0x7000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:5,6,7")
PORT_DIPSETTING( 0x2000, "Level 1" )
PORT_DIPSETTING( 0x1000, "Level 2" )
PORT_DIPSETTING( 0x0000, "Level 3" )
PORT_DIPSETTING( 0x7000, "Level 4" )
PORT_DIPSETTING( 0x6000, "Level 5" )
PORT_DIPSETTING( 0x5000, "Level 6" )
PORT_DIPSETTING( 0x4000, "Level 7" )
PORT_DIPSETTING( 0x3000, "Level 8" )
PORT_SERVICE_DIPLOC( 0x8000, IP_ACTIVE_LOW, "SW1:8" )
PORT_DIPUNUSED_DIPLOC( 0x0004, IP_ACTIVE_LOW, "SW2:3" )
PORT_DIPUNUSED_DIPLOC( 0x0008, IP_ACTIVE_LOW, "SW2:4" )
PORT_DIPUNUSED_DIPLOC( 0x0010, IP_ACTIVE_LOW, "SW2:5" )
PORT_DIPNAME( 0x0060, 0x0060, "Ticket Payout" ) PORT_DIPLOCATION("SW2:6,7")
PORT_DIPSETTING( 0x0000, DEF_STR( No ) )
PORT_DIPSETTING( 0x0020, "Little" )
PORT_DIPSETTING( 0x0060, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x0040, "Much" )
PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Free_Play ) ) PORT_DIPLOCATION("SW2:8")
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x0100, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:1") /* Has no effect?? */
PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
PORT_DIPNAME( 0x0e00, 0x0e00, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SW1:2,3,4")
PORT_DIPSETTING( 0x0000, DEF_STR( 5C_1C ) )
PORT_DIPSETTING( 0x0200, DEF_STR( 4C_1C ) )
PORT_DIPSETTING( 0x0400, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x0600, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x0e00, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x0a00, DEF_STR( 2C_3C ) )
PORT_DIPSETTING( 0x0c00, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x0800, DEF_STR( 1C_3C ) )
PORT_DIPNAME( 0x7000, 0x7000, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:5,6,7")
PORT_DIPSETTING( 0x2000, "Level 1" )
PORT_DIPSETTING( 0x1000, "Level 2" )
PORT_DIPSETTING( 0x0000, "Level 3" )
PORT_DIPSETTING( 0x7000, "Level 4" )
PORT_DIPSETTING( 0x6000, "Level 5" )
PORT_DIPSETTING( 0x5000, "Level 6" )
PORT_DIPSETTING( 0x4000, "Level 7" )
PORT_DIPSETTING( 0x3000, "Level 8" )
PORT_SERVICE_DIPLOC( 0x8000, IP_ACTIVE_LOW, "SW1:8" )
INPUT_PORTS_END
@ -1073,5 +1073,5 @@ ROM_END
GAME( 1997, baryon, 0, baryon, baryon, driver_device, 0, ROT270, "SemiCom", "Baryon - Future Assault (set 1)", GAME_SUPPORTS_SAVE )
GAME( 1997, baryona, baryon, baryon, baryon, driver_device, 0, ROT270, "SemiCom", "Baryon - Future Assault (set 2)", GAME_SUPPORTS_SAVE )
GAME( 1998, cutefght, 0, dreamwld, cutefght, driver_device, 0, ROT0, "SemiCom", "Cute Fighter", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS ) // wrong linescroll?
GAME( 1999, rolcrush, 0, baryon, rolcrush, driver_device, 0, ROT0, "Trust / SemiCom", "Rolling Crush (version 1.07.E - 1999/02/11)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS ) // wrong
GAME( 1999, rolcrush, 0, baryon, rolcrush, driver_device, 0, ROT0, "Trust / SemiCom", "Rolling Crush (version 1.07.E - 1999/02/11)", GAME_SUPPORTS_SAVE | GAME_IMPERFECT_GRAPHICS ) // wrong
GAME( 2000, dreamwld, 0, dreamwld, dreamwld, driver_device, 0, ROT0, "SemiCom", "Dream World", GAME_SUPPORTS_SAVE )

2
src/mame/drivers/ecoinfr.c
View File

@ -786,7 +786,7 @@ static MACHINE_CONFIG_START( ecoinfr, ecoinfr_state )
MCFG_ECOIN_200STEP_ADD("reel2")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(ecoinfr_state, reel2_optic_cb))
MCFG_ECOIN_200STEP_ADD("reel3")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(ecoinfr_state, reel3_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(ecoinfr_state, reel3_optic_cb))
MACHINE_CONFIG_END

4
src/mame/drivers/f-32.c
View File

@ -27,10 +27,10 @@ public:
/* devices */
required_device<e132xn_device> m_maincpu;
/* memory pointers */
required_shared_ptr<UINT32> m_videoram;
DECLARE_READ32_MEMBER(f32_input_port_1_r);
UINT32 screen_update_mosaicf2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
};

24
src/mame/drivers/galpani2.c
View File

@ -71,9 +71,9 @@ Notes:
PISCES - NEC uPD78324 series MCU with 32k internal rom. Clock 13.500MHz [27/2] on pins 51 & 52
VSync - 59.1856Hz
HSync - 15.625kHz
(TODO: VTOTAL = 264, HTOTAL = 432, pixel clock 27 MHz / 4)
***************************************************************************/
#include "emu.h"
@ -346,23 +346,23 @@ static ADDRESS_MAP_START( galpani2_mem1, AS_PROGRAM, 16, galpani2_state )
AM_RANGE(0x300000, 0x301fff) AM_RAM // ?
AM_RANGE(0x302000, 0x303fff) AM_RAM AM_SHARE("spriteram") // Sprites
AM_RANGE(0x304000, 0x30401f) AM_DEVREADWRITE("kan_spr", kaneko16_sprite_device, kaneko16_sprites_regs_r, kaneko16_sprites_regs_w)
// AM_RANGE(0x308000, 0x308001) AM_WRITENOP // ? 0 at startup
// AM_RANGE(0x30c000, 0x30c001) AM_WRITENOP // ? hblank effect ?
// AM_RANGE(0x308000, 0x308001) AM_WRITENOP // ? 0 at startup
// AM_RANGE(0x30c000, 0x30c001) AM_WRITENOP // ? hblank effect ?
AM_RANGE(0x310000, 0x3101ff) AM_RAM_DEVWRITE("bg8palette", palette_device, write) AM_SHARE("bg8palette") // ?
AM_RANGE(0x314000, 0x314001) AM_WRITENOP // ? flip backgrounds ?
AM_RANGE(0x318000, 0x318001) AM_READWRITE(galpani2_eeprom_r, galpani2_eeprom_w) // EEPROM
AM_RANGE(0x380000, 0x387fff) AM_RAM // Palette?
AM_RANGE(0x388000, 0x38ffff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette") // Palette
// AM_RANGE(0x390000, 0x3901ff) AM_WRITENOP // ? at startup of service mode
// AM_RANGE(0x390000, 0x3901ff) AM_WRITENOP // ? at startup of service mode
AM_RANGE(0x400000, 0x43ffff) AM_RAM AM_SHARE("bg8.0") // Background 0
AM_RANGE(0x440000, 0x440001) AM_RAM AM_SHARE("bg8_scrollx.0") // Background 0 Scroll X
AM_RANGE(0x480000, 0x480001) AM_RAM AM_SHARE("bg8_scrolly.0") // Background 0 Scroll Y
// AM_RANGE(0x4c0000, 0x4c0001) AM_WRITENOP // ? 0 at startup only
// AM_RANGE(0x4c0000, 0x4c0001) AM_WRITENOP // ? 0 at startup only
AM_RANGE(0x500000, 0x53ffff) AM_RAM AM_SHARE("bg8.1") // Background 1
AM_RANGE(0x540000, 0x540001) AM_RAM AM_SHARE("bg8_scrollx.1") // Background 1 Scroll X
AM_RANGE(0x580000, 0x580001) AM_RAM AM_SHARE("bg8_scrolly.1") // Background 1 Scroll Y
// AM_RANGE(0x5c0000, 0x5c0001) AM_WRITENOP // ? 0 at startup only
// AM_RANGE(0x5c0000, 0x5c0001) AM_WRITENOP // ? 0 at startup only
AM_RANGE(0x540572, 0x540573) AM_READNOP // ? galpani2 at F0A4
AM_RANGE(0x54057a, 0x54057b) AM_READNOP // ? galpani2 at F148
@ -411,10 +411,10 @@ static ADDRESS_MAP_START( galpani2_mem2, AS_PROGRAM, 16, galpani2_state )
AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
AM_RANGE(0x100000, 0x13ffff) AM_RAM AM_SHARE("ram2") // Work RAM
AM_RANGE(0x400000, 0x5fffff) AM_RAM AM_SHARE("bg15") // bg15
// AM_RANGE(0x600000, 0x600001) AM_NOP // ? 0 at startup only
// AM_RANGE(0x640000, 0x640001) AM_WRITENOP // ? 0 at startup only
// AM_RANGE(0x680000, 0x680001) AM_WRITENOP // ? 0 at startup only
// AM_RANGE(0x6c0000, 0x6c0001) AM_WRITENOP // ? 0 at startup only
// AM_RANGE(0x600000, 0x600001) AM_NOP // ? 0 at startup only
// AM_RANGE(0x640000, 0x640001) AM_WRITENOP // ? 0 at startup only
// AM_RANGE(0x680000, 0x680001) AM_WRITENOP // ? 0 at startup only
// AM_RANGE(0x6c0000, 0x6c0001) AM_WRITENOP // ? 0 at startup only
AM_RANGE(0x700000, 0x700001) AM_NOP // Watchdog
// AM_RANGE(0x740000, 0x740001) AM_WRITENOP // ? Reset mcu
AM_RANGE(0x780000, 0x780001) AM_WRITE8(galpani2_mcu_nmi2_w, 0x00ff) // ? 0 -> 1 -> 0 (lev 5)
@ -520,7 +520,7 @@ static INPUT_PORTS_START( galpani2 )
PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_SERVICE2 ) // this button is used in gp2se as an alt way to bring up the service menu, booting with it held down breaks the game tho!
PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_SERVICE2 ) // this button is used in gp2se as an alt way to bring up the service menu, booting with it held down breaks the game tho!
PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_TILT )
PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SERVICE1 )

1216
src/mame/drivers/gts1.c
View File

File diff suppressed because it is too large Load Diff

2
src/mame/drivers/gundealr.c
View File

@ -495,7 +495,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(gundealr_state::yamyam_mcu_sim)
static MACHINE_CONFIG_DERIVED( yamyam, gundealr )
MCFG_TIMER_DRIVER_ADD_PERIODIC("mcusim", gundealr_state, yamyam_mcu_sim, attotime::from_hz(6000000/60)) /* 6mhz confirmed */
MCFG_TIMER_DRIVER_ADD_PERIODIC("mcusim", gundealr_state, yamyam_mcu_sim, attotime::from_hz(6000000/60)) /* 6mhz confirmed */
MACHINE_CONFIG_END

50
src/mame/drivers/igs009.c
View File

@ -510,32 +510,32 @@ ADDRESS_MAP_END
static INPUT_PORTS_START( jingbell )
PORT_START("DSW1")
PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("DSW1:1")
PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("DSW1:1")
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x02, 0x00, "W-Up Bonus" ) PORT_DIPLOCATION("DSW1:2")
PORT_DIPNAME( 0x02, 0x00, "W-Up Bonus" ) PORT_DIPLOCATION("DSW1:2")
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x04, 0x04, "Min Bet" ) PORT_DIPLOCATION("DSW1:3")
PORT_DIPNAME( 0x04, 0x04, "Min Bet" ) PORT_DIPLOCATION("DSW1:3")
PORT_DIPSETTING( 0x04, "1" )
PORT_DIPSETTING( 0x00, "8" )
PORT_DIPNAME( 0x08, 0x08, "Spin Speed" ) PORT_DIPLOCATION("DSW1:4")
PORT_DIPNAME( 0x08, 0x08, "Spin Speed" ) PORT_DIPLOCATION("DSW1:4")
PORT_DIPSETTING( 0x08, "Slow" )
PORT_DIPSETTING( 0x00, "Quick" )
PORT_DIPNAME( 0x10, 0x00, "Strip Girl" ) PORT_DIPLOCATION("DSW1:5")
PORT_DIPNAME( 0x10, 0x00, "Strip Girl" ) PORT_DIPLOCATION("DSW1:5")
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_DIPNAME( 0x20, 0x20, "Payout Mode" ) PORT_DIPLOCATION("DSW1:6")
PORT_DIPNAME( 0x20, 0x20, "Payout Mode" ) PORT_DIPLOCATION("DSW1:6")
PORT_DIPSETTING( 0x20, DEF_STR( Normal ) )
PORT_DIPSETTING( 0x00, "Auto" )
PORT_DIPNAME( 0xc0, 0xc0, "Player's Panel" ) PORT_DIPLOCATION("DSW1:7,8")
PORT_DIPNAME( 0xc0, 0xc0, "Player's Panel" ) PORT_DIPLOCATION("DSW1:7,8")
PORT_DIPSETTING( 0x00, "Type A" )
PORT_DIPSETTING( 0xc0, "Type A" )
PORT_DIPSETTING( 0x80, "Type B" )
PORT_DIPSETTING( 0x40, "Type C" )
PORT_START("DSW2")
PORT_DIPNAME( 0x07, 0x07, "Main Game Rate (%)" ) PORT_DIPLOCATION("DSW2:1,2,3")
PORT_DIPNAME( 0x07, 0x07, "Main Game Rate (%)" ) PORT_DIPLOCATION("DSW2:1,2,3")
PORT_DIPSETTING( 0x07, "55" )
PORT_DIPSETTING( 0x06, "60" )
PORT_DIPSETTING( 0x05, "65" )
@ -544,7 +544,7 @@ static INPUT_PORTS_START( jingbell )
PORT_DIPSETTING( 0x02, "80" )
PORT_DIPSETTING( 0x01, "85" )
PORT_DIPSETTING( 0x00, "90" )
PORT_DIPNAME( 0x38, 0x38, "W-Up Chance (%)" ) PORT_DIPLOCATION("DSW2:4,5,6")
PORT_DIPNAME( 0x38, 0x38, "W-Up Chance (%)" ) PORT_DIPLOCATION("DSW2:4,5,6")
PORT_DIPSETTING( 0x38, "93" )
PORT_DIPSETTING( 0x30, "94" )
PORT_DIPSETTING( 0x28, "95" )
@ -553,14 +553,14 @@ static INPUT_PORTS_START( jingbell )
PORT_DIPSETTING( 0x10, "98" )
PORT_DIPSETTING( 0x08, "99" )
PORT_DIPSETTING( 0x00, "100" )
PORT_DIPNAME( 0xc0, 0xc0, "Key In Limit" ) PORT_DIPLOCATION("DSW2:7,8")
PORT_DIPNAME( 0xc0, 0xc0, "Key In Limit" ) PORT_DIPLOCATION("DSW2:7,8")
PORT_DIPSETTING( 0xc0, "1k" )
PORT_DIPSETTING( 0x80, "3k" )
PORT_DIPSETTING( 0x40, "5k" )
PORT_DIPSETTING( 0x00, "10k" )
PORT_START("DSW3")
PORT_DIPNAME( 0x07, 0x07, "Key In Rate" ) PORT_DIPLOCATION("DSW3:1,2,3")
PORT_DIPNAME( 0x07, 0x07, "Key In Rate" ) PORT_DIPLOCATION("DSW3:1,2,3")
PORT_DIPSETTING( 0x07, "1" )
PORT_DIPSETTING( 0x06, "5" )
PORT_DIPSETTING( 0x05, "10" )
@ -569,7 +569,7 @@ static INPUT_PORTS_START( jingbell )
PORT_DIPSETTING( 0x02, "100" )
PORT_DIPSETTING( 0x01, "200" )
PORT_DIPSETTING( 0x00, "500" )
PORT_DIPNAME( 0x38, 0x38, "Coin 1 Rate" ) PORT_DIPLOCATION("DSW3:4,5,6")
PORT_DIPNAME( 0x38, 0x38, "Coin 1 Rate" ) PORT_DIPLOCATION("DSW3:4,5,6")
PORT_DIPSETTING( 0x38, "1" )
PORT_DIPSETTING( 0x30, "2" )
PORT_DIPSETTING( 0x28, "5" )
@ -578,20 +578,20 @@ static INPUT_PORTS_START( jingbell )
PORT_DIPSETTING( 0x10, "25" )
PORT_DIPSETTING( 0x08, "50" )
PORT_DIPSETTING( 0x00, "100" )
PORT_DIPNAME( 0xc0, 0xc0, "System Limit" ) PORT_DIPLOCATION("DSW3:7,8")
PORT_DIPNAME( 0xc0, 0xc0, "System Limit" ) PORT_DIPLOCATION("DSW3:7,8")
PORT_DIPSETTING( 0xc0, "5k" )
PORT_DIPSETTING( 0x80, "10k" )
PORT_DIPSETTING( 0x40, "30k" )
PORT_DIPSETTING( 0x00, "Unlimited" )
PORT_START("DSW4")
PORT_DIPNAME( 0x01, 0x01, "Min Play For Fever" ) PORT_DIPLOCATION("DSW4:1")
PORT_DIPNAME( 0x01, 0x01, "Min Play For Fever" ) PORT_DIPLOCATION("DSW4:1")
PORT_DIPSETTING( 0x01, "8" )
PORT_DIPSETTING( 0x00, "16" )
PORT_DIPNAME( 0x02, 0x02, "Max Bet" ) PORT_DIPLOCATION("DSW4:2")
PORT_DIPNAME( 0x02, 0x02, "Max Bet" ) PORT_DIPLOCATION("DSW4:2")
PORT_DIPSETTING( 0x02, "16" )
PORT_DIPSETTING( 0x00, "32" )
PORT_DIPNAME( 0x1c, 0x1c, "Coin 2 Rate" ) PORT_DIPLOCATION("DSW4:3,4,5")
PORT_DIPNAME( 0x1c, 0x1c, "Coin 2 Rate" ) PORT_DIPLOCATION("DSW4:3,4,5")
PORT_DIPSETTING( 0x1c, "1" )
PORT_DIPSETTING( 0x18, "2" )
PORT_DIPSETTING( 0x14, "5" )
@ -600,37 +600,37 @@ static INPUT_PORTS_START( jingbell )
PORT_DIPSETTING( 0x08, "40" )
PORT_DIPSETTING( 0x04, "50" )
PORT_DIPSETTING( 0x00, "100" )
PORT_DIPNAME( 0x60, 0x60, "Key Out Rate" ) PORT_DIPLOCATION("DSW4:6,7")
PORT_DIPNAME( 0x60, 0x60, "Key Out Rate" ) PORT_DIPLOCATION("DSW4:6,7")
PORT_DIPSETTING( 0x60, "1" )
PORT_DIPSETTING( 0x40, "10" )
PORT_DIPSETTING( 0x20, "50" )
PORT_DIPSETTING( 0x00, "100" )
PORT_DIPNAME( 0x80, 0x80, "Play Line" ) PORT_DIPLOCATION("DSW4:8")
PORT_DIPNAME( 0x80, 0x80, "Play Line" ) PORT_DIPLOCATION("DSW4:8")
PORT_DIPSETTING( 0x80, "8" )
PORT_DIPSETTING( 0x00, "16" )
// These are from the manual for v201us - DSW1-DSW4 match but DSW5 doesn't seem to match or actuallly do anything
// These are from the manual for v201us - DSW1-DSW4 match but DSW5 doesn't seem to match or actuallly do anything
PORT_START("DSW5")
PORT_DIPNAME( 0x03, 0x00, "Maximum Play" ) PORT_DIPLOCATION("DSW5:1,2")
PORT_DIPNAME( 0x03, 0x00, "Maximum Play" ) PORT_DIPLOCATION("DSW5:1,2")
PORT_DIPSETTING( 0x00, "64" )
PORT_DIPSETTING( 0x01, "32" )
PORT_DIPSETTING( 0x02, "16" )
PORT_DIPSETTING( 0x03, "8" )
PORT_DIPNAME( 0x04, 0x04, "Skill Stop" ) PORT_DIPLOCATION("DSW5:3")
PORT_DIPNAME( 0x04, 0x04, "Skill Stop" ) PORT_DIPLOCATION("DSW5:3")
PORT_DIPSETTING( 0x04, "On" )
PORT_DIPSETTING( 0x00, "Off" )
PORT_DIPNAME( 0x08, 0x00, "Hands Count" ) PORT_DIPLOCATION("DSW5:4")
PORT_DIPNAME( 0x08, 0x00, "Hands Count" ) PORT_DIPLOCATION("DSW5:4")
PORT_DIPSETTING( 0x08, "No" )
PORT_DIPSETTING( 0x00, "Yes" )
PORT_DIPNAME( 0x30, 0x00, "Hands Coin Rate" ) PORT_DIPLOCATION("DSW5:5,6")
PORT_DIPNAME( 0x30, 0x00, "Hands Coin Rate" ) PORT_DIPLOCATION("DSW5:5,6")
PORT_DIPSETTING( 0x00, "25" )
PORT_DIPSETTING( 0x20, "10" )
PORT_DIPSETTING( 0x10, "5" )
PORT_DIPSETTING( 0x30, "1" )
PORT_DIPNAME( 0x40, 0x40, "Hands Coin Value" ) PORT_DIPLOCATION("DSW5:7")
PORT_DIPNAME( 0x40, 0x40, "Hands Coin Value" ) PORT_DIPLOCATION("DSW5:7")
PORT_DIPSETTING( 0x00, "40" )
PORT_DIPSETTING( 0x40, "20" )
PORT_DIPNAME( 0x80, 0x80, "Unused" ) PORT_DIPLOCATION("DSW5:8")
PORT_DIPNAME( 0x80, 0x80, "Unused" ) PORT_DIPLOCATION("DSW5:8")
PORT_DIPSETTING( 0x00, "On" )
PORT_DIPSETTING( 0x80, "Off" )

4
src/mame/drivers/jpmimpct.c
View File

@ -1324,7 +1324,7 @@ MACHINE_CONFIG_START( impctawp, jpmimpct_state )
MCFG_SOUND_ADD("upd",UPD7759, UPD7759_STANDARD_CLOCK)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
MCFG_DEFAULT_LAYOUT(layout_jpmimpct)
MCFG_STARPOINT_48STEP_ADD("reel0")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(jpmimpct_state, reel0_optic_cb))
MCFG_STARPOINT_48STEP_ADD("reel1")
@ -1337,7 +1337,7 @@ MACHINE_CONFIG_START( impctawp, jpmimpct_state )
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(jpmimpct_state, reel4_optic_cb))
MCFG_STARPOINT_48STEP_ADD("reel5")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(jpmimpct_state, reel5_optic_cb))
MACHINE_CONFIG_END

7
src/mame/drivers/lindbergh.c
View File

@ -114,8 +114,8 @@ Game Dongle Sticker PIC Number
WCC Football Intercontinental Clubs 2008-2009 ? ? ?
WCC Football Intercontinental Clubs 2009-2010 ? ? ?
* denotes these DVDs are archived.
^ denotes these PICs are archived.
* denotes these DVDs are archived.
^ denotes these PICs are archived.
This list is not necessarily correct or complete.
Corrections and additions to the above are welcome.
@ -386,8 +386,7 @@ MACHINE_CONFIG_END
ROM_LOAD("fpr-24370b.ic6", 0x000000, 0x400000, CRC(c3b021a4) SHA1(1b6938a50fe0e4ae813864649eb103838c399ac0)) \
\
ROM_REGION32_LE(0x10000, ":pci:01.0:00.0", 0) /* Geforce bios extension (custom for the card) */ \
ROM_LOAD("vid_bios.u504", 0x00000, 0x10000, CRC(f78d14d7) SHA1(f129787e487984edd23bf344f2e9500c85052275)) \
ROM_LOAD("vid_bios.u504", 0x00000, 0x10000, CRC(f78d14d7) SHA1(f129787e487984edd23bf344f2e9500c85052275))
ROM_START(lindbios)
LINDBERGH_BIOS
ROM_END

2
src/mame/drivers/maygay1b.c
View File

@ -628,7 +628,7 @@ MACHINE_CONFIG_START( maygay_m1, maygay1b_state )
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(maygay1b_state, reel4_optic_cb))
MCFG_STARPOINT_48STEP_ADD("reel5")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(maygay1b_state, reel5_optic_cb))
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_DEFAULT_LAYOUT(layout_maygay1b)

2
src/mame/drivers/mjkjidai.c
View File

@ -282,7 +282,7 @@ INTERRUPT_GEN_MEMBER(mjkjidai_state::vblank_irq)
void mjkjidai_state::machine_start()
{
membank("bank1")->configure_entries(0, 4, memregion("maincpu")->base() + 0x8000, 0x4000);
save_item(NAME(m_adpcm_pos));
save_item(NAME(m_adpcm_end));
save_item(NAME(m_keyb));

2
src/mame/drivers/mpu3.c
View File

@ -801,7 +801,7 @@ ADDRESS_MAP_END
MCFG_STEPPER_END_INDEX(3)\
MCFG_STEPPER_INDEX_PATTERN(0x00)\
MCFG_STEPPER_INIT_PHASE(2)
static MACHINE_CONFIG_START( mpu3base, mpu3_state )
MCFG_CPU_ADD("maincpu", M6808, MPU3_MASTER_CLOCK)///4)
MCFG_CPU_PROGRAM_MAP(mpu3_basemap)

46
src/mame/drivers/mpu4hw.c
View File

@ -2477,7 +2477,7 @@ ADDRESS_MAP_END
MCFG_STEPPER_END_INDEX(3)\
MCFG_STEPPER_INDEX_PATTERN(0x00)\
MCFG_STEPPER_INIT_PHASE(2)
#define MCFG_MPU4_TYPE2_REEL_ADD(_tag)\
MCFG_STEPPER_ADD(_tag)\
MCFG_STEPPER_REEL_TYPE(BARCREST_48STEP_REEL)\
@ -2501,7 +2501,7 @@ ADDRESS_MAP_END
MCFG_STEPPER_END_INDEX(3)\
MCFG_STEPPER_INDEX_PATTERN(0x00)\
MCFG_STEPPER_INIT_PHASE(2)
MACHINE_CONFIG_FRAGMENT( mpu4_std_4reel )
MCFG_MPU4_STD_REEL_ADD("reel0")
@ -2511,8 +2511,8 @@ MACHINE_CONFIG_FRAGMENT( mpu4_std_4reel )
MCFG_MPU4_STD_REEL_ADD("reel2")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel2_optic_cb))
MCFG_MPU4_STD_REEL_ADD("reel3")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel3_optic_cb))
MACHINE_CONFIG_END
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel3_optic_cb))
MACHINE_CONFIG_END
MACHINE_CONFIG_FRAGMENT( mpu4_std_5reel )
MCFG_MPU4_STD_REEL_ADD("reel0")
@ -2522,10 +2522,10 @@ MACHINE_CONFIG_FRAGMENT( mpu4_std_5reel )
MCFG_MPU4_STD_REEL_ADD("reel2")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel2_optic_cb))
MCFG_MPU4_STD_REEL_ADD("reel3")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel3_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel3_optic_cb))
MCFG_MPU4_STD_REEL_ADD("reel4")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel4_optic_cb))
MACHINE_CONFIG_END
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel4_optic_cb))
MACHINE_CONFIG_END
MACHINE_CONFIG_FRAGMENT( mpu4_std_6reel )
MCFG_MPU4_STD_REEL_ADD("reel0")
@ -2535,12 +2535,12 @@ MACHINE_CONFIG_FRAGMENT( mpu4_std_6reel )
MCFG_MPU4_STD_REEL_ADD("reel2")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel2_optic_cb))
MCFG_MPU4_STD_REEL_ADD("reel3")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel3_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel3_optic_cb))
MCFG_MPU4_STD_REEL_ADD("reel4")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel4_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel4_optic_cb))
MCFG_MPU4_STD_REEL_ADD("reel5")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel4_optic_cb))
MACHINE_CONFIG_END
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel4_optic_cb))
MACHINE_CONFIG_END
MACHINE_CONFIG_FRAGMENT( mpu4_type2_6reel )
MCFG_MPU4_TYPE2_REEL_ADD("reel0")
@ -2550,12 +2550,12 @@ MACHINE_CONFIG_FRAGMENT( mpu4_type2_6reel )
MCFG_MPU4_TYPE2_REEL_ADD("reel2")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel2_optic_cb))
MCFG_MPU4_TYPE2_REEL_ADD("reel3")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel3_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel3_optic_cb))
MCFG_MPU4_TYPE2_REEL_ADD("reel4")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel4_optic_cb))
MCFG_MPU4_TYPE2_REEL_ADD("reel5")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel5_optic_cb))
MACHINE_CONFIG_END
MACHINE_CONFIG_END
MACHINE_CONFIG_FRAGMENT( mpu4_bwb_5reel )
@ -2566,11 +2566,11 @@ MACHINE_CONFIG_FRAGMENT( mpu4_bwb_5reel )
MCFG_MPU4_BWB_REEL_ADD("reel2")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel2_optic_cb))
MCFG_MPU4_BWB_REEL_ADD("reel3")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel3_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel3_optic_cb))
MCFG_MPU4_BWB_REEL_ADD("reel4")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel4_optic_cb))
MACHINE_CONFIG_END
MACHINE_CONFIG_END
MACHINE_CONFIG_FRAGMENT( mpu4_alt_7reel )
MCFG_MPU4_TYPE3_REEL_ADD("reel0")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel0_optic_cb))
@ -2579,7 +2579,7 @@ MACHINE_CONFIG_FRAGMENT( mpu4_alt_7reel )
MCFG_MPU4_TYPE3_REEL_ADD("reel2")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel2_optic_cb))
MCFG_MPU4_TYPE3_REEL_ADD("reel3")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel3_optic_cb))
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel3_optic_cb))
MCFG_MPU4_TYPE3_REEL_ADD("reel4")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel4_optic_cb))
MCFG_MPU4_TYPE3_REEL_ADD("reel5")
@ -2587,8 +2587,8 @@ MACHINE_CONFIG_FRAGMENT( mpu4_alt_7reel )
MCFG_MPU4_TYPE3_REEL_ADD("reel6")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel6_optic_cb))
MCFG_MPU4_TYPE3_REEL_ADD("reel7")
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel7_optic_cb))
MACHINE_CONFIG_END
MCFG_STEPPER_OPTIC_CALLBACK(WRITELINE(mpu4_state, reel7_optic_cb))
MACHINE_CONFIG_END
MACHINE_CONFIG_FRAGMENT( mpu4_common )
MCFG_TIMER_DRIVER_ADD_PERIODIC("50hz", mpu4_state, gen_50hz, attotime::from_hz(100))
@ -2654,7 +2654,7 @@ MACHINE_CONFIG_FRAGMENT( mpu4_common )
MCFG_PIA_CB2_HANDLER(WRITELINE(mpu4_state, pia_ic8_cb2_w))
MCFG_PIA_IRQA_HANDLER(WRITELINE(mpu4_state, cpu0_irq))
MCFG_PIA_IRQB_HANDLER(WRITELINE(mpu4_state, cpu0_irq))
MACHINE_CONFIG_END
MACHINE_CONFIG_FRAGMENT( mpu4_common2 )
@ -2727,7 +2727,7 @@ MACHINE_CONFIG_DERIVED( mod4oki, mpu4base )
MCFG_FRAGMENT_ADD(mpu4_common2)
MCFG_FRAGMENT_ADD(mpu4_std_6reel)
MCFG_SOUND_ADD("msm6376", OKIM6376, 128000) //16KHz sample Can also be 85430 at 10.5KHz and 64000 at 8KHz
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
@ -2749,7 +2749,7 @@ MACHINE_CONFIG_DERIVED( mod4oki_5r, mpu4base )
MCFG_FRAGMENT_ADD(mpu4_common2)
MCFG_FRAGMENT_ADD(mpu4_std_5reel)
MCFG_SOUND_ADD("msm6376", OKIM6376, 128000) //16KHz sample Can also be 85430 at 10.5KHz and 64000 at 8KHz
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
@ -2759,7 +2759,7 @@ MACHINE_CONFIG_DERIVED( bwboki, mpu4base )
MCFG_MACHINE_START_OVERRIDE(mpu4_state,mpu4bwb)
MCFG_FRAGMENT_ADD(mpu4_common2)
MCFG_FRAGMENT_ADD(mpu4_bwb_5reel)
MCFG_SOUND_ADD("msm6376", OKIM6376, 128000) //16KHz sample Can also be 85430 at 10.5KHz and 64000 at 8KHz
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)

29
src/mame/drivers/namcops2.c
View File

@ -325,13 +325,13 @@ ROM_END
// only known System Super 256 game; if more surface the BIOS should be moved out like 246/256
ROM_START( timecrs4 )
ROM_REGION(0x200000, "bios", 0)
ROM_LOAD( "r27v1602f.8g", 0x000000, 0x200000, CRC(b2a8eeb6) SHA1(bc4fb4e1e53adbd92385f1726bd69663ff870f1e) )
ROM_LOAD( "r27v1602f.8g", 0x000000, 0x200000, CRC(b2a8eeb6) SHA1(bc4fb4e1e53adbd92385f1726bd69663ff870f1e) )
ROM_REGION(0x840000, "key", ROMREGION_ERASE00)
ROM_LOAD( "tsf1002-na-a.ic002", 0x000000, 0x800000, CRC(406183a4) SHA1(dd6afaa4808254b277c5969d071f1dd0019633a0) )
ROM_LOAD( "tsf1002-na-a_spr.ic002", 0x800000, 0x040000, CRC(e7339b66) SHA1(99a2fd5528daf11a7ea548d9de804f899a2a9c6b) )
ROM_LOAD( "tsf1002-na-a.ic002", 0x000000, 0x800000, CRC(406183a4) SHA1(dd6afaa4808254b277c5969d071f1dd0019633a0) )
ROM_LOAD( "tsf1002-na-a_spr.ic002", 0x800000, 0x040000, CRC(e7339b66) SHA1(99a2fd5528daf11a7ea548d9de804f899a2a9c6b) )
DISK_REGION("dvd") // HDD for this game
DISK_REGION("dvd") // HDD for this game
DISK_IMAGE_READONLY( "tsf1-ha", 0, SHA1(8ba7eec0d1add2192a115b295a32265c8d084aea) )
ROM_END
@ -411,8 +411,8 @@ ROM_START( tekken5d )
SYSTEM256_BIOS
ROM_REGION(0x840000, "key", ROMREGION_ERASE00)
ROM_LOAD( "ted1vera.ic002", 0x000000, 0x800000, CRC(491521d1) SHA1(9c27836445690bc083c6f274a4b1a499d5677830) )
ROM_LOAD( "ted1vera_spr.ic002", 0x800000, 0x040000, CRC(a9e1e92b) SHA1(3843d0fea2f12f14f83d0a04430bb9b01cfdef07) )
ROM_LOAD( "ted1vera.ic002", 0x000000, 0x800000, CRC(491521d1) SHA1(9c27836445690bc083c6f274a4b1a499d5677830) )
ROM_LOAD( "ted1vera_spr.ic002", 0x800000, 0x040000, CRC(a9e1e92b) SHA1(3843d0fea2f12f14f83d0a04430bb9b01cfdef07) )
DISK_REGION("dvd")
DISK_IMAGE_READONLY( "ted1dvd0b", 0, SHA1(5940cc628a1555763ef2055e518f840f9a44d123) )
@ -435,8 +435,8 @@ ROM_START( prdgp03 )
SYSTEM246_BIOS
ROM_REGION(0x840000, "key", ROMREGION_ERASE00)
ROM_LOAD( "pr21vera.ic002", 0x000000, 0x800000, CRC(36634ad2) SHA1(e365a79220202640e5bc80bbd8a329012f22f9c4) )
ROM_LOAD( "pr21vera_spr.ic002", 0x000000, 0x040000, CRC(4e81ef24) SHA1(7b7b9d9a0193bcaccb1578cae9dde37fc456e6f8) )
ROM_LOAD( "pr21vera.ic002", 0x000000, 0x800000, CRC(36634ad2) SHA1(e365a79220202640e5bc80bbd8a329012f22f9c4) )
ROM_LOAD( "pr21vera_spr.ic002", 0x000000, 0x040000, CRC(4e81ef24) SHA1(7b7b9d9a0193bcaccb1578cae9dde37fc456e6f8) )
DISK_REGION("dvd")
DISK_IMAGE_READONLY( "pr21dvd0", 0, SHA1(6bad5c25996bbe68da71199fbe8377b51fe78d81) )
@ -513,8 +513,8 @@ ROM_START( rrvac2 )
SYSTEM246_BIOS
ROM_REGION(0x840000, "key", ROMREGION_ERASE00)
ROM_LOAD( "rrv2vera.ic002", 0x000000, 0x800000, CRC(4666f6b5) SHA1(974ed4f6c5869ecf879c0d3540db6ea576225c04) )
ROM_LOAD( "rrv2vera_spr.ic002", 0x800000, 0x040000, CRC(8d98ef04) SHA1(3f33046a8283b918226301fcf5538729be84bfbe) )
ROM_LOAD( "rrv2vera.ic002", 0x000000, 0x800000, CRC(4666f6b5) SHA1(974ed4f6c5869ecf879c0d3540db6ea576225c04) )
ROM_LOAD( "rrv2vera_spr.ic002", 0x800000, 0x040000, CRC(8d98ef04) SHA1(3f33046a8283b918226301fcf5538729be84bfbe) )
ROM_REGION(0x4010, "jvsio", 0) // Namco "FCA" JVS I/O board PIC16F84 code (see namcos23.c for FCA details)
ROM_LOAD( "fcap11.ic2", 0x000000, 0x004010, CRC(1b2592ce) SHA1(a1a487361053af564f6ec67e545413e370a3b38c) )
@ -579,8 +579,8 @@ ROM_START( qgundam )
SYSTEM246_BIOS
ROM_REGION(0x840000, "key", ROMREGION_ERASE00)
ROM_LOAD( "qg1vera.ic002", 0x000000, 0x800000, CRC(650d55fa) SHA1(cf1210bc1f2d48c298ed19e3c6a1e5e564840e47) )
ROM_LOAD( "qg1vera_spr.ic002", 0x800000, 0x040000, CRC(d9715f53) SHA1(e45f0eef5b82b2e1afb054a137aced0344ddbd71) )
ROM_LOAD( "qg1vera.ic002", 0x000000, 0x800000, CRC(650d55fa) SHA1(cf1210bc1f2d48c298ed19e3c6a1e5e564840e47) )
ROM_LOAD( "qg1vera_spr.ic002", 0x800000, 0x040000, CRC(d9715f53) SHA1(e45f0eef5b82b2e1afb054a137aced0344ddbd71) )
DISK_REGION("dvd")
DISK_IMAGE_READONLY( "qg1", 0, SHA1(80fe5cb325c7cfa439d66e9d264337c01559d0e5) )
@ -614,8 +614,8 @@ ROM_START( gdvsgd )
SYSTEM256_BIOS
ROM_REGION(0x840000, "key", ROMREGION_ERASE00)
ROM_LOAD( "gvs1vera.ic002", 0x000000, 0x800000, CRC(b938b96d) SHA1(e79bc7f8c234d51d1b6a34be88f34abc8205a370) )
ROM_LOAD( "gvs1vera_spr.ic002", 0x800000, 0x040000, CRC(f2d65d54) SHA1(297726098c3723e38cbaf3a3150a4a027a9c2124) )
ROM_LOAD( "gvs1vera.ic002", 0x000000, 0x800000, CRC(b938b96d) SHA1(e79bc7f8c234d51d1b6a34be88f34abc8205a370) )
ROM_LOAD( "gvs1vera_spr.ic002", 0x800000, 0x040000, CRC(f2d65d54) SHA1(297726098c3723e38cbaf3a3150a4a027a9c2124) )
DISK_REGION("dvd")
DISK_IMAGE_READONLY( "gvs1dvd0b", 0, SHA1(3cf9ade5495982fcb8e106e7be4067429530f864) )
@ -703,4 +703,3 @@ GAME(2009, gdvsgdnx, sys256, system256, system246, driver_device, 0, ROT0, "Ca
// System Super 256
GAME(2006, timecrs4, sys256, system256, system246, driver_device, 0, ROT0, "Namco", "Time Crisis 4", GAME_IS_SKELETON)

4
src/mame/drivers/relief.c
View File

@ -106,7 +106,7 @@ WRITE16_MEMBER(relief_state::audio_volume_w)
static ADDRESS_MAP_START( oki_map, AS_0, 8, relief_state )
AM_RANGE(0x00000, 0x1ffff) AM_ROMBANK("okibank")
AM_RANGE(0x20000, 0x3ffff) AM_ROM
AM_RANGE(0x20000, 0x3ffff) AM_ROM
ADDRESS_MAP_END
@ -431,7 +431,7 @@ DRIVER_INIT_MEMBER(relief_state,relief)
}
/*************************************
*

8
src/mame/drivers/renegade.c
View File

@ -131,10 +131,10 @@ WRITE8_MEMBER(renegade_state::adpcm_addr_w)
// (chip select for an unpopulated fourth ROM?)
switch (data & 0x1c)
{
case 0x18: m_adpcm_pos = 0 * 0x8000 * 2; break; // 110 -> ic33
case 0x14: m_adpcm_pos = 1 * 0x8000 * 2; break; // 101 -> ic32
case 0x0c: m_adpcm_pos = 2 * 0x8000 * 2; break; // 011 -> ic31
default: m_adpcm_pos = m_adpcm_end = 0; return; // doesn't happen
case 0x18: m_adpcm_pos = 0 * 0x8000 * 2; break; // 110 -> ic33
case 0x14: m_adpcm_pos = 1 * 0x8000 * 2; break; // 101 -> ic32
case 0x0c: m_adpcm_pos = 2 * 0x8000 * 2; break; // 011 -> ic31
default: m_adpcm_pos = m_adpcm_end = 0; return; // doesn't happen
}
// bits 0-1 are a13-a14
m_adpcm_pos |= (data & 0x03) * 0x2000 * 2;

6
src/mame/drivers/sbrkout.c
View File

@ -6,8 +6,8 @@
Games supported:
* Super Breakout
* Super Breakout (Canyon and Vertical Breakout, prototype)
* Super Breakout (Cocktail, prototype)
* Super Breakout (Canyon and Vertical Breakout, prototype)
* Super Breakout (Cocktail, prototype)
Known issues:
* none at this time
@ -529,7 +529,7 @@ static INPUT_PORTS_START( sbrkoutct )
PORT_MODIFY("SELECT")
PORT_CONFNAME(0x80, 0x00, "Game Select" )
PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
PORT_CONFSETTING( 0x80, DEF_STR( On ) )
INPUT_PORTS_END

12
src/mame/drivers/snowbros.c
View File

@ -1401,12 +1401,12 @@ static INPUT_PORTS_START( suhosong )
PORT_DIPUNUSED_DIPLOC( 0x0020, 0x0000, "SW1:6" )
PORT_DIPUNUSED_DIPLOC( 0x0040, 0x0000, "SW1:7" )
PORT_SERVICE_DIPLOC( 0x0080, IP_ACTIVE_LOW, "SW1:8" )
PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Button 4 / Stand / Stop / Drop / Full Bet / Take") PORT_CODE(KEYCODE_V)
PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Button 1 / High") PORT_CODE(KEYCODE_Z)
PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Button 2 / Low") PORT_CODE(KEYCODE_X)
PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Button 3 / Hit / Go / Double Up") PORT_CODE(KEYCODE_C)
PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Button 4 / Stand / Stop / Drop / Full Bet / Take") PORT_CODE(KEYCODE_V)
PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Button 1 / High") PORT_CODE(KEYCODE_Z)
PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Button 2 / Low") PORT_CODE(KEYCODE_X)
PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Button 3 / Hit / Go / Double Up") PORT_CODE(KEYCODE_C)
PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_NAME("Button 6 / Bet / Raise") PORT_CODE(KEYCODE_N)
PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_NAME("Button 6 / Bet / Raise") PORT_CODE(KEYCODE_N)
PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_UNKNOWN )
@ -1429,7 +1429,7 @@ static INPUT_PORTS_START( suhosong )
PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_START("SYSTEM")
PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Button 5 / Start / Double / Call / Check") PORT_CODE(KEYCODE_B) // Double != Double Up
PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Button 5 / Start / Double / Call / Check") PORT_CODE(KEYCODE_B) // Double != Double Up
PORT_BIT( 0x0200, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x0400, IP_ACTIVE_HIGH, IPT_COIN1 )
PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_COIN2 )

12
src/mame/drivers/taito_f3.c
View File

@ -3143,12 +3143,12 @@ ROM_START( pbobble3j )
ROM_LOAD16_BYTE("e29-04.ic39", 0x800000, 0x200000, CRC(d1f42457) SHA1(2c77be6365deb5ef215da0c66da23b415623bdb1) ) // D2 C8 C9 CA
ROM_LOAD16_BYTE("e29-05.ic41", 0xc00000, 0x200000, CRC(e33c1234) SHA1(84c336ed6fd8723e824889fe7b52c284be659e62) ) // CB CC -std-
ROM_REGION(0x034a, "pals", 0)
ROM_LOAD("d77-12.ic48.bin", 0x0000, 0x0001, NO_DUMP) /* PALCE16V8Q-15PC/4 */
ROM_LOAD("d77-14.ic21.bin", 0x0001, 0x0001, NO_DUMP) /* PALCE16V8Q-15PC/4 */
ROM_LOAD("d77-11.ic37.bin", 0x0002, 0x0001, NO_DUMP) /* PALCE16V8Q-15PC/4 */
ROM_LOAD("d77-09.ic14.bin", 0x0003, 0x0001, NO_DUMP) /* PAL16L8ACN */
ROM_LOAD("d77-10.ic28.bin", 0x0004, 0x0001, NO_DUMP) /* PAL16L8ACN */
ROM_REGION(0x034a, "pals", 0)
ROM_LOAD("d77-12.ic48.bin", 0x0000, 0x0001, NO_DUMP) /* PALCE16V8Q-15PC/4 */
ROM_LOAD("d77-14.ic21.bin", 0x0001, 0x0001, NO_DUMP) /* PALCE16V8Q-15PC/4 */
ROM_LOAD("d77-11.ic37.bin", 0x0002, 0x0001, NO_DUMP) /* PALCE16V8Q-15PC/4 */
ROM_LOAD("d77-09.ic14.bin", 0x0003, 0x0001, NO_DUMP) /* PAL16L8ACN */
ROM_LOAD("d77-10.ic28.bin", 0x0004, 0x0001, NO_DUMP) /* PAL16L8ACN */
ROM_END
ROM_START( arkretrn )

2
src/mame/drivers/tigeroad.c
View File

@ -619,7 +619,7 @@ static MACHINE_CONFIG_START( tigeroad, tigeroad_state )
MCFG_SCREEN_PALETTE("palette")
MCFG_GFXDECODE_ADD("gfxdecode", "palette", tigeroad)
MCFG_DEVICE_ADD("spritegen", TIGEROAD_SPRITE, 0)
MCFG_PALETTE_ADD("palette", 1024)

56
src/mame/drivers/viper.c
View File

@ -80,17 +80,17 @@ MB81G163222-80 - Fujitsu MB81G163222-80 256k x 32-bit x 2 banks Synchronous Grap
DS2430 - Dallas DS2430 256-bits 1-Wire EEPROM. Has 256 bits x8 EEPROM (32 bytes), 64 bits x8 (8 bytes)
one-time programmable application register and unique factory-lasered and tested 64-bit
registration number (8-bit family code + 48-bit serial number + 8-bit CRC) (TO-92 @ U37)
The OTP application register on the common DS2430 and the Police 911 2 DS2430 are not programmed
(application register reads all 0xFF and the status register reads back 0xFF), so it's probably safe
The OTP application register on the common DS2430 and the Police 911 2 DS2430 are not programmed
(application register reads all 0xFF and the status register reads back 0xFF), so it's probably safe
to assume they're not used on any of them.
It appears the DS2430 is not protected from reading and the unique silicon serial number is
included in the 40 byte dump. This serial number is used as a check to verify the NVRAM and DS2430.
In the Police 911 2 NVRAM dump the serial number of the DS2430 is located at 0x002A and 0x1026
If the serial number in the NVRAM and DS2430 match then they are paired and the game accepts the NVRAM.
If they don't match the game requires an external DS2430 (i.e. dongle) and flags the NVRAM as 'BAD'
The serial number is not present in the CF card (2 different Police 911 2 cards of the same version
The serial number is not present in the CF card (2 different Police 911 2 cards of the same version
were dumped and matched).
When the lasered ROM is read from the DS2430, it comes out from LSB to MSB (family code, LSB of
When the lasered ROM is read from the DS2430, it comes out from LSB to MSB (family code, LSB of
S/N->MSB of S/N, CRC)
For Police 911 2 that is 0x14 0xB2 0xB7 0x4A 0x00 0x00 0x00 0x83
Family code=0x14
@ -104,12 +104,12 @@ MB81G163222-80 - Fujitsu MB81G163222-80 256k x 32-bit x 2 banks Synchronous Grap
It may be possible to hand craft a DS2430 for a dongle-protected version of a game simply by using
one of the existing DS2430 dumps and adjusting the serial number found in a dump of the NVRAM to pair them
or adjusting the serial number in the NVRAM to match the serial number found in one of the dumped DS2430s.
This Police 911 2 board was upgraded from Police 911 by plugging in the dongle and changing the CF card.
The NVRAM had previously died and the board was dead. Normally for a Viper game that is fatal. Using
the NVRAM from Police 911 allowed it to boot and then the NVRAM upgraded itself with some additional
This Police 911 2 board was upgraded from Police 911 by plugging in the dongle and changing the CF card.
The NVRAM had previously died and the board was dead. Normally for a Viper game that is fatal. Using
the NVRAM from Police 911 allowed it to boot and then the NVRAM upgraded itself with some additional
data (the original data remained untouched). This means the dongle does more than just protect the game.
Another interesting fact about this upgrade is it has been discovered that the PCB can write to the
external DS2430 in the dongle. This has been proven because the serial number of the DS2430 soldered
Another interesting fact about this upgrade is it has been discovered that the PCB can write to the
external DS2430 in the dongle. This has been proven because the serial number of the DS2430 soldered
on the PCB is present in the EEPROM area of the Police 911 2 DS2430.
Here is a dump of the DS2430 from Police 911. Note the EEPROM area is empty and the serial number (from 0x20 onwards)
is present in the above Police 911 2 DS2430 dump at locations 0x11, 0x10 and 0x0F
@ -117,34 +117,34 @@ MB81G163222-80 - Fujitsu MB81G163222-80 256k x 32-bit x 2 banks Synchronous Grap
00000010h FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
00000020h 14 A9 30 74 00 00 00 E7
This proves that the EEPROM area in the DS2430 is unused by an unprotected game and in fact the on-board
DS2430 is completely unused by an unprotected game. That is why any unprotected game will work on any
DS2430 is completely unused by an unprotected game. That is why any unprotected game will work on any
Viper PCB regardless of the on-board DS2430 serial number.
The existing DS2430 'common' dump used in the unprotected games was actually from a (dongle-protected)
The existing DS2430 'common' dump used in the unprotected games was actually from a (dongle-protected)
Mahjong Fight Club PCB but that PCB was used to test and run all of the unprotected Viper games.
M48T58Y - ST Microelectronics M48T58Y Timekeeper RAM (DIP28 @ U39). When this dies (after 10 year lifespan)
the game will complain with error RTC BAD then reset. The data inside the RTC can not be hand created
(yet) so to revive the PCB the correct RTC data must be re-programmed to a new RTC and replaced
on the PCB.
Regarding the RTC and protection-related checks....
"RTC OK" checks 0x0000->0x0945 (i.e. I can clear the contents after 0x0945 and the game will still
"RTC OK" checks 0x0000->0x0945 (i.e. I can clear the contents after 0x0945 and the game will still
happily boot). The NVRAM contents are split into chunks, each of which are checksummed. It is a 16-bit checksum,
computed by summing two consecutive bytes as a 16-bit integer, where the final sum must add up to 0xFFFF (mod
65536). The last two bytes in the chunk are used to make the value 0xFFFF. There doesn't appear to be a
complete checksum over all the chunks (I can pick and choose chunks from various NVRAMs, as long as each chunk
computed by summing two consecutive bytes as a 16-bit integer, where the final sum must add up to 0xFFFF (mod
65536). The last two bytes in the chunk are used to make the value 0xFFFF. There doesn't appear to be a
complete checksum over all the chunks (I can pick and choose chunks from various NVRAMs, as long as each chunk
checksum checks out). The important chunks for booting are the first two.
The first chunk goes from 0x0000-0x000F. This seems to be a game/region identifier, and doesn't like its
contents changed (I didn't try changing every byte, but several of the bytes would throw RTC errors, even with a
fixed checksum). I'd guess that the CF verifies this value, since it's different for every game (i.e. Mocap
The first chunk goes from 0x0000-0x000F. This seems to be a game/region identifier, and doesn't like its
contents changed (I didn't try changing every byte, but several of the bytes would throw RTC errors, even with a
fixed checksum). I'd guess that the CF verifies this value, since it's different for every game (i.e. Mocap
Boxing NVRAM would have a correct checksum, but shouldn't pass Police 911 checks).
The second chunk goes from 0x0010-0x0079. This seems to be a board identifier. This has (optionally)
several fields, each of which are 20 bytes long. I'm unsure of the first 6 bytes, the following 6
bytes are the DS2430A S/N, and the last 8 bytes are a game/region/dongle identifier. If running
without a dongle, only the first 20 byte field is present. With a dongle, a second 20 byte field will
be present. Moving this second field into the place of the first field (and fixing the checksum)
doesn't work, and the second field will be ignored if the first field is valid for the game (and in
which case the dongle will be ignored). For example, Police 911 will boot with a valid first field,
with or without the second field, and with or without the dongle plugged in. If you have both fields,
and leave the dongle plugged in, you can switch between Police 911 and Police 911/2 by simply swapping
The second chunk goes from 0x0010-0x0079. This seems to be a board identifier. This has (optionally)
several fields, each of which are 20 bytes long. I'm unsure of the first 6 bytes, the following 6
bytes are the DS2430A S/N, and the last 8 bytes are a game/region/dongle identifier. If running
without a dongle, only the first 20 byte field is present. With a dongle, a second 20 byte field will
be present. Moving this second field into the place of the first field (and fixing the checksum)
doesn't work, and the second field will be ignored if the first field is valid for the game (and in
which case the dongle will be ignored). For example, Police 911 will boot with a valid first field,
with or without the second field, and with or without the dongle plugged in. If you have both fields,
and leave the dongle plugged in, you can switch between Police 911 and Police 911/2 by simply swapping
CF cards.
29F002 - Fujitsu 29F002 256k x8 EEPROM stamped '941B01' (PLCC44 @ U25). Earlier revision stamped '941A01'
CN4/CN5 - RCA-type network connection jacks
@ -244,7 +244,7 @@ MB81G163222-80 - Fujitsu MB81G163222-80 256k x 32-bit x 2 banks Synchronous Grap
CN2/CN3 - Video output connector to external monitors
CN4/CN5 - Multi-pin IDC connectors joining to main board CN15/CN16
An additional control PCB is used for Mocap Golf for the golf club sensor. It contains a ROMless MCU, an EPROM and
An additional control PCB is used for Mocap Golf for the golf club sensor. It contains a ROMless MCU, an EPROM and
some other components. It will be documented at a later date.
*/

6
src/mame/drivers/wallc.c
View File

@ -64,11 +64,11 @@ public:
required_device<cpu_device> m_maincpu;
required_device<gfxdecode_device> m_gfxdecode;
required_shared_ptr<UINT8> m_videoram;
tilemap_t *m_bg_tilemap;
DECLARE_WRITE8_MEMBER(wallc_videoram_w);
DECLARE_WRITE8_MEMBER(wallc_coin_counter_w);
DECLARE_DRIVER_INIT(wallc);

12
src/mame/drivers/yunsun16.c
View File

@ -634,7 +634,7 @@ static MACHINE_CONFIG_START( shocking, yunsun16_state )
MCFG_CPU_ADD("maincpu", M68000, XTAL_16MHz)
MCFG_CPU_PROGRAM_MAP(main_map)
MCFG_CPU_VBLANK_INT_DRIVER("screen", yunsun16_state, irq2_line_hold)
MCFG_MACHINE_START_OVERRIDE(yunsun16_state, shocking)
MCFG_MACHINE_RESET_OVERRIDE(yunsun16_state, shocking)
@ -876,7 +876,7 @@ ROM_START( paprazzi )
ROM_REGION( 0x080000, "oki", 0 ) /* Samples */
ROM_LOAD( "u131.bin", 0x000000, 0x080000, CRC(bcf7aa12) SHA1(f7bf5258396ed0eb7e85eccf250c6d0a333a4d61) )
ROM_END
/***************************************************************************
@ -905,7 +905,7 @@ ROM_START( shocking )
ROM_REGION( 0x080000, "oki", 0 ) /* Samples */
ROM_LOAD( "yunsun16.131", 0x000000, 0x080000, CRC(d0a1bb8c) SHA1(10f33521bd6031ed73ee5c7be1382165925aa8f8) )
ROM_END
ROM_START( shockingk )
@ -928,7 +928,7 @@ ROM_START( shockingk )
ROM_REGION( 0x080000, "oki", 0 ) /* Samples */
ROM_LOAD( "yunsun16.131", 0x000000, 0x080000, CRC(d0a1bb8c) SHA1(10f33521bd6031ed73ee5c7be1382165925aa8f8) )
ROM_END
@ -960,7 +960,7 @@ ROM_START( bombkick )
ROM_REGION( 0x080000, "oki", 0 ) /* Samples */
ROM_LOAD( "bk_u131", 0x000000, 0x080000, CRC(22cc5732) SHA1(38aefa4e543ea54e004eee428ee087121eb20905) )
ROM_END
ROM_START( bombkicka ) // marked 'Bomb Kick 98'
@ -983,7 +983,7 @@ ROM_START( bombkicka ) // marked 'Bomb Kick 98'
ROM_REGION( 0x080000, "oki", 0 ) /* Samples */
ROM_LOAD( "bk_u131", 0x000000, 0x080000, CRC(22cc5732) SHA1(38aefa4e543ea54e004eee428ee087121eb20905) )
ROM_END
/***************************************************************************

6
src/mame/includes/asteroid.h
View File

@ -43,13 +43,13 @@ public:
DECLARE_WRITE8_MEMBER(asteroid_noise_reset_w);
DECLARE_WRITE8_MEMBER(llander_snd_reset_w);
DECLARE_WRITE8_MEMBER(llander_sounds_w);
DECLARE_CUSTOM_INPUT_MEMBER(clock_r);
INTERRUPT_GEN_MEMBER(asteroid_interrupt);
INTERRUPT_GEN_MEMBER(asterock_interrupt);
INTERRUPT_GEN_MEMBER(llander_interrupt);
DECLARE_DRIVER_INIT(asterock);
DECLARE_DRIVER_INIT(asteroidb);

2
src/mame/includes/bionicc.h
View File

@ -20,7 +20,7 @@ public:
m_maincpu(*this, "maincpu"),
m_gfxdecode(*this, "gfxdecode"),
m_palette(*this, "palette"),
m_spritegen(*this, "spritegen")
m_spritegen(*this, "spritegen")
{ }
/* memory pointers */

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