mirror of
https://github.com/holub/mame
synced 2025-07-03 09:06:08 +03:00
tlcs900.c: Modernized cpu core (nw)
This commit is contained in:
Wilbert Pol
parent
21c4aba60d
commit
e6fd16cf84
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -37,18 +37,614 @@ enum
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};
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struct tlcs900_interface
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extern const device_type TLCS900H;
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extern const device_type TMP95C063;
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#define MCFG_TLCS900_CONFIG( _to1, _to3, _port_read, _port_write ) \
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tlcs900h_device::set_to1( *device, DEVCB2_##_to1 ); \
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tlcs900h_device::set_to3( *device, DEVCB2_##_to3 ); \
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tlcs900h_device::set_port_read( *device, DEVCB2_##_port_read ); \
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tlcs900h_device::set_port_write( *device, DEVCB2_##_port_write );
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class tlcs900h_device : public cpu_device
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{
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devcb_write8 to1;
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devcb_write8 to3;
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devcb_read8 port_read;
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devcb_write8 port_write;
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public:
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// construction/destruction
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tlcs900h_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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tlcs900h_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, address_map_constructor internal_map);
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// static configuration helpers
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template<class _Object> static devcb2_base &set_to1(device_t &device, _Object object) { return downcast<tlcs900h_device &>(device).m_to1.set_callback(object); }
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template<class _Object> static devcb2_base &set_to3(device_t &device, _Object object) { return downcast<tlcs900h_device &>(device).m_to3.set_callback(object); }
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template<class _Object> static devcb2_base &set_port_read(device_t &device, _Object object) { return downcast<tlcs900h_device &>(device).m_port_read.set_callback(object); }
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template<class _Object> static devcb2_base &set_port_write(device_t &device, _Object object) { return downcast<tlcs900h_device &>(device).m_port_write.set_callback(object); }
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DECLARE_READ8_MEMBER( tlcs900_internal_r );
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DECLARE_WRITE8_MEMBER( tlcs900_internal_w );
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DECLARE_READ8_MEMBER( tmp95c063_internal_r );
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DECLARE_WRITE8_MEMBER( tmp95c063_internal_w );
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protected:
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// device-level overrides
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virtual void device_start();
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virtual void device_reset();
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// device_execute_interface overrides
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virtual UINT32 execute_min_cycles() const { return 1; } /* FIXME */
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virtual UINT32 execute_max_cycles() const { return 1; } /* FIXME */
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virtual UINT32 execute_input_lines() const { return 6; }
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virtual void execute_run();
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virtual void execute_set_input(int inputnum, int state);
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// device_memory_interface overrides
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virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const
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{
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return (spacenum == AS_PROGRAM) ? &m_program_config : NULL;
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}
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// device_state_interface overrides
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void state_string_export(const device_state_entry &entry, astring &string);
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// device_disasm_interface overrides
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virtual UINT32 disasm_min_opcode_bytes() const { return 1; }
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virtual UINT32 disasm_max_opcode_bytes() const { return 7; } /* FIXME */
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virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
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protected:
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address_space_config m_program_config;
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devcb2_write8 m_to1;
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devcb2_write8 m_to3;
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devcb2_read8 m_port_read;
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devcb2_write8 m_port_write;
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/* registers */
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PAIR m_xwa[4];
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PAIR m_xbc[4];
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PAIR m_xde[4];
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PAIR m_xhl[4];
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PAIR m_xix;
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PAIR m_xiy;
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PAIR m_xiz;
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PAIR m_xssp;
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PAIR m_xnsp;
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PAIR m_pc;
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PAIR m_sr;
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PAIR m_f2; /* f' */
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/* DMA registers */
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PAIR m_dmas[4];
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PAIR m_dmad[4];
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PAIR m_dmac[4];
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PAIR m_dmam[4];
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/* Internal timers, irqs, etc */
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UINT8 m_reg[0xa0];
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UINT32 m_timer_pre;
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UINT8 m_timer[6];
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UINT8 m_tff1;
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UINT8 m_tff3;
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int m_timer_change[4];
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bool m_prefetch_clear;
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UINT8 m_prefetch_index;
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UINT8 m_prefetch[4];
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/* Current state of input levels */
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int m_level[TLCS900_NUM_INPUTS];
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int m_check_irqs;
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int m_ad_cycles_left;
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int m_nmi_state;
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/* used during execution */
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PAIR m_dummy; /* for illegal register references */
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UINT8 m_op;
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PAIR m_ea1, m_ea2;
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PAIR m_imm1, m_imm2;
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int m_cycles;
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UINT8 *m_p1_reg8, *m_p2_reg8;
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UINT16 *m_p1_reg16, *m_p2_reg16;
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UINT32 *m_p1_reg32, *m_p2_reg32;
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int m_halted;
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int m_icount;
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int m_regbank;
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address_space *m_program;
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typedef void (tlcs900h_device::*ophandler)();
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struct tlcs900inst
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{
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ophandler opfunc;
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int operand1;
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int operand2;
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int cycles;
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};
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static const tlcs900inst s_mnemonic_80[256];
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static const tlcs900inst s_mnemonic_88[256];
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static const tlcs900inst s_mnemonic_90[256];
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static const tlcs900inst s_mnemonic_98[256];
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static const tlcs900inst s_mnemonic_a0[256];
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static const tlcs900inst s_mnemonic_b0[256];
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static const tlcs900inst s_mnemonic_b8[256];
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static const tlcs900inst s_mnemonic_c0[256];
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static const tlcs900inst s_mnemonic_c8[256];
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static const tlcs900inst s_mnemonic_d0[256];
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static const tlcs900inst s_mnemonic_d8[256];
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static const tlcs900inst s_mnemonic_e0[256];
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static const tlcs900inst s_mnemonic_e8[256];
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static const tlcs900inst s_mnemonic_f0[256];
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static const tlcs900inst s_mnemonic[256];
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inline UINT8 RDOP();
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int tlcs900_process_hdma( int channel );
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virtual void tlcs900_check_hdma();
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virtual void tlcs900_check_irqs();
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virtual void tlcs900_handle_ad();
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void tlcs900_change_tff( int which, int change );
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virtual void tlcs900_handle_timers();
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int condition_true( UINT8 cond );
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UINT8 *get_reg8_current( UINT8 reg );
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UINT16 *get_reg16_current( UINT8 reg );
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UINT32 *get_reg32_current( UINT8 reg );
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PAIR *get_reg( UINT8 reg );
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UINT8 *get_reg8( UINT8 reg );
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UINT16 *get_reg16( UINT8 reg );
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UINT32 *get_reg32( UINT8 reg );
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void parity8( UINT8 a );
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void parity16( UINT16 a );
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void parity32( UINT32 a );
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UINT8 adc8( UINT8 a, UINT8 b);
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UINT16 adc16( UINT16 a, UINT16 b);
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UINT32 adc32( UINT32 a, UINT32 b);
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UINT8 add8( UINT8 a, UINT8 b);
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UINT16 add16( UINT16 a, UINT16 b);
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UINT32 add32( UINT32 a, UINT32 b);
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UINT8 sbc8( UINT8 a, UINT8 b);
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UINT16 sbc16( UINT16 a, UINT16 b);
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UINT32 sbc32( UINT32 a, UINT32 b);
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UINT8 sub8( UINT8 a, UINT8 b);
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UINT16 sub16( UINT16 a, UINT16 b);
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UINT32 sub32( UINT32 a, UINT32 b);
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UINT8 and8( UINT8 a, UINT8 b);
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UINT16 and16( UINT16 a, UINT16 b);
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UINT32 and32( UINT32 a, UINT32 b);
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UINT8 or8( UINT8 a, UINT8 b);
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UINT16 or16( UINT16 a, UINT16 b);
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UINT32 or32( UINT32 a, UINT32 b);
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UINT8 xor8( UINT8 a, UINT8 b);
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UINT16 xor16( UINT16 a, UINT16 b);
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UINT32 xor32( UINT32 a, UINT32 b);
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void ldcf8( UINT8 a, UINT8 b );
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void ldcf16( UINT8 a, UINT8 b );
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void andcf8( UINT8 a, UINT8 b );
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void andcf16( UINT8 a, UINT8 b );
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void orcf8( UINT8 a, UINT8 b );
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void orcf16( UINT8 a, UINT8 b );
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void xorcf8( UINT8 a, UINT8 b );
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void xorcf16( UINT8 a, UINT8 b );
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UINT8 rl8( UINT8 a, UINT8 s );
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UINT16 rl16( UINT16 a, UINT8 s );
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UINT32 rl32( UINT32 a, UINT8 s );
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UINT8 rlc8( UINT8 a, UINT8 s );
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UINT16 rlc16( UINT16 a, UINT8 s );
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UINT32 rlc32( UINT32 a, UINT8 s );
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UINT8 rr8( UINT8 a, UINT8 s );
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UINT16 rr16( UINT16 a, UINT8 s );
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UINT32 rr32( UINT32 a, UINT8 s );
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UINT8 rrc8( UINT8 a, UINT8 s );
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UINT16 rrc16( UINT16 a, UINT8 s );
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UINT32 rrc32( UINT32 a, UINT8 s );
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UINT8 sla8( UINT8 a, UINT8 s );
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UINT16 sla16( UINT16 a, UINT8 s );
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UINT32 sla32( UINT32 a, UINT8 s );
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UINT8 sra8( UINT8 a, UINT8 s );
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UINT16 sra16( UINT16 a, UINT8 s );
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UINT32 sra32( UINT32 a, UINT8 s );
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UINT8 srl8( UINT8 a, UINT8 s );
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UINT16 srl16( UINT16 a, UINT8 s );
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UINT32 srl32( UINT32 a, UINT8 s );
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UINT16 div8( UINT16 a, UINT8 b );
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UINT32 div16( UINT32 a, UINT16 b );
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UINT16 divs8( INT16 a, INT8 b );
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UINT32 divs16( INT32 a, INT16 b );
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void _ADCBMI();
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void _ADCBMR();
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void _ADCBRI();
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void _ADCBRM();
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void _ADCBRR();
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void _ADCWMI();
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void _ADCWMR();
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void _ADCWRI();
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void _ADCWRM();
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void _ADCWRR();
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void _ADCLMR();
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void _ADCLRI();
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void _ADCLRM();
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void _ADCLRR();
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void _ADDBMI();
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void _ADDBMR();
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void _ADDBRI();
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void _ADDBRM();
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void _ADDBRR();
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void _ADDWMI();
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void _ADDWMR();
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void _ADDWRI();
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void _ADDWRM();
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void _ADDWRR();
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void _ADDLMR();
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void _ADDLRI();
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void _ADDLRM();
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void _ADDLRR();
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void _ANDBMI();
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void _ANDBMR();
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void _ANDBRI();
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void _ANDBRM();
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void _ANDBRR();
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void _ANDWMI();
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void _ANDWMR();
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void _ANDWRI();
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void _ANDWRM();
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void _ANDWRR();
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void _ANDLMR();
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void _ANDLRI();
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void _ANDLRM();
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void _ANDLRR();
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void _ANDCFBIM();
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void _ANDCFBIR();
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void _ANDCFBRM();
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void _ANDCFBRR();
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void _ANDCFWIR();
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void _ANDCFWRR();
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void _BITBIM();
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void _BITBIR();
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void _BITWIR();
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void _BS1BRR();
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void _BS1FRR();
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void _CALLI();
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void _CALLM();
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void _CALR();
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void _CCF();
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void _CHGBIM();
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void _CHGBIR();
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void _CHGWIR();
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void _CPBMI();
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void _CPBMR();
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void _CPBRI();
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void _CPBRM();
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void _CPBRR();
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void _CPWMI();
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void _CPWMR();
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void _CPWRI();
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void _CPWRM();
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void _CPWRR();
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void _CPLMR();
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void _CPLRI();
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void _CPLRM();
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void _CPLRR();
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void _CPD();
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void _CPDR();
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void _CPDW();
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void _CPDRW();
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void _CPI();
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void _CPIR();
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void _CPIW();
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void _CPIRW();
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void _CPLBR();
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void _CPLWR();
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void _DAABR();
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void _DB();
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void _DECBIM();
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void _DECBIR();
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void _DECWIM();
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void _DECWIR();
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void _DECLIR();
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void _DECF();
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void _DIVBRI();
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void _DIVBRM();
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void _DIVBRR();
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void _DIVWRI();
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void _DIVWRM();
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void _DIVWRR();
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void _DIVSBRI();
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void _DIVSBRM();
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void _DIVSBRR();
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void _DIVSWRI();
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void _DIVSWRM();
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void _DIVSWRR();
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void _DJNZB();
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void _DJNZW();
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void _EI();
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void _EXBMR();
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void _EXBRR();
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void _EXWMR();
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void _EXWRR();
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void _EXTSWR();
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void _EXTSLR();
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void _EXTZWR();
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void _EXTZLR();
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void _HALT();
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void _INCBIM();
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void _INCBIR();
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void _INCWIM();
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void _INCWIR();
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void _INCLIR();
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void _INCF();
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void _JPI();
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void _JPM();
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void _JR();
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void _JRL();
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void _LDBMI();
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void _LDBMM();
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void _LDBMR();
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void _LDBRI();
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void _LDBRM();
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void _LDBRR();
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void _LDWMI();
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void _LDWMM();
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void _LDWMR();
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void _LDWRI();
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void _LDWRM();
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void _LDWRR();
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void _LDLRI();
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void _LDLRM();
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void _LDLRR();
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void _LDLMR();
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void _LDAW();
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void _LDAL();
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void _LDCBRR();
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void _LDCWRR();
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void _LDCLRR();
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void _LDCFBIM();
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void _LDCFBIR();
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void _LDCFBRM();
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void _LDCFBRR();
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void _LDCFWIR();
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void _LDCFWRR();
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void _LDD();
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void _LDDR();
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void _LDDRW();
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void _LDDW();
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void _LDF();
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void _LDI();
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void _LDIR();
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void _LDIRW();
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void _LDIW();
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void _LDX();
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void _LINK();
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void _MAX();
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void _MDEC1();
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void _MDEC2();
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void _MDEC4();
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void _MINC1();
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void _MINC2();
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void _MINC4();
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void _MIRRW();
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void _MULBRI();
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void _MULBRM();
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void _MULBRR();
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void _MULWRI();
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void _MULWRM();
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void _MULWRR();
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void _MULAR();
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void _MULSBRI();
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void _MULSBRM();
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void _MULSBRR();
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void _MULSWRI();
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void _MULSWRM();
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void _MULSWRR();
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void _NEGBR();
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void _NEGWR();
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void _NOP();
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void _NORMAL();
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void _ORBMI();
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void _ORBMR();
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void _ORBRI();
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void _ORBRM();
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void _ORBRR();
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void _ORWMI();
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void _ORWMR();
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void _ORWRI();
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void _ORWRM();
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void _ORWRR();
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void _ORLMR();
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void _ORLRI();
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void _ORLRM();
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void _ORLRR();
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void _ORCFBIM();
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void _ORCFBIR();
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void _ORCFBRM();
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void _ORCFBRR();
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void _ORCFWIR();
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void _ORCFWRR();
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void _PAAWR();
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void _PAALR();
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void _POPBM();
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void _POPBR();
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void _POPWM();
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void _POPWR();
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void _POPWSR();
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void _POPLR();
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void _PUSHBI();
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void _PUSHBM();
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void _PUSHBR();
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void _PUSHWI();
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void _PUSHWM();
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void _PUSHWR();
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void _PUSHLR();
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void _RCF();
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void _RESBIM();
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void _RESBIR();
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void _RESWIR();
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void _RET();
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void _RETCC();
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void _RETD();
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void _RETI();
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void _RLBM();
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void _RLWM();
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void _RLBIR();
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void _RLBRR();
|
||||
void _RLWIR();
|
||||
void _RLWRR();
|
||||
void _RLLIR();
|
||||
void _RLLRR();
|
||||
void _RLCBM();
|
||||
void _RLCWM();
|
||||
void _RLCBIR();
|
||||
void _RLCBRR();
|
||||
void _RLCWIR();
|
||||
void _RLCWRR();
|
||||
void _RLCLIR();
|
||||
void _RLCLRR();
|
||||
void _RLDRM();
|
||||
void _RRBM();
|
||||
void _RRWM();
|
||||
void _RRBIR();
|
||||
void _RRBRR();
|
||||
void _RRWIR();
|
||||
void _RRWRR();
|
||||
void _RRLIR();
|
||||
void _RRLRR();
|
||||
void _RRCBM();
|
||||
void _RRCWM();
|
||||
void _RRCBIR();
|
||||
void _RRCBRR();
|
||||
void _RRCWIR();
|
||||
void _RRCWRR();
|
||||
void _RRCLIR();
|
||||
void _RRCLRR();
|
||||
void _RRDRM();
|
||||
void _SBCBMI();
|
||||
void _SBCBMR();
|
||||
void _SBCBRI();
|
||||
void _SBCBRM();
|
||||
void _SBCBRR();
|
||||
void _SBCWMI();
|
||||
void _SBCWMR();
|
||||
void _SBCWRI();
|
||||
void _SBCWRM();
|
||||
void _SBCWRR();
|
||||
void _SBCLMR();
|
||||
void _SBCLRI();
|
||||
void _SBCLRM();
|
||||
void _SBCLRR();
|
||||
void _SCCBR();
|
||||
void _SCCWR();
|
||||
void _SCF();
|
||||
void _SETBIM();
|
||||
void _SETBIR();
|
||||
void _SETWIR();
|
||||
void _SLABM();
|
||||
void _SLAWM();
|
||||
void _SLABIR();
|
||||
void _SLABRR();
|
||||
void _SLAWIR();
|
||||
void _SLAWRR();
|
||||
void _SLALIR();
|
||||
void _SLALRR();
|
||||
void _SLLBM();
|
||||
void _SLLWM();
|
||||
void _SLLBIR();
|
||||
void _SLLBRR();
|
||||
void _SLLWIR();
|
||||
void _SLLWRR();
|
||||
void _SLLLIR();
|
||||
void _SLLLRR();
|
||||
void _SRABM();
|
||||
void _SRAWM();
|
||||
void _SRABIR();
|
||||
void _SRABRR();
|
||||
void _SRAWIR();
|
||||
void _SRAWRR();
|
||||
void _SRALIR();
|
||||
void _SRALRR();
|
||||
void _SRLBM();
|
||||
void _SRLWM();
|
||||
void _SRLBIR();
|
||||
void _SRLBRR();
|
||||
void _SRLWIR();
|
||||
void _SRLWRR();
|
||||
void _SRLLIR();
|
||||
void _SRLLRR();
|
||||
void _STCFBIM();
|
||||
void _STCFBIR();
|
||||
void _STCFBRM();
|
||||
void _STCFBRR();
|
||||
void _STCFWIR();
|
||||
void _STCFWRR();
|
||||
void _SUBBMI();
|
||||
void _SUBBMR();
|
||||
void _SUBBRI();
|
||||
void _SUBBRM();
|
||||
void _SUBBRR();
|
||||
void _SUBWMI();
|
||||
void _SUBWMR();
|
||||
void _SUBWRI();
|
||||
void _SUBWRM();
|
||||
void _SUBWRR();
|
||||
void _SUBLMR();
|
||||
void _SUBLRI();
|
||||
void _SUBLRM();
|
||||
void _SUBLRR();
|
||||
void _SWI();
|
||||
void _TSETBIM();
|
||||
void _TSETBIR();
|
||||
void _TSETWIR();
|
||||
void _UNLK();
|
||||
void _XORBMI();
|
||||
void _XORBMR();
|
||||
void _XORBRI();
|
||||
void _XORBRM();
|
||||
void _XORBRR();
|
||||
void _XORWMI();
|
||||
void _XORWMR();
|
||||
void _XORWRI();
|
||||
void _XORWRM();
|
||||
void _XORWRR();
|
||||
void _XORLMR();
|
||||
void _XORLRI();
|
||||
void _XORLRM();
|
||||
void _XORLRR();
|
||||
void _XORCFBIM();
|
||||
void _XORCFBIR();
|
||||
void _XORCFBRM();
|
||||
void _XORCFBRR();
|
||||
void _XORCFWIR();
|
||||
void _XORCFWRR();
|
||||
void _ZCF();
|
||||
void prepare_operands(const tlcs900inst *inst);
|
||||
void _80();
|
||||
void _88();
|
||||
void _90();
|
||||
void _98();
|
||||
void _A0();
|
||||
void _A8();
|
||||
void _B0();
|
||||
void _B8();
|
||||
void _C0();
|
||||
void oC8();
|
||||
void _D0();
|
||||
void oD8();
|
||||
void _E0();
|
||||
void _E8();
|
||||
void _F0();
|
||||
};
|
||||
|
||||
|
||||
DECLARE_LEGACY_CPU_DEVICE(TLCS900H, tlcs900h);
|
||||
DECLARE_LEGACY_CPU_DEVICE(TMP95C063, tmp95c063);
|
||||
class tmp95c063_device : public tlcs900h_device
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
tmp95c063_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
|
||||
extern CPU_DISASSEMBLE( tlcs900 );
|
||||
protected:
|
||||
virtual void device_reset();
|
||||
virtual void execute_set_input(int inputnum, int state);
|
||||
virtual void tlcs900_check_hdma();
|
||||
virtual void tlcs900_check_irqs();
|
||||
virtual void tlcs900_handle_ad();
|
||||
virtual void tlcs900_handle_timers();
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
@ -407,11 +407,6 @@ static const powerpc_config ppc603e_config =
|
||||
NULL
|
||||
};
|
||||
|
||||
static const tlcs900_interface taitopjc_tlcs900_interface =
|
||||
{
|
||||
DEVCB_DRIVER_MEMBER(taitopjc_state,taitopjc_tlcs900_to1 ),
|
||||
DEVCB_DRIVER_MEMBER(taitopjc_state,taitopjc_tlcs900_to3 )
|
||||
};
|
||||
|
||||
static MACHINE_CONFIG_START( taitopjc, taitopjc_state )
|
||||
MCFG_CPU_ADD("maincpu", PPC603E, 100000000)
|
||||
@ -420,7 +415,7 @@ static MACHINE_CONFIG_START( taitopjc, taitopjc_state )
|
||||
|
||||
/* TMP95C063F I/O CPU */
|
||||
MCFG_CPU_ADD("iocpu", TLCS900H, 25000000)
|
||||
MCFG_CPU_CONFIG(taitopjc_tlcs900_interface)
|
||||
MCFG_TLCS900_CONFIG( WRITE8(taitopjc_state,taitopjc_tlcs900_to1), WRITE8(taitopjc_state,taitopjc_tlcs900_to3), NULL, NULL )
|
||||
MCFG_CPU_PROGRAM_MAP(tlcs900h_mem)
|
||||
|
||||
/* TMS320C53 DSP */
|
||||
|
||||
@ -2811,13 +2811,6 @@ static const powerpc_config ppc603e_config =
|
||||
NULL
|
||||
};
|
||||
|
||||
static const tlcs900_interface taitotz_tlcs900_interface =
|
||||
{
|
||||
DEVCB_DRIVER_MEMBER(taitotz_state, tlcs900_to1),
|
||||
DEVCB_DRIVER_MEMBER(taitotz_state, tlcs900_to3),
|
||||
DEVCB_DRIVER_MEMBER(taitotz_state, tlcs900_port_read),
|
||||
DEVCB_DRIVER_MEMBER(taitotz_state, tlcs900_port_write),
|
||||
};
|
||||
|
||||
static MACHINE_CONFIG_START( taitotz, taitotz_state )
|
||||
/* IBM EMPPC603eBG-100 */
|
||||
@ -2827,7 +2820,7 @@ static MACHINE_CONFIG_START( taitotz, taitotz_state )
|
||||
|
||||
/* TMP95C063F I/O CPU */
|
||||
MCFG_CPU_ADD("iocpu", TMP95C063, 25000000)
|
||||
MCFG_CPU_CONFIG(taitotz_tlcs900_interface)
|
||||
MCFG_TLCS900_CONFIG( WRITE8(taitotz_state,tlcs900_to1), WRITE8(taitotz_state,tlcs900_to3), READ8(taitotz_state,tlcs900_port_read), WRITE8(taitotz_state,tlcs900_port_write) )
|
||||
MCFG_CPU_PROGRAM_MAP(tlcs900h_mem)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", taitotz_state, taitotz_vbi)
|
||||
|
||||
|
||||
@ -803,18 +803,11 @@ void ngp_state::nvram_write(emu_file &file)
|
||||
}
|
||||
|
||||
|
||||
static const tlcs900_interface ngp_tlcs900_interface =
|
||||
{
|
||||
DEVCB_NULL,
|
||||
DEVCB_DRIVER_MEMBER( ngp_state, ngp_tlcs900_to3 )
|
||||
};
|
||||
|
||||
|
||||
static MACHINE_CONFIG_START( ngp_common, ngp_state )
|
||||
|
||||
MCFG_CPU_ADD( "maincpu", TLCS900H, XTAL_6_144MHz )
|
||||
MCFG_CPU_PROGRAM_MAP( ngp_mem)
|
||||
MCFG_CPU_CONFIG( ngp_tlcs900_interface )
|
||||
MCFG_TLCS900_CONFIG( NULL, WRITE8(ngp_state,ngp_tlcs900_to3), NULL, NULL )
|
||||
|
||||
MCFG_CPU_ADD( "soundcpu", Z80, XTAL_6_144MHz/2 )
|
||||
MCFG_CPU_PROGRAM_MAP( z80_mem)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user