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https://github.com/holub/mame
synced 2025-04-27 10:43:07 +03:00
(Modified to allow for overwrites of RAM ranges only.)
From: Atari Ace [mailto:atari_ace@verizon.net] Subject: [patch] Stricter ADDRESS_MAP checks Hi mamedev, The current implementation of address maps is lacking some useful checks of the initial tokens. In particular, it doesn't validate that a particular entry doesn't try to define the same handler multiple times. The attached patch adds this and some other validations as fatalerrors in address_map_detokenize, and fixes the affected maps. The errors generally fall into the following categories. 1. AM_RAM AM_WRITE(...). Should have been AM_RAM_WRITE(...) 2. AM_RAM AM_READWRITE(...). The AM_RAM is a NOP. 3. AM_RAM AM_RAMBANK(...). The AM_RAM is a NOP. 4. AM_ROM AM_ROMBANK(...). The AM_ROM is a NOP. 5. AM_ROM AM_READ(...). The AM_ROM is a NOP. One peculiar error was in equites.c, where there were two AM_BASE entries. ~aa
This commit is contained in:
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212c069fd9
commit
e70d4b0a85
@ -373,7 +373,7 @@ const char *const address_space_names[ADDRESS_SPACES] = { "program", "data", "I/
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FUNCTION PROTOTYPES
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***************************************************************************/
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static void address_map_detokenize(address_map *map, const addrmap_token *tokens);
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static void address_map_detokenize(address_map *map, const game_driver *driver, const addrmap_token *tokens);
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static void memory_init_cpudata(running_machine *machine);
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static void memory_init_preflight(running_machine *machine);
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@ -858,7 +858,7 @@ const data_accessors *memory_get_accessors(int spacenum, int databits, int endia
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address map for a CPU's address space
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-------------------------------------------------*/
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address_map *address_map_alloc(const machine_config *config, int cpunum, int spacenum)
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address_map *address_map_alloc(const machine_config *config, const game_driver *driver, int cpunum, int spacenum)
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{
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int cputype = config->cpu[cpunum].type;
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const addrmap_token *internal_map = (const addrmap_token *)cputype_get_info_ptr(cputype, CPUINFO_PTR_INTERNAL_MEMORY_MAP + spacenum);
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@ -869,13 +869,13 @@ address_map *address_map_alloc(const machine_config *config, int cpunum, int spa
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/* start by constructing the internal CPU map */
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if (internal_map != NULL)
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address_map_detokenize(map, internal_map);
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address_map_detokenize(map, driver, internal_map);
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/* construct the standard map */
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if (config->cpu[cpunum].address_map[spacenum][0] != NULL)
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address_map_detokenize(map, config->cpu[cpunum].address_map[spacenum][0]);
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address_map_detokenize(map, driver, config->cpu[cpunum].address_map[spacenum][0]);
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if (config->cpu[cpunum].address_map[spacenum][1] != NULL)
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address_map_detokenize(map, config->cpu[cpunum].address_map[spacenum][1]);
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address_map_detokenize(map, driver, config->cpu[cpunum].address_map[spacenum][1]);
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return map;
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}
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@ -918,29 +918,43 @@ const address_map *memory_get_address_map(int cpunum, int spacenum)
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of address map tokens
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-------------------------------------------------*/
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static void address_map_detokenize(address_map *map, const addrmap_token *tokens)
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#define check_map(field) do { \
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if (map->field != 0 && map->field != tmap.field) \
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fatalerror("%s: %s included a mismatched address map (%s %d) for an existing map with %s %d!\n", driver->source_file, driver->name, #field, tmap.field, #field, map->field); \
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} while (0)
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#define check_entry_handler(handler) do { \
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if (entry->handler.generic != NULL && entry->handler.generic != SMH_RAM) \
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fatalerror("%s: %s AM_RANGE(0x%x, 0x%x) %s handler already set!\n", driver->source_file, driver->name, entry->addrstart, entry->addrend, #handler); \
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} while (0)
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#define check_entry_field(field) do { \
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if (entry->field != 0) \
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fatalerror("%s: %s AM_RANGE(0x%x, 0x%x) setting %s already set!\n", driver->source_file, driver->name, entry->addrstart, entry->addrend, #field); \
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} while (0)
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static void address_map_detokenize(address_map *map, const game_driver *driver, const addrmap_token *tokens)
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{
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address_map_entry **entryptr;
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address_map_entry *entry;
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UINT8 spacenum, databits;
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address_map tmap = {0};
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UINT32 entrytype;
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/* check the first token */
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TOKEN_GET_UINT32_UNPACK3(tokens, entrytype, 8, spacenum, 8, databits, 8);
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TOKEN_GET_UINT32_UNPACK3(tokens, entrytype, 8, tmap.spacenum, 8, tmap.databits, 8);
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if (entrytype != ADDRMAP_TOKEN_START)
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fatalerror("Address map missing ADDRMAP_TOKEN_START!");
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if (spacenum >= ADDRESS_SPACES)
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fatalerror("Invalid address space %d for memory map!", spacenum);
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if (databits != 8 && databits != 16 && databits != 32 && databits != 64)
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fatalerror("Invalid data bits %d for memory map!", databits);
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if (map->spacenum != 0 && map->spacenum != spacenum)
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fatalerror("Included a mismatched address map (space %d) for an existing map of type %d!\n", spacenum, map->spacenum);
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if (map->databits != 0 && map->databits != databits)
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fatalerror("Included a mismatched address map (databits %d) for an existing map with databits %d!\n", databits, map->databits);
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fatalerror("%s: %s Address map missing ADDRMAP_TOKEN_START!\n", driver->source_file, driver->name);
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if (tmap.spacenum >= ADDRESS_SPACES)
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fatalerror("%s: %s Invalid address space %d for memory map!\n", driver->source_file, driver->name, tmap.spacenum);
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if (tmap.databits != 8 && tmap.databits != 16 && tmap.databits != 32 && tmap.databits != 64)
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fatalerror("%s: %s Invalid data bits %d for memory map!\n", driver->source_file, driver->name, tmap.databits);
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check_map(spacenum);
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check_map(databits);
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/* fill in the map values */
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map->spacenum = spacenum;
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map->databits = databits;
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map->spacenum = tmap.spacenum;
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map->databits = tmap.databits;
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/* find the end of the list */
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for (entryptr = &map->entrylist; *entryptr != NULL; entryptr = &(*entryptr)->next) ;
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@ -959,7 +973,7 @@ static void address_map_detokenize(address_map *map, const addrmap_token *tokens
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/* including */
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case ADDRMAP_TOKEN_INCLUDE:
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address_map_detokenize(map, TOKEN_GET_PTR(tokens, tokenptr));
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address_map_detokenize(map, driver, TOKEN_GET_PTR(tokens, tokenptr));
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for (entryptr = &map->entrylist; *entryptr != NULL; entryptr = &(*entryptr)->next) ;
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entry = NULL;
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break;
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@ -967,12 +981,16 @@ static void address_map_detokenize(address_map *map, const addrmap_token *tokens
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/* global flags */
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case ADDRMAP_TOKEN_GLOBAL_MASK:
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TOKEN_UNGET_UINT32(tokens);
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TOKEN_GET_UINT64_UNPACK2(tokens, entrytype, 8, map->globalmask, 32);
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TOKEN_GET_UINT64_UNPACK2(tokens, entrytype, 8, tmap.globalmask, 32);
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check_map(globalmask);
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map->globalmask = tmap.globalmask;
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break;
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case ADDRMAP_TOKEN_UNMAP_VALUE:
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TOKEN_UNGET_UINT32(tokens);
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TOKEN_GET_UINT32_UNPACK2(tokens, entrytype, 8, map->unmapval, 1);
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TOKEN_GET_UINT32_UNPACK2(tokens, entrytype, 8, tmap.unmapval, 1);
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check_map(unmapval);
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map->unmapval = tmap.unmapval;
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break;
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/* start a new range */
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@ -984,16 +1002,19 @@ static void address_map_detokenize(address_map *map, const addrmap_token *tokens
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break;
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case ADDRMAP_TOKEN_MASK:
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check_entry_field(addrmask);
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TOKEN_UNGET_UINT32(tokens);
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TOKEN_GET_UINT64_UNPACK2(tokens, entrytype, 8, entry->addrmask, 32);
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break;
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case ADDRMAP_TOKEN_MIRROR:
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check_entry_field(addrmirror);
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TOKEN_UNGET_UINT32(tokens);
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TOKEN_GET_UINT64_UNPACK2(tokens, entrytype, 8, entry->addrmirror, 32);
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break;
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case ADDRMAP_TOKEN_READ:
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check_entry_handler(read);
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TOKEN_UNGET_UINT32(tokens);
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TOKEN_GET_UINT32_UNPACK3(tokens, entrytype, 8, entry->read_bits, 8, entry->read_mask, 8);
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entry->read = TOKEN_GET_PTR(tokens, read);
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@ -1001,6 +1022,7 @@ static void address_map_detokenize(address_map *map, const addrmap_token *tokens
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break;
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case ADDRMAP_TOKEN_WRITE:
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check_entry_handler(write);
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TOKEN_UNGET_UINT32(tokens);
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TOKEN_GET_UINT32_UNPACK3(tokens, entrytype, 8, entry->write_bits, 8, entry->write_mask, 8);
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entry->write = TOKEN_GET_PTR(tokens, write);
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@ -1008,6 +1030,7 @@ static void address_map_detokenize(address_map *map, const addrmap_token *tokens
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break;
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case ADDRMAP_TOKEN_DEVICE_READ:
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check_entry_handler(read);
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TOKEN_UNGET_UINT32(tokens);
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TOKEN_GET_UINT32_UNPACK3(tokens, entrytype, 8, entry->read_bits, 8, entry->read_mask, 8);
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entry->read = TOKEN_GET_PTR(tokens, read);
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@ -1017,6 +1040,7 @@ static void address_map_detokenize(address_map *map, const addrmap_token *tokens
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break;
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case ADDRMAP_TOKEN_DEVICE_WRITE:
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check_entry_handler(write);
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TOKEN_UNGET_UINT32(tokens);
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TOKEN_GET_UINT32_UNPACK3(tokens, entrytype, 8, entry->write_bits, 8, entry->write_mask, 8);
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entry->write = TOKEN_GET_PTR(tokens, write);
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@ -1026,35 +1050,42 @@ static void address_map_detokenize(address_map *map, const addrmap_token *tokens
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break;
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case ADDRMAP_TOKEN_READ_PORT:
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check_entry_field(read_porttag);
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entry->read_porttag = TOKEN_GET_STRING(tokens);
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break;
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case ADDRMAP_TOKEN_REGION:
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check_entry_field(region);
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TOKEN_UNGET_UINT32(tokens);
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TOKEN_GET_UINT64_UNPACK2(tokens, entrytype, 8, entry->rgnoffs, 32);
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entry->region = TOKEN_GET_STRING(tokens);
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break;
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case ADDRMAP_TOKEN_SHARE:
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check_entry_field(share);
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TOKEN_UNGET_UINT32(tokens);
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TOKEN_GET_UINT32_UNPACK2(tokens, entrytype, 8, entry->share, 24);
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break;
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case ADDRMAP_TOKEN_BASEPTR:
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check_entry_field(baseptr);
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entry->baseptr = (void **)TOKEN_GET_PTR(tokens, voidptr);
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break;
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case ADDRMAP_TOKEN_BASE_MEMBER:
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check_entry_field(baseptroffs_plus1);
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TOKEN_UNGET_UINT32(tokens);
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TOKEN_GET_UINT32_UNPACK2(tokens, entrytype, 8, entry->baseptroffs_plus1, 24);
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entry->baseptroffs_plus1++;
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break;
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case ADDRMAP_TOKEN_SIZEPTR:
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check_entry_field(sizeptr);
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entry->sizeptr = TOKEN_GET_PTR(tokens, sizeptr);
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break;
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case ADDRMAP_TOKEN_SIZE_MEMBER:
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check_entry_field(sizeptroffs_plus1);
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TOKEN_UNGET_UINT32(tokens);
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TOKEN_GET_UINT32_UNPACK2(tokens, entrytype, 8, entry->sizeptroffs_plus1, 24);
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entry->sizeptroffs_plus1++;
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@ -1706,7 +1737,7 @@ static void memory_init_preflight(running_machine *machine)
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int entrynum;
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/* allocate the address map */
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space->map = address_map_alloc(machine->config, cpunum, spacenum);
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space->map = address_map_alloc(machine->config, machine->gamedrv, cpunum, spacenum);
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/* extract global parameters specified by the map */
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space->unmap = (space->map->unmapval == 0) ? 0 : ~0;
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@ -844,7 +844,7 @@ const data_accessors *memory_get_accessors(int spacenum, int databits, int endia
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/* ----- address maps ----- */
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/* build and allocate an address map for a CPU's address space */
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address_map *address_map_alloc(const machine_config *drv, int cpunum, int spacenum);
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address_map *address_map_alloc(const machine_config *drv, const game_driver *driver, int cpunum, int spacenum);
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/* release allocated memory for an address map */
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void address_map_free(address_map *map);
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@ -725,7 +725,7 @@ static int validate_cpu(int drivnum, const machine_config *config, region_info *
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}
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/* construct the maps */
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map = address_map_alloc(config, cpunum, spacenum);
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map = address_map_alloc(config, driver, cpunum, spacenum);
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/* if this is an empty map, just skip it */
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if (map->entrylist == NULL)
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@ -115,7 +115,7 @@ ADDRESS_MAP_END
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ADDRESS_MAP_START( namcoc7x_mcu_share_map, ADDRESS_SPACE_PROGRAM, 16 )
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AM_RANGE(0x002000, 0x002fff) AM_READWRITE( c352_0_r, c352_0_w )
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AM_RANGE(0x004000, 0x00bfff) AM_RAM AM_READWRITE( c7x_shared_r, c7x_shared_w ) AM_BASE(&namcoc7x_mcuram)
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AM_RANGE(0x004000, 0x00bfff) AM_READWRITE( c7x_shared_r, c7x_shared_w ) AM_BASE(&namcoc7x_mcuram)
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AM_RANGE(0x00c000, 0x00ffff) AM_ROM AM_REGION("user4", 0x8c000)
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AM_RANGE(0x080000, 0x0fffff) AM_ROM AM_REGION("user4", 0)
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AM_RANGE(0x200000, 0x27ffff) AM_ROM AM_REGION("user4", 0)
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@ -218,8 +218,8 @@ static WRITE8_HANDLER( llander_led_w )
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static ADDRESS_MAP_START( asteroid_map, ADDRESS_SPACE_PROGRAM, 8 )
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ADDRESS_MAP_GLOBAL_MASK(0x7fff)
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AM_RANGE(0x0000, 0x01ff) AM_RAM
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AM_RANGE(0x0200, 0x02ff) AM_RAM AM_RAMBANK(1) AM_BASE(&asteroid_ram1)
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AM_RANGE(0x0300, 0x03ff) AM_RAM AM_RAMBANK(2) AM_BASE(&asteroid_ram2)
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AM_RANGE(0x0200, 0x02ff) AM_RAMBANK(1) AM_BASE(&asteroid_ram1)
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AM_RANGE(0x0300, 0x03ff) AM_RAMBANK(2) AM_BASE(&asteroid_ram2)
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AM_RANGE(0x2000, 0x2007) AM_READ(asteroid_IN0_r) /* IN0 */
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AM_RANGE(0x2400, 0x2407) AM_READ(asteroid_IN1_r) /* IN1 */
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AM_RANGE(0x2800, 0x2803) AM_READ(asteroid_DSW1_r) /* DSW1 */
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@ -239,8 +239,8 @@ ADDRESS_MAP_END
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static ADDRESS_MAP_START( astdelux_map, ADDRESS_SPACE_PROGRAM, 8 )
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ADDRESS_MAP_GLOBAL_MASK(0x7fff)
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AM_RANGE(0x0000, 0x01ff) AM_RAM
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AM_RANGE(0x0200, 0x02ff) AM_RAM AM_RAMBANK(1) AM_BASE(&asteroid_ram1)
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AM_RANGE(0x0300, 0x03ff) AM_RAM AM_RAMBANK(2) AM_BASE(&asteroid_ram2)
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AM_RANGE(0x0200, 0x02ff) AM_RAMBANK(1) AM_BASE(&asteroid_ram1)
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AM_RANGE(0x0300, 0x03ff) AM_RAMBANK(2) AM_BASE(&asteroid_ram2)
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AM_RANGE(0x2000, 0x2007) AM_READ(asteroid_IN0_r) /* IN0 */
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AM_RANGE(0x2400, 0x2407) AM_READ(asteroid_IN1_r) /* IN1 */
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AM_RANGE(0x2800, 0x2803) AM_READ(asteroid_DSW1_r) /* DSW1 */
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@ -202,7 +202,7 @@ static ADDRESS_MAP_START( blackt96_map, ADDRESS_SPACE_PROGRAM, 16 )
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AM_RANGE(0x100000, 0x100fff) AM_RAM AM_BASE(&blackt96_tilemapram) // text tilemap
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AM_RANGE(0x200000, 0x207fff) AM_RAM AM_BASE(&blackt96_tilemapram2)// sprite list?
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AM_RANGE(0x400000, 0x400fff) AM_RAM AM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
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AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
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AM_RANGE(0xc00000, 0xc03fff) AM_RAM // main ram
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ADDRESS_MAP_END
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@ -100,7 +100,7 @@ static WRITE8_HANDLER( blueprnt_coin_counter_w )
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static ADDRESS_MAP_START( blueprnt_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0x0000, 0x7fff) AM_ROM // service mode checks for 8 chips = 64K
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AM_RANGE(0x8000, 0x87ff) AM_RAM
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AM_RANGE(0x9000, 0x93ff) AM_RAM AM_MIRROR(0x400) AM_WRITE(blueprnt_videoram_w) AM_BASE(&videoram)
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AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(blueprnt_videoram_w) AM_MIRROR(0x400) AM_BASE(&videoram)
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AM_RANGE(0xa000, 0xa0ff) AM_RAM AM_BASE(&blueprnt_scrollram)
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AM_RANGE(0xb000, 0xb0ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
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AM_RANGE(0xc000, 0xc000) AM_READ_PORT("P1") AM_WRITE(blueprnt_coin_counter_w)
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@ -2310,7 +2310,7 @@ static ADDRESS_MAP_START( cps3_map, ADDRESS_SPACE_PROGRAM, 32 )
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// AM_RANGE(0x04000000, 0x0407dfff) AM_RAM AM_BASE(&cps3_spriteram)//AM_WRITE(SMH_RAM) // Sprite RAM (jojoba tests this size)
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AM_RANGE(0x04000000, 0x0407ffff) AM_RAM AM_BASE(&cps3_spriteram)//AM_WRITE(SMH_RAM) // Sprite RAM
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AM_RANGE(0x04080000, 0x040bffff) AM_RAM AM_READWRITE(cps3_colourram_r, cps3_colourram_w) AM_BASE(&cps3_colourram) // Colour RAM (jojoba tests this size) 0x20000 colours?!
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AM_RANGE(0x04080000, 0x040bffff) AM_READWRITE(cps3_colourram_r, cps3_colourram_w) AM_BASE(&cps3_colourram) // Colour RAM (jojoba tests this size) 0x20000 colours?!
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// video registers of some kind probably
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AM_RANGE(0x040C0000, 0x040C0003) AM_READ(cps3_40C0000_r)//?? every frame
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@ -2350,7 +2350,7 @@ static ADDRESS_MAP_START( cps3_map, ADDRESS_SPACE_PROGRAM, 32 )
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AM_RANGE(0x05001000, 0x05001203) AM_READWRITE( cps3_eeprom_r, cps3_eeprom_w )
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AM_RANGE(0x05040000, 0x0504ffff) AM_RAM AM_READWRITE(cps3_ssram_r,cps3_ssram_w) // 'SS' RAM (Score Screen) (text tilemap + toles)
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AM_RANGE(0x05040000, 0x0504ffff) AM_READWRITE(cps3_ssram_r,cps3_ssram_w) // 'SS' RAM (Score Screen) (text tilemap + toles)
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//0x25050020
|
||||
AM_RANGE(0x05050020, 0x05050023) AM_WRITE( cps3_ss_bank_base_w )
|
||||
AM_RANGE(0x05050024, 0x05050027) AM_WRITE( cps3_ss_pal_base_w )
|
||||
@ -2360,8 +2360,8 @@ static ADDRESS_MAP_START( cps3_map, ADDRESS_SPACE_PROGRAM, 32 )
|
||||
|
||||
AM_RANGE(0x05140000, 0x05140003) AM_READWRITE( cps3_cdrom_r, cps3_cdrom_w )
|
||||
|
||||
AM_RANGE(0x06000000, 0x067fffff) AM_ROM AM_READWRITE( cps3_flash1_r, cps3_flash1_w ) /* Flash ROMs simm 1 */
|
||||
AM_RANGE(0x06800000, 0x06ffffff) AM_ROM AM_READWRITE( cps3_flash2_r, cps3_flash2_w ) /* Flash ROMs simm 2 */
|
||||
AM_RANGE(0x06000000, 0x067fffff) AM_READWRITE( cps3_flash1_r, cps3_flash1_w ) /* Flash ROMs simm 1 */
|
||||
AM_RANGE(0x06800000, 0x06ffffff) AM_READWRITE( cps3_flash2_r, cps3_flash2_w ) /* Flash ROMs simm 2 */
|
||||
|
||||
AM_RANGE(0xc0000000, 0xc00003ff) AM_RAM_WRITE( cps3_0xc0000000_ram_w ) AM_BASE(&cps3_0xc0000000_ram) /* Executes code from here */
|
||||
ADDRESS_MAP_END
|
||||
|
@ -198,12 +198,12 @@ static ADDRESS_MAP_START( drw80pkr_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( drw80pkr_io_map, ADDRESS_SPACE_IO, 8 )
|
||||
AM_RANGE(0x00, 0xff) AM_RAM AM_READWRITE(drw80pkr_cmos_r, drw80pkr_cmos_w) AM_BASE(&pkr_cmos_ram)
|
||||
AM_RANGE(0x00, 0xff) AM_READWRITE(drw80pkr_cmos_r, drw80pkr_cmos_w) AM_BASE(&pkr_cmos_ram)
|
||||
AM_RANGE(I8039_t1, I8039_t1) AM_RAM
|
||||
AM_RANGE(I8039_p1, I8039_p1) AM_RAM AM_READWRITE(p1_r, p1_w)
|
||||
AM_RANGE(I8039_p2, I8039_p2) AM_RAM AM_READWRITE(p2_r, p2_w)
|
||||
AM_RANGE(I8039_p1, I8039_p1) AM_READWRITE(p1_r, p1_w)
|
||||
AM_RANGE(I8039_p2, I8039_p2) AM_READWRITE(p2_r, p2_w)
|
||||
AM_RANGE(I8039_p4, I8039_p4) AM_RAM_WRITE(p4_w)
|
||||
AM_RANGE(I8039_bus, I8039_bus) AM_RAM AM_READWRITE(bus_r, bus_w)
|
||||
AM_RANGE(I8039_bus, I8039_bus) AM_READWRITE(bus_r, bus_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
/*************************
|
||||
|
@ -706,7 +706,7 @@ static WRITE16_HANDLER( mcu_halt_clear_w )
|
||||
|
||||
static ADDRESS_MAP_START( equites_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x00ffff) AM_ROM // ROM area is written several times (dev system?)
|
||||
AM_RANGE(0x040000, 0x040fff) AM_RAM AM_BASE(&equites_workram) AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size) // nvram is for gekisou only
|
||||
AM_RANGE(0x040000, 0x040fff) AM_RAM AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size) // nvram is for gekisou only
|
||||
AM_RANGE(0x080000, 0x080fff) AM_READWRITE(equites_fg_videoram_r, equites_fg_videoram_w) // 8-bit
|
||||
AM_RANGE(0x0c0000, 0x0c01ff) AM_RAM_WRITE(equites_bg_videoram_w) AM_BASE(&equites_bg_videoram)
|
||||
AM_RANGE(0x0c0200, 0x0c0fff) AM_RAM
|
||||
|
@ -935,7 +935,7 @@ static ADDRESS_MAP_START( funworld_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0e00, 0x0e00) AM_DEVWRITE(MC6845, "crtc", mc6845_address_w)
|
||||
AM_RANGE(0x0e01, 0x0e01) AM_DEVREADWRITE(MC6845, "crtc", mc6845_register_r, mc6845_register_w)
|
||||
AM_RANGE(0x2000, 0x2fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE(&videoram)
|
||||
AM_RANGE(0x3000, 0x3fff) AM_RAM AM_WRITE(funworld_colorram_w) AM_BASE(&colorram)
|
||||
AM_RANGE(0x3000, 0x3fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE(&colorram)
|
||||
AM_RANGE(0x4000, 0x4000) AM_READNOP
|
||||
AM_RANGE(0x8000, 0xbfff) AM_ROM
|
||||
AM_RANGE(0xc000, 0xffff) AM_ROM
|
||||
@ -953,7 +953,7 @@ static ADDRESS_MAP_START( magiccrd_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x3600, 0x36ff) AM_RAM /* some games use $3603-05 range for protection */
|
||||
AM_RANGE(0x3c00, 0x3cff) AM_RAM /* range for protection */
|
||||
AM_RANGE(0x4000, 0x4fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE(&videoram)
|
||||
AM_RANGE(0x5000, 0x5fff) AM_RAM AM_WRITE(funworld_colorram_w) AM_BASE(&colorram)
|
||||
AM_RANGE(0x5000, 0x5fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE(&colorram)
|
||||
AM_RANGE(0x6000, 0xffff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -968,7 +968,7 @@ static ADDRESS_MAP_START( cuoreuno_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x2000, 0x2000) AM_READNOP /* some unknown reads */
|
||||
AM_RANGE(0x3e00, 0x3fff) AM_RAM /* some games use $3e03-05 range for protection */
|
||||
AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE(&videoram)
|
||||
AM_RANGE(0x7000, 0x7fff) AM_RAM AM_WRITE(funworld_colorram_w) AM_BASE(&colorram)
|
||||
AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE(&colorram)
|
||||
AM_RANGE(0x8000, 0xffff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -981,7 +981,7 @@ static ADDRESS_MAP_START( royalmcu_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x2e00, 0x2e00) AM_DEVWRITE(MC6845, "crtc", mc6845_address_w)
|
||||
AM_RANGE(0x2e01, 0x2e01) AM_DEVREADWRITE(MC6845, "crtc", mc6845_register_r, mc6845_register_w)
|
||||
AM_RANGE(0x4000, 0x4fff) AM_RAM_WRITE(funworld_videoram_w) AM_BASE(&videoram)
|
||||
AM_RANGE(0x5000, 0x5fff) AM_RAM AM_WRITE(funworld_colorram_w) AM_BASE(&colorram)
|
||||
AM_RANGE(0x5000, 0x5fff) AM_RAM_WRITE(funworld_colorram_w) AM_BASE(&colorram)
|
||||
AM_RANGE(0x6000, 0xffff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
@ -318,8 +318,8 @@ static ADDRESS_MAP_START( galpani3_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x200000, 0x20ffff) AM_RAM // area [B] - Work RAM
|
||||
AM_RANGE(0x280000, 0x287fff) AM_RAM_WRITE(paletteram16_xGGGGGRRRRRBBBBB_word_w) AM_BASE(&paletteram16) // area [A] - palette for sprites
|
||||
|
||||
AM_RANGE(0x300000, 0x303fff) AM_RAM AM_BASE(&galpani3_spriteram) AM_WRITE(galpani3_suprnova_sprite32_w)
|
||||
AM_RANGE(0x380000, 0x38003f) AM_RAM AM_BASE(&galpani3_sprregs) AM_WRITE(galpani3_suprnova_sprite32regs_w)
|
||||
AM_RANGE(0x300000, 0x303fff) AM_RAM_WRITE(galpani3_suprnova_sprite32_w) AM_BASE(&galpani3_spriteram)
|
||||
AM_RANGE(0x380000, 0x38003f) AM_RAM_WRITE(galpani3_suprnova_sprite32regs_w) AM_BASE(&galpani3_sprregs)
|
||||
|
||||
AM_RANGE(0x400000, 0x40ffff) AM_RAM AM_BASE(&mcu_ram) // area [C]
|
||||
|
||||
|
@ -265,7 +265,7 @@ static const ppi8255_interface ppi8255_intf =
|
||||
|
||||
static ADDRESS_MAP_START( gat_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x5fff) AM_ROM
|
||||
AM_RANGE(0x6000, 0x63ff) AM_RAM AM_WRITE(gat_videoram_w) AM_BASE(&videoram)
|
||||
AM_RANGE(0x6000, 0x63ff) AM_RAM_WRITE(gat_videoram_w) AM_BASE(&videoram)
|
||||
AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size) /* battery backed RAM */
|
||||
AM_RANGE(0xa000, 0xa000) AM_NOP /* unknown writes */
|
||||
AM_RANGE(0xe000, 0xe000) AM_NOP /* watchdog? */
|
||||
|
@ -347,11 +347,11 @@ ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( vgoal_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x0fffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x103fff) AM_RAM AM_WRITE(MB60553_0_vram_w) AM_BASE(&MB60553_0_vram)
|
||||
AM_RANGE(0x100000, 0x103fff) AM_RAM_WRITE(MB60553_0_vram_w) AM_BASE(&MB60553_0_vram)
|
||||
AM_RANGE(0x140000, 0x141fff) AM_RAM AM_BASE(&CG10103_0_vram)
|
||||
AM_RANGE(0x180000, 0x180fff) AM_RAM AM_WRITE(VS920A_0_vram_w) AM_BASE(&VS920A_0_vram)
|
||||
AM_RANGE(0x180000, 0x180fff) AM_RAM_WRITE(VS920A_0_vram_w) AM_BASE(&VS920A_0_vram)
|
||||
AM_RANGE(0x181000, 0x181fff) AM_RAM AM_BASE(&gstriker_lineram)
|
||||
AM_RANGE(0x1c0000, 0x1c4fff) AM_RAM AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
|
||||
AM_RANGE(0x1c0000, 0x1c4fff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
|
||||
AM_RANGE(0x200000, 0x20000f) AM_WRITE(MB60553_0_regs_w)
|
||||
AM_RANGE(0x200040, 0x20005f) AM_RAM AM_BASE(&gs_mixer_regs)
|
||||
|
||||
|
@ -86,7 +86,7 @@ Preliminary COP MCU memory map
|
||||
static ADDRESS_MAP_START( legionna_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x07ffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x1003ff) AM_RAM
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_RAM AM_READWRITE(legionna_mcu_r, legionna_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(legionna_mcu_r, legionna_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data)
|
||||
AM_RANGE(0x102000, 0x1027ff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
|
||||
@ -102,7 +102,7 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( heatbrl_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x07ffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x1003ff) AM_RAM
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_RAM AM_READWRITE(heatbrl_mcu_r, heatbrl_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(heatbrl_mcu_r, heatbrl_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data)
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
|
||||
@ -115,7 +115,7 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( godzilla_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x0fffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x1003ff) AM_RAM
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_RAM AM_READWRITE(godzilla_mcu_r, godzilla_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(godzilla_mcu_r, godzilla_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM
|
||||
AM_RANGE(0x101000, 0x101fff) AM_RAM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data)
|
||||
AM_RANGE(0x102000, 0x1027ff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
|
||||
@ -140,7 +140,7 @@ static WRITE16_HANDLER( denjin_paletteram16_xBBBBBGGGGGRRRRR_word_w )
|
||||
static ADDRESS_MAP_START( denjinmk_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x0fffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x1003ff) AM_RAM
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_RAM AM_READWRITE(denjinmk_mcu_r, denjinmk_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(denjinmk_mcu_r, denjinmk_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data)
|
||||
@ -157,7 +157,7 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( sdgndmrb_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x0fffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x1003ff) AM_RAM
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_RAM AM_READWRITE(sdgndmrb_mcu_r, sdgndmrb_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(sdgndmrb_mcu_r, sdgndmrb_mcu_w) AM_BASE(&cop_mcu_ram) /* COP mcu */
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data)
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
|
||||
@ -173,8 +173,8 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( cupsoc_mem, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x0fffff) AM_ROM
|
||||
AM_RANGE(0x100000, 0x1003ff) AM_RAM
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_RAM AM_READWRITE(cupsoc_mcu_r,cupsoc_mcu_w) AM_BASE(&cop_mcu_ram)
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM AM_READWRITE(SMH_RAM,legionna_background_w) AM_BASE(&legionna_back_data)
|
||||
AM_RANGE(0x100400, 0x1007ff) AM_READWRITE(cupsoc_mcu_r,cupsoc_mcu_w) AM_BASE(&cop_mcu_ram)
|
||||
AM_RANGE(0x100800, 0x100fff) AM_READWRITE(SMH_RAM,legionna_background_w) AM_BASE(&legionna_back_data)
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
|
||||
AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(legionna_text_w) AM_BASE(&legionna_textram)
|
||||
@ -192,7 +192,7 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( cupsocbl_mem, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x000000, 0x0fffff) AM_ROM
|
||||
//AM_RANGE(0x100000, 0x1003ff) AM_RAM
|
||||
AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_READWRITE(copdxbl_0_r,copdxbl_0_w) AM_BASE(&cop_mcu_ram)
|
||||
AM_RANGE(0x100000, 0x1007ff) AM_READWRITE(copdxbl_0_r,copdxbl_0_w) AM_BASE(&cop_mcu_ram)
|
||||
AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(legionna_background_w) AM_BASE(&legionna_back_data)
|
||||
AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(legionna_foreground_w) AM_BASE(&legionna_fore_data)
|
||||
AM_RANGE(0x101800, 0x101fff) AM_RAM_WRITE(legionna_midground_w) AM_BASE(&legionna_mid_data)
|
||||
|
@ -445,10 +445,10 @@ static INTERRUPT_GEN( nmi_interrupt )
|
||||
static ADDRESS_MAP_START( lucky74_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0xbfff) AM_ROM
|
||||
AM_RANGE(0xc000, 0xcfff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size) /* NVRAM */
|
||||
AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_WRITE(fg_videoram_w) AM_BASE(&fg_videoram) /* VRAM1-1 */
|
||||
AM_RANGE(0xd800, 0xdfff) AM_RAM AM_WRITE(fg_colorram_w) AM_BASE(&fg_colorram) /* VRAM1-2 */
|
||||
AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_WRITE(bg_videoram_w) AM_BASE(&bg_videoram) /* VRAM2-1 */
|
||||
AM_RANGE(0xe800, 0xefff) AM_RAM AM_WRITE(bg_colorram_w) AM_BASE(&bg_colorram) /* VRAM2-2 */
|
||||
AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(fg_videoram_w) AM_BASE(&fg_videoram) /* VRAM1-1 */
|
||||
AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(fg_colorram_w) AM_BASE(&fg_colorram) /* VRAM1-2 */
|
||||
AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(bg_videoram_w) AM_BASE(&bg_videoram) /* VRAM2-1 */
|
||||
AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(bg_colorram_w) AM_BASE(&bg_colorram) /* VRAM2-2 */
|
||||
AM_RANGE(0xf000, 0xf003) AM_DEVREADWRITE(PPI8255, "ppi8255_0", ppi8255_r, ppi8255_w) /* Input Ports 0 & 1 */
|
||||
AM_RANGE(0xf080, 0xf083) AM_DEVREADWRITE(PPI8255, "ppi8255_2", ppi8255_r, ppi8255_w) /* DSW 1, 2 & 3 */
|
||||
AM_RANGE(0xf0c0, 0xf0c3) AM_DEVREADWRITE(PPI8255, "ppi8255_3", ppi8255_r, ppi8255_w) /* DSW 4 */
|
||||
|
@ -99,7 +99,7 @@ static ADDRESS_MAP_START( lucky8_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x7fff) AM_ROM
|
||||
AM_RANGE(0x8000, 0x87ff) AM_RAM
|
||||
AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(lucky8_videoram_w) AM_BASE(&videoram)
|
||||
AM_RANGE(0x9000, 0x97ff) AM_RAM AM_WRITE(lucky8_colorram_w) AM_BASE(&colorram)
|
||||
AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(lucky8_colorram_w) AM_BASE(&colorram)
|
||||
AM_RANGE(0x9800, 0x99ff) AM_RAM
|
||||
AM_RANGE(0xa000, 0xa1ff) AM_RAM
|
||||
AM_RANGE(0xa800, 0xa9ff) AM_RAM
|
||||
|
@ -43,7 +43,7 @@
|
||||
|
||||
static ADDRESS_MAP_START( nitedrvr_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x00ff) AM_RAM AM_MIRROR(0x100) // SCRAM
|
||||
AM_RANGE(0x0200, 0x027f) AM_RAM AM_MIRROR(0x180) AM_WRITE(nitedrvr_videoram_w) AM_BASE(&videoram) // PFW
|
||||
AM_RANGE(0x0200, 0x027f) AM_RAM_WRITE(nitedrvr_videoram_w) AM_MIRROR(0x180) AM_BASE(&videoram) // PFW
|
||||
AM_RANGE(0x0400, 0x05ff) AM_WRITE(nitedrvr_hvc_w) AM_BASE(&nitedrvr_hvc) // POSH, POSV, CHAR, Watchdog
|
||||
AM_RANGE(0x0600, 0x07ff) AM_READ(nitedrvr_in0_r)
|
||||
AM_RANGE(0x0800, 0x09ff) AM_READ(nitedrvr_in1_r)
|
||||
|
@ -865,7 +865,7 @@ static ADDRESS_MAP_START( tdragon_writemem, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
// AM_RANGE(0x0b0000, 0x0b7fff) AM_WRITE(SMH_RAM) /* Work RAM */
|
||||
// AM_RANGE(0x0b8000, 0x0b8fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) /* Sprite RAM */
|
||||
// AM_RANGE(0x0b9000, 0x0bdfff) AM_WRITE(SMH_RAM) AM_BASE(&nmk16_mcu_work_ram) /* Work RAM */
|
||||
// AM_RANGE(0x0be000, 0x0befff) AM_RAM AM_READWRITE(mcu_shared_r,tdragon_mcu_shared_w) AM_BASE(&nmk16_mcu_shared_ram) /* Work RAM */
|
||||
// AM_RANGE(0x0be000, 0x0befff) AM_READWRITE(mcu_shared_r,tdragon_mcu_shared_w) AM_BASE(&nmk16_mcu_shared_ram) /* Work RAM */
|
||||
// AM_RANGE(0x0bf000, 0x0bffff) AM_WRITE(SMH_RAM) /* Work RAM */
|
||||
AM_RANGE(0x0c0014, 0x0c0015) AM_WRITE(nmk_flipscreen_w) /* Maybe */
|
||||
AM_RANGE(0x0c0018, 0x0c0019) AM_WRITE(nmk_tilebank_w) /* Tile Bank ? */
|
||||
@ -4670,8 +4670,8 @@ static ADDRESS_MAP_START( afega, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
/**/AM_RANGE(0x092000, 0x093fff) AM_RAM // ?
|
||||
/**/AM_RANGE(0x09c000, 0x09c7ff) AM_RAM_WRITE(afega_vram_1_w) AM_BASE(&afega_vram_1) // Layer 1
|
||||
|
||||
AM_RANGE(0x0c0000, 0x0cffff) AM_RAM AM_SHARE(1) AM_WRITE(nmk16_mainram_strange_w) AM_BASE(&nmk16_mainram)
|
||||
AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_SHARE(1) AM_WRITE(nmk16_mainram_strange_w)
|
||||
AM_RANGE(0x0c0000, 0x0cffff) AM_RAM_WRITE(nmk16_mainram_strange_w) AM_SHARE(1) AM_BASE(&nmk16_mainram)
|
||||
AM_RANGE(0x0f0000, 0x0fffff) AM_RAM_WRITE(nmk16_mainram_strange_w) AM_SHARE(1)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
#if 0
|
||||
|
@ -707,7 +707,7 @@ ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( peplus_datamap, ADDRESS_SPACE_DATA, 8 )
|
||||
// Battery-backed RAM (0x1000-0x01fff Extended RAM for Superboards Only)
|
||||
AM_RANGE(0x0000, 0x1fff) AM_RAM AM_READWRITE(peplus_cmos_r, peplus_cmos_w) AM_BASE(&cmos_ram)
|
||||
AM_RANGE(0x0000, 0x1fff) AM_READWRITE(peplus_cmos_r, peplus_cmos_w) AM_BASE(&cmos_ram)
|
||||
|
||||
// CRT Controller
|
||||
AM_RANGE(0x2008, 0x2008) AM_WRITE(peplus_crtc_mode_w)
|
||||
@ -716,14 +716,14 @@ static ADDRESS_MAP_START( peplus_datamap, ADDRESS_SPACE_DATA, 8 )
|
||||
AM_RANGE(0x2083, 0x2083) AM_READ(peplus_crtc_display_r) AM_WRITE(peplus_crtc_display_w)
|
||||
|
||||
// Superboard Data
|
||||
AM_RANGE(0x3000, 0x3fff) AM_RAM AM_READWRITE(peplus_s3000_r, peplus_s3000_w) AM_BASE(&s3000_ram)
|
||||
AM_RANGE(0x3000, 0x3fff) AM_READWRITE(peplus_s3000_r, peplus_s3000_w) AM_BASE(&s3000_ram)
|
||||
|
||||
// Sound and Dipswitches
|
||||
AM_RANGE(0x4000, 0x4000) AM_WRITE(AY8910_control_port_0_w)
|
||||
AM_RANGE(0x4004, 0x4004) AM_READ_PORT("SW1") AM_WRITE(AY8910_write_port_0_w)
|
||||
|
||||
// Superboard Data
|
||||
AM_RANGE(0x5000, 0x5fff) AM_RAM AM_READWRITE(peplus_s5000_r, peplus_s5000_w) AM_BASE(&s5000_ram)
|
||||
AM_RANGE(0x5000, 0x5fff) AM_READWRITE(peplus_s5000_r, peplus_s5000_w) AM_BASE(&s5000_ram)
|
||||
|
||||
// Background Color Latch
|
||||
AM_RANGE(0x6000, 0x6000) AM_READ(peplus_bgcolor_r) AM_WRITE(peplus_bgcolor_w)
|
||||
@ -732,7 +732,7 @@ static ADDRESS_MAP_START( peplus_datamap, ADDRESS_SPACE_DATA, 8 )
|
||||
AM_RANGE(0x06001, 0x06400) AM_RAM AM_BASE(&videoram)
|
||||
|
||||
// Superboard Data
|
||||
AM_RANGE(0x7000, 0x7fff) AM_RAM AM_READWRITE(peplus_s7000_r, peplus_s7000_w) AM_BASE(&s7000_ram)
|
||||
AM_RANGE(0x7000, 0x7fff) AM_READWRITE(peplus_s7000_r, peplus_s7000_w) AM_BASE(&s7000_ram)
|
||||
|
||||
// Input Bank A, Output Bank C
|
||||
AM_RANGE(0x8000, 0x8000) AM_READ(peplus_input_bank_a_r) AM_WRITE(peplus_output_bank_c_w)
|
||||
@ -744,19 +744,19 @@ static ADDRESS_MAP_START( peplus_datamap, ADDRESS_SPACE_DATA, 8 )
|
||||
AM_RANGE(0xa000, 0xa000) AM_READ_PORT("IN0") AM_WRITE(peplus_output_bank_b_w)
|
||||
|
||||
// Superboard Data
|
||||
AM_RANGE(0xb000, 0xbfff) AM_RAM AM_READWRITE(peplus_sb000_r, peplus_sb000_w) AM_BASE(&sb000_ram)
|
||||
AM_RANGE(0xb000, 0xbfff) AM_READWRITE(peplus_sb000_r, peplus_sb000_w) AM_BASE(&sb000_ram)
|
||||
|
||||
// Output Bank A
|
||||
AM_RANGE(0xc000, 0xc000) AM_READ(peplus_watchdog_r) AM_WRITE(peplus_output_bank_a_w)
|
||||
|
||||
// Superboard Data
|
||||
AM_RANGE(0xd000, 0xdfff) AM_RAM AM_READWRITE(peplus_sd000_r, peplus_sd000_w) AM_BASE(&sd000_ram)
|
||||
AM_RANGE(0xd000, 0xdfff) AM_READWRITE(peplus_sd000_r, peplus_sd000_w) AM_BASE(&sd000_ram)
|
||||
|
||||
// DUART
|
||||
AM_RANGE(0xe000, 0xe00f) AM_READWRITE(peplus_duart_r, peplus_duart_w)
|
||||
|
||||
// Superboard Data
|
||||
AM_RANGE(0xf000, 0xffff) AM_RAM AM_READWRITE(peplus_sf000_r, peplus_sf000_w) AM_BASE(&sf000_ram)
|
||||
AM_RANGE(0xf000, 0xffff) AM_READWRITE(peplus_sf000_r, peplus_sf000_w) AM_BASE(&sf000_ram)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( peplus_iomap, ADDRESS_SPACE_IO, 8 )
|
||||
|
@ -199,7 +199,7 @@ static ADDRESS_MAP_START( pktgaldb_writemem, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
|
||||
AM_RANGE(0x300000, 0x30000f) AM_WRITE(SMH_RAM)
|
||||
|
||||
AM_RANGE(0x330000, 0x330bff) AM_WRITE(SMH_RAM) AM_WRITE(paletteram16_xRGB_w) AM_BASE(&paletteram16) // extra colours?
|
||||
AM_RANGE(0x330000, 0x330bff) AM_WRITE(paletteram16_xRGB_w) AM_BASE(&paletteram16) // extra colours?
|
||||
ADDRESS_MAP_END
|
||||
|
||||
/**********************************************************************************/
|
||||
|
@ -480,7 +480,7 @@ static ADDRESS_MAP_START( snookr10_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x5000, 0x5000) AM_WRITE(output_port_0_w) /* OUT0 */
|
||||
AM_RANGE(0x5001, 0x5001) AM_WRITE(output_port_1_w) /* OUT1 */
|
||||
AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(snookr10_videoram_w) AM_BASE(&videoram)
|
||||
AM_RANGE(0x7000, 0x7fff) AM_RAM AM_WRITE(snookr10_colorram_w) AM_BASE(&colorram)
|
||||
AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(snookr10_colorram_w) AM_BASE(&colorram)
|
||||
AM_RANGE(0x8000, 0xffff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
@ -494,7 +494,7 @@ static ADDRESS_MAP_START( tenballs_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x5000, 0x5000) AM_WRITE(output_port_0_w) /* OUT0 */
|
||||
AM_RANGE(0x5001, 0x5001) AM_WRITE(output_port_1_w) /* OUT1 */
|
||||
AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(snookr10_videoram_w) AM_BASE(&videoram)
|
||||
AM_RANGE(0x7000, 0x7fff) AM_RAM AM_WRITE(snookr10_colorram_w) AM_BASE(&colorram)
|
||||
AM_RANGE(0x7000, 0x7fff) AM_RAM_WRITE(snookr10_colorram_w) AM_BASE(&colorram)
|
||||
AM_RANGE(0x8000, 0xffff) AM_ROM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
@ -2028,7 +2028,7 @@ static ADDRESS_MAP_START( stv_mem, ADDRESS_SPACE_PROGRAM, 32 )
|
||||
AM_RANGE(0x01406f40, 0x01406f43) AM_WRITE(minit_w) // prikura seems to write here ..
|
||||
// AM_RANGE(0x01000000, 0x01000003) AM_WRITE(minit_w) AM_MIRROR(0x00080000)
|
||||
AM_RANGE(0x01800000, 0x01800003) AM_WRITE(sinit_w)
|
||||
AM_RANGE(0x02000000, 0x04ffffff) AM_ROM /*AM_ROMBANK(1)*/ AM_SHARE(7) AM_REGION("user1", 0) // cartridge
|
||||
AM_RANGE(0x02000000, 0x04ffffff) AM_ROM AM_SHARE(7) AM_REGION("user1", 0) // cartridge
|
||||
AM_RANGE(0x05800000, 0x0589ffff) AM_READWRITE(stvcd_r, stvcd_w)
|
||||
/* Sound */
|
||||
AM_RANGE(0x05a00000, 0x05a7ffff) AM_READWRITE(stv_sh2_soundram_r, stv_sh2_soundram_w)
|
||||
|
@ -1760,11 +1760,11 @@ static ADDRESS_MAP_START( beautyb_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0x0280D6, 0x0280D7) AM_READ(beautyb_unk2_r)
|
||||
AM_RANGE(0x0280D8, 0x0280D9) AM_READ(beautyb_unk2_r)
|
||||
|
||||
AM_RANGE(0x400000, 0x40ffff) AM_RAM AM_READWRITE(SYS16_MRA16_TILERAM, SYS16_MWA16_TILERAM) AM_BASE(&sys16_tileram)
|
||||
AM_RANGE(0x410000, 0x410fff) AM_RAM AM_READWRITE(SYS16_MRA16_TEXTRAM, SYS16_MWA16_TEXTRAM) AM_BASE(&sys16_textram)
|
||||
AM_RANGE(0x418000, 0x41803f) AM_RAM AM_READWRITE(SYS16_MRA16_EXTRAM2, SYS16_MWA16_EXTRAM2) AM_BASE(&sys16_extraram2)
|
||||
AM_RANGE(0x440000, 0x440fff) AM_RAM AM_READWRITE(SYS16_MRA16_SPRITERAM, SYS16_MWA16_SPRITERAM) AM_BASE(&sys16_spriteram)
|
||||
AM_RANGE(0x840000, 0x840fff) AM_RAM AM_READWRITE(SYS16_MRA16_PALETTERAM, SYS16_MWA16_PALETTERAM) AM_BASE(&paletteram16)
|
||||
AM_RANGE(0x400000, 0x40ffff) AM_READWRITE(SYS16_MRA16_TILERAM, SYS16_MWA16_TILERAM) AM_BASE(&sys16_tileram)
|
||||
AM_RANGE(0x410000, 0x410fff) AM_READWRITE(SYS16_MRA16_TEXTRAM, SYS16_MWA16_TEXTRAM) AM_BASE(&sys16_textram)
|
||||
AM_RANGE(0x418000, 0x41803f) AM_READWRITE(SYS16_MRA16_EXTRAM2, SYS16_MWA16_EXTRAM2) AM_BASE(&sys16_extraram2)
|
||||
AM_RANGE(0x440000, 0x440fff) AM_READWRITE(SYS16_MRA16_SPRITERAM, SYS16_MWA16_SPRITERAM) AM_BASE(&sys16_spriteram)
|
||||
AM_RANGE(0x840000, 0x840fff) AM_READWRITE(SYS16_MRA16_PALETTERAM, SYS16_MWA16_PALETTERAM) AM_BASE(&paletteram16)
|
||||
|
||||
AM_RANGE(0xC41000, 0xC41001) AM_READ(beautyb_unk1_r )
|
||||
AM_RANGE(0xC41002, 0xC41003) AM_READ(beautyb_unk1_r )
|
||||
@ -1772,7 +1772,7 @@ static ADDRESS_MAP_START( beautyb_map, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
AM_RANGE(0xc40000, 0xc40001) AM_WRITE(SMH_NOP)
|
||||
AM_RANGE(0xc80000, 0xc80001) AM_WRITE(SMH_NOP)
|
||||
|
||||
AM_RANGE(0xffc000, 0xffffff) AM_RAM AM_WRITE(SYS16_MWA16_WORKINGRAM) AM_BASE(&sys16_workingram)
|
||||
AM_RANGE(0xffc000, 0xffffff) AM_RAM_WRITE(SYS16_MWA16_WORKINGRAM) AM_BASE(&sys16_workingram)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
/***************************************************************************/
|
||||
|
@ -238,11 +238,11 @@ static ADDRESS_MAP_START( main_mem, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0xbfff) AM_ROM
|
||||
AM_RANGE(0xc000, 0xc7ff) AM_RAM
|
||||
AM_RANGE(0xc800, 0xcfff) AM_RAM AM_SHARE(1)
|
||||
AM_RANGE(0xd000, 0xd3ff) AM_RAM AM_SHARE(2) AM_WRITE(tehkanwc_videoram_w) AM_BASE(&videoram)
|
||||
AM_RANGE(0xd400, 0xd7ff) AM_RAM AM_SHARE(3) AM_WRITE(tehkanwc_colorram_w) AM_BASE(&colorram)
|
||||
AM_RANGE(0xd800, 0xddff) AM_RAM AM_SHARE(4) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_be_w) AM_BASE(&paletteram)
|
||||
AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(tehkanwc_videoram_w) AM_SHARE(2) AM_BASE(&videoram)
|
||||
AM_RANGE(0xd400, 0xd7ff) AM_RAM_WRITE(tehkanwc_colorram_w) AM_SHARE(3) AM_BASE(&colorram)
|
||||
AM_RANGE(0xd800, 0xddff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_be_w) AM_SHARE(4) AM_BASE(&paletteram)
|
||||
AM_RANGE(0xde00, 0xdfff) AM_RAM AM_SHARE(5) /* unused part of the palette RAM, I think? Gridiron uses it */
|
||||
AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_SHARE(6) AM_WRITE(tehkanwc_videoram2_w) AM_BASE(&tehkanwc_videoram2)
|
||||
AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(tehkanwc_videoram2_w) AM_SHARE(6) AM_BASE(&tehkanwc_videoram2)
|
||||
AM_RANGE(0xe800, 0xebff) AM_RAM AM_SHARE(7) AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* sprites */
|
||||
AM_RANGE(0xec00, 0xec01) AM_RAM_WRITE(tehkanwc_scroll_x_w)
|
||||
AM_RANGE(0xec02, 0xec02) AM_RAM_WRITE(tehkanwc_scroll_y_w)
|
||||
@ -264,14 +264,14 @@ static ADDRESS_MAP_START( sub_mem, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x7fff) AM_ROM
|
||||
AM_RANGE(0x8000, 0xc7ff) AM_RAM
|
||||
AM_RANGE(0xc800, 0xcfff) AM_RAM AM_SHARE(1)
|
||||
AM_RANGE(0xd000, 0xd3ff) AM_RAM AM_SHARE(2) AM_WRITE(tehkanwc_videoram_w)
|
||||
AM_RANGE(0xd400, 0xd7ff) AM_RAM AM_SHARE(3) AM_WRITE(tehkanwc_colorram_w)
|
||||
AM_RANGE(0xd800, 0xddff) AM_RAM AM_SHARE(4) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_be_w) AM_BASE(&paletteram)
|
||||
AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(tehkanwc_videoram_w) AM_SHARE(2)
|
||||
AM_RANGE(0xd400, 0xd7ff) AM_RAM_WRITE(tehkanwc_colorram_w) AM_SHARE(3)
|
||||
AM_RANGE(0xd800, 0xddff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_be_w) AM_SHARE(4) AM_BASE(&paletteram)
|
||||
AM_RANGE(0xde00, 0xdfff) AM_RAM AM_SHARE(5) /* unused part of the palette RAM, I think? Gridiron uses it */
|
||||
AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_SHARE(6) AM_WRITE(tehkanwc_videoram2_w)
|
||||
AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(tehkanwc_videoram2_w) AM_SHARE(6)
|
||||
AM_RANGE(0xe800, 0xebff) AM_RAM AM_SHARE(7) /* sprites */
|
||||
AM_RANGE(0xec00, 0xec01) AM_READ(SMH_RAM) AM_WRITE(tehkanwc_scroll_x_w)
|
||||
AM_RANGE(0xec02, 0xec02) AM_READ(SMH_RAM) AM_WRITE(tehkanwc_scroll_y_w)
|
||||
AM_RANGE(0xec00, 0xec01) AM_RAM_WRITE(tehkanwc_scroll_x_w)
|
||||
AM_RANGE(0xec02, 0xec02) AM_RAM_WRITE(tehkanwc_scroll_y_w)
|
||||
AM_RANGE(0xf860, 0xf860) AM_READ(watchdog_reset_r)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
@ -574,7 +574,7 @@ static ADDRESS_MAP_START( jpopnics_main_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0xf300, 0xf303) AM_MIRROR(0xfc) AM_WRITE(SMH_RAM) AM_BASE(&tnzs_objctrl) /* control registers (0x80 mirror used by Arkanoid 2) */
|
||||
AM_RANGE(0xf400, 0xf400) AM_WRITE(SMH_RAM) AM_BASE(&tnzs_bg_flag) /* enable / disable background transparency */
|
||||
AM_RANGE(0xf600, 0xf600) AM_READWRITE(SMH_NOP, tnzs_bankswitch_w)
|
||||
AM_RANGE(0xf800, 0xffff) AM_RAM AM_WRITE(jpopnics_palette_w) AM_BASE(&paletteram)
|
||||
AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(jpopnics_palette_w) AM_BASE(&paletteram)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
#ifdef UNUSED_FUNCTION
|
||||
|
@ -1434,8 +1434,8 @@ static ADDRESS_MAP_START( dogyuun_68k_mem, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
#if USE_V25
|
||||
// AM_RANGE(0x21e000, 0x21fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16) /* $21f000 status port */
|
||||
// AM_RANGE(0x21fc00, 0x21ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram) /* 16-bit on 68000 side, 8-bit on V25+ side */
|
||||
AM_RANGE(0x210000, 0x21efff) AM_RAM AM_READWRITE( batsugun_share2_r, batsugun_share2_w )
|
||||
AM_RANGE(0x21f000, 0x21ffff) AM_RAM AM_READWRITE( batsugun_share_r, batsugun_share_w )
|
||||
AM_RANGE(0x210000, 0x21efff) AM_READWRITE( batsugun_share2_r, batsugun_share2_w )
|
||||
AM_RANGE(0x21f000, 0x21ffff) AM_READWRITE( batsugun_share_r, batsugun_share_w )
|
||||
#else
|
||||
AM_RANGE(0x21e000, 0x21efff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16)
|
||||
AM_RANGE(0x21f000, 0x21f001) AM_READWRITE(toaplan2_snd_cpu_r, dogyuun_snd_cpu_w) /* V25+ status/command port */
|
||||
@ -1593,8 +1593,8 @@ static ADDRESS_MAP_START( fixeight_68k_mem, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
#if USE_V25
|
||||
// AM_RANGE(0x28e000, 0x28fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16) /* $28f000 status port */
|
||||
// AM_RANGE(0x28fc00, 0x28ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram) /* 16-bit on 68000 side, 8-bit on V25+ side */
|
||||
AM_RANGE(0x280000, 0x28efff) AM_RAM AM_READWRITE( batsugun_share2_r, batsugun_share2_w )
|
||||
AM_RANGE(0x28f000, 0x28ffff) AM_RAM AM_READWRITE( batsugun_share_r, batsugun_share_w )
|
||||
AM_RANGE(0x280000, 0x28efff) AM_READWRITE( batsugun_share2_r, batsugun_share2_w )
|
||||
AM_RANGE(0x28f000, 0x28ffff) AM_READWRITE( batsugun_share_r, batsugun_share_w )
|
||||
AM_RANGE(0x700000, 0x700001) AM_WRITE(fixeight_subcpu_ctrl) // guess!!!
|
||||
#else
|
||||
AM_RANGE(0x280000, 0x28dfff) AM_RAM /* part of shared ram ? */
|
||||
@ -1655,8 +1655,8 @@ static ADDRESS_MAP_START( vfive_68k_mem, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
#if USE_V25
|
||||
// AM_RANGE(0x21e000, 0x21fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16) /* $21f000 status port */
|
||||
// AM_RANGE(0x21fc00, 0x21ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram) /* 16-bit on 68000 side, 8-bit on V25+ side */
|
||||
AM_RANGE(0x210000, 0x21efff) AM_RAM AM_READWRITE( batsugun_share2_r, batsugun_share2_w )
|
||||
AM_RANGE(0x21f000, 0x21ffff) AM_RAM AM_READWRITE( batsugun_share_r, batsugun_share_w )
|
||||
AM_RANGE(0x210000, 0x21efff) AM_READWRITE( batsugun_share2_r, batsugun_share2_w )
|
||||
AM_RANGE(0x21f000, 0x21ffff) AM_READWRITE( batsugun_share_r, batsugun_share_w )
|
||||
#else
|
||||
AM_RANGE(0x21e000, 0x21efff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16)
|
||||
AM_RANGE(0x21f000, 0x21f001) AM_READWRITE(toaplan2_snd_cpu_r, vfive_snd_cpu_w) /* V25+ Command/Status port */
|
||||
@ -1730,8 +1730,8 @@ static ADDRESS_MAP_START( batsugun_68k_mem, ADDRESS_SPACE_PROGRAM, 16 )
|
||||
#if USE_V25
|
||||
// AM_RANGE(0x21e000, 0x21fbff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16) /* $21f000 status port */
|
||||
// AM_RANGE(0x21fc00, 0x21ffff) AM_READWRITE(V25_sharedram_r, V25_sharedram_w) AM_BASE(&V25_shared_ram) /* 16-bit on 68000 side, 8-bit on V25+ side */
|
||||
AM_RANGE(0x210000, 0x21efff) AM_RAM AM_READWRITE( batsugun_share2_r, batsugun_share2_w )
|
||||
AM_RANGE(0x21f000, 0x21ffff) AM_RAM AM_READWRITE( batsugun_share_r, batsugun_share_w )
|
||||
AM_RANGE(0x210000, 0x21efff) AM_READWRITE( batsugun_share2_r, batsugun_share2_w )
|
||||
AM_RANGE(0x21f000, 0x21ffff) AM_READWRITE( batsugun_share_r, batsugun_share_w )
|
||||
#else
|
||||
AM_RANGE(0x210000, 0x21bbff) AM_RAM
|
||||
AM_RANGE(0x21e000, 0x21efff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&toaplan2_shared_ram16)
|
||||
|
@ -143,7 +143,7 @@ static WRITE8_HANDLER( wallc_coin_counter_w )
|
||||
|
||||
static ADDRESS_MAP_START( wallc_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x7fff) AM_ROM
|
||||
AM_RANGE(0x8000, 0x83ff) AM_RAM AM_MIRROR(0xc00) AM_WRITE(wallc_videoram_w) AM_BASE(&videoram) /* 2114, 2114 */
|
||||
AM_RANGE(0x8000, 0x83ff) AM_RAM_WRITE(wallc_videoram_w) AM_MIRROR(0xc00) AM_BASE(&videoram) /* 2114, 2114 */
|
||||
AM_RANGE(0xa000, 0xa3ff) AM_RAM /* 2114, 2114 */
|
||||
|
||||
AM_RANGE(0xb000, 0xb000) AM_READ(input_port_0_r)
|
||||
|
@ -389,7 +389,7 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||
AM_RANGE(0x0000, 0x77ff) AM_ROM
|
||||
AM_RANGE(0x7800, 0x7fff) AM_RAM
|
||||
AM_RANGE(0x8000, 0xffff) AM_ROM AM_READ(SMH_BANK1)
|
||||
AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( sound_port_map, ADDRESS_SPACE_IO, 8 )
|
||||
|
Loading…
Reference in New Issue
Block a user