opcode table WIP

This commit is contained in:
hap 2015-03-07 02:41:47 +01:00
parent 877b3bb9bb
commit e85b10a655
5 changed files with 439 additions and 58 deletions

View File

@ -7,6 +7,7 @@
References:
- 1985 #AP1 Hitachi 4-bit Single-Chip Microcomputer Data Book
- 1988 HMCS400 Series Handbook (note: *400 is a newer MCU series, with similarities)
- opcode decoding by Tatsuyuki Satoh, Olivier Galibert, Kevin Horton, Lord Nightmare
*/
@ -316,5 +317,215 @@ void hmcs40_cpu_device::execute_run()
debugger_instruction_hook(this, m_pc);
m_op = m_program->read_word(m_pc << 1) & 0x3ff;
increment_pc();
// handle opcode
switch (m_op)
{
/* 0x000 */
case 0x000: case 0x001: case 0x002: case 0x003:
op_xsp(); break;
case 0x004: case 0x005: case 0x006: case 0x007:
op_sem(); break;
case 0x008: case 0x009: case 0x00a: case 0x00b:
op_lam(); break;
case 0x010: case 0x011: case 0x012: case 0x013: case 0x014: case 0x015: case 0x016: case 0x017:
case 0x018: case 0x019: case 0x01a: case 0x01b: case 0x01c: case 0x01d: case 0x01e: case 0x01f:
op_lmiiy(); break;
case 0x020: case 0x021: case 0x022: case 0x023:
op_lbm(); break;
case 0x030:
op_amc(); break;
case 0x03c:
op_lta(); break;
case 0x040:
op_lxa(); break;
case 0x04b:
op_rec(); break;
case 0x04f:
op_sec(); break;
case 0x050:
op_lya(); break;
case 0x054:
op_iy(); break;
case 0x060:
op_lba(); break;
case 0x064:
op_ib(); break;
case 0x070: case 0x071: case 0x072: case 0x073: case 0x074: case 0x075: case 0x076: case 0x077:
case 0x078: case 0x079: case 0x07a: case 0x07b: case 0x07c: case 0x07d: case 0x07e: case 0x07f:
op_lai(); break;
case 0x080: case 0x081: case 0x082: case 0x083: case 0x084: case 0x085: case 0x086: case 0x087:
case 0x088: case 0x089: case 0x08a: case 0x08b: case 0x08c: case 0x08d: case 0x08e: case 0x08f:
op_ai(); break;
case 0x090:
op_sed(); break;
case 0x094:
op_td(); break;
case 0x0a0:
op_seif1(); break;
case 0x0a1:
op_secf(); break;
case 0x0a2:
op_seif0(); break;
case 0x0a4:
op_seie(); break;
case 0x0a5:
op_setf(); break;
case 0x0c0: case 0x0c1: case 0x0c2: case 0x0c3: case 0x0c4: case 0x0c5: case 0x0c6: case 0x0c7:
op_lar(); break;
case 0x0d0: case 0x0d1: case 0x0d2: case 0x0d3: case 0x0d4: case 0x0d5: case 0x0d6: case 0x0d7:
case 0x0d8: case 0x0d9: case 0x0da: case 0x0db: case 0x0dc: case 0x0dd: case 0x0de: case 0x0df:
op_sedd(); break;
case 0x0e0: case 0x0e1: case 0x0e2: case 0x0e3: case 0x0e4: case 0x0e5: case 0x0e6: case 0x0e7:
op_lbr(); break;
case 0x0f0: case 0x0f1: case 0x0f2: case 0x0f3: case 0x0f4: case 0x0f5: case 0x0f6: case 0x0f7:
case 0x0f8: case 0x0f9: case 0x0fa: case 0x0fb: case 0x0fc: case 0x0fd: case 0x0fe: case 0x0ff:
op_xamr(); break;
/* 0x100 */
case 0x110: case 0x111:
op_lmaiy(); break;
case 0x114: case 0x115:
op_lmady(); break;
case 0x120:
op_or(); break;
case 0x140: case 0x141: case 0x142: case 0x143: case 0x144: case 0x145: case 0x146: case 0x147:
case 0x148: case 0x149: case 0x14a: case 0x14b: case 0x14c: case 0x14d: case 0x14e: case 0x14f:
op_lxi(); break;
case 0x150: case 0x151: case 0x152: case 0x153: case 0x154: case 0x155: case 0x156: case 0x157:
case 0x158: case 0x159: case 0x15a: case 0x15b: case 0x15c: case 0x15d: case 0x15e: case 0x15f:
op_lyi(); break;
case 0x160: case 0x161: case 0x162: case 0x163: case 0x164: case 0x165: case 0x166: case 0x167:
case 0x168: case 0x169: case 0x16a: case 0x16b: case 0x16c: case 0x16d: case 0x16e: case 0x16f:
op_lbi(); break;
case 0x170: case 0x171: case 0x172: case 0x173: case 0x174: case 0x175: case 0x176: case 0x177:
case 0x178: case 0x179: case 0x17a: case 0x17b: case 0x17c: case 0x17d: case 0x17e: case 0x17f:
op_lti(); break;
case 0x1a0:
op_tif1(); break;
case 0x1a1:
op_ti1(); break;
case 0x1a2:
op_tif0(); break;
case 0x1a3:
op_ti0(); break;
case 0x1a5:
op_ttf(); break;
case 0x1c0: case 0x1c1: case 0x1c2: case 0x1c3: case 0x1c4: case 0x1c5: case 0x1c6: case 0x1c7:
case 0x1c8: case 0x1c9: case 0x1ca: case 0x1cb: case 0x1cc: case 0x1cd: case 0x1ce: case 0x1cf:
case 0x1d0: case 0x1d1: case 0x1d2: case 0x1d3: case 0x1d4: case 0x1d5: case 0x1d6: case 0x1d7:
case 0x1d8: case 0x1d9: case 0x1da: case 0x1db: case 0x1dc: case 0x1dd: case 0x1de: case 0x1df:
case 0x1e0: case 0x1e1: case 0x1e2: case 0x1e3: case 0x1e4: case 0x1e5: case 0x1e6: case 0x1e7:
case 0x1e8: case 0x1e9: case 0x1ea: case 0x1eb: case 0x1ec: case 0x1ed: case 0x1ee: case 0x1ef:
case 0x1f0: case 0x1f1: case 0x1f2: case 0x1f3: case 0x1f4: case 0x1f5: case 0x1f6: case 0x1f7:
case 0x1f8: case 0x1f9: case 0x1fa: case 0x1fb: case 0x1fc: case 0x1fd: case 0x1fe: case 0x1ff:
op_br(); break;
/* 0x200 */
case 0x200: case 0x201: case 0x202: case 0x203:
op_tm(); break;
case 0x204: case 0x205: case 0x206: case 0x207:
op_rem(); break;
case 0x208: case 0x209: case 0x20a: case 0x20b:
op_xma(); break;
case 0x210: case 0x211: case 0x212: case 0x213: case 0x214: case 0x215: case 0x216: case 0x217:
case 0x218: case 0x219: case 0x21a: case 0x21b: case 0x21c: case 0x21d: case 0x21e: case 0x21f:
op_mnei(); break;
case 0x220: case 0x221: case 0x222: case 0x223:
op_xmb(); break;
case 0x224:
op_rotr(); break;
case 0x225:
op_rotl(); break;
case 0x230:
op_smc(); break;
case 0x23c:
op_lat(); break;
case 0x240:
op_laspx(); break;
case 0x24f:
op_tc(); break;
case 0x250:
op_laspy(); break;
case 0x254:
op_dy(); break;
case 0x260:
op_lab(); break;
case 0x264:
op_db(); break;
case 0x270: case 0x271: case 0x272: case 0x273: case 0x274: case 0x275: case 0x276: case 0x277:
case 0x278: case 0x279: case 0x27a: case 0x27b: case 0x27c: case 0x27d: case 0x27e: case 0x27f:
op_alei(); break;
case 0x280: case 0x281: case 0x282: case 0x283: case 0x284: case 0x285: case 0x286: case 0x287:
case 0x288: case 0x289: case 0x28a: case 0x28b: case 0x28c: case 0x28d: case 0x28e: case 0x28f:
op_ynei(); break;
case 0x290:
op_red(); break;
case 0x2a0:
op_reif1(); break;
case 0x2a1:
op_recf(); break;
case 0x2a2:
op_reif0(); break;
case 0x2a4:
op_reie(); break;
case 0x2a5:
op_retf(); break;
case 0x2c0: case 0x2c1: case 0x2c2: case 0x2c3: case 0x2c4: case 0x2c5: case 0x2c6: case 0x2c7:
op_lra(); break;
case 0x2d0: case 0x2d1: case 0x2d2: case 0x2d3: case 0x2d4: case 0x2d5: case 0x2d6: case 0x2d7:
case 0x2d8: case 0x2d9: case 0x2da: case 0x2db: case 0x2dc: case 0x2dd: case 0x2de: case 0x2df:
op_redd(); break;
case 0x2e0: case 0x2e1: case 0x2e2: case 0x2e3: case 0x2e4: case 0x2e5: case 0x2e6: case 0x2e7:
op_lrb(); break;
/* 0x300 */
case 0x320:
op_comb(); break;
case 0x340: case 0x341: case 0x342: case 0x343: case 0x344: case 0x345: case 0x346: case 0x347:
case 0x348: case 0x349: case 0x34a: case 0x34b: case 0x34c: case 0x34d: case 0x34e: case 0x34f:
case 0x350: case 0x351: case 0x352: case 0x353: case 0x354: case 0x355: case 0x356: case 0x357:
case 0x358: case 0x359: case 0x35a: case 0x35b: case 0x35c: case 0x35d: case 0x35e: case 0x35f:
op_lpu(); break;
case 0x360: case 0x361: case 0x362: case 0x363: case 0x364: case 0x365: case 0x366: case 0x367:
op_tbr(); break;
case 0x368: case 0x369: case 0x36a: case 0x36b: case 0x36c: case 0x36d: case 0x36e: case 0x36f:
op_p(); break;
case 0x3a4:
op_rtni(); break;
case 0x3a7:
op_rtn(); break;
case 0x3c0: case 0x3c1: case 0x3c2: case 0x3c3: case 0x3c4: case 0x3c5: case 0x3c6: case 0x3c7:
case 0x3c8: case 0x3c9: case 0x3ca: case 0x3cb: case 0x3cc: case 0x3cd: case 0x3ce: case 0x3cf:
case 0x3d0: case 0x3d1: case 0x3d2: case 0x3d3: case 0x3d4: case 0x3d5: case 0x3d6: case 0x3d7:
case 0x3d8: case 0x3d9: case 0x3da: case 0x3db: case 0x3dc: case 0x3dd: case 0x3de: case 0x3df:
case 0x3e0: case 0x3e1: case 0x3e2: case 0x3e3: case 0x3e4: case 0x3e5: case 0x3e6: case 0x3e7:
case 0x3e8: case 0x3e9: case 0x3ea: case 0x3eb: case 0x3ec: case 0x3ed: case 0x3ee: case 0x3ef:
case 0x3f0: case 0x3f1: case 0x3f2: case 0x3f3: case 0x3f4: case 0x3f5: case 0x3f6: case 0x3f7:
case 0x3f8: case 0x3f9: case 0x3fa: case 0x3fb: case 0x3fc: case 0x3fd: case 0x3fe: case 0x3ff:
op_cal(); break;
default:
op_illegal(); break;
} /* big switch */
}
}

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@ -15,13 +15,13 @@
// I/O ports setup
// max 8 4-bit R ports
#define MCFG_HMCS40_READ_R_CB(_r, _devcb) \
hmcs40_cpu_device::set_read_r##_r_callback(*device, DEVCB_##_devcb);
#define MCFG_HMCS40_WRITE_R_CB(_r, _devcb) \
hmcs40_cpu_device::set_write_r##_r_callback(*device, DEVCB_##_devcb);
#define MCFG_HMCS40_READ_R_CB(R, _devcb) \
hmcs40_cpu_device::set_read_r##R##_callback(*device, DEVCB_##_devcb);
#define MCFG_HMCS40_WRITE_R_CB(R, _devcb) \
hmcs40_cpu_device::set_write_r##R##_callback(*device, DEVCB_##_devcb);
// 16-bit discrete
#define MCFG_HMCS40_READ_A_CB(_devcb) \
#define MCFG_HMCS40_READ_D_CB(_devcb) \
hmcs40_cpu_device::set_read_d_callback(*device, DEVCB_##_devcb);
#define MCFG_HMCS40_WRITE_D_CB(_devcb) \
hmcs40_cpu_device::set_write_d_callback(*device, DEVCB_##_devcb);
@ -143,6 +143,8 @@ protected:
virtual void write_d(int index, int state);
// opcode handlers
void op_illegal();
void op_lab();
void op_lba();
void op_lay();
@ -158,9 +160,7 @@ protected:
void op_dy();
void op_ayy();
void op_syy();
void op_xspx();
void op_xspy();
void op_xspxy();
void op_xsp();
void op_lam();
void op_lbm();
@ -238,9 +238,6 @@ protected:
void op_lra();
void op_lrb();
void op_p();
void op_nop();
void op_illegal();
};

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@ -11,15 +11,196 @@
#include "hmcs40.h"
enum e_mnemonics
{
mLAB, mLBA, mLAY, mLASPX, mLASPY, mXAMR,
mLXA, mLYA, mLXI, mLYI, mIY, mDY, mAYY, mSYY, mXSP,
mLAM, mLBM, mXMA, mXMB, mLMAIY, mLMADY,
mLMIIY, mLAI, mLBI,
mAI, mIB, mDB, mAMC, mSMC, mAM, mDAA, mDAS, mNEGA, mCOMB, mSEC, mREC, mTC, mROTL, mROTR, mOR,
mMNEI, mYNEI, mANEM, mBNEM, mALEI, mALEM, mBLEM,
mSEM, mREM, mTM,
mBR, mCAL, mLPU, mTBR, mRTN,
mSEIE, mSEIF0, mSEIF1, mSETF, mSECF, mREIE, mREIF0, mREIF1, mRETF, mRECF, mTI0, mTI1, mTIF0, mTIF1, mTTF, mLTI, mLTA, mLAT, mRTNI,
mSED, mRED, mTD, mSEDD, mREDD, mLAR, mLBR, mLRA, mLRB, mP,
mNOP, mILL
};
static const char *const s_mnemonics[] =
{
"LAB", "LBA", "LAY", "LASPX", "LASPY", "XAMR",
"LXA", "LYA", "LXI", "LYI", "IY", "DY", "AYY", "SYY", "XSP",
"LAM", "LBM", "XMA", "XMB", "LMAIY", "LMADY",
"LMIIY", "LAI", "LBI",
"AI", "IB", "DB", "AMC", "SMC", "AM", "DAA", "DAS", "NEGA", "COMB", "SEC", "REC", "TC", "ROTL", "ROTR", "OR",
"MNEI", "YNEI", "ANEM", "BNEM", "ALEI", "ALEM", "BLEM",
"SEM", "REM", "TM",
"BR", "CAL", "LPU", "TBR", "RTN",
"SEIE", "SEIF0", "SEIF1", "SETF", "SECF", "REIE", "REIF0", "REIF1", "RETF", "RECF", "TI0", "TI1", "TIF0", "TIF1", "TTF", "LTI", "LTA", "LAT", "RTNI",
"SED", "RED", "TD", "SEDD", "REDD", "LAR", "LBR", "LRA", "LRB", "P",
"NOP", "?"
};
// number of bits per opcode parameter, -3 means (XY) parameter
static const INT8 s_bits[] =
{
0, 0, 0, 0, 0, 4,
0, 0, 4, 4, 0, 0, 0, 0, -3,
-3, -3, -3, -3, -3, -3,
4, 4, 4,
4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
4, 4, 0, 0, 4, 0, 0,
2, 2, 2,
6, 6, 5, 3, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0, 0, 0,
0, 0, 0, 4, 4, 3, 3, 3, 3, 3,
0, 0
};
#define _OVER DASMFLAG_STEP_OVER
#define _OUT DASMFLAG_STEP_OUT
static const UINT32 s_flags[] =
{
0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0,
0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0,
0, 0, 0,
0, _OVER, 0, 0, _OUT,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, _OUT,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0
};
static const UINT8 hmcs40_mnemonic[0x400] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/* 0x000 */
mNOP, mXSP, mXSP, mXSP, mSEM, mSEM, mSEM, mSEM, mLAM, mLAM, mLAM, mLAM, mILL, mILL, mILL, mILL,
mLMIIY, mLMIIY, mLMIIY, mLMIIY, mLMIIY, mLMIIY, mLMIIY, mLMIIY, mLMIIY, mLMIIY, mLMIIY, mLMIIY, mLMIIY, mLMIIY, mLMIIY, mLMIIY,
mLBM, mLBM, mLBM, mLBM, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mAMC, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mLTA, mILL, mILL, mILL,
/* 0x040 */
mLXA, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mREC, mILL, mILL, mILL, mSEC,
mLYA, mILL, mILL, mILL, mIY, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mLBA, mILL, mILL, mILL, mIB, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI,
/* 0x080 */
mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI,
mSED, mILL, mILL, mILL, mTD, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mSEIF1, mSECF, mSEIF0, mILL, mSEIE, mSETF, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
/* 0x0c0 */
mLAR, mLAR, mLAR, mLAR, mLAR, mLAR, mLAR, mLAR, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD,
mLBR, mLBR, mLBR, mLBR, mLBR, mLBR, mLBR, mLBR, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mXAMR, mXAMR, mXAMR, mXAMR, mXAMR, mXAMR, mXAMR, mXAMR, mXAMR, mXAMR, mXAMR, mXAMR, mXAMR, mXAMR, mXAMR, mXAMR,
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/* 0x100 */
mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mLMAIY, mLMAIY, mILL, mILL, mLMADY, mLMADY, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mOR, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
/* 0x140 */
mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI,
mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI,
mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI,
mLTI, mLTI, mLTI, mLTI, mLTI, mLTI, mLTI, mLTI, mLTI, mLTI, mLTI, mLTI, mLTI, mLTI, mLTI, mLTI,
/* 0x180 */
mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mTIF1, mTI1, mTIF0, mTI0, mILL, mTTF, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
/* 0x1c0 */
mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/* 0x200 */
mTM, mTM, mTM, mTM, mREM, mREM, mREM, mREM, mXMA, mXMA, mXMA, mXMA, mILL, mILL, mILL, mILL,
mMNEI, mMNEI, mMNEI, mMNEI, mMNEI, mMNEI, mMNEI, mMNEI, mMNEI, mMNEI, mMNEI, mMNEI, mMNEI, mMNEI, mMNEI, mMNEI,
mXMB, mXMB, mXMB, mXMB, mROTR, mROTL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mSMC, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mLAT, mILL, mILL, mILL,
/* 0x240 */
mLASPX, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mTC,
mLASPY, mILL, mILL, mILL, mDY, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mLAB, mILL, mILL, mILL, mDB, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI,
/* 0x280 */
mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI,
mRED, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mREIF1, mRECF, mREIF0, mILL, mREIE, mRETF, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
/* 0x2c0 */
mLRA, mLRA, mLRA, mLRA, mLRA, mLRA, mLRA, mLRA, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD,
mLRB, mLRB, mLRB, mLRB, mLRB, mLRB, mLRB, mLRB, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/* 0x300 */
mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mCOMB, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
/* 0x340 */
mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU,
mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU, mLPU,
mTBR, mTBR, mTBR, mTBR, mTBR, mTBR, mTBR, mTBR, mP, mP, mP, mP, mP, mP, mP, mP,
mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
/* 0x380 */
mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mILL, mILL, mILL, mILL, mRTNI, mILL, mILL, mRTN, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL, mILL,
/* 0x3c0 */
mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL,
mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL,
mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL,
mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL
};
CPU_DISASSEMBLE(hmcs40)
{
int pos = 1;//0;
// UINT16 op = (oprom[pos] | oprom[pos + 1] << 8) & 0x3ff;
// pos += 2;
// UINT8 instr = hmcs40_mnemonic[op];
int pos = 0;
UINT16 op = (oprom[pos] | oprom[pos + 1] << 8) & 0x3ff;
pos++;
char *dst = buffer;
dst += sprintf(dst, "ABC");
UINT8 instr = hmcs40_mnemonic[op];
INT8 bits = s_bits[instr];
// special case for (XY) opcode
if (bits == -3)
{
dst += sprintf(dst, "%s", s_mnemonics[instr]);
return pos | 0 | DASMFLAG_SUPPORTED;
if (op & 1)
dst += sprintf(dst, "X");
if (op & 2)
dst += sprintf(dst, "Y");
}
else
dst += sprintf(dst, "%-6s ", s_mnemonics[instr]);
// opcode parameter
if (bits > 0)
{
UINT8 param = op & ((1 << bits) - 1);
if (bits > 5)
dst += sprintf(dst, "$%02X", param);
else
dst += sprintf(dst, "%d", param);
}
return pos | s_flags[instr] | DASMFLAG_SUPPORTED;
}

View File

@ -170,6 +170,12 @@ void hmcs45_cpu_device::write_r(int index, UINT8 data)
// instruction set
void hmcs40_cpu_device::op_illegal()
{
logerror("%s unknown opcode $%03X at $%04X\n", tag(), m_op, m_prev_pc << 1);
}
// Register-to-Register Instruction
void hmcs40_cpu_device::op_lab()
@ -273,27 +279,21 @@ void hmcs40_cpu_device::op_syy()
m_y &= 0xf;
}
void hmcs40_cpu_device::op_xspx()
void hmcs40_cpu_device::op_xsp()
{
// XSPX: Exchange X and SPX
UINT8 old_x = m_x;
m_x = m_spx;
m_spx = old_x;
}
void hmcs40_cpu_device::op_xspy()
{
// XSPY: Exchange Y and SPY
UINT8 old_y = m_y;
m_y = m_spy;
m_spy = old_y;
}
void hmcs40_cpu_device::op_xspxy()
{
// XSPXY: Exchange X and SPX, Y and SPY
op_xspx();
op_xspy();
// XSP (XY): Exchange X and SPX, Y and SPY, or NOP if 0
if (m_op & 1)
{
UINT8 old_x = m_x;
m_x = m_spx;
m_spx = old_x;
}
if (m_op & 2)
{
UINT8 old_y = m_y;
m_y = m_spy;
m_spy = old_y;
}
}
@ -303,14 +303,14 @@ void hmcs40_cpu_device::op_lam()
{
// LAM (XY): Load A from Memory
m_a = ram_r();
op_xspxy();
op_xsp();
}
void hmcs40_cpu_device::op_lbm()
{
// LBM (XY): Load B from Memory
m_b = ram_r();
op_xspxy();
op_xsp();
}
void hmcs40_cpu_device::op_xma()
@ -319,7 +319,7 @@ void hmcs40_cpu_device::op_xma()
UINT8 old_a = m_a;
m_a = ram_r();
ram_w(old_a);
op_xspxy();
op_xsp();
}
void hmcs40_cpu_device::op_xmb()
@ -328,7 +328,7 @@ void hmcs40_cpu_device::op_xmb()
UINT8 old_b = m_b;
m_b = ram_r();
ram_w(old_b);
op_xspxy();
op_xsp();
}
void hmcs40_cpu_device::op_lmaiy()
@ -336,7 +336,7 @@ void hmcs40_cpu_device::op_lmaiy()
// LMAIY (X): Load Memory from A, Increment Y
ram_w(m_a);
op_iy();
op_xspx();
op_xsp();
}
void hmcs40_cpu_device::op_lmady()
@ -344,7 +344,7 @@ void hmcs40_cpu_device::op_lmady()
// LMADY (X): Load Memory from A, Decrement Y
ram_w(m_a);
op_dy();
op_xspx();
op_xsp();
}
@ -796,17 +796,3 @@ void hmcs40_cpu_device::op_p()
write_r(3, o & 0xf);
}
}
// Control Instruction
void hmcs40_cpu_device::op_nop()
{
// NOP: No Operation
}
void hmcs40_cpu_device::op_illegal()
{
logerror("%s unknown opcode $%03X at $%04X\n", tag(), m_op, m_prev_pc << 1);
}

View File

@ -257,6 +257,12 @@ static MACHINE_CONFIG_START( alnattck, hh_hmcs40_state )
/* basic machine hardware */
MCFG_CPU_ADD("maincpu", HD38800, 400000) // approximation - RC osc.
MCFG_HMCS40_WRITE_R_CB(0, WRITE8(hh_hmcs40_state, alnattck_plate_w))
MCFG_HMCS40_WRITE_R_CB(1, WRITE8(hh_hmcs40_state, alnattck_plate_w))
MCFG_HMCS40_WRITE_R_CB(2, WRITE8(hh_hmcs40_state, alnattck_plate_w))
MCFG_HMCS40_WRITE_R_CB(3, WRITE8(hh_hmcs40_state, alnattck_plate_w))
MCFG_HMCS40_READ_D_CB(READ16(hh_hmcs40_state, alnattck_d_r))
MCFG_HMCS40_WRITE_D_CB(WRITE16(hh_hmcs40_state, alnattck_d_w))
MCFG_TIMER_DRIVER_ADD_PERIODIC("display_decay", hh_hmcs40_state, display_decay_tick, attotime::from_msec(1))
MCFG_DEFAULT_LAYOUT(layout_alnattck)