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https://github.com/holub/mame
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Implemented generic functions for RDMSR and WRMSR opcodes in Pentium CPU core (i.e. no MSR is actually hooked up so far) [Angelo Salese]
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@ -3243,7 +3243,7 @@ CPU_GET_INFO( pentium )
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case CPUINFO_INT_REGISTER + X87_ST7: info->i = ST(7).f; break;
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case DEVINFO_STR_NAME: strcpy(info->s, "PENTIUM"); break;
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case DEVINFO_STR_FAMILY: strcpy(info->s, "Intel Pentium"); break;
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case DEVINFO_STR_FAMILY: strcpy(info->s, "Intel Pentium"); break;
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case CPUINFO_STR_REGISTER + X87_CTRL: sprintf(info->s, "FPU_CW: %04X", cpustate->fpu_control_word); break;
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case CPUINFO_STR_REGISTER + X87_STATUS: sprintf(info->s, "FPU_SW: %04X", cpustate->fpu_status_word); break;
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case CPUINFO_STR_REGISTER + X87_ST0: sprintf(info->s, "ST0: %f", ST(0).f); break;
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@ -989,5 +989,39 @@ INLINE void WRITEPORT32(i386_state *cpustate, offs_t port, UINT32 value)
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}
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}
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/***********************************************************************************
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MSR ACCESS
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***********************************************************************************/
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INLINE UINT64 MSR_READ(i386_state *cpustate, UINT32 offset,UINT8 *valid_msr)
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{
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UINT64 res;
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*valid_msr = 0;
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switch(offset)
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{
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default:
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logerror("RDMSR: unimplemented register called %08x at %08x\n",offset,cpustate->pc-2);
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res = -1;
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*valid_msr = 1;
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break;
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}
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return res;
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}
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INLINE void MSR_WRITE(i386_state *cpustate, UINT32 offset, UINT64 data, UINT8 *valid_msr)
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{
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*valid_msr = 0;
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switch(offset)
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{
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default:
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logerror("WRMSR: unimplemented register called %08x (%08x%08x) at %08x\n",offset,(UINT32)(data >> 32),(UINT32)data,cpustate->pc-2);
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*valid_msr = 1;
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break;
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}
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}
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#endif /* __I386_H__ */
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@ -2,18 +2,33 @@
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static void PENTIUMOP(rdmsr)(i386_state *cpustate) // Opcode 0x0f 32
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{
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// TODO
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logerror("Unemulated RDMSR opcode called\n");
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UINT64 data;
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UINT8 valid_msr = 0;
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data = MSR_READ(cpustate,REG32(ECX),&valid_msr);
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REG32(EDX) = data >> 32;
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REG32(EAX) = data & 0xffffffff;
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if(cpustate->CPL != 0 || valid_msr == 0) // if current privilege level isn't 0 or the register isn't recognized ...
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FAULT(FAULT_GP,0) // ... throw a general exception fault
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CYCLES(cpustate,CYCLES_RDMSR);
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}
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static void PENTIUMOP(wrmsr)(i386_state *cpustate) // Opcode 0x0f 30
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{
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// TODO
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logerror("Unemulated WRMSR opcode called\n");
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UINT64 data;
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UINT8 valid_msr = 0;
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CYCLES(cpustate,1); // TODO: correct cycle count
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data = (UINT64)REG32(EAX);
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data |= (UINT64)(REG32(EDX)) << 32;
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MSR_WRITE(cpustate,REG32(ECX),data,&valid_msr);
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if(cpustate->CPL != 0 || valid_msr == 0) // if current privilege level isn't 0 or the register isn't recognized
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FAULT(FAULT_GP,0) // ... throw a general exception fault
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CYCLES(cpustate,1); // TODO: correct cycle count (~30-45)
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}
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static void PENTIUMOP(rdtsc)(i386_state *cpustate) // Opcode 0x0f 31
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