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srcclean (nw)

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This commit is contained in:
Vas Crabb 2017-05-28 13:40:48 +10:00
parent 4cce790d68
commit e892661905
113 changed files with 1793 additions and 1793 deletions
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2
hash/gba_ereader.xml
View File

@ -5405,7 +5405,7 @@
<rom name="doubutsu no mori card-e - series 2 - 04-p04 (japan) (strip 2).raw" size="2912" crc="e7900d4f" sha1="01fa3091927cd23fa6da45988428eaf1298b202d"/>
</dataarea>
</part>
</software>
</software>
<software name="mpebbu1">
<description>Mario Party-e - Big Boo (USA) (Strip 1)</description>
<year>200?</year>

6
hash/z80ne_cass.xml
View File

@ -4,10 +4,10 @@
Thanks to http://z80ne.com for info!
Tape loading instructions
Before using these instructions, make sure that the LX385 data date,
configured in the Machine Configuration menu, matches the cassette data rate
in the software description (1200bps, 600bps, or 300bps). The default
in the software description (1200bps, 600bps, or 300bps). The default
setting of 1200 bps is recommended as it is the fastest loading setting.
Loading generic machine language programs (e.g. bioritmi)
@ -18,7 +18,7 @@ Loading generic machine language programs (e.g. bioritmi)
5. After loading all required tapes, press any key on the numeric keypad, enter "1000", and press Control-4. The program should now be running.
Loading Tape BASIC (aka BASIC Italiano-Inglese da Cassetta)
1. Follow steps 1-3 and 5 from standard machine language program loading instructions with Tape 1 (Lettura).
After loading is complete, a nice title screen should appear, and the numeric display should read "BASIC".
2. At the title screen, mount tape 2 (BASIC) in cass1, then press Play on tape control.

2
plugins/console/init.lua
View File

@ -55,7 +55,7 @@ return ln.linenoise('\x1b[1;36m[MAME]\x1b[0m> ')
-- This function is called in a context where a keyword or a global
-- variable can be inserted. Local variables cannot be listed!
local function add_globals()
local function add_globals()
for _, k in ipairs(keywords) do
add(k)
end

6
scripts/src/netlist.lua
View File

@ -62,9 +62,9 @@ project "netlist"
MAME_DIR .. "src/lib/netlist/plib/plists.h",
MAME_DIR .. "src/lib/netlist/plib/pdynlib.cpp",
MAME_DIR .. "src/lib/netlist/plib/pdynlib.h",
MAME_DIR .. "src/lib/netlist/plib/pmain.cpp",
MAME_DIR .. "src/lib/netlist/plib/pmain.h",
MAME_DIR .. "src/lib/netlist/plib/pomp.h",
MAME_DIR .. "src/lib/netlist/plib/pmain.cpp",
MAME_DIR .. "src/lib/netlist/plib/pmain.h",
MAME_DIR .. "src/lib/netlist/plib/pomp.h",
MAME_DIR .. "src/lib/netlist/plib/poptions.cpp",
MAME_DIR .. "src/lib/netlist/plib/poptions.h",
MAME_DIR .. "src/lib/netlist/plib/pparser.cpp",

2
scripts/target/mame/mess.lua
View File

@ -1318,7 +1318,7 @@ files {
MAME_DIR .. "src/mame/machine/apricotkb.cpp",
MAME_DIR .. "src/mame/machine/apricotkb.h",
MAME_DIR .. "src/mame/drivers/victor9k.cpp",
-- MAME_DIR .. "src/mame/includes/victor9k.h",
-- MAME_DIR .. "src/mame/includes/victor9k.h",
MAME_DIR .. "src/mame/machine/victor9k_kb.cpp",
MAME_DIR .. "src/mame/machine/victor9k_kb.h",
MAME_DIR .. "src/mame/machine/victor9k_fdc.cpp",

12
src/devices/bus/ti99/internal/evpcconn.cpp
View File

@ -2,8 +2,8 @@
// copyright-holders:Michael Zapf
/****************************************************************************
Connector from EVPC
Connector from EVPC
We need this for the TI-99/4A console; the SGCPU uses a separate line
in the PEB.
@ -16,7 +16,7 @@
with a special firmware (DSR).
May 2017, Michael Zapf
****************************************************************************/
#include "emu.h"
@ -32,9 +32,9 @@ evpc_clock_connector::evpc_clock_connector(const machine_config &mconfig, const
{
}
WRITE_LINE_MEMBER( evpc_clock_connector::vclock_line )
{
m_vdpint(state);
WRITE_LINE_MEMBER( evpc_clock_connector::vclock_line )
{
m_vdpint(state);
}
void evpc_clock_connector::device_start()

12
src/devices/bus/ti99/internal/evpcconn.h
View File

@ -1,10 +1,10 @@
// license:LGPL-2.1+
// copyright-holders:Michael Zapf
/****************************************************************************
Connector from EVPC
For details see evpcconn.cpp
Connector from EVPC
For details see evpcconn.cpp
****************************************************************************/
#ifndef MAME_BUS_TI99_INTERNAL_EVPCCONN_H
#define MAME_BUS_TI99_INTERNAL_EVPCCONN_H
@ -25,8 +25,8 @@ public:
{
return downcast<evpc_clock_connector &>(device).m_vdpint.set_callback(object);
}
DECLARE_WRITE_LINE_MEMBER( vclock_line );
DECLARE_WRITE_LINE_MEMBER( vclock_line );
void device_start() override;
private:

36
src/devices/bus/ti99x/990_dk.cpp
View File

@ -61,35 +61,35 @@ void fd800_legacy_device::set_interrupt_line()
#if 0
void fd800_legacy_device::unload_proc(device_image_interface &image)
{
int unit = floppy_get_drive(&image.device());
int unit = floppy_get_drive(&image.device());
m_drv[unit].log_cylinder[0] = m_drv[unit].log_cylinder[1] = -1;
m_drv[unit].log_cylinder[0] = m_drv[unit].log_cylinder[1] = -1;
}
void fd800_machine_init(void (*interrupt_callback)(running_machine &machine, int state))
{
int i;
int i;
m_machine = &machine;
m_interrupt_callback = interrupt_callback;
m_machine = &machine;
m_interrupt_callback = interrupt_callback;
m_stat_reg = 0;
m_interrupt_f_f = 1;
m_stat_reg = 0;
m_interrupt_f_f = 1;
m_buf_pos = 0;
m_buf_mode = bm_off;
m_buf_pos = 0;
m_buf_mode = bm_off;
for (i=0; i<MAX_FLOPPIES; i++)
{
m_drv[i].img = dynamic_cast<device_image_interface *>(floppy_get_device(machine, i));
m_drv[i].phys_cylinder = -1;
m_drv[i].log_cylinder[0] = m_drv[i].log_cylinder[1] = -1;
m_drv[i].seclen = 64;
floppy_install_unload_proc(&m_drv[i].img->device(), unload_proc);
}
for (i=0; i<MAX_FLOPPIES; i++)
{
m_drv[i].img = dynamic_cast<device_image_interface *>(floppy_get_device(machine, i));
m_drv[i].phys_cylinder = -1;
m_drv[i].log_cylinder[0] = m_drv[i].log_cylinder[1] = -1;
m_drv[i].seclen = 64;
floppy_install_unload_proc(&m_drv[i].img->device(), unload_proc);
}
set_interrupt_line();
set_interrupt_line();
}
#endif

2
src/devices/bus/ti99x/990_hd.h
View File

@ -46,7 +46,7 @@ protected:
private:
// max disk units per controller: 4 is the protocol limit, but it may be overridden if more than one controller is used
static constexpr unsigned MAX_DISK_UNIT = 4;
static constexpr unsigned MAX_DISK_UNIT = 4;
enum format_t
{

2
src/devices/cpu/h6280/h6280.h
View File

@ -47,7 +47,7 @@ public:
void io_set_buffer(uint8_t);
protected:
// register enumeration
// register enumeration
enum
{
H6280_PC = 1,

6
src/devices/cpu/h8/h83002.cpp
View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Olivier Galibert
// copyright-holders:Olivier Galibert
#include "emu.h"
#include "h83002.h"
@ -66,7 +66,7 @@ DEVICE_ADDRESS_MAP_START(map, 16, h83002_device)
AM_RANGE(0xffff20, 0xffff21) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, marah_r, marah_w )
AM_RANGE(0xffff22, 0xffff23) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, maral_r, maral_w )
AM_RANGE(0xffff24, 0xffff25) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, etcra_r, etcra_w )
AM_RANGE(0xffff26, 0xffff27) AM_DEVREADWRITE8("dma:0", h8_dma_channel_device, dtcra_r, dtcra_w, 0x00ff )
AM_RANGE(0xffff26, 0xffff27) AM_DEVREADWRITE8("dma:0", h8_dma_channel_device, dtcra_r, dtcra_w, 0x00ff )
AM_RANGE(0xffff28, 0xffff29) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, marbh_r, marbh_w )
AM_RANGE(0xffff2a, 0xffff2b) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, marbl_r, marbl_w )
AM_RANGE(0xffff2c, 0xffff2d) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, etcrb_r, etcrb_w )
@ -74,7 +74,7 @@ DEVICE_ADDRESS_MAP_START(map, 16, h83002_device)
AM_RANGE(0xffff30, 0xffff31) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, marah_r, marah_w )
AM_RANGE(0xffff32, 0xffff33) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, maral_r, maral_w )
AM_RANGE(0xffff34, 0xffff35) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, etcra_r, etcra_w )
AM_RANGE(0xffff36, 0xffff37) AM_DEVREADWRITE8("dma:1", h8_dma_channel_device, dtcra_r, dtcra_w, 0x00ff )
AM_RANGE(0xffff36, 0xffff37) AM_DEVREADWRITE8("dma:1", h8_dma_channel_device, dtcra_r, dtcra_w, 0x00ff )
AM_RANGE(0xffff38, 0xffff39) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, marbh_r, marbh_w )
AM_RANGE(0xffff3a, 0xffff3b) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, marbl_r, marbl_w )
AM_RANGE(0xffff3c, 0xffff3d) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, etcrb_r, etcrb_w )

2
src/devices/cpu/m6502/n2a03.cpp
View File

@ -145,7 +145,7 @@ static MACHINE_CONFIG_START( n2a03_device )
MCFG_SOUND_ADD("nesapu", NES_APU, DERIVED_CLOCK(1,1) )
MCFG_NES_APU_IRQ_HANDLER(WRITELINE(n2a03_device, apu_irq))
MCFG_NES_APU_MEM_READ_CALLBACK(READ8(n2a03_device, apu_read_mem))
MCFG_SOUND_ROUTE(ALL_OUTPUTS, ":mono", 0.50)
MACHINE_CONFIG_END

2
src/devices/cpu/sm510/sm510core.cpp
View File

@ -56,7 +56,7 @@ void sm510_device::clock_melody()
u8 out = m_div >> 2 & 1;
out |= (out << 1 ^ 2);
out &= m_r;
// output to R pin
if (out != m_r_out)
{

4
src/devices/cpu/sm510/sm510d.cpp
View File

@ -39,7 +39,7 @@ enum e_mnemonics
mAM, mAC, mA10, mAS, mCLL, mCOM, mCLC, mSTC, mSCO, mSAO, mINC, mDEC, mSAM, mSAL, mNOP,
mICD, mOAR, mOA0, mOA1, mDAF, mDAS, mABS, mABF, mCTB, mLD0, mEN,
mBR, mLP, mCBR, mCMS, mRT, mRTS, mSI1, mSI0, mSYN, mTIM, mHLT,
// SM590 aliases
mCCTRL, mINBL, mDEBL, mXBLA, mADCS, mTR7,
// SM590 uniques
@ -139,7 +139,7 @@ static const u32 s_flags[] =
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, _OVER, 0, _OUT, _OUT, 0, 0, 0, 0, _OVER,
//
0, 0, 0, 0, 0, _OVER,
//

6
src/devices/cpu/sm510/sm590.h
View File

@ -39,7 +39,7 @@ R3.3/CL2 => |_|5 12|_| <> R1.3
ACL -> |_|7 10|_| <> R1.1
_| |_
GND -- |_|8 9|_| <> R1.0
|____________|
|____________|
18-pin DIP SM590/591/595:
@ -62,7 +62,7 @@ R3.3/CL2 => |_|6 13|_| <> R1.3
ACL -> |_|8 11|_| <> R1.1
_| |_
GND -- |_|9 10|_| <> R1.0
|____________|
|____________|
20-pin DIP SM590/591/595:
@ -87,7 +87,7 @@ R3.3/CL2 => |_|6 15|_| <> R1.3
ACL -> |_|9 12|_| <> R1.1
_| |_
GND -- |_|10 11|_| <> R1.0
|____________|
|____________|
*/

18
src/devices/cpu/sm510/sm590core.cpp
View File

@ -18,15 +18,15 @@ DEFINE_DEVICE_TYPE(SM590, sm590_device, "sm590", "SM590")
// internal memory maps
static ADDRESS_MAP_START(program_1x128x4, AS_PROGRAM, 8, sm510_base_device)
AM_RANGE(0x000, 0x1ff) AM_ROM
AM_RANGE(0x000, 0x1ff) AM_ROM
ADDRESS_MAP_END
/*static ADDRESS_MAP_START(program_2x128x4, AS_PROGRAM, 8, sm510_base_device)
AM_RANGE(0x000, 0x3ff) AM_ROM
AM_RANGE(0x000, 0x3ff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START(program_1x128x4_1x128x2, AS_PROGRAM, 8, sm510_base_device)
AM_RANGE(0x000, 0x2ff) AM_ROM
AM_RANGE(0x000, 0x2ff) AM_ROM
ADDRESS_MAP_END*/
static ADDRESS_MAP_START(data_16x2x4, AS_DATA, 8, sm510_base_device)
@ -36,10 +36,10 @@ ADDRESS_MAP_END
/*
static ADDRESS_MAP_START(data_16x3.5x4, AS_DATA, 8, sm510_base_device)
AM_RANGE(0x00, 0x0f) AM_RAM
AM_RANGE(0x10, 0x1f) AM_RAM
AM_RANGE(0x20, 0x2f) AM_RAM
AM_RANGE(0x30, 0x37) AM_RAM
AM_RANGE(0x00, 0x0f) AM_RAM
AM_RANGE(0x10, 0x1f) AM_RAM
AM_RANGE(0x20, 0x2f) AM_RAM
AM_RANGE(0x30, 0x37) AM_RAM
ADDRESS_MAP_END
*/
@ -50,12 +50,12 @@ sm590_device::sm590_device(const machine_config &mconfig, const char *tag, devic
}
//sm591_device::sm591_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
// : sm510_base_device(mconfig, SM591, tag, owner, clock, 4 /* stack levels */, 10 /* prg width */, ADDRESS_MAP_NAME(program_2x128x4), 6 /* data width */, ADDRESS_MAP_NAME(data_16x3.5x4))
// : sm510_base_device(mconfig, SM591, tag, owner, clock, 4 /* stack levels */, 10 /* prg width */, ADDRESS_MAP_NAME(program_2x128x4), 6 /* data width */, ADDRESS_MAP_NAME(data_16x3.5x4))
//{
//}
//sm595_device::sm595_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
// : sm510_base_device(mconfig, SM595, tag, owner, clock, 4 /* stack levels */, 10 /* prg width */, ADDRESS_MAP_NAME(program_1x128x4_1x128x2), 5 /* data width */, ADDRESS_MAP_NAME(data_16x2x4))
// : sm510_base_device(mconfig, SM595, tag, owner, clock, 4 /* stack levels */, 10 /* prg width */, ADDRESS_MAP_NAME(program_1x128x4_1x128x2), 5 /* data width */, ADDRESS_MAP_NAME(data_16x2x4))
//{
//}

136
src/devices/machine/6522via.cpp
View File

@ -362,79 +362,79 @@ void via6522_device::clear_int(int data)
void via6522_device::shift_out()
{
// Only shift out msb on falling flank
if (m_shift_counter & 1)
{
LOGSHIFT(" %s shift Out SR: %02x->", tag(), m_sr);
m_out_cb2 = (m_sr >> 7) & 1;
m_sr = (m_sr << 1) | m_out_cb2;
LOGSHIFT("%02x CB2: %d\n", m_sr, m_out_cb2);
// Only shift out msb on falling flank
if (m_shift_counter & 1)
{
LOGSHIFT(" %s shift Out SR: %02x->", tag(), m_sr);
m_out_cb2 = (m_sr >> 7) & 1;
m_sr = (m_sr << 1) | m_out_cb2;
LOGSHIFT("%02x CB2: %d\n", m_sr, m_out_cb2);
m_cb2_handler(m_out_cb2);
m_cb2_handler(m_out_cb2);
if (m_shift_counter == 1 && SO_EXT_CONTROL(m_acr))
{
LOGINT("SHIFT EXT out INT request ");
set_int(INT_SR); // IRQ on last falling flank for external clock (mode 7)
}
}
else // Check for INT condition, eg the last and raising flank of the 15-0 falling/raising flanks
{
if (!SO_T2_RATE(m_acr)) // The T2 continous shifter doesn't do interrupts (mode 4)
{
if (m_shift_counter == 0 && (SO_O2_CONTROL(m_acr) || SO_T2_CONTROL(m_acr)))
{
LOGINT("SHIFT O2/T2 out INT request ");
set_int(INT_SR); // IRQ on last raising flank for internal clock (mode 5-6)
}
}
}
m_shift_counter = (m_shift_counter - 1) & 0x0f; // Count all flanks
if (m_shift_counter == 1 && SO_EXT_CONTROL(m_acr))
{
LOGINT("SHIFT EXT out INT request ");
set_int(INT_SR); // IRQ on last falling flank for external clock (mode 7)
}
}
else // Check for INT condition, eg the last and raising flank of the 15-0 falling/raising flanks
{
if (!SO_T2_RATE(m_acr)) // The T2 continous shifter doesn't do interrupts (mode 4)
{
if (m_shift_counter == 0 && (SO_O2_CONTROL(m_acr) || SO_T2_CONTROL(m_acr)))
{
LOGINT("SHIFT O2/T2 out INT request ");
set_int(INT_SR); // IRQ on last raising flank for internal clock (mode 5-6)
}
}
}
m_shift_counter = (m_shift_counter - 1) & 0x0f; // Count all flanks
}
void via6522_device::shift_in()
{
// Only shift in data on raising flank
if ( !(m_shift_counter & 1) )
{
LOGSHIFT("%s shift In SR: %02x->", tag(), m_sr);
m_sr = (m_sr << 1) | (m_in_cb2 & 1);
LOGSHIFT("%02x\n", m_sr);
// Only shift in data on raising flank
if ( !(m_shift_counter & 1) )
{
LOGSHIFT("%s shift In SR: %02x->", tag(), m_sr);
m_sr = (m_sr << 1) | (m_in_cb2 & 1);
LOGSHIFT("%02x\n", m_sr);
if (m_shift_counter == 0)
{
LOGINT("SHIFT in INT request ");
if (m_shift_counter == 0)
{
LOGINT("SHIFT in INT request ");
// set_int(INT_SR);// TODO: this interrupt is 1-2 clock cycles too early
m_shift_irq_timer->adjust(clocks_to_attotime(2)/2); // Delay IRQ 2 flanks for all shift INs (mode 1-3)
}
}
m_shift_counter = (m_shift_counter - 1) & 0x0f; // Count all flanks
m_shift_irq_timer->adjust(clocks_to_attotime(2)/2); // Delay IRQ 2 flanks for all shift INs (mode 1-3)
}
}
m_shift_counter = (m_shift_counter - 1) & 0x0f; // Count all flanks
}
void via6522_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
switch (id)
{
case TIMER_SHIFT_IRQ: // This timer event is a delayed IRQ for improved cycle accuracy
set_int(INT_SR); // triggered from shift_in or shift_out on the last rising flank
case TIMER_SHIFT_IRQ: // This timer event is a delayed IRQ for improved cycle accuracy
set_int(INT_SR); // triggered from shift_in or shift_out on the last rising flank
m_shift_irq_timer->adjust(attotime::never); // Not needed really...
break;
break;
case TIMER_SHIFT:
LOGSHIFT("SHIFT timer event CB1 %s edge, %d\n", m_out_cb1 & 1 ? "falling" : "raising", m_shift_counter);
m_out_cb1 ^= 1;
m_cb1_handler(m_out_cb1);
// we call shift methods for all flanks
if (SO_T2_RATE(m_acr) || SO_T2_CONTROL(m_acr) || SO_O2_CONTROL(m_acr))
{
shift_out();
}
else if (SI_T2_CONTROL(m_acr) || SI_O2_CONTROL(m_acr))
{
shift_in();
}
// we call shift methods for all flanks
if (SO_T2_RATE(m_acr) || SO_T2_CONTROL(m_acr) || SO_O2_CONTROL(m_acr))
{
shift_out();
}
else if (SI_T2_CONTROL(m_acr) || SI_O2_CONTROL(m_acr))
{
shift_in();
}
// If in continous mode or the shifter is still shifting we re-arm the timer
// If in continous mode or the shifter is still shifting we re-arm the timer
if (SO_T2_RATE(m_acr) || (m_shift_counter != 0x0f))
{
if (SI_O2_CONTROL(m_acr) || SO_O2_CONTROL(m_acr))
@ -445,11 +445,11 @@ void via6522_device::device_timer(emu_timer &timer, device_timer_id id, int para
{
m_shift_timer->adjust(clocks_to_attotime(m_t2ll + 2) / 2);
}
else // otherwise we stop it
{
m_shift_timer->adjust(attotime::never);
}
}
else // otherwise we stop it
{
m_shift_timer->adjust(attotime::never);
}
}
break;
case TIMER_T1:
if (T1_CONTINUOUS (m_acr))
@ -485,7 +485,7 @@ void via6522_device::device_timer(emu_timer &timer, device_timer_id id, int para
m_out_ca2 = 1;
m_ca2_handler(m_out_ca2);
break;
}
}
}
uint8_t via6522_device::input_pa()
@ -1051,16 +1051,16 @@ WRITE_LINE_MEMBER( via6522_device::write_cb1 )
}
// The shifter shift is not controlled by PCR
if (SO_EXT_CONTROL(m_acr))
{
LOGSHIFT("SHIFT OUT EXT/CB1 falling edge, %d\n", m_shift_counter);
shift_out();
}
else if (SI_EXT_CONTROL(m_acr))
{
LOGSHIFT("SHIFT IN EXT/CB1 raising edge, %d\n", m_shift_counter);
shift_in();
}
if (SO_EXT_CONTROL(m_acr))
{
LOGSHIFT("SHIFT OUT EXT/CB1 falling edge, %d\n", m_shift_counter);
shift_out();
}
else if (SI_EXT_CONTROL(m_acr))
{
LOGSHIFT("SHIFT IN EXT/CB1 raising edge, %d\n", m_shift_counter);
shift_in();
}
}
}

4
src/devices/machine/hdc92x4.h
View File

@ -52,7 +52,7 @@ class hdc92x4_device : public device_t
{
public:
/*
Enumeration of the latches outside of the controller
Enumeration of the latches outside of the controller
*/
enum
{
@ -64,7 +64,7 @@ public:
/*
Definition of bits in the Disk-Status register
Definition of bits in the Disk-Status register
*/
enum
{

2
src/devices/machine/k054321.h
View File

@ -6,7 +6,7 @@
#pragma once
#define MCFG_K054321_ADD(_tag, _left, _right) \
#define MCFG_K054321_ADD(_tag, _left, _right) \
MCFG_DEVICE_ADD(_tag, K054321, 0) \
downcast<k054321_device *>(device)->set_gain_devices(_left, _right);

22
src/devices/machine/s3c24xx.h
View File

@ -160,17 +160,17 @@ protected:
struct uart_t
{
static constexpr offs_t ULCON = 0X00 / 4; // UART Line Control
static constexpr offs_t UCON = 0X04 / 4; // UART Control
static constexpr offs_t UFCON = 0X08 / 4; // UART FIFO Control
static constexpr offs_t UMCON = 0X0c / 4; // UART Modem Control
static constexpr offs_t UTRSTAT = 0X10 / 4; // UART Tx/Rx Status
static constexpr offs_t UERSTAT = 0X14 / 4; // UART Rx Error Status
static constexpr offs_t UFSTAT = 0X18 / 4; // UART FIFO Status
static constexpr offs_t UMSTAT = 0X1c / 4; // UART Modem Status
static constexpr offs_t UTXH = 0X20 / 4; // UART Transmission Hold
static constexpr offs_t URXH = 0X24 / 4; // UART Receive Buffer
static constexpr offs_t UBRDIV = 0X28 / 4; // UART Baud Rate Divisor
static constexpr offs_t ULCON = 0x00 / 4; // UART Line Control
static constexpr offs_t UCON = 0x04 / 4; // UART Control
static constexpr offs_t UFCON = 0x08 / 4; // UART FIFO Control
static constexpr offs_t UMCON = 0x0c / 4; // UART Modem Control
static constexpr offs_t UTRSTAT = 0x10 / 4; // UART Tx/Rx Status
static constexpr offs_t UERSTAT = 0x14 / 4; // UART Rx Error Status
static constexpr offs_t UFSTAT = 0x18 / 4; // UART FIFO Status
static constexpr offs_t UMSTAT = 0x1c / 4; // UART Modem Status
static constexpr offs_t UTXH = 0x20 / 4; // UART Transmission Hold
static constexpr offs_t URXH = 0x24 / 4; // UART Receive Buffer
static constexpr offs_t UBRDIV = 0x28 / 4; // UART Baud Rate Divisor
void reset();

2
src/devices/machine/scnxx562.cpp
View File

@ -100,7 +100,7 @@ DONE (x) (p=partly) NMOS CMOS
#define LOGR(...) LOGMASKED(LOG_R, __VA_ARGS__)
#define LOGTX(...) LOGMASKED(LOG_TX, __VA_ARGS__)
#define LOGRX(...) LOGMASKED(LOG_RX, __VA_ARGS__)
#define LOGSETUP(...) LOGMASKED(LOG_SETUP, __VA_ARGS__)
#define LOGSETUP(...) LOGMASKED(LOG_SETUP, __VA_ARGS__)
#define LOGINT(...) LOGMASKED(LOG_INT, __VA_ARGS__)
#ifdef _MSC_VER

94
src/devices/machine/vrc5074.cpp
View File

@ -149,7 +149,7 @@ vrc5074_device::vrc5074_device(const machine_config &mconfig, const char *tag, d
{
for (int i = 0; i < 2; i++)
m_sdram_size[i] = 0x0;
for (int csIndex = 2; csIndex < 9; csIndex++) {
m_cs_devices[csIndex - 2] = nullptr;
}
@ -311,7 +311,7 @@ void vrc5074_device::map_cpu_space()
if (index == 0) {
m_cpu_space->install_read_handler(winStart, winStart + winSize - 1, read32_delegate(FUNC(vrc5074_device::pci0_r), this));
m_cpu_space->install_write_handler(winStart, winStart + winSize - 1, write32_delegate(FUNC(vrc5074_device::pci0_w), this));
}
}
else {
m_cpu_space->install_read_handler(winStart, winStart + winSize - 1, read32_delegate(FUNC(vrc5074_device::pci1_r), this));
m_cpu_space->install_write_handler(winStart, winStart + winSize - 1, write32_delegate(FUNC(vrc5074_device::pci1_w), this));
@ -336,7 +336,7 @@ void vrc5074_device::map_extra(uint64_t memory_window_start, uint64_t memory_win
winSize = m_sdram[0].size() * 4;
if (m_sdram[0].size() && mask > 0) {
winStart = 0x0;
winEnd = winStart + winSize -1;
memory_space->install_read_handler(winStart, winEnd, read32_delegate(FUNC(vrc5074_device::target1_r), this));
memory_space->install_write_handler(winStart, winEnd, write32_delegate(FUNC(vrc5074_device::target1_w), this));
@ -345,13 +345,13 @@ void vrc5074_device::map_extra(uint64_t memory_window_start, uint64_t memory_win
}
//// PCI Target Window 2
//if (m_cpu_regs[NREG_PCITW2]&0x1000) {
// winStart = m_cpu_regs[NREG_PCITW2]&0xffe00000;
// winEnd = winStart | (~(0xf0000000 | (((m_cpu_regs[NREG_PCITW2]>>13)&0x7f)<<21)));
// winSize = winEnd - winStart + 1;
// memory_space->install_read_handler(winStart, winEnd, read32_delegate(FUNC(vrc5074_device::target2_r), this));
// memory_space->install_write_handler(winStart, winEnd, write32_delegate(FUNC(vrc5074_device::target2_w), this));
// if (LOG_NILE)
// logerror("%s: map_extra Target Window 2 start=%08X end=%08X size=%08X laddr=%08X\n", tag(), winStart, winEnd, winSize, m_target2_laddr);
// winStart = m_cpu_regs[NREG_PCITW2]&0xffe00000;
// winEnd = winStart | (~(0xf0000000 | (((m_cpu_regs[NREG_PCITW2]>>13)&0x7f)<<21)));
// winSize = winEnd - winStart + 1;
// memory_space->install_read_handler(winStart, winEnd, read32_delegate(FUNC(vrc5074_device::target2_r), this));
// memory_space->install_write_handler(winStart, winEnd, write32_delegate(FUNC(vrc5074_device::target2_w), this));
// if (LOG_NILE)
// logerror("%s: map_extra Target Window 2 start=%08X end=%08X size=%08X laddr=%08X\n", tag(), winStart, winEnd, winSize, m_target2_laddr);
//}
}
@ -433,7 +433,7 @@ READ32_MEMBER (vrc5074_device::pci0_r)
return result;
}
WRITE32_MEMBER (vrc5074_device::pci0_w)
{
{
int index = 0;
uint32_t pci_addr = m_pci_laddr[index] | ((offset << 2) & m_pci_mask[index]);
switch (m_pci_type[index]) {
@ -572,9 +572,9 @@ TIMER_CALLBACK_MEMBER (vrc5074_device::dma_transfer)
//// Check for dma suspension
//if (m_cpu_regs[NREG_DMACR1 + which * 0xc] & DMA_SUS) {
// if (LOG_NILE)
// logerror("%08X:nile DMA Suspended PCI: %08X MEM: %08X Words: %X\n", m_cpu->space(AS_PROGRAM).device().safe_pc(), m_cpu_regs[NREG_DMA_CPAR], m_cpu_regs[NREG_DMA_CMAR], m_cpu_regs[NREG_DMA_REM]);
// return;
// if (LOG_NILE)
// logerror("%08X:nile DMA Suspended PCI: %08X MEM: %08X Words: %X\n", m_cpu->space(AS_PROGRAM).device().safe_pc(), m_cpu_regs[NREG_DMA_CPAR], m_cpu_regs[NREG_DMA_CMAR], m_cpu_regs[NREG_DMA_REM]);
// return;
//}
//int pciSel = (m_cpu_regs[NREG_DMACR1+which*0xC] & DMA_MIO) ? AS_DATA : AS_IO;
@ -582,50 +582,50 @@ TIMER_CALLBACK_MEMBER (vrc5074_device::dma_transfer)
//uint32_t srcAddr, dstAddr;
//if (m_cpu_regs[NREG_DMACR1+which*0xC]&DMA_RW) {
// // Read data from PCI and write to cpu
// src = &this->space(pciSel);
// dst = &m_cpu->space(AS_PROGRAM);
// srcAddr = m_cpu_regs[NREG_DMA_CPAR];
// dstAddr = m_cpu_regs[NREG_DMA_CMAR];
// // Read data from PCI and write to cpu
// src = &this->space(pciSel);
// dst = &m_cpu->space(AS_PROGRAM);
// srcAddr = m_cpu_regs[NREG_DMA_CPAR];
// dstAddr = m_cpu_regs[NREG_DMA_CMAR];
//} else {
// // Read data from cpu and write to PCI
// src = &m_cpu->space(AS_PROGRAM);
// dst = &this->space(pciSel);
// srcAddr = m_cpu_regs[NREG_DMA_CMAR];
// dstAddr = m_cpu_regs[NREG_DMA_CPAR];
// // Read data from cpu and write to PCI
// src = &m_cpu->space(AS_PROGRAM);
// dst = &this->space(pciSel);
// srcAddr = m_cpu_regs[NREG_DMA_CMAR];
// dstAddr = m_cpu_regs[NREG_DMA_CPAR];
//}
//int dataCount = m_cpu_regs[NREG_DMA_REM];
//int burstCount = DMA_BURST_SIZE;
//while (dataCount>0 && burstCount>0) {
// dst->write_dword(dstAddr, src->read_dword(srcAddr));
// dstAddr += 0x4;
// srcAddr += 0x4;
// --dataCount;
// --burstCount;
// dst->write_dword(dstAddr, src->read_dword(srcAddr));
// dstAddr += 0x4;
// srcAddr += 0x4;
// --dataCount;
// --burstCount;
//}
//if (m_cpu_regs[NREG_DMACR1+which*0xC]&DMA_RW) {
// m_cpu_regs[NREG_DMA_CPAR] = srcAddr;
// m_cpu_regs[NREG_DMA_CMAR] = dstAddr;
// m_cpu_regs[NREG_DMA_CPAR] = srcAddr;
// m_cpu_regs[NREG_DMA_CMAR] = dstAddr;
//} else {
// m_cpu_regs[NREG_DMA_CMAR] = srcAddr;
// m_cpu_regs[NREG_DMA_CPAR] = dstAddr;
// m_cpu_regs[NREG_DMA_CMAR] = srcAddr;
// m_cpu_regs[NREG_DMA_CPAR] = dstAddr;
//}
//m_cpu_regs[NREG_DMA_REM] = dataCount;
//// Check for end of DMA
//if (dataCount == 0) {
// // Clear the busy and go flags
// m_cpu_regs[NREG_DMACR1 + which * 0xc] &= ~DMA_BUSY;
// m_cpu_regs[NREG_DMACR1 + which * 0xc] &= ~DMA_GO;
// // Set the interrupt
// if (m_cpu_regs[NREG_DMACR1 + which * 0xc] & DMA_INT_EN) {
// if (m_irq_num != -1) {
// m_cpu->set_input_line(m_irq_num, ASSERT_LINE);
// } else {
// logerror("vrc5074_device::dma_transfer Error: DMA configured to trigger interrupt but no interrupt line configured\n");
// }
// }
// // Turn off the timer
// m_dma_timer->adjust(attotime::never);
// // Clear the busy and go flags
// m_cpu_regs[NREG_DMACR1 + which * 0xc] &= ~DMA_BUSY;
// m_cpu_regs[NREG_DMACR1 + which * 0xc] &= ~DMA_GO;
// // Set the interrupt
// if (m_cpu_regs[NREG_DMACR1 + which * 0xc] & DMA_INT_EN) {
// if (m_irq_num != -1) {
// m_cpu->set_input_line(m_irq_num, ASSERT_LINE);
// } else {
// logerror("vrc5074_device::dma_transfer Error: DMA configured to trigger interrupt but no interrupt line configured\n");
// }
// }
// // Turn off the timer
// m_dma_timer->adjust(attotime::never);
//}
}
@ -929,7 +929,7 @@ WRITE32_MEMBER(vrc5074_device::cpu_reg_w)
case NREG_PCIINIT0 + 0: /* PCI master */
case NREG_PCIINIT1 + 0: /* PCI master */
//if (((olddata & 0xe) == 0xa) != ((m_cpu_regs[offset] & 0xe) == 0xa))
// remap_dynamic_addresses();
// remap_dynamic_addresses();
//remap_cb();
setup_pci_space();
logit = 0;

26
src/devices/machine/z80scc.cpp
View File

@ -1737,17 +1737,17 @@ void z80scc_channel::do_sccreg_wr0(uint8_t data)
m_rx_first = 1;
break;
case WR0_RESET_TX_INT: // reset transmitter interrupt pending
/*Reset Tx Interrupt Pending Command (101). This command is used in cases where there are no
more characters to be sent; e.g., at the end of a message. This command prevents further transmit
interrupts until after the next character has been loaded into the transmit buffer or until CRC has
been completely sent. This command is necessary to prevent the transmitter from requesting an
interrupt when the transmit buffer becomes empty (with Transmit Interrupt Enabled).*/
/*Reset Tx Interrupt Pending Command (101). This command is used in cases where there are no
more characters to be sent; e.g., at the end of a message. This command prevents further transmit
interrupts until after the next character has been loaded into the transmit buffer or until CRC has
been completely sent. This command is necessary to prevent the transmitter from requesting an
interrupt when the transmit buffer becomes empty (with Transmit Interrupt Enabled).*/
m_tx_int_disarm = 1;
LOGCMD("%s: %c : WR0_RESET_TX_INT\n", owner()->tag(), 'A' + m_index);
m_uart->m_int_state[INT_TRANSMIT_PRIO + (m_index == z80scc_device::CHANNEL_A ? 0 : 3 )] = 0;
// Based on the fact that prio levels are aligned with the bitorder of rr3 we can do this...
m_uart->m_chanA->m_rr3 &= ~((1 << INT_TRANSMIT_PRIO) + (m_index == z80scc_device::CHANNEL_A ? 3 : 0 ));
// Update interrupt line
// Update interrupt line
m_uart->check_interrupts();
break;
default:
@ -2265,10 +2265,10 @@ void z80scc_channel::control_write(uint8_t data)
}
LOGSETUP(" * %s %c Reg %02x <- %02x - %s\n", owner()->tag(), 'A' + m_index, reg, data, std::array<char const *, 16>
{{ "Command register", "Tx/Rx Interrupt and Data Transfer Modes", "Interrupt Vector", "Rx Parameters and Control",
"Tx/Rx Misc Parameters and Modes", "Tx Parameters and Controls", "Sync Characters or SDLC Address Field","Sync Character or SDLC Flag/Prime",
"Tx Buffer", "Master Interrupt Control", "Miscellaneous Tx/Rx Control Bits", "Clock Mode Control",
"Lower Byte of BRG Time Constant", "Upper Byte of BRg Time Constant", "Miscellaneous Control Bits", "External/Status Interrupt Control"}}[reg]);
{{ "Command register", "Tx/Rx Interrupt and Data Transfer Modes", "Interrupt Vector", "Rx Parameters and Control",
"Tx/Rx Misc Parameters and Modes", "Tx Parameters and Controls", "Sync Characters or SDLC Address Field","Sync Character or SDLC Flag/Prime",
"Tx Buffer", "Master Interrupt Control", "Miscellaneous Tx/Rx Control Bits", "Clock Mode Control",
"Lower Byte of BRG Time Constant", "Upper Byte of BRg Time Constant", "Miscellaneous Control Bits", "External/Status Interrupt Control"}}[reg]);
scc_register_write(reg, data);
}
@ -2431,9 +2431,9 @@ void z80scc_channel::data_write(uint8_t data)
// check if to fire interrupt
LOG("- TX interrupt are %s\n", (m_wr1 & WR1_TX_INT_ENABLE) ? "enabled" : "disabled" );
/* Arm interrupts since we wrote another data byte, however it may be set by the reset tx int pending
command before the shifter is done and the disarm flag is evaluated again in tra_complete() */
m_tx_int_disarm = 0;
/* Arm interrupts since we wrote another data byte, however it may be set by the reset tx int pending
command before the shifter is done and the disarm flag is evaluated again in tra_complete() */
m_tx_int_disarm = 0;
if (m_wr1 & WR1_TX_INT_ENABLE)
{
if ((m_uart->m_variant & z80scc_device::SET_ESCC) &&

4
src/devices/machine/z80scc.h
View File

@ -614,8 +614,8 @@ protected:
int m_tx_fifo_wp; // FIFO write pointer
int m_tx_fifo_sz; // FIFO size
uint8_t m_tx_error; // current error
int m_tx_clock; // transmit clock pulse count
int m_tx_int_disarm; // temp Tx int disarm until next byte written
int m_tx_clock; // transmit clock pulse count
int m_tx_int_disarm; // temp Tx int disarm until next byte written
int m_dtr; // data terminal ready

2
src/devices/sound/ad1848.h
View File

@ -32,7 +32,7 @@ protected:
virtual void device_reset() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
virtual void device_add_mconfig(machine_config &config) override;
private:
union {

18
src/devices/video/ppu2c0x.cpp
View File

@ -351,14 +351,14 @@ void ppu2c0x_device::init_palette(palette_device &palette, int first_entry, bool
switch (color_emphasis)
{
case 0: r_mod = 1.0; g_mod = 1.0; b_mod = 1.0; break;
case 1: r_mod = 1.24; g_mod = .915; b_mod = .743; break;
case 2: r_mod = .794; g_mod = 1.09; b_mod = .882; break;
case 3: r_mod = .905; g_mod = 1.03; b_mod = 1.28; break;
case 4: r_mod = .741; g_mod = .987; b_mod = 1.0; break;
case 5: r_mod = 1.02; g_mod = .908; b_mod = .979; break;
case 6: r_mod = 1.02; g_mod = .98; b_mod = .653; break;
case 7: r_mod = .75; g_mod = .75; b_mod = .75; break;
case 0: r_mod = 1.0; g_mod = 1.0; b_mod = 1.0; break;
case 1: r_mod = 1.24; g_mod = .915; b_mod = .743; break;
case 2: r_mod = .794; g_mod = 1.09; b_mod = .882; break;
case 3: r_mod = .905; g_mod = 1.03; b_mod = 1.28; break;
case 4: r_mod = .741; g_mod = .987; b_mod = 1.0; break;
case 5: r_mod = 1.02; g_mod = .908; b_mod = .979; break;
case 6: r_mod = 1.02; g_mod = .98; b_mod = .653; break;
case 7: r_mod = .75; g_mod = .75; b_mod = .75; break;
}
*/
@ -621,7 +621,7 @@ void ppu2c0x_device::draw_tile(uint8_t *line_priority, int color_byte, int color
// priority marking
if (pix)
line_priority[start_x + i] |= 0x02;
line_priority[start_x + i] |= 0x02;
}
dest++;
}

6
src/devices/video/ppu2c0x.h
View File

@ -121,7 +121,7 @@ public:
virtual void draw_tile_pixel(uint8_t pix, int color, uint16_t back_pen, uint16_t *&dest, const pen_t *color_table);
virtual void draw_tile(uint8_t *line_priority, int color_byte, int color_bits, int address, int start_x, uint16_t back_pen, uint16_t *&dest, const pen_t *color_table);
void draw_background( uint8_t *line_priority );
virtual void read_sprite_plane_data(int address);
virtual void make_sprite_pixel_data(uint8_t &pixel_data, int flipx);
virtual void draw_sprite_pixel(int sprite_xpos, int color, int pixel, uint8_t pixel_data, bitmap_ind16& bitmap);
@ -158,7 +158,7 @@ public:
ppu2c0x_device &dev = downcast<ppu2c0x_device &>(device);
dev.m_use_sprite_write_limitation = false;
}
protected:
// registers definition
enum
@ -259,7 +259,7 @@ private:
emu_timer *m_hblank_timer; /* hblank period at end of each scanline */
emu_timer *m_nmi_timer; /* NMI timer */
emu_timer *m_scanline_timer; /* scanline timer */
bool m_use_sprite_write_limitation;
};

28
src/devices/video/ppu2c0x_vt.cpp
View File

@ -3,9 +3,9 @@
/******************************************************************************
VT video emulation
The VT video is based on the ppu2c0x but with enhanced capabilities such
as 16 colour sprites.
The VT video is based on the ppu2c0x but with enhanced capabilities such
as 16 colour sprites.
******************************************************************************/
@ -41,7 +41,7 @@ READ8_MEMBER(ppu_vt03_device::palette_read)
void ppu_vt03_device::set_new_pen(int i)
{
uint16_t palval = (m_newpal[i&0x7f] & 0x3f) | ((m_newpal[(i&0x7f)+0x80] & 0x3f)<<6);
// &0x3f so we don't attempt to use any of the extended colours right now because
// I haven't managed to work out the format
m_palette->set_pen_indirect(i&0x7f,palval&0x3f);
@ -130,7 +130,7 @@ void ppu_vt03_device::read_sprite_plane_data(int address)
m_planebuf[1] = m_read_sp((address + 8) & 0x1fff);
int is4bpp = get_201x_reg(0x0) & 0x04;
if (is4bpp)
{
m_va34 = 1;
@ -150,7 +150,7 @@ void ppu_vt03_device::make_sprite_pixel_data(uint8_t &pixel_data, int flipx)
if (flipx)
{
// yes, shift by 5 and 6 because of the way the palette is arranged in RAM
pixel_data |= (((m_extplanebuf[0] & 1) << 5) | ((m_extplanebuf[1] & 1) << 6));
pixel_data |= (((m_extplanebuf[0] & 1) << 5) | ((m_extplanebuf[1] & 1) << 6));
m_extplanebuf[0] = m_extplanebuf[0] >> 1;
m_extplanebuf[1] = m_extplanebuf[1] >> 1;
}
@ -275,13 +275,13 @@ uint8_t ppu_vt03_device::get_speva2_speva0()
void ppu_vt03_device::set_2010_reg(uint8_t data)
{
/* 7 : COLCOMP
6 : UNUSED (8bpp enable on VT09?)
5 : UNUSED
4 : BKEXTEN
3 : SPEXTEN
2 : SP16EN
1 : BK16EN
0 : PIX16EN */
6 : UNUSED (8bpp enable on VT09?)
5 : UNUSED
4 : BKEXTEN
3 : SPEXTEN
2 : SP16EN
1 : BK16EN
0 : PIX16EN */
if ((m_201x_regs[0x0] & 0x80) != (data & 0x80))
{
@ -382,4 +382,4 @@ WRITE8_MEMBER(ppu_vt03_device::write)
break;
}
}
}
}

6
src/devices/video/ppu2c0x_vt.h
View File

@ -3,9 +3,9 @@
/******************************************************************************
VT video emulation
The VT video is based on the ppu2c0x but with enhanced capabilities such
as 16 colour sprites.
The VT video is based on the ppu2c0x but with enhanced capabilities such
as 16 colour sprites.
******************************************************************************/

2
src/emu/diimage.cpp
View File

@ -520,7 +520,7 @@ bool device_image_interface::run_hash(util::core_file &file, u32 skip_bytes, uti
const u32 actual_count = file.read(buffer, count);
if (actual_count == 0)
return false;
position += actual_count;
position += actual_count;
// and compute the hashes
hashes.buffer(buffer, actual_count);

40
src/frontend/mame/clifront.cpp
View File

@ -1452,31 +1452,31 @@ void cli_frontend::romident(const std::vector<std::string> &args)
//-------------------------------------------------
// find_command
// find_command
//-------------------------------------------------
const cli_frontend::info_command_struct *cli_frontend::find_command(const std::string &s)
{
static const info_command_struct s_info_commands[] =
{
{ CLICOMMAND_LISTXML, 0, -1, false, &cli_frontend::listxml, "[pattern] ..." },
{ CLICOMMAND_LISTFULL, 0, 1, false, &cli_frontend::listfull, "[system name]" },
{ CLICOMMAND_LISTSOURCE, 0, 1, false, &cli_frontend::listsource, "[system name]" },
{ CLICOMMAND_LISTCLONES, 0, 1, false, &cli_frontend::listclones, "[system name]" },
{ CLICOMMAND_LISTBROTHERS, 0, 1, false, &cli_frontend::listbrothers, "[system name]" },
{ CLICOMMAND_LISTCRC, 0, 1, false, &cli_frontend::listcrc, "[system name]" },
{ CLICOMMAND_LISTDEVICES, 0, 1, true, &cli_frontend::listdevices, "[system name]" },
{ CLICOMMAND_LISTSLOTS, 0, 1, true, &cli_frontend::listslots, "[system name]" },
{ CLICOMMAND_LISTROMS, 0, -1, false, &cli_frontend::listroms, "[pattern] ..." },
{ CLICOMMAND_LISTSAMPLES, 0, 1, false, &cli_frontend::listsamples, "[system name]" },
{ CLICOMMAND_VERIFYROMS, 0, -1, false, &cli_frontend::verifyroms, "[pattern] ..." },
{ CLICOMMAND_VERIFYSAMPLES, 0, 1, false, &cli_frontend::verifysamples, "[system name|*]" },
{ CLICOMMAND_LISTMEDIA, 0, 1, true, &cli_frontend::listmedia, "[system name]" },
{ CLICOMMAND_LISTSOFTWARE, 0, 1, false, &cli_frontend::listsoftware, "[system name]" },
{ CLICOMMAND_VERIFYSOFTWARE, 0, 1, false, &cli_frontend::verifysoftware, "[system name|*]" },
{ CLICOMMAND_ROMIDENT, 1, 1, false, &cli_frontend::romident, "(file or directory path)" },
{ CLICOMMAND_GETSOFTLIST, 0, 1, false, &cli_frontend::getsoftlist, "[system name|*]" },
{ CLICOMMAND_VERIFYSOFTLIST, 0, 1, false, &cli_frontend::verifysoftlist, "[system name|*]" }
{ CLICOMMAND_LISTXML, 0, -1, false, &cli_frontend::listxml, "[pattern] ..." },
{ CLICOMMAND_LISTFULL, 0, 1, false, &cli_frontend::listfull, "[system name]" },
{ CLICOMMAND_LISTSOURCE, 0, 1, false, &cli_frontend::listsource, "[system name]" },
{ CLICOMMAND_LISTCLONES, 0, 1, false, &cli_frontend::listclones, "[system name]" },
{ CLICOMMAND_LISTBROTHERS, 0, 1, false, &cli_frontend::listbrothers, "[system name]" },
{ CLICOMMAND_LISTCRC, 0, 1, false, &cli_frontend::listcrc, "[system name]" },
{ CLICOMMAND_LISTDEVICES, 0, 1, true, &cli_frontend::listdevices, "[system name]" },
{ CLICOMMAND_LISTSLOTS, 0, 1, true, &cli_frontend::listslots, "[system name]" },
{ CLICOMMAND_LISTROMS, 0, -1, false, &cli_frontend::listroms, "[pattern] ..." },
{ CLICOMMAND_LISTSAMPLES, 0, 1, false, &cli_frontend::listsamples, "[system name]" },
{ CLICOMMAND_VERIFYROMS, 0, -1, false, &cli_frontend::verifyroms, "[pattern] ..." },
{ CLICOMMAND_VERIFYSAMPLES, 0, 1, false, &cli_frontend::verifysamples, "[system name|*]" },
{ CLICOMMAND_LISTMEDIA, 0, 1, true, &cli_frontend::listmedia, "[system name]" },
{ CLICOMMAND_LISTSOFTWARE, 0, 1, false, &cli_frontend::listsoftware, "[system name]" },
{ CLICOMMAND_VERIFYSOFTWARE, 0, 1, false, &cli_frontend::verifysoftware, "[system name|*]" },
{ CLICOMMAND_ROMIDENT, 1, 1, false, &cli_frontend::romident, "(file or directory path)" },
{ CLICOMMAND_GETSOFTLIST, 0, 1, false, &cli_frontend::getsoftlist, "[system name|*]" },
{ CLICOMMAND_VERIFYSOFTLIST, 0, 1, false, &cli_frontend::verifysoftlist, "[system name|*]" }
};
for (const auto &info_command : s_info_commands)
@ -1489,7 +1489,7 @@ const cli_frontend::info_command_struct *cli_frontend::find_command(const std::s
//-------------------------------------------------
// parse_slot_options_for_auxverb
// parse_slot_options_for_auxverb
//-------------------------------------------------
bool cli_frontend::parse_slot_options_for_auxverb(const std::string &auxverb)

6
src/frontend/mame/ui/inifile.cpp
View File

@ -159,9 +159,9 @@ favorite_manager::favorite_manager(running_machine &machine, ui_options &moption
void favorite_manager::add_favorite_game(const game_driver *driver)
{
m_list.emplace(driver->type.fullname(),
ui_software_info{driver->name, driver->type.fullname(), "", "", "", 0, "", driver, "", "", "",
1, "", "", "", true});
m_list.emplace(driver->type.fullname(),
ui_software_info{driver->name, driver->type.fullname(), "", "", "", 0, "", driver, "", "", "",
1, "", "", "", true});
save_favorite_games();
}

18
src/frontend/mame/ui/selgame.cpp
View File

@ -872,15 +872,15 @@ void menu_select_game::inkey_select_favorite(const event *menu_event)
if (summary == media_auditor::CORRECT || summary == media_auditor::BEST_AVAILABLE || summary == media_auditor::NONE_NEEDED)
{
if ((ui_swinfo->driver->flags & MACHINE_TYPE_ARCADE) == 0)
{
for (software_list_device &swlistdev : software_list_device_iterator(enumerator.config()->root_device()))
if (!swlistdev.get_info().empty())
{
menu::stack_push<menu_select_software>(ui(), container(), ui_swinfo->driver);
return;
}
}
if ((ui_swinfo->driver->flags & MACHINE_TYPE_ARCADE) == 0)
{
for (software_list_device &swlistdev : software_list_device_iterator(enumerator.config()->root_device()))
if (!swlistdev.get_info().empty())
{
menu::stack_push<menu_select_software>(ui(), container(), ui_swinfo->driver);
return;
}
}
// if everything looks good, schedule the new driver
s_bios biosname;

30
src/frontend/mame/ui/slotopt.cpp
View File

@ -19,7 +19,7 @@
/***************************************************************************
UTILITY
UTILITY
***************************************************************************/
namespace {
@ -30,7 +30,7 @@ char DIVIDER[] = "------";
//-------------------------------------------------
// get_slot_length
// get_slot_length
//-------------------------------------------------
int get_slot_length(const device_slot_interface &slot)
@ -45,7 +45,7 @@ int get_slot_length(const device_slot_interface &slot)
//-------------------------------------------------
// get_slot_option
// get_slot_option
//-------------------------------------------------
const char *get_slot_option(device_slot_interface &slot, int index)
@ -66,16 +66,16 @@ const char *get_slot_option(device_slot_interface &slot, int index)
return "";
}
};
/***************************************************************************
SLOT MENU
SLOT MENU
***************************************************************************/
namespace ui {
//-------------------------------------------------
// menu_slot_devices constructor
// menu_slot_devices constructor
//-------------------------------------------------
menu_slot_devices::menu_slot_devices(mame_ui_manager &mui, render_container &container) : menu(mui, container)
@ -83,7 +83,7 @@ menu_slot_devices::menu_slot_devices(mame_ui_manager &mui, render_container &con
}
//-------------------------------------------------
// menu_slot_devices destructor
// menu_slot_devices destructor
//-------------------------------------------------
menu_slot_devices::~menu_slot_devices()
@ -92,8 +92,8 @@ menu_slot_devices::~menu_slot_devices()
//-------------------------------------------------
// get_current_option - returns the current
// slot option
// get_current_option - returns the current
// slot option
//-------------------------------------------------
device_slot_option *menu_slot_devices::get_current_option(device_slot_interface &slot) const
@ -117,7 +117,7 @@ device_slot_option *menu_slot_devices::get_current_option(device_slot_interface
//-------------------------------------------------
// get_current_index
// get_current_index
//-------------------------------------------------
int menu_slot_devices::get_current_index(device_slot_interface &slot) const
@ -142,7 +142,7 @@ int menu_slot_devices::get_current_index(device_slot_interface &slot) const
//-------------------------------------------------
// get_next_slot
// get_next_slot
//-------------------------------------------------
const char *menu_slot_devices::get_next_slot(device_slot_interface &slot) const
@ -161,7 +161,7 @@ const char *menu_slot_devices::get_next_slot(device_slot_interface &slot) const
//-------------------------------------------------
// get_previous_slot
// get_previous_slot
//-------------------------------------------------
const char *menu_slot_devices::get_previous_slot(device_slot_interface &slot) const
@ -180,7 +180,7 @@ const char *menu_slot_devices::get_previous_slot(device_slot_interface &slot) co
//-------------------------------------------------
// set_slot_device
// set_slot_device
//-------------------------------------------------
void menu_slot_devices::set_slot_device(device_slot_interface &slot, const char *val)
@ -192,7 +192,7 @@ void menu_slot_devices::set_slot_device(device_slot_interface &slot, const char
//-------------------------------------------------
// populate
// populate
//-------------------------------------------------
void menu_slot_devices::populate(float &customtop, float &custombottom)
@ -226,7 +226,7 @@ void menu_slot_devices::populate(float &customtop, float &custombottom)
//-------------------------------------------------
// handle
// handle
//-------------------------------------------------
void menu_slot_devices::handle()

2
src/frontend/mame/ui/viewgfx.cpp
View File

@ -88,7 +88,7 @@ struct ui_gfx_state
int yoffs; // current Y offset
int zoom; // zoom factor
uint8_t rotate; // current rotation (orientation) value
uint32_t flags; // render flags
uint32_t flags; // render flags
} tilemap;
};

146
src/lib/formats/hpi_dsk.cpp
View File

@ -2,45 +2,45 @@
// copyright-holders: Ansgar Kückes, F. Ulivi
/*********************************************************************
hpi_dsk.cpp
hpi_dsk.cpp
HP9895A "HPI" disk images
HP9895A "HPI" disk images
CHS = 77/2/30
Sector size 256 bytes
Cell size 2 µs
Gap1 = 16 x 0x00
Gap2 = 34 x 0x00
Gap3 = ~490 x 0x00 (depends on actual rotation speed)
Sync = 4 x 0x00 + 4 x 0xff
ID AM = 0x0e clock + 0x70 data
Data AM = 0x0e clock + 0x50 data
DefectTrack AM = 0x0e clock + 0xf0 data
CRC-16 excludes address markers
MMFM/M2FM encoding (LS bit first)
CHS = 77/2/30
Sector size 256 bytes
Cell size 2 µs
Gap1 = 16 x 0x00
Gap2 = 34 x 0x00
Gap3 = ~490 x 0x00 (depends on actual rotation speed)
Sync = 4 x 0x00 + 4 x 0xff
ID AM = 0x0e clock + 0x70 data
Data AM = 0x0e clock + 0x50 data
DefectTrack AM = 0x0e clock + 0xf0 data
CRC-16 excludes address markers
MMFM/M2FM encoding (LS bit first)
The order of sectors in a track depends on the interleave factor
which is the distance (in number of sectors) between two consecutively
numbered sectors. Interleave factor is specified at formatting time.
The default factor is 7. The order of sectors for this factor is:
0, 13, 26, 9, 22, 5, 18, 1, 14, 27, 10, 23, 6, 19, 2,
15, 28, 11, 24, 7, 20, 3, 16, 29, 12, 25, 8, 21, 4, 17
The order of sectors in a track depends on the interleave factor
which is the distance (in number of sectors) between two consecutively
numbered sectors. Interleave factor is specified at formatting time.
The default factor is 7. The order of sectors for this factor is:
0, 13, 26, 9, 22, 5, 18, 1, 14, 27, 10, 23, 6, 19, 2,
15, 28, 11, 24, 7, 20, 3, 16, 29, 12, 25, 8, 21, 4, 17
<Track> := [Index hole]|Sector0|Gap2|Sector1|Gap2|...|Sector29|Gap3|
<Track> := [Index hole]|Sector0|Gap2|Sector1|Gap2|...|Sector29|Gap3|
<Sector> := ID field|Gap1|Data field
<Sector> := ID field|Gap1|Data field
<ID field> := Sync|ID AM|Track no.|Sector no.|CRC-16|0x00
<ID field> := Sync|ID AM|Track no.|Sector no.|CRC-16|0x00
<Data field> := Sync|Data AM|Data|CRC-16|0x00
<Data field> := Sync|Data AM|Data|CRC-16|0x00
This format is just a raw image of every sector on a HP-formatted
8" floppy disk. Files with this format have no header/trailer and
are exactly 1182720 bytes in size (30 sectors, 2 heads, 77 tracks,
256 bytes per sector). There's also a "reduced" version holding
just 75 cylinders.
When loading, the disk image is translated to MMFM encoding so
that it can be loaded into HP9895 emulator.
This format is just a raw image of every sector on a HP-formatted
8" floppy disk. Files with this format have no header/trailer and
are exactly 1182720 bytes in size (30 sectors, 2 heads, 77 tracks,
256 bytes per sector). There's also a "reduced" version holding
just 75 cylinders.
When loading, the disk image is translated to MMFM encoding so
that it can be loaded into HP9895 emulator.
*********************************************************************/
@ -51,20 +51,20 @@
#define VERBOSE 0
#define LOG(...) do { if (VERBOSE) printf(__VA_ARGS__); } while (false)
constexpr unsigned IL_OFFSET = 0x12; // Position of interleave factor in HPI image (2 bytes, big-endian)
constexpr unsigned DEFAULT_IL = 7; // Default interleaving factor
constexpr unsigned CELL_SIZE = 1200; // Bit cell size (1 µs)
constexpr uint8_t ID_AM = 0x70; // ID address mark
constexpr uint8_t DATA_AM = 0x50; // Data address mark
constexpr uint8_t AM_CLOCK = 0x0e; // Clock pattern of AM
constexpr uint32_t ID_CD_PATTERN= 0x55552a54; // C/D pattern of 0xff + ID_AM
constexpr uint32_t DATA_CD_PATTERN = 0x55552a44; // C/D pattern of 0xff + DATA_AM
constexpr unsigned GAP1_SIZE = 17; // Size of gap 1 (+1)
constexpr unsigned GAP2_SIZE = 35; // Size of gap 2 (+1)
constexpr int ID_DATA_OFFSET = 30 * 16; // Nominal distance (in cells) between ID & DATA AM
constexpr unsigned IL_OFFSET = 0x12; // Position of interleave factor in HPI image (2 bytes, big-endian)
constexpr unsigned DEFAULT_IL = 7; // Default interleaving factor
constexpr unsigned CELL_SIZE = 1200; // Bit cell size (1 µs)
constexpr uint8_t ID_AM = 0x70; // ID address mark
constexpr uint8_t DATA_AM = 0x50; // Data address mark
constexpr uint8_t AM_CLOCK = 0x0e; // Clock pattern of AM
constexpr uint32_t ID_CD_PATTERN= 0x55552a54; // C/D pattern of 0xff + ID_AM
constexpr uint32_t DATA_CD_PATTERN = 0x55552a44; // C/D pattern of 0xff + DATA_AM
constexpr unsigned GAP1_SIZE = 17; // Size of gap 1 (+1)
constexpr unsigned GAP2_SIZE = 35; // Size of gap 2 (+1)
constexpr int ID_DATA_OFFSET = 30 * 16; // Nominal distance (in cells) between ID & DATA AM
// Size of image file (holding 77 cylinders)
constexpr unsigned HPI_IMAGE_SIZE = HPI_TRACKS * HPI_HEADS * HPI_SECTORS * HPI_SECTOR_SIZE;
constexpr unsigned HPI_RED_TRACKS = 75; // Reduced number of tracks
constexpr unsigned HPI_RED_TRACKS = 75; // Reduced number of tracks
// Size of reduced image file (holding 75 cylinders)
constexpr unsigned HPI_RED_IMAGE_SIZE = HPI_RED_TRACKS * HPI_HEADS * HPI_SECTORS * HPI_SECTOR_SIZE;
@ -89,7 +89,7 @@ int hpi_format::identify(io_generic *io, uint32_t form_factor)
bool hpi_format::load(io_generic *io, uint32_t form_factor, floppy_image *image)
{
image->set_variant(floppy_image::DSDD); // We actually need to derive the variant from the image size depending on the form factor
image->set_variant(floppy_image::DSDD); // We actually need to derive the variant from the image size depending on the form factor
uint64_t size = io_generic_size(io);
unsigned cylinders;
@ -396,35 +396,35 @@ bool hpi_format::get_next_sector(const uint8_t *bitstream , int bitstream_size ,
// to move forward in the interleaved sector list when beginning a new track.
// There are different offsets for tracks on head 0 and tracks on head 1.
const uint8_t hpi_format::m_track_skew[ HPI_SECTORS - 1 ][ HPI_HEADS ] = {
{ 0x1c , 0x18 }, // Interleave = 1
{ 0x1c , 0x18 }, // Interleave = 2
{ 0x1c , 0x18 }, // Interleave = 3
{ 0x1d , 0x1a }, // Interleave = 4
{ 0x1a , 0x18 }, // Interleave = 5
{ 0x19 , 0x18 }, // Interleave = 6
{ 0x00 , 0x00 }, // Interleave = 7
{ 0x1d , 0x1d }, // Interleave = 8
{ 0x1c , 0x1c }, // Interleave = 9
{ 0x15 , 0x15 }, // Interleave = 10
{ 0x00 , 0x00 }, // Interleave = 11
{ 0x19 , 0x19 }, // Interleave = 12
{ 0x00 , 0x00 }, // Interleave = 13
{ 0x1d , 0x1d }, // Interleave = 14
{ 0x10 , 0x10 }, // Interleave = 15
{ 0x1d , 0x1d }, // Interleave = 16
{ 0x00 , 0x00 }, // Interleave = 17
{ 0x19 , 0x19 }, // Interleave = 18
{ 0x00 , 0x00 }, // Interleave = 19
{ 0x15 , 0x15 }, // Interleave = 20
{ 0x1c , 0x1c }, // Interleave = 21
{ 0x1d , 0x1d }, // Interleave = 22
{ 0x00 , 0x00 }, // Interleave = 23
{ 0x19 , 0x19 }, // Interleave = 24
{ 0x1a , 0x1a }, // Interleave = 25
{ 0x1d , 0x1d }, // Interleave = 26
{ 0x1c , 0x1c }, // Interleave = 27
{ 0x1d , 0x1d }, // Interleave = 28
{ 0x00 , 0x00 } // Interleave = 29
{ 0x1c , 0x18 }, // Interleave = 1
{ 0x1c , 0x18 }, // Interleave = 2
{ 0x1c , 0x18 }, // Interleave = 3
{ 0x1d , 0x1a }, // Interleave = 4
{ 0x1a , 0x18 }, // Interleave = 5
{ 0x19 , 0x18 }, // Interleave = 6
{ 0x00 , 0x00 }, // Interleave = 7
{ 0x1d , 0x1d }, // Interleave = 8
{ 0x1c , 0x1c }, // Interleave = 9
{ 0x15 , 0x15 }, // Interleave = 10
{ 0x00 , 0x00 }, // Interleave = 11
{ 0x19 , 0x19 }, // Interleave = 12
{ 0x00 , 0x00 }, // Interleave = 13
{ 0x1d , 0x1d }, // Interleave = 14
{ 0x10 , 0x10 }, // Interleave = 15
{ 0x1d , 0x1d }, // Interleave = 16
{ 0x00 , 0x00 }, // Interleave = 17
{ 0x19 , 0x19 }, // Interleave = 18
{ 0x00 , 0x00 }, // Interleave = 19
{ 0x15 , 0x15 }, // Interleave = 20
{ 0x1c , 0x1c }, // Interleave = 21
{ 0x1d , 0x1d }, // Interleave = 22
{ 0x00 , 0x00 }, // Interleave = 23
{ 0x19 , 0x19 }, // Interleave = 24
{ 0x1a , 0x1a }, // Interleave = 25
{ 0x1d , 0x1d }, // Interleave = 26
{ 0x1c , 0x1c }, // Interleave = 27
{ 0x1d , 0x1d }, // Interleave = 28
{ 0x00 , 0x00 } // Interleave = 29
};
const floppy_format_type FLOPPY_HPI_FORMAT = &floppy_image_format_creator<hpi_format>;

20
src/lib/formats/hpi_dsk.h
View File

@ -16,7 +16,7 @@
#include "flopimg.h"
// Geometry constants
constexpr unsigned HPI_TRACKS = 77;
constexpr unsigned HPI_TRACKS = 77;
constexpr unsigned HPI_HEADS = 2;
constexpr unsigned HPI_SECTORS = 30;
constexpr unsigned HPI_SECTOR_SIZE = 256;
@ -24,19 +24,19 @@ constexpr unsigned HPI_SECTOR_SIZE = 256;
class hpi_format : public floppy_image_format_t
{
public:
hpi_format();
hpi_format();
virtual int identify(io_generic *io, uint32_t form_factor) override;
virtual bool load(io_generic *io, uint32_t form_factor, floppy_image *image) override;
virtual bool save(io_generic *io, floppy_image *image) override;
virtual const char *name() const override;
virtual const char *description() const override;
virtual const char *extensions() const override;
virtual bool supports_save() const override;
virtual int identify(io_generic *io, uint32_t form_factor) override;
virtual bool load(io_generic *io, uint32_t form_factor, floppy_image *image) override;
virtual bool save(io_generic *io, floppy_image *image) override;
virtual const char *name() const override;
virtual const char *description() const override;
virtual const char *extensions() const override;
virtual bool supports_save() const override;
private:
typedef std::array<uint8_t , HPI_SECTORS> sector_list_t;
static void interleaved_sectors(unsigned il_factor , sector_list_t& sector_list);
static void interleaved_sectors(unsigned il_factor , sector_list_t& sector_list);
void write_mmfm_bit(std::vector<uint32_t> &buffer , bool data_bit , bool clock_bit);
void write_mmfm_byte(std::vector<uint32_t> &buffer , uint8_t data , uint8_t clock = 0);
void write_sync(std::vector<uint32_t> &buffer);

8
src/lib/netlist/plib/pfunction.h
View File

@ -83,10 +83,10 @@ namespace plib {
double lfsr_random()
{
std::uint16_t lsb = m_lfsr & 1;
m_lfsr >>= 1;
if (lsb)
m_lfsr ^= 0xB400u; // taps 15, 13, 12, 10
return static_cast<double>(m_lfsr) / static_cast<double>(0xffffu);
m_lfsr >>= 1;
if (lsb)
m_lfsr ^= 0xB400u; // taps 15, 13, 12, 10
return static_cast<double>(m_lfsr) / static_cast<double>(0xffffu);
}
std::vector<rpn_inst> m_precompiled; //!< precompiled expression

2
src/lib/util/options.h
View File

@ -202,7 +202,7 @@ private:
simple_list<entry> m_entrylist; // head of list of entries
std::unordered_map<std::string,entry *> m_entrymap; // map for fast lookup
std::string m_command; // command found
std::vector<std::string> m_command_arguments; // command arguments
std::vector<std::string> m_command_arguments; // command arguments
static const char *const s_option_unadorned[]; // array of unadorned option "names"
};

2
src/mame/audio/leland.h
View File

@ -103,7 +103,7 @@ class redline_80186_sound_device : public leland_80186_sound_device
public:
redline_80186_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_WRITE16_MEMBER(redline_dac_w);
protected:
virtual void device_add_mconfig(machine_config &config) override;
};

2
src/mame/audio/segasnd.h
View File

@ -131,7 +131,7 @@ private:
device_t *m_maincpu;
u8 m_in_latch; // input latch
u8 m_out_latch; // output latch
u8 m_last_p2_value; // current P2 output value
u8 m_last_p2_value; // current P2 output value
optional_shared_ptr<u8> m_program_ram; // pointer to program RAM
required_shared_ptr<u8> m_work_ram; // pointer to work RAM
u8 m_work_ram_bank; // currently selected work RAM bank

30
src/mame/drivers/accomm.cpp
View File

@ -7,8 +7,8 @@
Driver-in-progress by R. Belmont
Electron ULA emulation by Wilbert Pol
Main CPU: 65C816
Other chips: 6850 UART, 6522 VIA, SAA5240(video?), AM7910 modem, PCF0335(?)
Main CPU: 65C816
Other chips: 6850 UART, 6522 VIA, SAA5240(video?), AM7910 modem, PCF0335(?)
****************************************************************************/
@ -73,12 +73,12 @@ public:
virtual void machine_start() override;
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECLARE_WRITE8_MEMBER(b0_rom_disable_w);
DECLARE_READ8_MEMBER(read_keyboard);
DECLARE_READ8_MEMBER(sheila_r);
DECLARE_WRITE8_MEMBER(sheila_w);
DECLARE_PALETTE_INIT(accomm);
INTERRUPT_GEN_MEMBER(vbl_int);
@ -92,11 +92,11 @@ protected:
// driver_device overrides
virtual void video_start() override;
void interrupt_handler(int mode, int interrupt);
inline uint8_t read_vram( uint16_t addr );
inline void plot_pixel(bitmap_ind16 &bitmap, int x, int y, uint32_t color);
private:
ULA m_ula;
int m_map4[256];
@ -543,13 +543,13 @@ void accomm_state::interrupt_handler(int mode, int interrupt)
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, accomm_state )
AM_RANGE(0x000000, 0x007fff) AM_RAM
AM_RANGE(0x008000, 0x00ffff) AM_DEVICE("bank0dev", address_map_bank_device, amap8)
AM_RANGE(0x010000, 0x08ffff) AM_RAM // "576K RAM"
AM_RANGE(0x010000, 0x08ffff) AM_RAM // "576K RAM"
AM_RANGE(0x440000, 0x440000) AM_WRITE(b0_rom_disable_w)
AM_RANGE(0x450000, 0x457fff) AM_RAM AM_SHARE("vram")
AM_RANGE(0x458000, 0x45bfff) AM_READ(read_keyboard)
AM_RANGE(0x45fe00, 0x45feff) AM_READWRITE(sheila_r, sheila_w)
AM_RANGE(0x460000, 0x467fff) AM_RAM // nvram?
AM_RANGE(0x460000, 0x467fff) AM_RAM // nvram?
AM_RANGE(0xfc0000, 0xffffff) AM_ROM AM_REGION("maincpu", 0)
ADDRESS_MAP_END
@ -662,22 +662,22 @@ static MACHINE_CONFIG_START( accomm )
MCFG_PALETTE_ADD( "palette", 16 )
MCFG_PALETTE_INIT_OWNER(accomm_state, accomm)
MCFG_DEVICE_ADD("bank0dev", ADDRESS_MAP_BANK, 0)
MCFG_DEVICE_PROGRAM_MAP(b0dev_map)
MCFG_ADDRESS_MAP_BANK_ENDIANNESS(ENDIANNESS_LITTLE)
MCFG_ADDRESS_MAP_BANK_DATABUS_WIDTH(8)
MCFG_ADDRESS_MAP_BANK_STRIDE(0x8000)
MCFG_SPEAKER_STANDARD_MONO("mono")
MACHINE_CONFIG_END
ROM_START(accomm)
ROM_REGION(0x40000, "maincpu", 0) /* C68 / M37450 program ROM */
ROM_LOAD( "romv100-3.rom", 0x000000, 0x010000, CRC(bd87a157) SHA1(b9b9ed1aab9ffef2de988b2cfeac293afa11448a) )
ROM_LOAD( "romv100-2.rom", 0x010000, 0x010000, CRC(3438adee) SHA1(cd9d5522d9430cb2e1936210b77d2edd280f9419) )
ROM_LOAD( "romv100-1.rom", 0x020000, 0x010000, CRC(adc6a073) SHA1(3e87f21fafc1d69f33c5b541a20a98e82aacbfab) )
ROM_LOAD( "romv100-0.rom", 0x030000, 0x010000, CRC(6d22950d) SHA1(d4cbdccf8d2bc836fb81182b2ed344d7134fe5c9) )
ROM_LOAD( "romv100-3.rom", 0x000000, 0x010000, CRC(bd87a157) SHA1(b9b9ed1aab9ffef2de988b2cfeac293afa11448a) )
ROM_LOAD( "romv100-2.rom", 0x010000, 0x010000, CRC(3438adee) SHA1(cd9d5522d9430cb2e1936210b77d2edd280f9419) )
ROM_LOAD( "romv100-1.rom", 0x020000, 0x010000, CRC(adc6a073) SHA1(3e87f21fafc1d69f33c5b541a20a98e82aacbfab) )
ROM_LOAD( "romv100-0.rom", 0x030000, 0x010000, CRC(6d22950d) SHA1(d4cbdccf8d2bc836fb81182b2ed344d7134fe5c9) )
ROM_END
GAME( 1986, accomm, 0, accomm, accomm, accomm_state, 0, ROT0, "Acorn", "Acorn Communicator", MACHINE_NOT_WORKING )

82
src/mame/drivers/acommand.cpp
View File

@ -91,13 +91,13 @@ public:
DECLARE_WRITE16_MEMBER(output_7seg0_w);
DECLARE_WRITE16_MEMBER(output_7seg1_w);
DECLARE_WRITE16_MEMBER(output_lamps_w);
DECLARE_READ16_MEMBER(ext_devices_0_r);
DECLARE_WRITE16_MEMBER(ext_devices_0_w);
DECLARE_READ16_MEMBER(ext_devices_1_r);
DECLARE_WRITE16_MEMBER(ext_devices_1_w);
DECLARE_WRITE16_MEMBER(ext_devices_2_w);
DECLARE_WRITE16_MEMBER(ac_unk2_w);
TILEMAP_MAPPER_MEMBER(bg_scan);
virtual void video_start() override;
@ -237,40 +237,40 @@ WRITE16_MEMBER(acommand_state::output_7seg1_w)
// nybble 0,1: right 7seg 2nd,3rd digit
for (int i = 0; i < 2; i++)
output().set_digit_value(i+4, led_fill[m_7seg1 >> (i*4) & 0xf]);
// other: ?
}
/*
"Upper switch / Under Switch"
xx-x ---- xx-x xx-x
-x-- ---- ---- ---- Catch Switch - 3
--x- ---- ---- ---- Lower Switch - 3
---x ---- ---- ---- Upper Switch - 3
---- -x-- ---- ---- Catch Switch - 2
---- --x- ---- ---- Lower Switch - 2
---- ---x ---- ---- Upper Switch - 2
---- ---- -x-- ---- Catch Switch - 1
---- ---- --x- ---- Lower Switch - 1 (active high)
---- ---- ---x ---- Upper Switch - 1 (active low)
---- ---- ---- --xx Boss Door - Motor
state of UFO lanes:
0x0
0x1
0x2
0x3
0x4
0x5 ufo lane limit switch
0x6
0x7 astronaut switch or jamming
0x8
0x9 ufo lane switch or motor
0xa astronaut switch or jamming
0xb ufo lane switch or motor
0xc ""
0xd ufo lane limit switch
0xe astronaut switch or jamming
0xf ""
"Upper switch / Under Switch"
xx-x ---- xx-x xx-x
-x-- ---- ---- ---- Catch Switch - 3
--x- ---- ---- ---- Lower Switch - 3
---x ---- ---- ---- Upper Switch - 3
---- -x-- ---- ---- Catch Switch - 2
---- --x- ---- ---- Lower Switch - 2
---- ---x ---- ---- Upper Switch - 2
---- ---- -x-- ---- Catch Switch - 1
---- ---- --x- ---- Lower Switch - 1 (active high)
---- ---- ---x ---- Upper Switch - 1 (active low)
---- ---- ---- --xx Boss Door - Motor
state of UFO lanes:
0x0
0x1
0x2
0x3
0x4
0x5 ufo lane limit switch
0x6
0x7 astronaut switch or jamming
0x8
0x9 ufo lane switch or motor
0xa astronaut switch or jamming
0xb ufo lane switch or motor
0xc ""
0xd ufo lane limit switch
0xe astronaut switch or jamming
0xf ""
*/
READ16_MEMBER(acommand_state::ext_devices_0_r)
{
@ -278,20 +278,20 @@ READ16_MEMBER(acommand_state::ext_devices_0_r)
}
WRITE16_MEMBER(acommand_state::ext_devices_0_w)
{
{
printf("%04x EXT 0\n",data);
m_boss_door = data & 3;
m_ufo_lane[0] = (data >> 8) & 0x1f;
}
/*
---- ---- --x- ---- Lower Switch - 5
---- ---- ---x ---- Upper Switch - 5
---- ---- ---- --x- Lower Switch - 4 (active high)
---- ---- ---- ---x Upper Switch - 4 (active low)
---- ---- --x- ---- Lower Switch - 5
---- ---- ---x ---- Upper Switch - 5
---- ---- ---- --x- Lower Switch - 4 (active high)
---- ---- ---- ---x Upper Switch - 4 (active low)
*/
READ16_MEMBER(acommand_state::ext_devices_1_r)
{
{
return 0xffff;
}
@ -328,16 +328,16 @@ static ADDRESS_MAP_START( acommand_map, AS_PROGRAM, 16, acommand_state )
AM_RANGE(0x0f0000, 0x0f7fff) AM_RAM
AM_RANGE(0x0f8000, 0x0f8fff) AM_RAM AM_SHARE("spriteram")
AM_RANGE(0x0f9000, 0x0fffff) AM_RAM
AM_RANGE(0x100000, 0x100001) AM_WRITE8(oki_bank_w,0x00ff)
AM_RANGE(0x100008, 0x100009) AM_READ_PORT("IN0") AM_WRITE(output_lamps_w)
AM_RANGE(0x100014, 0x100017) AM_DEVREADWRITE8("oki1", okim6295_device, read, write, 0x00ff)
AM_RANGE(0x100018, 0x10001b) AM_DEVREADWRITE8("oki2", okim6295_device, read, write, 0x00ff)
AM_RANGE(0x100018, 0x10001b) AM_DEVREADWRITE8("oki2", okim6295_device, read, write, 0x00ff)
AM_RANGE(0x100040, 0x100041) AM_READWRITE(ext_devices_0_r,ext_devices_0_w)
AM_RANGE(0x100044, 0x100045) AM_READWRITE(ext_devices_1_r,ext_devices_1_w)
AM_RANGE(0x100048, 0x100049) AM_WRITE(ext_devices_2_w)
AM_RANGE(0x100050, 0x100051) AM_WRITE(output_7seg0_w)
AM_RANGE(0x100054, 0x100055) AM_WRITE(output_7seg1_w)
AM_RANGE(0x10005c, 0x10005d) AM_READ_PORT("DSW")

6
src/mame/drivers/apple2.cpp
View File

@ -1497,13 +1497,13 @@ ROM_END
ROM_START(craft2p)
ROM_REGION(0x1000,"gfx1",0)
ROM_LOAD( "gc.bin", 0x000000, 0x001000, CRC(93e4a754) SHA1(25f5f5fd1cbd763d43362e80de3acc5b34a25963) )
ROM_LOAD( "gc.bin", 0x000000, 0x001000, CRC(93e4a754) SHA1(25f5f5fd1cbd763d43362e80de3acc5b34a25963) )
ROM_REGION(0x4000,"maincpu",0)
// the d0 and e0 ROMs match the Unitron English ones, only f0 differs
ROM_LOAD ( "unitron_en.d0", 0x1000, 0x1000, CRC(24d73c7b) SHA1(d17a15868dc875c67061c95ec53a6b2699d3a425))
ROM_LOAD ( "unitron.e0" , 0x2000, 0x1000, CRC(0d494efd) SHA1(a2fd1223a3ca0cfee24a6afe66ea3c4c144dd98e))
ROM_LOAD ( "craftii-roms-f0-f7.bin", 0x3000, 0x1000, CRC(3f9dea08) SHA1(0e23bc884b8108675267d30b85b770066bdd94c9) )
ROM_LOAD ( "craftii-roms-f0-f7.bin", 0x3000, 0x1000, CRC(3f9dea08) SHA1(0e23bc884b8108675267d30b85b770066bdd94c9) )
ROM_END
ROM_START(uniap2pt)

4
src/mame/drivers/aristmk4.cpp
View File

@ -2305,8 +2305,8 @@ ROM_START( cgold2 )
ROM_LOAD("3vlsh076_a.u46", 0x08000, 0x2000, CRC(9580c2c2) SHA1(8a010fb9e349c066e1af53ed9aa659dbf7dbf17e))
ROM_LOAD("3vlsh076.u47", 0x0a000, 0x2000, CRC(f3cb845a) SHA1(288f7fe991bb60194a9ef9e8c9b2b18ebbd3b49c)) // matches cgold
// Note: cgold tiles are not a perfect match, cgold2 needs dollar and cent signs in tiles 0x64 and 0x65 respectively, which cgold does not have. This causes a garbled graphics in the denomination.
// Tiles 0x27F and 0x280 are cent and dollar signs, but these are unused by the game.
// Note: cgold tiles are not a perfect match, cgold2 needs dollar and cent signs in tiles 0x64 and 0x65 respectively, which cgold does not have. This causes a garbled graphics in the denomination.
// Tiles 0x27F and 0x280 are cent and dollar signs, but these are unused by the game.
/* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )

6
src/mame/drivers/aristmk5.cpp
View File

@ -114,7 +114,7 @@
Note: On 3-payline games, press Collect (A) and Bet 1 Credit (E) to clear the memory.
Optionally, the main door can be closed from this point on (press M again).
Step 2: Enter Operator Setup -> Machine Options
Usually, the Machine ID can be set to anything, however some games complain if it set to zero.
@ -144,7 +144,7 @@
These games have a slightly updated menu system reminiscent of MK6 games, complete with a black background instead of blue.
Step 1: Audit key in (F2), press Collect (A) and the first line button (S) together to clear the memory. The main door does not need to be open.
Step 2: Enter Operator Setup -> Machine Options
Step 3: Set everything up as above, open the Security Cage/Logic Door (L), and save the machine options (which now has its own spot on the menu instead of a dedicated button).
@ -3545,7 +3545,7 @@ ROM_END
ROM_START( goldpyrb )
ARISTOCRAT_MK5_BIOS
/*
Using New Zealand 0700474V BIOS until an Australian casino BIOS is dumped.
Using New Zealand 0700474V BIOS until an Australian casino BIOS is dumped.
note, this actually contains a 2nd checksum for the game, this is the base/bios check only.

16
src/mame/drivers/badlands.cpp
View File

@ -196,7 +196,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(badlands_state::sound_scanline)
{
int scanline = param;
//address_space &space = m_audiocpu->space(AS_PROGRAM);
// 32V
if ((scanline % 64) == 0 && scanline < 240)
m_soundcomm->sound_irq_gen(*m_audiocpu);
@ -509,7 +509,7 @@ static MACHINE_CONFIG_START( badlands )
MCFG_CPU_ADD("audiocpu", M6502, ATARI_CLOCK_14MHz/8)
MCFG_CPU_PROGRAM_MAP(audio_map)
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", badlands_state, sound_scanline, "screen", 0, 1)
MCFG_MACHINE_START_OVERRIDE(badlands_state,badlands)
MCFG_MACHINE_RESET_OVERRIDE(badlands_state,badlands)
@ -659,7 +659,7 @@ static ADDRESS_MAP_START( bootleg_map, AS_PROGRAM, 16, badlands_state )
AM_RANGE(0x400000, 0x401fff) AM_READWRITE8(bootleg_shared_r,bootleg_shared_w,0xffff)
AM_RANGE(0xfc0000, 0xfc0001) AM_READ(badlandsb_unk_r ) // sound comms?
AM_RANGE(0xfd0000, 0xfd1fff) AM_DEVREADWRITE8("eeprom", atari_eeprom_device, read, write, 0x00ff)
//AM_RANGE(0xfe0000, 0xfe1fff) AM_DEVWRITE("watchdog", watchdog_timer_device, reset_w)
AM_RANGE(0xfe2000, 0xfe3fff) AM_WRITE(video_int_ack_w)
@ -668,7 +668,7 @@ static ADDRESS_MAP_START( bootleg_map, AS_PROGRAM, 16, badlands_state )
AM_RANGE(0xfe4000, 0xfe4001) AM_READ_PORT("FE4000")
AM_RANGE(0xfe4004, 0xfe4005) AM_READ_PORT("P1")
AM_RANGE(0xfe4006, 0xfe4007) AM_READ_PORT("P2")
AM_RANGE(0xfe4008, 0xfe4009) AM_WRITE(badlands_pf_bank_w)
AM_RANGE(0xfe4008, 0xfe4009) AM_WRITE(badlands_pf_bank_w)
AM_RANGE(0xfe400c, 0xfe400d) AM_DEVWRITE("eeprom", atari_eeprom_device, unlock_write)
AM_RANGE(0xffc000, 0xffc3ff) AM_DEVREADWRITE8("palette", palette_device, read, write, 0xff00) AM_SHARE("palette")
@ -684,7 +684,7 @@ WRITE8_MEMBER(badlands_state::bootleg_main_irq_w)
}
static ADDRESS_MAP_START( bootleg_audio_map, AS_PROGRAM, 8, badlands_state )
AM_RANGE(0x0000, 0x1fff) AM_ROM AM_REGION("audiorom", 0)
AM_RANGE(0x0000, 0x1fff) AM_ROM AM_REGION("audiorom", 0)
AM_RANGE(0x2000, 0x3fff) AM_RAM AM_SHARE("b_sharedram")
AM_RANGE(0x4000, 0xcfff) AM_ROM AM_REGION("audiorom", 0x4000)
AM_RANGE(0xd400, 0xd400) AM_WRITE(bootleg_main_irq_w) // correct?
@ -710,7 +710,7 @@ static INPUT_PORTS_START( badlandsb )
PORT_MODIFY("FE6002")
PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY("AUDIO") /* audio port */
PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
@ -739,7 +739,7 @@ MACHINE_RESET_MEMBER(badlands_state,badlandsb)
{
// m_pedal_value[0] = m_pedal_value[1] = 0x80;
atarigen_state::machine_reset();
// scanline_timer_reset(*m_screen, 32);
// scanline_timer_reset(*m_screen, 32);
// memcpy(m_bank_base, &m_bank_source_data[0x0000], 0x1000);
}
@ -748,7 +748,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(badlands_state::bootleg_sound_scanline)
{
int scanline = param;
//address_space &space = m_audiocpu->space(AS_PROGRAM);
// 32V
if ((scanline % 64) == 0 && scanline < 240)
m_audiocpu->set_input_line(0, HOLD_LINE);

46
src/mame/drivers/battlex.cpp
View File

@ -21,37 +21,37 @@
Notes from Tomasz Slanina:
Tile decoding:
Tile decoding:
Each 8x8 BG tile is defined by:
- 1 bit 8x8 mask (one tile - 8 consecutive bytes - user2 region)
- 4+4 bits of color ( one tile - 8 consecutive bytes - user1 region)
- bit 3 of color = brightness ?
Each 8x8 BG tile is defined by:
- 1 bit 8x8 mask (one tile - 8 consecutive bytes - user2 region)
- 4+4 bits of color ( one tile - 8 consecutive bytes - user1 region)
- bit 3 of color = brightness ?
Single mask byte defines one row of tile pixels (FG or BG)
Single color byte defines color of FG (4 bits) and color of BG (4 bits)
of high (odd address in user1) or low (even address in user1)
nibbles of two tile pixels rows.
Single mask byte defines one row of tile pixels (FG or BG)
Single color byte defines color of FG (4 bits) and color of BG (4 bits)
of high (odd address in user1) or low (even address in user1)
nibbles of two tile pixels rows.
Here's an example (single tile):
Here's an example (single tile):
user2 user1 colors
----------------------------
00011100 0x32 33321144
00111100 0x41 33221144
00011100 0x32 33321144
00111100 0x41 33221144
00111100 0x32 33227744
00011000 0x47 33327444
00111100 0x32 33227744
00011000 0x47 33327444
00011000 0x56 55566555
00011000 0x56 55566555
00011000 0x84 88844777
00011000 0x74 88844777
00011000 0x56 55566555
00011000 0x56 55566555
00011000 0x84 88844777
00011000 0x74 88844777
TO DO :
@ -60,9 +60,9 @@
- game speed, its seems to be controlled by the IRQ's, how fast should it
be? firing seems frustratingly inconsistant (better with PORT_IMPULSE)
- BG tilemap palette bits (in most cases paltte 0 is used,
- BG tilemap palette bits (in most cases paltte 0 is used,
only highlights ( battlex logo, hiscore table) uses different palettes(?).
Current implementation gives different highlight colors than on real
Current implementation gives different highlight colors than on real
hardware (i.e. battlex logo should have yellow highights)
****************************************************************************
@ -402,7 +402,7 @@ DRIVER_INIT_MEMBER(battlex_state,battlex)
{
for (bit = 0; bit < 8 ; bit ++)
{
int color = colormask[(tile << 3 )| ((line&0x6) + (bit>3?1:0)) ];
int data = (gfxdata[(tile << 3 )| line] >> bit) & 1;

22
src/mame/drivers/bpmmicro.cpp
View File

@ -112,18 +112,18 @@
the lower rightmost ic, from left to right then top to bottom
and ic4 being the 93c46;
The 74hct164s are chained in this order and drive the following pins:
IC3: TODO: ADD ME
IC2: "
IC7: "
IC5: "
IC6: "
IC1: "
IC3: TODO: ADD ME
IC2: "
IC7: "
IC5: "
IC6: "
IC1: "
* Looking "through" the pcb from the top, the connectors are arranged
as such:
(note: J3 may be the wrong label, it could be J5)
___J3___ ___J4___
___J3___ ___J4___
GND -- |A32 C32| |A32 C32| -- GND
VCC -- |A31 C31| |A31 C31| <> J3 A03
J4 C30 <> |A30 C30| ?Relay control? |A30 C30| <> J3 A30
@ -333,10 +333,10 @@ static ADDRESS_MAP_START(i286_mem, AS_PROGRAM, 16, bpmmicro_state)
AM_RANGE(0x082200, 0x82201) AM_WRITE(unknown_82200_w)
AM_RANGE(0x084000, 0x84001) AM_READ(latch_84000_r) // GUESS: this is reading the octal latch
AM_RANGE(0x084002, 0x84003) AM_WRITE(latch_84002_w) // GUESS: this is clocking the CK pin on the octal latch from bit 0, dumping the contents of a serial in parallel out shifter into said latch
AM_RANGE(0x08400e, 0x8400f) AM_WRITE(unknown_8400e_w)
AM_RANGE(0x084018, 0x84019) AM_WRITE(unknown_84018_w)
AM_RANGE(0x08400e, 0x8400f) AM_WRITE(unknown_8400e_w)
AM_RANGE(0x084018, 0x84019) AM_WRITE(unknown_84018_w)
AM_RANGE(0x08401a, 0x8401b) AM_WRITE(unknown_8401a_w)
AM_RANGE(0x08401c, 0x8401d) AM_WRITE(eeprom_8401c_w)
AM_RANGE(0x08401c, 0x8401d) AM_WRITE(eeprom_8401c_w)
AM_RANGE(0x0f0000, 0x0fffff) AM_ROM AM_REGION("bios", 0x10000)
//AM_RANGE(0xfe0000, 0xffffff) AM_ROM AM_REGION("bios", 0) //?
AM_RANGE(0xfffff0, 0xffffff) AM_ROM AM_REGION("bios", 0x1fff0) //?

2
src/mame/drivers/cfx9850.cpp
View File

@ -154,7 +154,7 @@ READ8_MEMBER(cfx9850_state::in0_r)
static INPUT_PORTS_START(cfx9850)
PORT_START("KO1")
/* KI1 */ PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("AC On/Off") PORT_CODE(KEYCODE_BACKSLASH)
PORT_BIT(0xfe, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0xfe, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_START("KO2")
/* KI3 */ PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("EXE Enter") PORT_CODE(KEYCODE_ENTER)

2
src/mame/drivers/cham24.cpp
View File

@ -291,7 +291,7 @@ void cham24_state::machine_reset()
/* uses 8K swapping, all ROM!*/
m_ppu->space(AS_PROGRAM).install_read_bank(0x0000, 0x1fff, "bank1");
membank("bank1")->set_base(memregion("gfx1")->base());
m_nt_page[0] = m_nt_ram.get();
m_nt_page[1] = m_nt_ram.get() + 0x400;
m_nt_page[2] = m_nt_ram.get() + 0x800;

12
src/mame/drivers/chihiro.cpp
View File

@ -2284,7 +2284,7 @@ ROM_START( qofd3 )
// DVD QOD 3.02
// CDV-10026D
DISK_REGION( "gdrom" )
DISK_IMAGE_READONLY( "cdv-10026d", 0, SHA1(b079778f7837100a9b4fa2a536a4efc7817dd2d2) ) // DVD
DISK_IMAGE_READONLY( "cdv-10026d", 0, SHA1(b079778f7837100a9b4fa2a536a4efc7817dd2d2) ) // DVD
// satellite Chihiro security PIC is missing
ROM_REGION( 0x4000, "pic", ROMREGION_ERASEFF)
@ -2294,13 +2294,13 @@ ROM_START( qofd3 )
// CD QOD3 VERSION UPDATE
// CDP-10062
DISK_REGION("update")
DISK_IMAGE_READONLY( "cdp-10062", 0, SHA1(abe337cb8782155c4cb92895ba22454a175d479d) ) // CD
DISK_IMAGE_READONLY( "cdp-10062", 0, SHA1(abe337cb8782155c4cb92895ba22454a175d479d) ) // CD
// "Quest of D Ver. 2.0"
// DVD QOD CHECK DISC
// CDV-10028
DISK_REGION("check")
DISK_IMAGE_READONLY( "cdv-10028", 0, SHA1(9f0f64cb4278cf51a42a21f880cda82b585c63f6) ) // DVD
DISK_IMAGE_READONLY( "cdv-10028", 0, SHA1(9f0f64cb4278cf51a42a21f880cda82b585c63f6) ) // DVD
ROM_END
ROM_START( gundcb83 )
@ -2336,7 +2336,7 @@ ROM_START( qofdtbk )
// DVD QOD VS
// CDV-10035B
DISK_REGION( "gdrom" )
DISK_IMAGE_READONLY( "cdv-10035b", 0, SHA1(710776b88e7403193c1e0889bbd2d15fc8a92880) ) // DVD
DISK_IMAGE_READONLY( "cdv-10035b", 0, SHA1(710776b88e7403193c1e0889bbd2d15fc8a92880) ) // DVD
// satellite Chihiro security PIC
ROM_REGION( 0x4000, "pic", ROMREGION_ERASEFF)
@ -2348,13 +2348,13 @@ ROM_START( qofdtbk )
// CD QOD VS VERSION UPDATE
// CDP-10078
DISK_REGION("update")
DISK_IMAGE_READONLY( "cdp-10078", 0, SHA1(f7dde6a95c8b9087f984f92248c22a3b148ef645) ) // CD
DISK_IMAGE_READONLY( "cdp-10078", 0, SHA1(f7dde6a95c8b9087f984f92248c22a3b148ef645) ) // CD
// "Quest of D The Battle Kingdom"
// CD QOD SERVICE END
// CDP-10136
DISK_REGION("serv_end")
DISK_IMAGE_READONLY( "cdp-10136", 0, SHA1(3bfb6258bf9c08e1c8056183d02fe8aa3b65db49) ) // CD
DISK_IMAGE_READONLY( "cdp-10136", 0, SHA1(3bfb6258bf9c08e1c8056183d02fe8aa3b65db49) ) // CD
ROM_END
ROM_START( gundcb83b )

8
src/mame/drivers/chinsan.cpp
View File

@ -2,11 +2,11 @@
// copyright-holders: David Haywood, Uki, Dirk Best
/***************************************************************************
Ganbare Chinsan Ooshoubu (がんばれ珍さん！大勝負)
© 1987 Sanritsu
Ganbare Chinsan Ooshoubu (がんばれ珍さん！大勝負)
© 1987 Sanritsu
Kiki-Ippatsu Mayumi-chan (危機一髪真由美ちゃん)
© 1988 Victory L.L.C. (developed by Sanritsu)
Kiki-Ippatsu Mayumi-chan (危機一髪真由美ちゃん)
© 1988 Victory L.L.C. (developed by Sanritsu)
TODO:
- Figure out the rest of the dip switches

2
src/mame/drivers/clshroad.cpp
View File

@ -35,7 +35,7 @@ TODO:
#include "speaker.h"
/* unknown divider, assume /5 */
#define MAIN_CLOCK XTAL_18_432MHz/5
#define MAIN_CLOCK XTAL_18_432MHz/5
void clshroad_state::machine_reset()
{

54
src/mame/drivers/cobra.cpp
View File

@ -499,7 +499,7 @@ public:
//DECLARE_WRITE_LINE_MEMBER(coin_2_w);
static void static_set_main_board(device_t &device, bool enable);
void increase_coin_counter(uint8_t which);
protected:
virtual bool switches(uint8_t *&buf, uint8_t count_players, uint8_t bytes_per_switch) override;
virtual bool coin_counters(uint8_t *&buf, uint8_t count) override;
@ -550,32 +550,32 @@ void cobra_jvs::increase_coin_counter(uint8_t which)
// TODO: this certainly isn't correct, all three JVS points to the same capabilities!
void cobra_jvs::function_list(uint8_t *&buf)
{
{
if(this->is_main_board == false)
return;
// SW input - 2 players, 13 bits
*buf++ = 0x01;
*buf++ = 2;
*buf++ = 13;
*buf++ = 0x01;
*buf++ = 2;
*buf++ = 13;
*buf++ = 0;
// Coin input - 2 slots
*buf++ = 0x02;
*buf++ = 2;
*buf++ = 0;
*buf++ = 0x02;
*buf++ = 2;
*buf++ = 0;
*buf++ = 0;
// Analog input - 8 channels
*buf++ = 0x03;
*buf++ = 8;
*buf++ = 16;
*buf++ = 0x03;
*buf++ = 8;
*buf++ = 16;
*buf++ = 0;
// Driver out - 6 channels
*buf++ = 0x12;
*buf++ = 6;
*buf++ = 0;
*buf++ = 0x12;
*buf++ = 6;
*buf++ = 0;
*buf++ = 0;
}
@ -609,15 +609,15 @@ bool cobra_jvs::coin_counters(uint8_t *&buf, uint8_t count)
#if LOG_JVS
printf("jvs coin counter read: count %d\n", count);
#endif
if(this->is_main_board == false)
return false;
//printf("recv %04x\n",m_coin_counter[0]);
if (count > 2)
return false;
*buf++ = m_coin_counter[0] >> 8; *buf++ = m_coin_counter[0];
if(count > 1)
@ -717,7 +717,7 @@ public:
required_device<k001604_device> m_k001604;
required_device<cobra_jvs> m_jvs1;
required_device<cobra_jvs> m_jvs2;
required_device<cobra_jvs> m_jvs3;
required_device<cobra_jvs> m_jvs3;
required_device<ata_interface_device> m_ata;
required_device<screen_device> m_screen;
required_device<palette_device> m_palette;
@ -3223,7 +3223,7 @@ INPUT_PORTS_START( cobra )
PORT_START("P1")
PORT_BIT( 0x8000, IP_ACTIVE_HIGH, IPT_START1 )
PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_SERVICE1 )
PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_SERVICE1 )
PORT_BIT( 0x2000, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
@ -3251,11 +3251,11 @@ INPUT_PORTS_START( cobra )
PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_NAME("P2 Guard")
PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_UNUSED )
PORT_START("COINS")
PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_COIN1) PORT_CHANGED_MEMBER(DEVICE_SELF, cobra_state,coin_inserted, 0)//PORT_WRITE_LINE_DEVICE_MEMBER("cobra_jvs1", cobra_jvs, coin_1_w)

2
src/mame/drivers/cps1.cpp
View File

@ -10813,7 +10813,7 @@ ROM_END
ROM_START( dinoa ) // only 22 and 23 in the romset. Seems to come from an official capcom board but no PCB scans / pics available.
ROM_REGION( CODE_SIZE, "maincpu", 0 ) /* 68000 code */
ROM_LOAD16_WORD_SWAP( "23.bin", 0x000000, 0x80000, CRC(f477f7a0) SHA1(bad4979093ced8ae09273454c80de704b798e590) )
ROM_LOAD16_WORD_SWAP( "23.bin", 0x000000, 0x80000, CRC(f477f7a0) SHA1(bad4979093ced8ae09273454c80de704b798e590) )
ROM_LOAD16_WORD_SWAP( "22.bin", 0x080000, 0x80000, CRC(1e534ca5) SHA1(8233a1a5de2a1fdd2b1c2b8616eda29db4be725a) )
ROM_LOAD16_WORD_SWAP( "cdj_21a.6f", 0x100000, 0x80000, CRC(66d23de2) SHA1(19b8a365f630411d524d055459020f4c8cf930f1) ) // == cde_21a.6f

2
src/mame/drivers/dunhuang.cpp
View File

@ -506,7 +506,7 @@ static ADDRESS_MAP_START( dunhuang_io_map, AS_IO, 8, dunhuang_state )
AM_RANGE( 0x0081, 0x0081 ) AM_DEVWRITE("ymsnd", ym2413_device, register_port_w)
AM_RANGE( 0x0089, 0x0089 ) AM_DEVWRITE("ymsnd", ym2413_device, data_port_w)
AM_RANGE( 0x0082, 0x0082 ) AM_DEVWRITE("oki", okim6295_device, write)
AM_RANGE( 0x0082, 0x0082 ) AM_DEVWRITE("oki", okim6295_device, write)
AM_RANGE( 0x0083, 0x0083 ) AM_DEVWRITE("ramdac", ramdac_device, index_w)
AM_RANGE( 0x008b, 0x008b ) AM_DEVWRITE("ramdac", ramdac_device, pal_w)

20
src/mame/drivers/epos.cpp
View File

@ -32,8 +32,8 @@
halves of the palette are identical, this is not an issue. See $039c.
The other games have a different color test, not using the busy loop.
- dealer/beastf/revngr84: "PSG registers not OK" in service mode thru
sound menu, internal ay8910 not right?
- dealer/beastf/revngr84: "PSG registers not OK" in service mode thru
sound menu, internal ay8910 not right?
***************************************************************************/
@ -494,13 +494,13 @@ static MACHINE_CONFIG_START( dealer ) /* EPOS TRISTAR 9000 PCB */
MCFG_I8255_OUT_PORTC_CB(WRITE8(epos_state, i8255_portc_w))
MCFG_NVRAM_ADD_0FILL("nvram")
MCFG_MACHINE_START_OVERRIDE(epos_state,dealer)
// RAM-based palette instead of prom
MCFG_PALETTE_ADD_INIT_BLACK("palette", 32)
// MCFG_PALETTE_INIT_OWNER(epos_state, epos)
// MCFG_PALETTE_INIT_OWNER(epos_state, epos)
MCFG_WATCHDOG_ADD("watchdog")
/* video hardware */
@ -526,7 +526,7 @@ MACHINE_CONFIG_END
* ROM definitions
*
*************************************/
// Tristar 8000 boards:
ROM_START( megadon )
ROM_REGION( 0x10000, "maincpu", 0 )
@ -647,7 +647,7 @@ ROM_START( dealer )
ROM_LOAD( "u2.bin", 0x2000, 0x2000, CRC(726bbbd6) SHA1(3538f3d655899c2a0f984c43fb7545ea4be1b231) )
ROM_LOAD( "u3.bin", 0x4000, 0x2000, CRC(ab721455) SHA1(a477da0590e0431172baae972e765473e19dcbff) )
ROM_LOAD( "u4.bin", 0x6000, 0x2000, CRC(ddb903e4) SHA1(4c06a2048b1c6989c363b110a17c33180025b9c8) )
ROM_REGION( 0x1000, "nvram", 0)
ROM_LOAD( "dealer.nv", 0, 0x1000, CRC(a6f88459) SHA1(1deda2a71433c97fe3e5cb39defc285f4fa9c9b8) )
ROM_END
@ -717,7 +717,7 @@ ROM_START( revenger )
ROM_REGION( 0x0020, "proms", 0 ) /* this PROM not included in this dump, but assumed to be the same as above set */
ROM_LOAD( "dm74s288n.u60", 0x0000, 0x0020, CRC(be2b0641) SHA1(26982903b6d942af8e0a526412d8e01978d76420) ) // unknown purpose
ROM_REGION( 0x1000, "nvram", 0)
ROM_LOAD( "revngr84.nv", 0, 0x1000, CRC(a4417770) SHA1(92eded82db0810e7818d2f52a0497032f390fcc1) )
ROM_END
@ -728,7 +728,7 @@ ROM_START( beastf )
ROM_LOAD( "u_2__beastie__feastie__b09084.m5l2764k.u2", 0x2000, 0x2000, CRC(967405d8) SHA1(dd763be909e6966521b01ee878df9cef865c3b30) ) /* labeled as "U 2 // BEASTIE // FEASTIE // B09084" */
ROM_LOAD( "u_3__beastie__feastie__b09084.m5l2764k.u3", 0x4000, 0x2000, CRC(3edb5381) SHA1(14c236045e6df7a475c32222652860689d4f68ce) ) /* labeled as "U 3 // BEASTIE // FEASTIE // B09084" */
ROM_LOAD( "u_4__beastie__feastie__b09084.m5l2764k.u4", 0x6000, 0x2000, CRC(c8cd9640) SHA1(72da881b903ead873cc3f4df27646d1ffdd63c1c) ) /* labeled as "U 4 // BEASTIE // FEASTIE // B09084" */
ROM_REGION( 0x1000, "nvram", 0)
ROM_LOAD( "beastf.nv", 0, 0x1000, CRC(98017b09) SHA1(0e2b2071bb47fc179d5bc36ef9431a9d2727d36a) )
ROM_END

4
src/mame/drivers/eva.cpp
View File

@ -4,12 +4,12 @@
/***************************************************************************
Chrysler Electronic Voice Alert
11-function board "EVA-11"
- TMS1000 MCU (label 4230625-N1LL 32045B, die label 1000F M32045B)
- TMS5110A, TMS6125 CM73002
- 2 Nat.Semi. 20-pin SDIP, I/O expanders?
24-function board "EVA-24"
- COP400 family? MCU
- TMS5110A, TMS6100 CM63002 (have dump)

6
src/mame/drivers/exidy.cpp
View File

@ -1663,12 +1663,12 @@ GAME( 1981, mtrapb2, mtrap, mtrap, mtrap, exidy_state, mtrap, ROT0,
GAME( 1981, venture, 0, venture, venture, exidy_state, venture, ROT0, "Exidy", "Venture (version 5 set 1)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, venture2, venture, venture, venture, exidy_state, venture, ROT0, "Exidy", "Venture (version 5 set 2)", MACHINE_SUPPORTS_SAVE )
GAME( 1981, venture4, venture, venture, venture, exidy_state, venture, ROT0, "Exidy", "Venture (version 4)", MACHINE_SUPPORTS_SAVE )
GAME( 1982, teetert, 0, teetert, teetert, exidy_state, teetert, ROT0, "Exidy", "Teeter Torture (prototype)", MACHINE_SUPPORTS_SAVE )
GAME( 1982, pepper2, 0, pepper2, pepper2, exidy_state, pepper2, ROT0, "Exidy", "Pepper II (version 8)", MACHINE_SUPPORTS_SAVE )
GAME( 1982, pepper27, pepper2, pepper2, pepper2, exidy_state, pepper2, ROT0, "Exidy", "Pepper II (version 7)", MACHINE_SUPPORTS_SAVE )
GAME( 1982, hardhat, 0, pepper2, pepper2, exidy_state, pepper2, ROT0, "Exidy", "Hard Hat", MACHINE_SUPPORTS_SAVE )
GAME( 1983, fax, 0, fax, fax, exidy_state, fax, ROT0, "Exidy", "FAX", MACHINE_SUPPORTS_SAVE )

4
src/mame/drivers/fidelmcs48.cpp
View File

@ -71,12 +71,12 @@ WRITE8_MEMBER(fidelmcs48_state::sc6_mux_w)
{
// P24-P27: 7442 A-D
u16 sel = 1 << (data >> 4 & 0xf) & 0x3ff;
// 7442 0-8: input mux, 7seg data
m_inp_mux = sel & 0x1ff;
m_7seg_data = sel & 0x7f;
sc6_prepare_display();
// 7442 9: speaker out
m_dac->write(BIT(sel, 9));
}

38
src/mame/drivers/flower.cpp
View File

@ -5,13 +5,13 @@
Flower (c) 1986 Clarue
driver by Angelo Salese,
original "wiped off due of not anymore licenseable" driver by insideoutboy.
TODO:
- sprite zooming;
- some video glitches;
- $a000 outputs;
- sound, third z80 not hooked up;
original "wiped off due of not anymore licenseable" driver by insideoutboy.
TODO:
- sprite zooming;
- some video glitches;
- $a000 outputs;
- sound, third z80 not hooked up;
===============================================================================
@ -94,7 +94,7 @@ class flower_state : public driver_device
public:
flower_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"),
m_maincpu(*this, "maincpu"),
m_palette(*this, "palette"),
m_gfxdecode(*this, "gfxdecode"),
m_txvram(*this, "txvram"),
@ -115,8 +115,8 @@ public:
required_shared_ptr<uint8_t> m_bgscroll;
required_shared_ptr<uint8_t> m_fgscroll;
DECLARE_INPUT_CHANGED_MEMBER(coin_inserted);
DECLARE_INPUT_CHANGED_MEMBER(coin_inserted);
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
void legacy_tx_draw(bitmap_ind16 &bitmap,const rectangle &cliprect);
void legacy_layers_draw(bitmap_ind16 &bitmap,const rectangle &cliprect);
@ -166,13 +166,13 @@ void flower_state::legacy_layers_draw(bitmap_ind16 &bitmap,const rectangle &clip
int bg_ybase = m_bgscroll[0];
int fg_ybase = m_fgscroll[0];
int count;
for (count=0;count<16*16;count++)
{
int x = count % 16;
int y = count / 16;
uint8_t tile, attr;
tile = m_bgvram[count];
attr = m_bgvram[count+0x100];
if(attr & 0xf) // debug
@ -180,14 +180,14 @@ void flower_state::legacy_layers_draw(bitmap_ind16 &bitmap,const rectangle &clip
gfx_1->opaque(bitmap,cliprect, tile, attr >> 4, 0, 0, x*16, (y*16 - bg_ybase) & 0xff);
}
for (count=0;count<16*16;count++)
{
int x = count % 16;
int y = count / 16;
uint8_t tile, attr;
tile = m_fgvram[count];
attr = m_fgvram[count+0x100];
if(attr & 0xf)
@ -225,7 +225,7 @@ void flower_state::sprites_draw(bitmap_ind16 &bitmap,const rectangle &cliprect)
if(ysize == 2)
y-=16;
tile |= (attr & 1) << 6;
tile |= (attr & 8) << 4;
// TODO: zoom
@ -234,10 +234,10 @@ void flower_state::sprites_draw(bitmap_ind16 &bitmap,const rectangle &cliprect)
for(int xi=0;xi<xsize;xi++)
{
int tile_offs;
tile_offs = fx ? (xsize-xi-1) * 8 : xi*8;
tile_offs+= fy ? (ysize-yi-1) : yi;
gfx_2->transpen(bitmap,cliprect, tile+tile_offs, color, fx, fy, x+xi*16, y+yi*16, 15);
}
}
@ -270,7 +270,7 @@ ADDRESS_MAP_END
INPUT_CHANGED_MEMBER(flower_state::coin_inserted)
{
m_maincpu->set_input_line(INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
}
}
static INPUT_PORTS_START( flower )
PORT_START("P1")

8
src/mame/drivers/gaelco3d.cpp
View File

@ -1248,10 +1248,10 @@ ROM_START( footbpow )
ROM_LOAD( "fop_26.ic26", 0x0040000, 0x020000, CRC(b5877b68) SHA1(6f6f00da84d6d84895691266c2022fd4cd92f228) )
ROM_LOAD( "fop_27.ic27", 0x0060000, 0x020000, CRC(58309912) SHA1(eb62ccfd75fc168338d30bc30214e6f9f62e5e70) )
/* these 4 are copies of the previous 4 */
// ROM_LOAD( "fop_34.ic34", 0x0000000, 0x020000, CRC(3214ae1b) SHA1(3ae2fa28ef603b34b3c72313c513f200e2750b85) )
// ROM_LOAD( "fop_35.ic35", 0x0020000, 0x020000, CRC(69a8734c) SHA1(835db85371d8fbf0c1a2bc0c6109286f12c95794) )
// ROM_LOAD( "fop_36.ic36", 0x0040000, 0x020000, CRC(b5877b68) SHA1(6f6f00da84d6d84895691266c2022fd4cd92f228) )
// ROM_LOAD( "fop_37.ic37", 0x0060000, 0x020000, CRC(58309912) SHA1(eb62ccfd75fc168338d30bc30214e6f9f62e5e70) )
// ROM_LOAD( "fop_34.ic34", 0x0000000, 0x020000, CRC(3214ae1b) SHA1(3ae2fa28ef603b34b3c72313c513f200e2750b85) )
// ROM_LOAD( "fop_35.ic35", 0x0020000, 0x020000, CRC(69a8734c) SHA1(835db85371d8fbf0c1a2bc0c6109286f12c95794) )
// ROM_LOAD( "fop_36.ic36", 0x0040000, 0x020000, CRC(b5877b68) SHA1(6f6f00da84d6d84895691266c2022fd4cd92f228) )
// ROM_LOAD( "fop_37.ic37", 0x0060000, 0x020000, CRC(58309912) SHA1(eb62ccfd75fc168338d30bc30214e6f9f62e5e70) )
ROM_END

22
src/mame/drivers/goldstar.cpp
View File

@ -10557,18 +10557,18 @@ ROM_START( cmast99b )
ROM_END
/*
A-Plan
(C) 1993 WeaShing H.K.
A-Plan
(C) 1993 WeaShing H.K.
TMP91P640 @ 5MHz or 10MHz (or SDIP64 gfx chip of some kind?)
Z80 [clock probably 12/4]
8255 x2
YM2149 [clock probably 12/8]
12MHz and 10MHz XTALs
6116 2kx8 SRAM x4
BPROM 82S129 x2
8-position DIPSW x5
PCB number only says 'WEASHING'
TMP91P640 @ 5MHz or 10MHz (or SDIP64 gfx chip of some kind?)
Z80 [clock probably 12/4]
8255 x2
YM2149 [clock probably 12/8]
12MHz and 10MHz XTALs
6116 2kx8 SRAM x4
BPROM 82S129 x2
8-position DIPSW x5
PCB number only says 'WEASHING'
*/
ROM_START( aplan ) // Has "DYNA QL-1 V1.01" string.

8
src/mame/drivers/hp9845.cpp
View File

@ -1372,7 +1372,7 @@ INPUT_PORTS_END
hp9845ct_base_state::hp9845ct_base_state(const machine_config &mconfig, device_type type, const char *tag)
: hp9845_base_state(mconfig , type , tag),
m_io_softkeys(*this, "SOFTKEYS"),
m_io_softkeys(*this, "SOFTKEYS"),
m_lightpen_x(*this, "LIGHTPENX"),
m_lightpen_y(*this, "LIGHTPENY"),
m_lightpen_sw(*this, "GKEY")
@ -2787,7 +2787,7 @@ READ16_MEMBER(hp9845t_state::graphic_r)
}
// TODO: gsr/
if (m_gv_sk_status) {
BIT_SET(res, 1); // Softkey service request
BIT_SET(res, 1); // Softkey service request
}
BIT_SET(res, 9); // ID
BIT_SET(res, 11); // ID
@ -3258,10 +3258,10 @@ void hp9845t_state::advance_gv_fsm(bool ds , bool trigger)
break;
case 0xc: // load color mask (no effect, just for compatibility with 9845c), takes a single word as parameter
break;
case 0xe: // Y cursor position
case 0xe: // Y cursor position
m_gv_lyc = m_gv_data_w;
break;
case 0xf: // X cursor position
case 0xf: // X cursor position
m_gv_lxc = m_gv_data_w;
break;
default:

2
src/mame/drivers/interpro.cpp
View File

@ -299,7 +299,7 @@ ADDRESS_MAP_END
// these maps represent the real main, i/o and boot spaces of the system
static ADDRESS_MAP_START(interpro_main_map, AS_0, 32, interpro_state)
AM_RANGE(0x00000000, 0x00ffffff) AM_RAM // 16M RAM
AM_RANGE(0x40000000, 0x4000003f) AM_DEVICE(INTERPRO_MCGA_TAG, interpro_fmcc_device, map)
AM_RANGE(0x4f007e00, 0x4f007eff) AM_DEVICE(INTERPRO_SGA_TAG, interpro_sga_device, map)

44
src/mame/drivers/jclub2.cpp
View File

@ -288,7 +288,7 @@ uint8_t common_state::read_key(required_ioport_array<8> & key, uint8_t mask)
void common_state::debug_out()
{
// popmessage("OUT: %04X | %04X | %02X--", m_out1 >> 16, m_out2 >> 16, m_out3 >> 24);
// popmessage("OUT: %04X | %04X | %02X--", m_out1 >> 16, m_out2 >> 16, m_out3 >> 24);
}
/***************************************************************************
@ -346,18 +346,18 @@ void darkhors_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprec
for ( ; s < end; s += 8/4 )
{
int sx = (s[ 0 ] >> 16);
int sy = (s[ 0 ] & 0xffff);
int attr = (s[ 1 ] >> 16);
int code = (s[ 1 ] & 0xffff);
int sx = (s[ 0 ] >> 16);
int sy = (s[ 0 ] & 0xffff);
int attr = (s[ 1 ] >> 16);
int code = (s[ 1 ] & 0xffff);
// List end
if (sx & 0x8000)
break;
int flipx = 0;
int flipy = 0;
int color = (attr & 0x0200) ? (attr & 0x1ff) : (attr & 0x1ff) * 4;
int flipx = 0;
int flipy = 0;
int color = (attr & 0x0200) ? (attr & 0x1ff) : (attr & 0x1ff) * 4;
// Sign extend the position
sx = (sx & 0x1ff) - (sx & 0x200);
@ -570,9 +570,9 @@ static ADDRESS_MAP_START( jclub2o_map, AS_PROGRAM, 32, jclub2o_state )
AM_RANGE(0x490000, 0x490003) AM_WRITE(eeprom_s29290_w)
AM_RANGE(0x4a0000, 0x4a0003) AM_WRITE(out2_w)
// AM_RANGE(0x4a0010, 0x4a0013) AM_WRITE
// AM_RANGE(0x4a0020, 0x4a0023) AM_WRITE
// AM_RANGE(0x4a0030, 0x4a0033) AM_WRITE
// AM_RANGE(0x4a0010, 0x4a0013) AM_WRITE
// AM_RANGE(0x4a0020, 0x4a0023) AM_WRITE
// AM_RANGE(0x4a0030, 0x4a0033) AM_WRITE
// ST-0016
AM_RANGE(0x4b0000, 0x4b0003) AM_READWRITE(cmd1_word_r, cmd1_word_w)
@ -591,14 +591,14 @@ static ADDRESS_MAP_START( jclub2o_map, AS_PROGRAM, 32, jclub2o_state )
AM_RANGE(0x580008, 0x58000b) AM_READ_PORT("COIN")
AM_RANGE(0x58000c, 0x58000f) AM_WRITE(input_sel1_out3_w)
AM_RANGE(0x580010, 0x580013) AM_WRITE(out1_w)
// AM_RANGE(0x580018, 0x58001b) AM_WRITE
// AM_RANGE(0x58001c, 0x58001f) AM_WRITE
// AM_RANGE(0x580018, 0x58001b) AM_WRITE
// AM_RANGE(0x58001c, 0x58001f) AM_WRITE
AM_RANGE(0x580200, 0x580203) AM_DEVREAD16("watchdog", watchdog_timer_device, reset16_r, 0xffff0000)
AM_RANGE(0x580400, 0x580403) AM_READWRITE8(console_r, console_w, 0x00ff0000)
AM_RANGE(0x580420, 0x580423) AM_READ8(console_status_r, 0x00ff0000) //AM_WRITE
// AM_RANGE(0x580440, 0x580443) AM_WRITE
// AM_RANGE(0x580440, 0x580443) AM_WRITE
// ST-0020
AM_RANGE(0x600000, 0x67ffff) AM_DEVREADWRITE16( "st0020", st0020_device, sprram_r, sprram_w, 0xffffffff );
@ -706,14 +706,14 @@ static ADDRESS_MAP_START( jclub2_map, AS_PROGRAM, 32, jclub2_state )
AM_RANGE(0x580008, 0x58000b) AM_READ_PORT("COIN")
AM_RANGE(0x58000c, 0x58000f) AM_WRITE(input_sel1_out3_w)
AM_RANGE(0x580010, 0x580013) AM_WRITE(out1_w)
// AM_RANGE(0x580018, 0x58001b) AM_WRITE
// AM_RANGE(0x58001c, 0x58001f) AM_WRITE
// AM_RANGE(0x580018, 0x58001b) AM_WRITE
// AM_RANGE(0x58001c, 0x58001f) AM_WRITE
AM_RANGE(0x580200, 0x580203) AM_DEVREAD16("watchdog", watchdog_timer_device, reset16_r, 0xffff0000)
AM_RANGE(0x580400, 0x580403) AM_READWRITE8(console_r, console_w, 0x00ff0000)
AM_RANGE(0x580420, 0x580423) AM_READ8(console_status_r, 0x00ff0000) //AM_WRITE
// AM_RANGE(0x580440, 0x580443) AM_WRITE
// AM_RANGE(0x580440, 0x580443) AM_WRITE
// ST-0032
AM_RANGE(0x800000, 0x87ffff) AM_DEVREADWRITE16( "st0020", st0020_device, sprram_r, sprram_w, 0xffffffff );
@ -786,11 +786,11 @@ static ADDRESS_MAP_START( darkhors_map, AS_PROGRAM, 32, darkhors_state )
AM_RANGE(0x580004, 0x580007) AM_READ_PORT("COIN")
AM_RANGE(0x580008, 0x58000b) AM_READ(input_r)
AM_RANGE(0x58000c, 0x58000f) AM_WRITE(input_sel_w)
// AM_RANGE(0x580010, 0x580013) AM_WRITE
// AM_RANGE(0x580018, 0x58001b) AM_WRITE
// AM_RANGE(0x58001c, 0x58001f) AM_WRITE
// AM_RANGE(0x580010, 0x580013) AM_WRITE
// AM_RANGE(0x580018, 0x58001b) AM_WRITE
// AM_RANGE(0x58001c, 0x58001f) AM_WRITE
AM_RANGE(0x580084, 0x580087) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0xff000000)
// AM_RANGE(0x58008c, 0x58008f) AM_WRITE
// AM_RANGE(0x58008c, 0x58008f) AM_WRITE
AM_RANGE(0x580200, 0x580203) AM_DEVREAD16("watchdog", watchdog_timer_device, reset16_r, 0xffff0000)
AM_RANGE(0x580400, 0x580403) AM_READWRITE8(console_r, console_w, 0x00ff0000)
@ -1318,7 +1318,7 @@ ROM_START( jclub2v203 )
ROM_REGION16_BE( 0x100, "eeprom", 0 )
// 2.03X (JC26203 :00020400C5IK)
// ROM_LOAD16_WORD_SWAP( "eeprom-jclub2o.bin", 0x000, 0x100, CRC(dd1c88ec) SHA1(acb67e41e832f203361e0f93afcd4eaf963fd13e) ) // dump (SETA1997JC26203 )
// ROM_LOAD16_WORD_SWAP( "eeprom-jclub2o.bin", 0x000, 0x100, CRC(dd1c88ec) SHA1(acb67e41e832f203361e0f93afcd4eaf963fd13e) ) // dump (SETA1997JC26203 )
ROM_LOAD16_WORD_SWAP( "eeprom_jc2v203", 0x000, 0x100, CRC(c1bc58e7) SHA1(4670c94fd655d223f21254167e4334b81affdf8d) ) // from MAME (SETA1997JC26203 )
ROM_END

2
src/mame/drivers/kingobox.cpp
View File

@ -680,7 +680,7 @@ ROM_START( ringkingw )
ROM_LOAD( "18.f4", 0x00000, 0x4000, CRC(c057e28e) SHA1(714d8f14d55a070efcf205f8946269181bf2198b) )
ROM_LOAD( "19.h4", 0x04000, 0x4000, CRC(060253dd) SHA1(9a24fc6aca64262e935971f96b3a103df9711f20) )
ROM_LOAD( "20.j4", 0x08000, 0x4000, CRC(64c137a4) SHA1(e38adeb19e24357cc5581f0a3097c1d24914e25c) )
ROM_REGION( 0x2000, "gfx1", 0 )
ROM_LOAD( "13.d14", 0x00000, 0x2000, CRC(e36d4f4f) SHA1(059799b04a7d3e02c1a7f9a5b878d06afef305df) ) /* characters */

8
src/mame/drivers/luckgrln.cpp
View File

@ -860,7 +860,7 @@ static INPUT_PORTS_START( _7smash )
PORT_DIPSETTING( 0x40, "85%" )
PORT_DIPSETTING( 0x50, "90%" )
PORT_DIPSETTING( 0x60, "95%" )
PORT_DIPSETTING( 0x70, "105%" )
PORT_DIPSETTING( 0x70, "105%" )
PORT_DIPNAME( 0x80, 0x80, "Reset Mode" )
PORT_DIPSETTING( 0x80, "Auto" )
PORT_DIPSETTING( 0x00, "Manual" )
@ -887,13 +887,13 @@ static INPUT_PORTS_START( _7smash )
PORT_DIPNAME( 0x80, 0x80, "Alt. Test" )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("DSW3")
PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) )
PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_5C ) )
PORT_DIPSETTING( 0x00, "1 Coin/10 Credits" )
PORT_DIPSETTING( 0x00, "1 Coin/10 Credits" )
PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_B ) )
PORT_DIPSETTING( 0x0c, "10 Coins/1 Credit" )
PORT_DIPSETTING( 0x08, DEF_STR( 5C_1C ) )
@ -916,7 +916,7 @@ static INPUT_PORTS_START( _7smash )
PORT_DIPSETTING( 0xd0, "5 Coins/2 Credits" )
PORT_DIPSETTING( 0xe0, DEF_STR( 5C_1C ) )
PORT_DIPSETTING( 0xf0, "10 Coins/1 Credit" )
PORT_START("DSW4")
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )

24
src/mame/drivers/m14.cpp
View File

@ -91,10 +91,10 @@ public:
DECLARE_WRITE8_MEMBER(ball_x_w);
DECLARE_WRITE8_MEMBER(ball_y_w);
DECLARE_WRITE8_MEMBER(paddle_x_w);
DECLARE_INPUT_CHANGED_MEMBER(left_coin_inserted);
DECLARE_INPUT_CHANGED_MEMBER(right_coin_inserted);
TILE_GET_INFO_MEMBER(m14_get_tile_info);
void draw_ball_and_paddle(bitmap_ind16 &bitmap, const rectangle &cliprect);
virtual void machine_start() override;
@ -136,7 +136,7 @@ TILE_GET_INFO_MEMBER(m14_state::m14_get_tile_info)
int color = m_color_ram[tile_index] & 0x0f;
/* colorram & 0xf0 used but unknown purpose*/
SET_TILE_INFO_MEMBER(0,
code,
color,
@ -146,8 +146,8 @@ TILE_GET_INFO_MEMBER(m14_state::m14_get_tile_info)
void m14_state::video_start()
{
m_m14_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(FUNC(m14_state::m14_get_tile_info),this), TILEMAP_SCAN_ROWS, 8, 8, 32, 32);
}
void m14_state::draw_ball_and_paddle(bitmap_ind16 &bitmap, const rectangle &cliprect)
@ -158,7 +158,7 @@ void m14_state::draw_ball_and_paddle(bitmap_ind16 &bitmap, const rectangle &clip
const int xoffs = -8; // matches left-right wall bounces
const int p_ybase = 184; // matches ball bounce to paddle
int resx,resy;
// draw ball
for(xi=0;xi<4;xi++)
for(yi=0;yi<4;yi++)
@ -169,19 +169,19 @@ void m14_state::draw_ball_and_paddle(bitmap_ind16 &bitmap, const rectangle &clip
if(cliprect.contains(resx,resy))
bitmap.pix16(resy, resx) = m_palette->pen(white_pen);
}
// draw paddle
for(xi=0;xi<16;xi++)
for(yi=0;yi<4;yi++)
{
{
resx = flip_screen() ? 32*8-(m_paddlex+xi+xoffs) : (m_paddlex+xi+xoffs);
resy = flip_screen() ? 28*8-(p_ybase+yi) : p_ybase+yi;
if(cliprect.contains(resx,resy))
bitmap.pix16(resy, resx) = m_palette->pen(white_pen);
}
}
@ -321,7 +321,7 @@ static INPUT_PORTS_START( m14 )
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("IN1")
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("P1 Reach")

60
src/mame/drivers/minitel_2_rpic.cpp
View File

@ -2,47 +2,47 @@
// copyright-holders: Jean-Francois DEL NERO
/***************************************************************************
Minitel 2
Minitel 2
The Minitel is a small, on-line computer/Videotex terminal with multi-services that
can be connected to any French telephone line. This terminal was widely used in France
during the 80's and 90's.
The Minitel is a small, on-line computer/Videotex terminal with multi-services that
can be connected to any French telephone line. This terminal was widely used in France
during the 80's and 90's.
There are several modeles and version. Most of them are based on a mcu from the 8051 family
and a EF9345 like semi graphic video chip.
There are several modeles and version. Most of them are based on a mcu from the 8051 family
and a EF9345 like semi graphic video chip.
The current implementation is an Minitel 2 from "La RADIOTECHNIQUE PORTENSEIGNE" / RPIC (Philips)
You can found more informations about this hardware there :
http://hxc2001.free.fr/minitel
The current implementation is an Minitel 2 from "La RADIOTECHNIQUE PORTENSEIGNE" / RPIC (Philips)
You can found more informations about this hardware there :
http://hxc2001.free.fr/minitel
What is implemented and working :
What is implemented and working :
- Main MCU
- Video output
- Keyboard
- Main MCU
- Video output
- Keyboard
What is not yet implemented :
What is not yet implemented :
- Modem and sound output.
- The rear serial port.
- Parameters I2C 24C02 EEPROM.
- Modem and sound output.
- The rear serial port.
- Parameters I2C 24C02 EEPROM.
The original firmware and the experimental demo rom are currently both working.
The original firmware and the experimental demo rom are currently both working.
Please note the current special function keys assignation :
Please note the current special function keys assignation :
F1 -> Suite
F2 -> Retour
F3 -> Envoi
F4 -> Repetition
F5 -> TEL
F6 -> Guide
F7 -> Sommaire
F8 -> Connexion/Fin
F9 -> Fonction
F10-> ON / OFF
F1 -> Suite
F2 -> Retour
F3 -> Envoi
F4 -> Repetition
F5 -> TEL
F6 -> Guide
F7 -> Sommaire
F8 -> Connexion/Fin
F9 -> Fonction
F10-> ON / OFF
With the official ROM you need to press F10 to switch on the CRT.
With the official ROM you need to press F10 to switch on the CRT.
****************************************************************************/

2
src/mame/drivers/moo.cpp
View File

@ -840,7 +840,7 @@ ROM_START( buckyjaa ) /* Version JA */
/* main program */
ROM_LOAD16_BYTE( "173_ja_a01.05", 0x000000, 0x040000, CRC(0a32bde7) SHA1(17b7654fd69eb1b82e2949ef324ce599113360aa) ) /* JAA */
ROM_LOAD16_BYTE( "173_ja_a02.06", 0x000001, 0x040000, CRC(3e6f3955) SHA1(09ca39da8bdb37cb5517fe59cff5467c0623c380) ) /* JAA */
/* data */
ROM_LOAD16_BYTE( "173a03.t5", 0x200000, 0x20000, CRC(cd724026) SHA1(525445499604b713da4d8bc0a88e428654ceab95) )
ROM_LOAD16_BYTE( "173a04.t6", 0x200001, 0x20000, CRC(7dd54d6f) SHA1(b0ee8ec445b92254bca881eefd4449972fed506a) )

8
src/mame/drivers/namcos12.cpp
View File

@ -929,7 +929,7 @@ Notes:
Libero Grande (LG2/VER.A)
Tekken 3 (TET2/VER.A)
Ehrgeiz (EG2/VER.A)
Kart Duel (KTD1/VER.A)
Kart Duel (KTD1/VER.A)
Note that the games will also work without this PCB, minus the network functionality.
@ -1308,9 +1308,9 @@ static ADDRESS_MAP_START( namcos12_map, AS_PROGRAM, 32, namcos12_state )
AM_RANGE(0x1f1bff08, 0x1f1bff0f) AM_WRITENOP /* ?? */
AM_RANGE(0x1f700000, 0x1f70ffff) AM_WRITE16(dmaoffset_w, 0xffffffff) /* dma */
/* Network area */
// AM_RANGE(0x1f780000, 0x1f78ffff) AM_READWRITE16(link_sharedram_r, link_sharedram_w, 0xffffffff) /* H8 link CPU code */
// AM_RANGE(0x1f796000, 0x1f796003) AM_WRITE16(linkcpu_enable_w,0xffff0000)
// AM_RANGE(0x1f796020, 0x1f796023) AM_WRITE16(linkcpu_disable_w,0xffff0000)
// AM_RANGE(0x1f780000, 0x1f78ffff) AM_READWRITE16(link_sharedram_r, link_sharedram_w, 0xffffffff) /* H8 link CPU code */
// AM_RANGE(0x1f796000, 0x1f796003) AM_WRITE16(linkcpu_enable_w,0xffff0000)
// AM_RANGE(0x1f796020, 0x1f796023) AM_WRITE16(linkcpu_disable_w,0xffff0000)
AM_RANGE(0x1fa00000, 0x1fbfffff) AM_ROMBANK("bank1") /* banked roms */
ADDRESS_MAP_END

12
src/mame/drivers/naomi.cpp
View File

@ -4387,12 +4387,12 @@ ROM_START( mushi2k4 )
NAOMI_DEFAULT_EEPROM
ROM_REGION( 0x5800000, "rom_board", ROMREGION_ERASEFF)
ROM_LOAD( "epr-24241.ic22", 0x00000000, 0x00400000, CRC(ad9237ce) SHA1(f1010a30281ae55bbaece17b6c6a6e9e558d291f) )
ROM_LOAD( "mpr-24242.ic1", 0x00800000, 0x01000000, CRC(b4b81edb) SHA1(65f1527b276838b6b20e14c563fe5ef1e7d0ff27) )
ROM_LOAD( "mpr-24243.ic2", 0x01800000, 0x01000000, CRC(ff812290) SHA1(57835738ba7d47c999dfdef6c93d10b4f2c55cd4) )
ROM_LOAD( "mpr-24244.ic3", 0x02800000, 0x01000000, CRC(f6b97d21) SHA1(f45c868500fd6bf751c84546df40054510a673c9) )
ROM_LOAD( "mpr-24245.ic4", 0x03800000, 0x01000000, CRC(9dcee46f) SHA1(570bc01a2d5efdbec8403e68831a8eafe77ca31f) )
ROM_LOAD( "mpr-24246.ic5", 0x04800000, 0x01000000, CRC(fd97e2f5) SHA1(c9f7438049def346c9a2f2275110c5b385cb57f0) )
ROM_LOAD( "epr-24241.ic22", 0x00000000, 0x00400000, CRC(ad9237ce) SHA1(f1010a30281ae55bbaece17b6c6a6e9e558d291f) )
ROM_LOAD( "mpr-24242.ic1", 0x00800000, 0x01000000, CRC(b4b81edb) SHA1(65f1527b276838b6b20e14c563fe5ef1e7d0ff27) )
ROM_LOAD( "mpr-24243.ic2", 0x01800000, 0x01000000, CRC(ff812290) SHA1(57835738ba7d47c999dfdef6c93d10b4f2c55cd4) )
ROM_LOAD( "mpr-24244.ic3", 0x02800000, 0x01000000, CRC(f6b97d21) SHA1(f45c868500fd6bf751c84546df40054510a673c9) )
ROM_LOAD( "mpr-24245.ic4", 0x03800000, 0x01000000, CRC(9dcee46f) SHA1(570bc01a2d5efdbec8403e68831a8eafe77ca31f) )
ROM_LOAD( "mpr-24246.ic5", 0x04800000, 0x01000000, CRC(fd97e2f5) SHA1(c9f7438049def346c9a2f2275110c5b385cb57f0) )
ROM_PARAMETER( ":rom_board:segam2crypt:key", "-1") // 315-5881 not populated
ROM_END

50
src/mame/drivers/nes_vt.cpp
View File

@ -7,25 +7,25 @@
The 'VT' series are SoC solutions that implement enhanced NES hardware
there are several generations of these chips each adding additional
functionality.
This list is incomplete
VT01 - plain famiclone?
VT02 - banking scheme to access 32MB, Dual APU with PCM support
VT03 - above + 4bpp sprite / bg modes, enhanced palette
VT08 - ?
VT09 - 8bpp or direct colour modes?
VT16 - ?
VT18 - ?
(more)
VT1682 - NOT compatible with NES, different video system, sound CPU (4x
main CPU clock), optional internal ROM etc. (will need it's own
driver)
driver)
todo (VT03):
@ -147,7 +147,7 @@ void nes_vt_state::update_banks()
{
uint8_t bank;
// 8000-9fff
// 8000-9fff
if ((m_410x[0xb] & 0x40) == 0)
{
if ((m_410x[0x5] & 0x40) == 0)
@ -467,15 +467,15 @@ int nes_vt_state::calculate_real_video_address(int addr, int extended, int readt
| 201a & 0x7 | VA17 | VA16 | VA15 | VA14 | VA13 | VA12 | VA11 | VA10 |
|-----------------------------------------------------------------------------
| 0x0 | TVA17 | TVA16 | TVA15 | TVA14 | TVA13 | TVA12 | TVA11 | TVA10 |
| 0x1 | TV67 | TVA16 | TVA15 | TVA14 | TVA13 | TVA12 | TVA11 | TVA10 |
| 0x2 | RV67 | RV66 | TVA15 | TVA14 | TVA13 | TVA12 | TVA11 | TVA10 |
| 0x1 | TV67 | TVA16 | TVA15 | TVA14 | TVA13 | TVA12 | TVA11 | TVA10 |
| 0x2 | RV67 | RV66 | TVA15 | TVA14 | TVA13 | TVA12 | TVA11 | TVA10 |
| 0x3 | INVALID ***************************************************** |
| 0x4 | RV67 | RV66 | RV65 | TVA14 | TVA13 | TVA12 | TVA11 | TVA10 |
| 0x5 | RV67 | RV66 | RV65 | RV64 | TVA13 | TVA12 | TVA11 | TVA10 |
| 0x6 | RV67 | RV66 | RV65 | RV64 | RV63 | TVA12 | TVA11 | TVA10 |
| 0x4 | RV67 | RV66 | RV65 | TVA14 | TVA13 | TVA12 | TVA11 | TVA10 |
| 0x5 | RV67 | RV66 | RV65 | RV64 | TVA13 | TVA12 | TVA11 | TVA10 |
| 0x6 | RV67 | RV66 | RV65 | RV64 | RV63 | TVA12 | TVA11 | TVA10 |
| 0x7 | INVALID ***************************************************** |
------------------------------------------------------------------------------
RV67- RV63 = 0x201a & 0xf8
*/
@ -507,7 +507,7 @@ int nes_vt_state::calculate_real_video_address(int addr, int extended, int readt
int va20_va18 = (m_ppu->get_201x_reg(0x8) & 0x70) >> 4;
finaladdr = ((m_410x[0x0] & 0x0F) << 21) | (va20_va18 << 18) | (va17_va10 << 10) | (addr & 0x03ff);
if (is4bpp)
{
if (!alt_order)
@ -545,8 +545,8 @@ int nes_vt_state::calculate_real_video_address(int addr, int extended, int readt
case 1: // sprite display
is4bpp = m_ppu->get_201x_reg(0x0) & 0x04; // 16 colors or 16-pixel wide (both adjust the read)
eva2_eva0 |= m_ppu->get_speva2_speva0();
eva2_eva0 |= m_ppu->get_speva2_speva0();
break;
case 2: // CPU R/W access
@ -573,7 +573,7 @@ int nes_vt_state::calculate_real_video_address(int addr, int extended, int readt
return finaladdr;
}
/*
/*
nes_vt_state::vt03_8000_w notes
this is used by
@ -604,25 +604,25 @@ WRITE8_MEMBER(nes_vt_state::vt03_8000_w)
case 0x02: // hand?
//if ((data != 0x00) && (data != 0x2f) && (data != 0x31) && (data != 0x32) )
// logerror("%s vt03_8001_data_w latch %02x data %02x\n", machine().describe_context(), m_8000_addr_latch, data);
// logerror("%s vt03_8001_data_w latch %02x data %02x\n", machine().describe_context(), m_8000_addr_latch, data);
m_ppu->set_201x_reg(0x2, data);
break;
case 0x03: // dog?
//if ((data != 0x00) && (data != 0x2c) && (data != 0x2d) && (data != 0x2e) && (data != 0x2f) && (data != 0x32) && (data != 0x3d) && (data != 0x3e) && (data != 0x3f) && (data != 0x40) && (data != 0x41) && (data != 0x42) && (data != 0x43) && (data != 0x44) && (data != 0x45) && (data != 0x46))
// logerror("%s vt03_8001_data_w latch %02x data %02x\n", machine().describe_context(), m_8000_addr_latch, data);
// logerror("%s vt03_8001_data_w latch %02x data %02x\n", machine().describe_context(), m_8000_addr_latch, data);
m_ppu->set_201x_reg(0x3, data);
break;
case 0x04: // ball thrown
//if ((data != 0x00) && (data != 0x10) && (data != 0x12))
// logerror("%s vt03_8001_data_w latch %02x data %02x\n", machine().describe_context(), m_8000_addr_latch, data);
// logerror("%s vt03_8001_data_w latch %02x data %02x\n", machine().describe_context(), m_8000_addr_latch, data);
m_ppu->set_201x_reg(0x4, data);
break;
case 0x05: // ball thrown
//if ((data != 0x00) && (data != 0x11))
// logerror("%s vt03_8001_data_w latch %02x data %02x\n", machine().describe_context(), m_8000_addr_latch, data);
// logerror("%s vt03_8001_data_w latch %02x data %02x\n", machine().describe_context(), m_8000_addr_latch, data);
m_ppu->set_201x_reg(0x5, data);
break;
@ -713,9 +713,9 @@ static ADDRESS_MAP_START( nes_vt_map, AS_PROGRAM, 8, nes_vt_state )
AM_RANGE(0x2000, 0x3fff) AM_DEVREADWRITE("ppu", ppu2c0x_device, read, write) /* PPU registers */
AM_RANGE(0x4000, 0x4013) AM_DEVREADWRITE("apu", nesapu_device, read, write)
AM_RANGE(0x4014, 0x4014) AM_READ(psg1_4014_r) AM_WRITE(nes_vh_sprite_dma_w)
AM_RANGE(0x4014, 0x4014) AM_READ(psg1_4014_r) AM_WRITE(nes_vh_sprite_dma_w)
AM_RANGE(0x4015, 0x4015) AM_READWRITE(psg1_4015_r, psg1_4015_w) /* PSG status / first control register */
AM_RANGE(0x4016, 0x4016) AM_READWRITE(nes_in0_r, nes_in0_w)
AM_RANGE(0x4016, 0x4016) AM_READWRITE(nes_in0_r, nes_in0_w)
AM_RANGE(0x4017, 0x4017) AM_READ(nes_in1_r) AM_WRITE(psg1_4017_w)
AM_RANGE(0x4100, 0x410b) AM_WRITE(vt03_410x_w)
@ -739,7 +739,7 @@ ADDRESS_MAP_END
WRITE_LINE_MEMBER(nes_vt_state::apu_irq)
{
// set_input_line(N2A03_APU_IRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
// set_input_line(N2A03_APU_IRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
}
READ8_MEMBER(nes_vt_state::apu_read_mem)

4
src/mame/drivers/nmk16.cpp
View File

@ -7954,9 +7954,9 @@ GAME( 1990, vandykeb, vandyke, vandykeb, vandykeb, nmk16_state, vandy
GAME( 1991, blkheart, 0, blkheart, blkheart, nmk16_state, 0, ROT0, "UPL", "Black Heart", 0 )
GAME( 1991, blkheartj, blkheart, blkheart, blkheart, nmk16_state, 0, ROT0, "UPL", "Black Heart (Japan)", 0 )
GAME( 1991, acrobatm, 0, acrobatm, acrobatm, nmk16_state, 0, ROT270, "UPL (Taito license)", "Acrobat Mission", 0 )
GAME( 1992, strahl, 0, strahl, strahl, nmk16_state, 0, ROT0, "UPL", "Koutetsu Yousai Strahl (Japan set 1)", 0 )
GAME( 1992, strahla, strahl, strahl, strahl, nmk16_state, 0, ROT0, "UPL", "Koutetsu Yousai Strahl (Japan set 2)", 0 )

30
src/mame/drivers/ojankohs.cpp
View File

@ -2,27 +2,27 @@
// copyright-holders: Takahiro Nogi, Uki, Dirk Best
/***************************************************************************
Video System Mahjong hardware
Video System Mahjong hardware
Ojanko High School (お雀子ハイスクール)
© 1988 V-System Co.
Ojanko High School (お雀子ハイスクール)
© 1988 V-System Co.
Ojanko Yakata (勝ち抜き麻雀戦 お雀子館)
© 1986 V-System Co.
Ojanko Yakata (勝ち抜き麻雀戦 お雀子館)
© 1986 V-System Co.
Ojanko Yakata 2bankan (勝ち抜き麻雀戦 お雀子館2番館)
© 1987 V-System Co.
Ojanko Yakata 2bankan (勝ち抜き麻雀戦 お雀子館2番館)
© 1987 V-System Co.
Chinese Casino (チャイニーズカジノ)
© 1987 V-System Co.
Chinese Casino (チャイニーズカジノ)
© 1987 V-System Co.
Ojanko Club (お雀子クラブ)
© 1986 V-System Co.
Ojanko Club (お雀子クラブ)
© 1986 V-System Co.
TODO:
- Figure out the rest of the dip switches
- XTAL values/clocks
- Raw screen params
TODO:
- Figure out the rest of the dip switches
- XTAL values/clocks
- Raw screen params
***************************************************************************/

2
src/mame/drivers/pwrview.cpp
View File

@ -319,7 +319,7 @@ static ADDRESS_MAP_START(pwrview_fetch_map, AS_DECRYPTED_OPCODES, 16, pwrview_st
AM_RANGE(0x00000, 0x003ff) AM_READ(bank0_r)
AM_RANGE(0x00000, 0xf7fff) AM_RAM AM_SHARE("ram")
AM_RANGE(0xf8000, 0xfffff) AM_READ(fbios_r)
ADDRESS_MAP_END
ADDRESS_MAP_END
static ADDRESS_MAP_START(pwrview_io, AS_IO, 16, pwrview_state)
ADDRESS_MAP_UNMAP_HIGH

16
src/mame/drivers/royalmah.cpp
View File

@ -117,7 +117,7 @@ public:
m_audiocpu(*this, "audiocpu"),
m_rtc(*this, "rtc"),
m_soundlatch(*this, "soundlatch") { }
DECLARE_READ8_MEMBER(player_1_port_r);
DECLARE_READ8_MEMBER(player_2_port_r);
@ -4969,7 +4969,7 @@ ROM_START( jangtaku )
/*this is just a z80 Voice Player (and latches port I/O $00 with the main CPU)*/
ROM_REGION( 0x10000, "audiocpu", 0 )
ROM_LOAD( "1.a3", 0x00000, 0x8000, CRC(745162d3) SHA1(145269c60c87e772e6cbca40213d286ec05c9134) )
// THE Jantaku Voice Ver 1.0 (C) Copy Right 1986 DYNA Computer Service CO.,LTD. By Satoshi Kato
// THE Jantaku Voice Ver 1.0 (C) Copy Right 1986 DYNA Computer Service CO.,LTD. By Satoshi Kato
ROM_REGION( 0x0020, "proms", 0 )
ROM_LOAD( "82s123a.6k", 0x0000, 0x0020, CRC(e9598146) SHA1(619e7eb76cc3e882b5b3e55cdd23fe00b0a1fe45) )
@ -4977,8 +4977,8 @@ ROM_END
ROM_START( rkjanoh2 )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "pf_1", 0x000000, 0x001000, CRC(582e7eda) SHA1(96578b6142051d9452f23c8c1b674e2d8a4c3b62) )
ROM_LOAD( "pf_2", 0x001000, 0x001000, CRC(49e7dc40) SHA1(d6232a82b6927c79dd47884e5e2a6589c5524424) )
ROM_LOAD( "pf_1", 0x000000, 0x001000, CRC(582e7eda) SHA1(96578b6142051d9452f23c8c1b674e2d8a4c3b62) )
ROM_LOAD( "pf_2", 0x001000, 0x001000, CRC(49e7dc40) SHA1(d6232a82b6927c79dd47884e5e2a6589c5524424) )
ROM_LOAD( "pf_3_1", 0x002000, 0x001000, CRC(a1fdc929) SHA1(27cab4da2365bcf311d7f00d75e8db150183b108) )
ROM_LOAD( "pf_4l", 0x003000, 0x001000, CRC(c9ccdfa0) SHA1(ce6f2df7fb6739ddf0529bcae0596e4593ecc3e0) )
//ROM_LOAD( "pf_4_fewest", 0x003000, 0x001000, CRC(9a1650a0) SHA1(2da5957879d9f207721fc2f0d63dccc32850cbe2) )
@ -4986,12 +4986,12 @@ ROM_START( rkjanoh2 )
ROM_LOAD( "pf_5", 0x004000, 0x001000, CRC(8a858464) SHA1(55c71ce1c30e908dfc8c21237256dfbb75c55363) )
ROM_LOAD( "pf_6", 0x005000, 0x001000, CRC(5b649918) SHA1(191a221a515c261d90d7432443a7fbc8da71e7ac) )
ROM_LOAD( "pf_7", 0x006000, 0x001000, CRC(c4fdd2ac) SHA1(76c5645534b87dde87acfb4140d0f3ba18c95cd2) )
ROM_REGION( 0x002000, "gfx", 0 )
ROM_LOAD( "pf_8", 0x000000, 0x002000, CRC(c789e2b3) SHA1(33b5c8f22a1e337816a61fd2c91bc175a412d10e) )
ROM_REGION( 0x0020, "proms", 0 )
ROM_LOAD( "82s123", 0x000, 0x020, CRC(74a53e94) SHA1(ca9114bd9b2b07f5abe82616b41ae9fdb9537a4f) )
ROM_LOAD( "82s123", 0x000, 0x020, CRC(74a53e94) SHA1(ca9114bd9b2b07f5abe82616b41ae9fdb9537a4f) )
ROM_END
DRIVER_INIT_MEMBER(royalmah_state, tahjong)
@ -5068,7 +5068,7 @@ GAME( 1986, suzume, 0, suzume, suzume, royalmah_state, suzume, R
GAME( 1986, mjsiyoub, 0, royalmah, royalmah, royalmah_state, 0, ROT0, "Visco", "Mahjong Shiyou (Japan)", MACHINE_NOT_WORKING )
GAME( 1986, mjsenka, 0, royalmah, royalmah, royalmah_state, 0, ROT0, "Visco", "Mahjong Senka (Japan)", MACHINE_NOT_WORKING )
GAME( 1986, mjyarou, 0, mjyarou, mjyarou, royalmah_state, 0, ROT0, "Visco / Video System", "Mahjong Yarou [BET] (Japan, set 1)", MACHINE_IMPERFECT_GRAPHICS ) // girls aren't shown
GAME( 1986, mjyarou2, mjyarou, mjyarou, mjyarou, royalmah_state, 0, ROT0, "Visco / Video System", "Mahjong Yarou [BET] (Japan, set 2)", MACHINE_IMPERFECT_GRAPHICS ) // girls aren't shown
GAME( 1986, mjyarou2, mjyarou, mjyarou, mjyarou, royalmah_state, 0, ROT0, "Visco / Video System", "Mahjong Yarou [BET] (Japan, set 2)", MACHINE_IMPERFECT_GRAPHICS ) // girls aren't shown
GAME( 1986?, mjclub, 0, mjclub, mjclub, royalmah_state, tontonb, ROT0, "Xex", "Mahjong Club [BET] (Japan)", 0 )
GAME( 1987, mjdiplob, 0, mjdiplob, mjdiplob, royalmah_state, tontonb, ROT0, "Dynax", "Mahjong Diplomat [BET] (Japan)", 0 )
GAME( 1987, tontonb, 0, tontonb, tontonb, royalmah_state, tontonb, ROT0, "Dynax", "Tonton [BET] (Japan, set 1)", 0 )

6
src/mame/drivers/segas18.cpp
View File

@ -2915,9 +2915,9 @@ ROM_END
CPU: 68000
ROM Board: 171-5873B
game No. 833-7246-03
pcb No. 837-7248-01
rom No. 834-7247-02
game No. 833-7246-03
pcb No. 837-7248-01
rom No. 834-7247-02
*/
ROM_START( shdancer )
ROM_REGION( 0x80000, "maincpu", 0 ) // 68000 code

18
src/mame/drivers/shootaway2.cpp
View File

@ -6,10 +6,10 @@
Skeleton driver by R. Belmont
Main CPU: ROMless Mitsubishi M37450 rebadged as Namco C68 custom
I/O CPU: TMPZ84C011
Main CPU: ROMless Mitsubishi M37450 rebadged as Namco C68 custom
I/O CPU: TMPZ84C011
M37450 needs on-board timers implemented to go anywhere
M37450 needs on-board timers implemented to go anywhere
(see Mitsu '89 single-chip CPU databook on Bitsavers)
****************************************************************************/
@ -79,7 +79,7 @@ static MACHINE_CONFIG_START( m74 )
MCFG_CPU_ADD("maincpu", M37450, XTAL_8MHz) /* C68 @ 8.0MHz - main CPU */
MCFG_CPU_PROGRAM_MAP(c68_map)
MCFG_CPU_ADD("subcpu", TMPZ84C011, XTAL_12MHz / 3) /* Z84C011 @ 4 MHz - sub CPU */
MCFG_CPU_ADD("subcpu", TMPZ84C011, XTAL_12MHz / 3) /* Z84C011 @ 4 MHz - sub CPU */
MCFG_CPU_PROGRAM_MAP(sub_map)
MCFG_SCREEN_ADD("screen", RASTER)
@ -88,7 +88,7 @@ static MACHINE_CONFIG_START( m74 )
MCFG_SCREEN_UPDATE_DRIVER(m74_state, screen_update)
MCFG_SCREEN_SIZE(320, 240)
MCFG_SCREEN_VISIBLE_AREA(0, 319, 0, 239)
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_OKIM6295_ADD("oki", XTAL_1MHz, PIN7_HIGH)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
@ -96,13 +96,13 @@ MACHINE_CONFIG_END
ROM_START(shootaw2)
ROM_REGION(0x80000, "subcpu", 0) /* Z84C011 program ROM */
ROM_LOAD( "sas1_spr0.7f", 0x000000, 0x080000, CRC(3bc14ba3) SHA1(7a75281621f23107c5c3c1a09831be2f8bb93540) )
ROM_LOAD( "sas1_spr0.7f", 0x000000, 0x080000, CRC(3bc14ba3) SHA1(7a75281621f23107c5c3c1a09831be2f8bb93540) )
ROM_REGION(0x20000, "maincpu", 0) /* C68 / M37450 program ROM */
ROM_LOAD( "sas1_mpr0c.8l", 0x000000, 0x020000, CRC(21379550) SHA1(2f2b43ca526d1a77c80f81d0e1f22155d90f725d) )
ROM_LOAD( "sas1_mpr0c.8l", 0x000000, 0x020000, CRC(21379550) SHA1(2f2b43ca526d1a77c80f81d0e1f22155d90f725d) )
ROM_REGION(0x40000, "oki", 0)
ROM_LOAD( "unknown_label.5e", 0x000000, 0x040000, CRC(fa75e91e) SHA1(d06ca906135a3f23c1f0dadff75f940ea7ca0e4a) )
ROM_LOAD( "unknown_label.5e", 0x000000, 0x040000, CRC(fa75e91e) SHA1(d06ca906135a3f23c1f0dadff75f940ea7ca0e4a) )
ROM_END
GAME( 1996, shootaw2, 0, m74, m74, m74_state, 0, ROT0, "Namco", "Shoot Away II", MACHINE_NOT_WORKING )

26
src/mame/drivers/stv.cpp
View File

@ -141,8 +141,8 @@ WRITE8_MEMBER(stv_state::stv_ioga_w)
switch(offset)
{
case 0x07:
// if (data != m_system_output)
// logerror("OUT %02x\n", data);
// if (data != m_system_output)
// logerror("OUT %02x\n", data);
m_system_output = data;
/*Why does the BIOS tests these as ACTIVE HIGH? A program bug?*/
machine().bookkeeping().coin_counter_w(0,~data & 0x01);
@ -1698,15 +1698,15 @@ static INPUT_PORTS_START( patocar )
PORT_INCLUDE( stv )
PORT_MODIFY("PORTA")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 ) // hopper ?
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 ) // hopper ?
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("hopper", ticket_dispenser_device, line_r)
PORT_BIT( 0xfc, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY("PORTB")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 ) // ??
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON4 ) // Door switch ?
PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_BUTTON5 ) // ??
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_NAME("Medal")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 ) // ??
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON4 ) // Door switch ?
PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_BUTTON5 ) // ??
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_NAME("Medal")
PORT_BIT( 0xd0, IP_ACTIVE_LOW, IPT_UNUSED )
// TODO: sense/delta values seems wrong
@ -2821,11 +2821,11 @@ ROM_START( tatacot ) /* Must use Japan or Asia BIOS */
ROM_RELOAD ( 0x0100001, 0x0080000 )
ROM_RELOAD_PLAIN( 0x0200000, 0x0080000)
ROM_RELOAD_PLAIN( 0x0300000, 0x0080000)
// ROM_LOAD16_WORD_SWAP( "mpr18138.2", 0x0400000, 0x0400000, CRC(f5567049) SHA1(6eb35e4b5fbda39cf7e8c42b6a568bd53a364d6d) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18139.3", 0x0800000, 0x0400000, CRC(f36b4878) SHA1(e3f63c0046bd37b7ab02fb3865b8ebcf4cf68e75) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18140.4", 0x0c00000, 0x0400000, CRC(228850a0) SHA1(d83f7fa7df08407fa45a13661393679b88800805) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18141.5", 0x1000000, 0x0400000, CRC(b51eef36) SHA1(2745cba48dc410d6d31327b956886ec284b9eac3) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18142.6", 0x1400000, 0x0400000, CRC(cf259541) SHA1(51e2c8d16506d6074f6511112ec4b6b44bed4886) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18138.2", 0x0400000, 0x0400000, CRC(f5567049) SHA1(6eb35e4b5fbda39cf7e8c42b6a568bd53a364d6d) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18139.3", 0x0800000, 0x0400000, CRC(f36b4878) SHA1(e3f63c0046bd37b7ab02fb3865b8ebcf4cf68e75) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18140.4", 0x0c00000, 0x0400000, CRC(228850a0) SHA1(d83f7fa7df08407fa45a13661393679b88800805) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18141.5", 0x1000000, 0x0400000, CRC(b51eef36) SHA1(2745cba48dc410d6d31327b956886ec284b9eac3) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18142.6", 0x1400000, 0x0400000, CRC(cf259541) SHA1(51e2c8d16506d6074f6511112ec4b6b44bed4886) ) // good
ROM_LOAD16_WORD_SWAP( "mpr-18789.ic8", 0x1c00000, 0x0400000, CRC(b388616f) SHA1(0b2c5a547c3a6a8fb9f4ca54336cf6dc9adb8c6a) ) // good
ROM_LOAD16_WORD_SWAP( "mpr-18788.ic9", 0x2000000, 0x0400000, CRC(feae5867) SHA1(7d2e47d5ab18700a246d53fdb7872a905cdac55a) ) // good
@ -3549,7 +3549,7 @@ ROM_START( patocar )
ROM_LOAD16_WORD_SWAP( "ic24.bin", 0x0400000, 0x200000, CRC(cbbb687e) SHA1(cfc87ae6124f9978bb2432b98d77f0da07d020b7) )
ROM_LOAD16_WORD_SWAP( "ic26.bin", 0x0600000, 0x200000, CRC(91db9dbe) SHA1(8652fe45ce56633016403c75e8b3a7b77f279819) )
ROM_LOAD16_WORD_SWAP( "ic28.bin", 0x0800000, 0x200000, CRC(bff0cd9c) SHA1(3c62aa2d7f71bd6fb147fdcd8d99cd7815f3047e) )
ROM_LOAD16_WORD_SWAP( "ic30.bin", 0x0a00000, 0x200000, CRC(9a4109e5) SHA1(ba59caac5f5a80fc52c507d8a47f322a380aa9a1) ) // empty / FF filled
ROM_LOAD16_WORD_SWAP( "ic30.bin", 0x0a00000, 0x200000, CRC(9a4109e5) SHA1(ba59caac5f5a80fc52c507d8a47f322a380aa9a1) ) // empty / FF filled
ROM_REGION16_BE( 0x80, "eeprom", 0 ) // preconfigured to 1 player
ROM_LOAD( "patocar.nv", 0x0000, 0x0080, CRC(d9873ee8) SHA1(e74747816bba6745afd718b0beec67a884c6a31c) )

2
src/mame/drivers/tm990189.cpp
View File

@ -626,7 +626,7 @@ WRITE8_MEMBER( tm990189_state::video_joy_w )
// user tms9901 setup
static const tms9901_interface usr9901reset_param =
{
tms9901_device::INT1 | tms9901_device::INT2 | tms9901_device::INT3 | tms9901_device::INT4 | tms9901_device::INT5 | tms9901_device::INT6, // only input pins whose state is always known
tms9901_device::INT1 | tms9901_device::INT2 | tms9901_device::INT3 | tms9901_device::INT4 | tms9901_device::INT5 | tms9901_device::INT6, // only input pins whose state is always known
// Read handler. Covers all input lines (see tms9901.h)
DEVCB_NOOP,

4
src/mame/drivers/toypop.cpp
View File

@ -4,8 +4,8 @@
"Universal System 16" Hardware (c) 1983/1986 Namco
driver by Angelo Salese,
original "wiped off due of not anymore licenseable" driver by Edgardo E. Contini Salvan.
driver by Angelo Salese,
original "wiped off due of not anymore licenseable" driver by Edgardo E. Contini Salvan.
TODO:
- PAL is presumably inverted with address bit 11 (0x800) for 0x6000-0x7fff area

4
src/mame/drivers/vegas.cpp
View File

@ -993,8 +993,8 @@ static INPUT_PORTS_START( warfa )
PORT_DIPSETTING( 0xc000, "Standard Res 512x256" )
PORT_DIPSETTING( 0x4000, "Medium Res 512x384" )
PORT_DIPSETTING( 0x0000, "VGA Res 640x480" )
PORT_MODIFY("IN1")
PORT_MODIFY("IN1")
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_CODE(KEYCODE_J) PORT_NAME("Trigger")
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CODE(KEYCODE_K) PORT_NAME("Discard")
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CODE(KEYCODE_L) PORT_NAME("Jump")

8
src/mame/drivers/viper.cpp
View File

@ -86,7 +86,7 @@
mocapglf Security code error
mocapb,j Crash after self checks
p911 "Distribution error"
p911e,j,uc,kc Hangs at POST, with IRQ3 it crashes at first 3d frame
p911e,j,uc,kc Hangs at POST, with IRQ3 it crashes at first 3d frame
p9112 RTC self check bad
popn9 Doesn't boot: bad CHD?
sscopex/sogeki Security code error
@ -2242,10 +2242,10 @@ INPUT_PORTS_END
// TODO: left/right escape, 2nd service switch?
INPUT_PORTS_START( jpark3 )
PORT_INCLUDE( viper )
PORT_MODIFY("IN3")
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
PORT_MODIFY("IN4")
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P1 Gun Trigger") PORT_PLAYER(1)
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P2 Gun Trigger") PORT_PLAYER(2)
@ -2412,7 +2412,7 @@ ROM_START(ppp2nd)
ROM_LOAD("ds2430.u3", 0x00, 0x28, BAD_DUMP CRC(f1511505) SHA1(ed7cd9b2763b3e377df9663943160f9871f65105))
// byte 0x1e (0) JAA (1) AAA
// byte 0x1f (1) rental
ROM_REGION(0x2000, "m48t58", ROMREGION_ERASE00) /* M48T58 Timekeeper NVRAM */
DISK_REGION( "ata:0:hdd:image" )

4
src/mame/drivers/voyager.cpp
View File

@ -13,8 +13,8 @@ Motherboard is FIC AZIIEA with AMD Duron processor of unknown speed
Chipset: VIA KT133a with VT8363A Northbridge and VT82C686B Southbridge
Video: Jaton 3DForce2MX-32, based on Nvidia GeForce 2MX chipset w/32 MB of VRAM
I/O: JAMMA adapter board connects to parallel port, VGA out, audio out.
Labelled "MEGAJAMMA 101 REV A2" for the stand-up Voyager
Labelled "MEGAJAMMA 101 REV A2" for the stand-up Voyager
HDD for stand-up Voyager is a Maxtor D740X-6L 20 GB model.
Upright Voyager runs at 15 kHz standard res, sit-down at 24 kHz medium res.

4
src/mame/drivers/vp101.cpp
View File

@ -413,7 +413,7 @@ ROM_END
ROM_START(specfrce)
ROM_REGION(0x400000, "maincpu", 0) /* Boot ROM */
ROM_SYSTEM_BIOS(0, "default", "rev. 3.6")
ROMX_LOAD( "boot 3.6.u4.27c801", 0x000000, 0x100000, CRC(b1628dd9) SHA1(5970d31b0cf3d0c1ab4b10ee8e54d2696fafde24), ROM_BIOS(1) )
ROMX_LOAD( "boot 3.6.u4.27c801", 0x000000, 0x100000, CRC(b1628dd9) SHA1(5970d31b0cf3d0c1ab4b10ee8e54d2696fafde24), ROM_BIOS(1) )
ROM_SYSTEM_BIOS(1, "r35", "rev. 3.5")
ROMX_LOAD( "special_forces_boot_v3.5.u4", 0x000000, 0x100000, CRC(ae8dfdf0) SHA1(d64130e710d0c70095ad8ebd4e2194b8c461be4a), ROM_BIOS(2) ) /* Newer, but keep both in driver */
ROM_SYSTEM_BIOS(2, "r34", "rev. 3.4")
@ -429,7 +429,7 @@ ROM_END
ROM_START(specfrceo)
ROM_REGION(0x400000, "maincpu", 0) /* Boot ROM */
ROM_SYSTEM_BIOS(0, "default", "rev. 3.6")
ROMX_LOAD( "boot 3.6.u4.27c801", 0x000000, 0x100000, CRC(b1628dd9) SHA1(5970d31b0cf3d0c1ab4b10ee8e54d2696fafde24), ROM_BIOS(1) )
ROMX_LOAD( "boot 3.6.u4.27c801", 0x000000, 0x100000, CRC(b1628dd9) SHA1(5970d31b0cf3d0c1ab4b10ee8e54d2696fafde24), ROM_BIOS(1) )
ROM_SYSTEM_BIOS(1, "r35", "rev. 3.5")
ROMX_LOAD( "special_forces_boot_v3.5.u4", 0x000000, 0x100000, CRC(ae8dfdf0) SHA1(d64130e710d0c70095ad8ebd4e2194b8c461be4a), ROM_BIOS(2) ) /* Newer, but keep both in driver */
ROM_SYSTEM_BIOS(2, "r34", "rev. 3.4")

32
src/mame/drivers/xavix.cpp
View File

@ -5,10 +5,10 @@
Skeleton driver for XaviX TV PNP console and childs (Let's! Play TV Classic)
CPU is an M6502 derivative where opcode 0x22 has 3 bytes of operands.
Definitely not: 65C816 or Mitsu M740.
Definitely not: 65C816 or Mitsu M740.
Code at F34F is thus:
F34F: STA $6200,X
F352: INX
F353: BNE $F34F
@ -18,28 +18,28 @@
F361: SEC
F362: LDA #$CD
F364: SBC #$CA
later on
F3C9: UNK 00 E4 C4
TODO:
- identify CPU
- figure out ROM banking
Notes from http://www.videogameconsolelibrary.com/pg00-xavix.htm#page=reviews (thanks Guru!)
XaviXPORT arrived on the scene with 3 game titles (XaviX Tennis, XaviX Bowling and XaviX Baseball) using their
original XaviX Multiprocessor. This proprietary chip is reported to contain an 8-bit high speed central processing
unit (6502) at 21 MHz, picture processor, sound processor, DMA controller, 1K bytes high speed RAM, universal timer,
AD/Converter and I/O device control. Each cartridge comes with a wireless peripheral to be used with the game (Baseball Bat,
Tennis Racquet, etc.) that requires "AA" batteries. The XaviXPORT system retailed for $79.99 USD with the cartridges
XaviXPORT arrived on the scene with 3 game titles (XaviX Tennis, XaviX Bowling and XaviX Baseball) using their
original XaviX Multiprocessor. This proprietary chip is reported to contain an 8-bit high speed central processing
unit (6502) at 21 MHz, picture processor, sound processor, DMA controller, 1K bytes high speed RAM, universal timer,
AD/Converter and I/O device control. Each cartridge comes with a wireless peripheral to be used with the game (Baseball Bat,
Tennis Racquet, etc.) that requires "AA" batteries. The XaviXPORT system retailed for $79.99 USD with the cartridges
retailing for $49.99 USD.
The following year at CES 2005, SSD COMPANY LIMITED introduced two new XaviXPORT titles (XaviX Golf and XaviX Bass Fishing) each
containing the upgraded "Super XaviX". This new chip is said to sport a 16-bit high central processing unit (65816) at 43 MHz.
SSD COMPANY LIMITED is already working on their next chip called "XaviX II" that is said to be a 32-bit RISC processor
with 3D capabilities.
The following year at CES 2005, SSD COMPANY LIMITED introduced two new XaviXPORT titles (XaviX Golf and XaviX Bass Fishing) each
containing the upgraded "Super XaviX". This new chip is said to sport a 16-bit high central processing unit (65816) at 43 MHz.
SSD COMPANY LIMITED is already working on their next chip called "XaviX II" that is said to be a 32-bit RISC processor
with 3D capabilities.
***************************************************************************/

2
src/mame/includes/badlands.h
View File

@ -27,7 +27,7 @@ public:
required_device<tilemap_device> m_playfield_tilemap;
required_device<atari_motion_objects_device> m_mob;
optional_shared_ptr<uint8_t> m_b_sharedram;
uint8_t m_pedal_value[2];
uint8_t m_playfield_tile_bank;

4
src/mame/includes/saturn.h
View File

@ -161,8 +161,8 @@ public:
emu_timer *m_stv_rtc_timer;
uint8_t m_port_sel,m_mux_data;
uint8_t m_system_output;
uint8_t m_ioga_mode;
uint8_t m_ioga_portg;
uint8_t m_ioga_mode;
uint8_t m_ioga_portg;
uint16_t m_serial_tx;
required_device<sh2_device> m_maincpu;

2
src/mame/includes/segas32.h
View File

@ -328,7 +328,7 @@ public:
DECLARE_WRITE8_MEMBER(lamps1_w);
DECLARE_WRITE8_MEMBER(lamps2_w);
DECLARE_WRITE_LINE_MEMBER(scsi_irq_w);
DECLARE_WRITE_LINE_MEMBER(scsi_drq_w);
DECLARE_WRITE_LINE_MEMBER(scsi_drq_w);
protected:
virtual void device_add_mconfig(machine_config &config) override;

4
src/mame/includes/xbox_pci.h
View File

@ -30,7 +30,7 @@ private:
extern const device_type NV2A_HOST;
#define MCFG_NV2A_HOST_ADD(_tag, _cpu_tag) MCFG_PCI_HOST_ADD(_tag, NV2A_HOST, 0x10de02a5, 0, 0) \
#define MCFG_NV2A_HOST_ADD(_tag, _cpu_tag) MCFG_PCI_HOST_ADD(_tag, NV2A_HOST, 0x10de02a5, 0, 0) \
downcast<nv2a_host_device *>(device)->set_cpu_tag(_cpu_tag);
/*
@ -221,7 +221,7 @@ private:
extern const device_type MCPX_APU;
#define MCFG_MCPX_APU_ADD(_tag, _cpu_tag) MCFG_PCI_DEVICE_ADD(_tag, MCPX_APU, 0x10de01b0, 0, 0, 0) \
#define MCFG_MCPX_APU_ADD(_tag, _cpu_tag) MCFG_PCI_DEVICE_ADD(_tag, MCPX_APU, 0x10de01b0, 0, 0, 0) \
downcast<mcpx_apu_device *>(device)->set_cpu_tag(_cpu_tag);
/*

4
src/mame/layout/7smash.lay
View File

@ -52,10 +52,10 @@
<bounds x="0" y="0.2" width="1" height="0.6" />
</text>
</element>
<!-- ToDo: Two of the Dipswitches enable an alt control schemes where Odds and Bet use
different buttons and lamps, but this is not the default and is supported neither
here nor in the driver -->
here nor in the driver -->
<view name="Button Lamps">
<screen index="0">
<bounds left="0" top="0" right="4" bottom="3" />

942
src/mame/layout/jclub2.lay
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File diff suppressed because it is too large Load Diff

898
src/mame/layout/jclub2o.lay
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File diff suppressed because it is too large Load Diff

4
src/mame/machine/cammu.cpp
View File

@ -77,7 +77,7 @@ ADDRESS_MAP_END
DEVICE_ADDRESS_MAP_START(map, 32, cammu_c3_device)
// the first AM_NOP in each range is in fact the TLB in the C3 CAMMU
AM_RANGE(0x800, 0x8ff) AM_NOP
AM_RANGE(0x800, 0x8ff) AM_NOP
AM_RANGE(0x904, 0x907) AM_READWRITE(d_s_pdo_r, d_s_pdo_w)
AM_RANGE(0x908, 0x90b) AM_READWRITE(d_u_pdo_r, d_u_pdo_w)
AM_RANGE(0x910, 0x913) AM_READWRITE(d_fault_r, d_fault_w)
@ -281,7 +281,7 @@ READ32_MEMBER(cammu_device::data_r)
case 3:
return m_main_space->read_dword(ra, mem_mask);
case 4:
case 4:
return m_io_space->read_dword(ra, mem_mask);
case 5:

12
src/mame/machine/interpro_ioga.cpp
View File

@ -83,7 +83,7 @@ interpro_ioga_device::interpro_ioga_device(const machine_config &mconfig, const
static const char *interrupt_source[IOGA_INTERRUPT_COUNT] = {
// internal
"timer 2",
"timer 3",
"timer 3",
// external
"SCSI",
"floppy",
@ -446,11 +446,11 @@ IRQ_CALLBACK_MEMBER(interpro_ioga_device::inta_cb)
vector = m_hwicr[m_active_interrupt_number] & 0xff;
break;
case IOGA_INTERRUPT_SOFT_LO:
case IOGA_INTERRUPT_SOFT_LO:
vector = 0x8f + m_active_interrupt_number * 0x10;
break;
case IOGA_INTERRUPT_SOFT_HI:
case IOGA_INTERRUPT_SOFT_HI:
vector = m_swicr[m_active_interrupt_number] & 0xff;
break;
}
@ -597,7 +597,7 @@ WRITE8_MEMBER(interpro_ioga_device::softint_w)
}
WRITE8_MEMBER(interpro_ioga_device::nmictrl_w)
{
{
#if 0
// save the existing value
uint8_t previous = m_nmictrl;
@ -765,9 +765,9 @@ void interpro_ioga_device::dma_w(address_space &space, offs_t offset, u32 data,
// f = 1111
// 6 = 0101
// -> bit 0x4 = read/write?
// mask
// mask
// iogadiag test 7.0265
if (data & IOGA_DMA_CTRL_START)

2
src/mame/machine/interpro_ioga.h
View File

@ -78,7 +78,7 @@
#define IOGA_DMA_CTRL_Y 0x01000000 // turned off if either of two above are found
#define IOGA_DMA_CTRL_TCZERO 0x00000001
// DMA_ENABLE, INT_ENABLE,
// DMA_ENABLE, INT_ENABLE,
//#define IOGA_DMA_CTRL_START 0x63000800 // perhaps start a transfer? - maybe the 8 is the channel?
#define IOGA_DMA_CTRL_UNK1 0x60000000 // don't know yet

8
src/mame/machine/interpro_mcga.cpp
View File

@ -81,8 +81,8 @@ WRITE16_MEMBER(interpro_mcga_device::control_w)
// HACK: set or clear error status depending on ENMMBE bit
if (data & MCGA_CTRL_ENMMBE)
m_error |= MCGA_ERROR_VALID;
// else
// error &= ~MCGA_ERROR_VALID;
// else
// error &= ~MCGA_ERROR_VALID;
}
WRITE16_MEMBER(interpro_fmcc_device::control_w)
@ -92,6 +92,6 @@ WRITE16_MEMBER(interpro_fmcc_device::control_w)
// HACK: set or clear error status depending on ENMMBE bit
if (data & MCGA_CTRL_ENMMBE)
m_error |= MCGA_ERROR_VALID;
// else
// error &= ~MCGA_ERROR_VALID;
// else
// error &= ~MCGA_ERROR_VALID;
}

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