srcclean (nw)

This commit is contained in:
Vas Crabb 2017-05-28 13:40:48 +10:00
parent 4cce790d68
commit e892661905
113 changed files with 1793 additions and 1793 deletions

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@ -55,7 +55,7 @@ return ln.linenoise('\x1b[1;36m[MAME]\x1b[0m> ')
-- This function is called in a context where a keyword or a global
-- variable can be inserted. Local variables cannot be listed!
local function add_globals()
local function add_globals()
for _, k in ipairs(keywords) do
add(k)
end

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@ -62,9 +62,9 @@ project "netlist"
MAME_DIR .. "src/lib/netlist/plib/plists.h",
MAME_DIR .. "src/lib/netlist/plib/pdynlib.cpp",
MAME_DIR .. "src/lib/netlist/plib/pdynlib.h",
MAME_DIR .. "src/lib/netlist/plib/pmain.cpp",
MAME_DIR .. "src/lib/netlist/plib/pmain.h",
MAME_DIR .. "src/lib/netlist/plib/pomp.h",
MAME_DIR .. "src/lib/netlist/plib/pmain.cpp",
MAME_DIR .. "src/lib/netlist/plib/pmain.h",
MAME_DIR .. "src/lib/netlist/plib/pomp.h",
MAME_DIR .. "src/lib/netlist/plib/poptions.cpp",
MAME_DIR .. "src/lib/netlist/plib/poptions.h",
MAME_DIR .. "src/lib/netlist/plib/pparser.cpp",

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@ -1318,7 +1318,7 @@ files {
MAME_DIR .. "src/mame/machine/apricotkb.cpp",
MAME_DIR .. "src/mame/machine/apricotkb.h",
MAME_DIR .. "src/mame/drivers/victor9k.cpp",
-- MAME_DIR .. "src/mame/includes/victor9k.h",
-- MAME_DIR .. "src/mame/includes/victor9k.h",
MAME_DIR .. "src/mame/machine/victor9k_kb.cpp",
MAME_DIR .. "src/mame/machine/victor9k_kb.h",
MAME_DIR .. "src/mame/machine/victor9k_fdc.cpp",

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@ -2,7 +2,7 @@
// copyright-holders:Michael Zapf
/****************************************************************************
Connector from EVPC
Connector from EVPC
We need this for the TI-99/4A console; the SGCPU uses a separate line
in the PEB.

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@ -2,8 +2,8 @@
// copyright-holders:Michael Zapf
/****************************************************************************
Connector from EVPC
For details see evpcconn.cpp
Connector from EVPC
For details see evpcconn.cpp
****************************************************************************/
#ifndef MAME_BUS_TI99_INTERNAL_EVPCCONN_H

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@ -61,35 +61,35 @@ void fd800_legacy_device::set_interrupt_line()
#if 0
void fd800_legacy_device::unload_proc(device_image_interface &image)
{
int unit = floppy_get_drive(&image.device());
int unit = floppy_get_drive(&image.device());
m_drv[unit].log_cylinder[0] = m_drv[unit].log_cylinder[1] = -1;
m_drv[unit].log_cylinder[0] = m_drv[unit].log_cylinder[1] = -1;
}
void fd800_machine_init(void (*interrupt_callback)(running_machine &machine, int state))
{
int i;
int i;
m_machine = &machine;
m_interrupt_callback = interrupt_callback;
m_machine = &machine;
m_interrupt_callback = interrupt_callback;
m_stat_reg = 0;
m_interrupt_f_f = 1;
m_stat_reg = 0;
m_interrupt_f_f = 1;
m_buf_pos = 0;
m_buf_mode = bm_off;
m_buf_pos = 0;
m_buf_mode = bm_off;
for (i=0; i<MAX_FLOPPIES; i++)
{
m_drv[i].img = dynamic_cast<device_image_interface *>(floppy_get_device(machine, i));
m_drv[i].phys_cylinder = -1;
m_drv[i].log_cylinder[0] = m_drv[i].log_cylinder[1] = -1;
m_drv[i].seclen = 64;
floppy_install_unload_proc(&m_drv[i].img->device(), unload_proc);
}
for (i=0; i<MAX_FLOPPIES; i++)
{
m_drv[i].img = dynamic_cast<device_image_interface *>(floppy_get_device(machine, i));
m_drv[i].phys_cylinder = -1;
m_drv[i].log_cylinder[0] = m_drv[i].log_cylinder[1] = -1;
m_drv[i].seclen = 64;
floppy_install_unload_proc(&m_drv[i].img->device(), unload_proc);
}
set_interrupt_line();
set_interrupt_line();
}
#endif

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@ -46,7 +46,7 @@ protected:
private:
// max disk units per controller: 4 is the protocol limit, but it may be overridden if more than one controller is used
static constexpr unsigned MAX_DISK_UNIT = 4;
static constexpr unsigned MAX_DISK_UNIT = 4;
enum format_t
{

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@ -47,7 +47,7 @@ public:
void io_set_buffer(uint8_t);
protected:
// register enumeration
// register enumeration
enum
{
H6280_PC = 1,

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@ -66,7 +66,7 @@ DEVICE_ADDRESS_MAP_START(map, 16, h83002_device)
AM_RANGE(0xffff20, 0xffff21) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, marah_r, marah_w )
AM_RANGE(0xffff22, 0xffff23) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, maral_r, maral_w )
AM_RANGE(0xffff24, 0xffff25) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, etcra_r, etcra_w )
AM_RANGE(0xffff26, 0xffff27) AM_DEVREADWRITE8("dma:0", h8_dma_channel_device, dtcra_r, dtcra_w, 0x00ff )
AM_RANGE(0xffff26, 0xffff27) AM_DEVREADWRITE8("dma:0", h8_dma_channel_device, dtcra_r, dtcra_w, 0x00ff )
AM_RANGE(0xffff28, 0xffff29) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, marbh_r, marbh_w )
AM_RANGE(0xffff2a, 0xffff2b) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, marbl_r, marbl_w )
AM_RANGE(0xffff2c, 0xffff2d) AM_DEVREADWRITE( "dma:0", h8_dma_channel_device, etcrb_r, etcrb_w )
@ -74,7 +74,7 @@ DEVICE_ADDRESS_MAP_START(map, 16, h83002_device)
AM_RANGE(0xffff30, 0xffff31) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, marah_r, marah_w )
AM_RANGE(0xffff32, 0xffff33) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, maral_r, maral_w )
AM_RANGE(0xffff34, 0xffff35) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, etcra_r, etcra_w )
AM_RANGE(0xffff36, 0xffff37) AM_DEVREADWRITE8("dma:1", h8_dma_channel_device, dtcra_r, dtcra_w, 0x00ff )
AM_RANGE(0xffff36, 0xffff37) AM_DEVREADWRITE8("dma:1", h8_dma_channel_device, dtcra_r, dtcra_w, 0x00ff )
AM_RANGE(0xffff38, 0xffff39) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, marbh_r, marbh_w )
AM_RANGE(0xffff3a, 0xffff3b) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, marbl_r, marbl_w )
AM_RANGE(0xffff3c, 0xffff3d) AM_DEVREADWRITE( "dma:1", h8_dma_channel_device, etcrb_r, etcrb_w )

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@ -22,11 +22,11 @@ static ADDRESS_MAP_START(program_1x128x4, AS_PROGRAM, 8, sm510_base_device)
ADDRESS_MAP_END
/*static ADDRESS_MAP_START(program_2x128x4, AS_PROGRAM, 8, sm510_base_device)
AM_RANGE(0x000, 0x3ff) AM_ROM
AM_RANGE(0x000, 0x3ff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START(program_1x128x4_1x128x2, AS_PROGRAM, 8, sm510_base_device)
AM_RANGE(0x000, 0x2ff) AM_ROM
AM_RANGE(0x000, 0x2ff) AM_ROM
ADDRESS_MAP_END*/
static ADDRESS_MAP_START(data_16x2x4, AS_DATA, 8, sm510_base_device)
@ -36,10 +36,10 @@ ADDRESS_MAP_END
/*
static ADDRESS_MAP_START(data_16x3.5x4, AS_DATA, 8, sm510_base_device)
AM_RANGE(0x00, 0x0f) AM_RAM
AM_RANGE(0x10, 0x1f) AM_RAM
AM_RANGE(0x20, 0x2f) AM_RAM
AM_RANGE(0x30, 0x37) AM_RAM
AM_RANGE(0x00, 0x0f) AM_RAM
AM_RANGE(0x10, 0x1f) AM_RAM
AM_RANGE(0x20, 0x2f) AM_RAM
AM_RANGE(0x30, 0x37) AM_RAM
ADDRESS_MAP_END
*/
@ -50,12 +50,12 @@ sm590_device::sm590_device(const machine_config &mconfig, const char *tag, devic
}
//sm591_device::sm591_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
// : sm510_base_device(mconfig, SM591, tag, owner, clock, 4 /* stack levels */, 10 /* prg width */, ADDRESS_MAP_NAME(program_2x128x4), 6 /* data width */, ADDRESS_MAP_NAME(data_16x3.5x4))
// : sm510_base_device(mconfig, SM591, tag, owner, clock, 4 /* stack levels */, 10 /* prg width */, ADDRESS_MAP_NAME(program_2x128x4), 6 /* data width */, ADDRESS_MAP_NAME(data_16x3.5x4))
//{
//}
//sm595_device::sm595_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
// : sm510_base_device(mconfig, SM595, tag, owner, clock, 4 /* stack levels */, 10 /* prg width */, ADDRESS_MAP_NAME(program_1x128x4_1x128x2), 5 /* data width */, ADDRESS_MAP_NAME(data_16x2x4))
// : sm510_base_device(mconfig, SM595, tag, owner, clock, 4 /* stack levels */, 10 /* prg width */, ADDRESS_MAP_NAME(program_1x128x4_1x128x2), 5 /* data width */, ADDRESS_MAP_NAME(data_16x2x4))
//{
//}

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@ -362,79 +362,79 @@ void via6522_device::clear_int(int data)
void via6522_device::shift_out()
{
// Only shift out msb on falling flank
if (m_shift_counter & 1)
{
LOGSHIFT(" %s shift Out SR: %02x->", tag(), m_sr);
m_out_cb2 = (m_sr >> 7) & 1;
m_sr = (m_sr << 1) | m_out_cb2;
LOGSHIFT("%02x CB2: %d\n", m_sr, m_out_cb2);
// Only shift out msb on falling flank
if (m_shift_counter & 1)
{
LOGSHIFT(" %s shift Out SR: %02x->", tag(), m_sr);
m_out_cb2 = (m_sr >> 7) & 1;
m_sr = (m_sr << 1) | m_out_cb2;
LOGSHIFT("%02x CB2: %d\n", m_sr, m_out_cb2);
m_cb2_handler(m_out_cb2);
m_cb2_handler(m_out_cb2);
if (m_shift_counter == 1 && SO_EXT_CONTROL(m_acr))
{
LOGINT("SHIFT EXT out INT request ");
set_int(INT_SR); // IRQ on last falling flank for external clock (mode 7)
}
}
else // Check for INT condition, eg the last and raising flank of the 15-0 falling/raising flanks
{
if (!SO_T2_RATE(m_acr)) // The T2 continous shifter doesn't do interrupts (mode 4)
{
if (m_shift_counter == 0 && (SO_O2_CONTROL(m_acr) || SO_T2_CONTROL(m_acr)))
{
LOGINT("SHIFT O2/T2 out INT request ");
set_int(INT_SR); // IRQ on last raising flank for internal clock (mode 5-6)
}
}
}
m_shift_counter = (m_shift_counter - 1) & 0x0f; // Count all flanks
if (m_shift_counter == 1 && SO_EXT_CONTROL(m_acr))
{
LOGINT("SHIFT EXT out INT request ");
set_int(INT_SR); // IRQ on last falling flank for external clock (mode 7)
}
}
else // Check for INT condition, eg the last and raising flank of the 15-0 falling/raising flanks
{
if (!SO_T2_RATE(m_acr)) // The T2 continous shifter doesn't do interrupts (mode 4)
{
if (m_shift_counter == 0 && (SO_O2_CONTROL(m_acr) || SO_T2_CONTROL(m_acr)))
{
LOGINT("SHIFT O2/T2 out INT request ");
set_int(INT_SR); // IRQ on last raising flank for internal clock (mode 5-6)
}
}
}
m_shift_counter = (m_shift_counter - 1) & 0x0f; // Count all flanks
}
void via6522_device::shift_in()
{
// Only shift in data on raising flank
if ( !(m_shift_counter & 1) )
{
LOGSHIFT("%s shift In SR: %02x->", tag(), m_sr);
m_sr = (m_sr << 1) | (m_in_cb2 & 1);
LOGSHIFT("%02x\n", m_sr);
// Only shift in data on raising flank
if ( !(m_shift_counter & 1) )
{
LOGSHIFT("%s shift In SR: %02x->", tag(), m_sr);
m_sr = (m_sr << 1) | (m_in_cb2 & 1);
LOGSHIFT("%02x\n", m_sr);
if (m_shift_counter == 0)
{
LOGINT("SHIFT in INT request ");
if (m_shift_counter == 0)
{
LOGINT("SHIFT in INT request ");
// set_int(INT_SR);// TODO: this interrupt is 1-2 clock cycles too early
m_shift_irq_timer->adjust(clocks_to_attotime(2)/2); // Delay IRQ 2 flanks for all shift INs (mode 1-3)
}
}
m_shift_counter = (m_shift_counter - 1) & 0x0f; // Count all flanks
m_shift_irq_timer->adjust(clocks_to_attotime(2)/2); // Delay IRQ 2 flanks for all shift INs (mode 1-3)
}
}
m_shift_counter = (m_shift_counter - 1) & 0x0f; // Count all flanks
}
void via6522_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
switch (id)
{
case TIMER_SHIFT_IRQ: // This timer event is a delayed IRQ for improved cycle accuracy
set_int(INT_SR); // triggered from shift_in or shift_out on the last rising flank
case TIMER_SHIFT_IRQ: // This timer event is a delayed IRQ for improved cycle accuracy
set_int(INT_SR); // triggered from shift_in or shift_out on the last rising flank
m_shift_irq_timer->adjust(attotime::never); // Not needed really...
break;
break;
case TIMER_SHIFT:
LOGSHIFT("SHIFT timer event CB1 %s edge, %d\n", m_out_cb1 & 1 ? "falling" : "raising", m_shift_counter);
m_out_cb1 ^= 1;
m_cb1_handler(m_out_cb1);
// we call shift methods for all flanks
if (SO_T2_RATE(m_acr) || SO_T2_CONTROL(m_acr) || SO_O2_CONTROL(m_acr))
{
shift_out();
}
else if (SI_T2_CONTROL(m_acr) || SI_O2_CONTROL(m_acr))
{
shift_in();
}
// we call shift methods for all flanks
if (SO_T2_RATE(m_acr) || SO_T2_CONTROL(m_acr) || SO_O2_CONTROL(m_acr))
{
shift_out();
}
else if (SI_T2_CONTROL(m_acr) || SI_O2_CONTROL(m_acr))
{
shift_in();
}
// If in continous mode or the shifter is still shifting we re-arm the timer
// If in continous mode or the shifter is still shifting we re-arm the timer
if (SO_T2_RATE(m_acr) || (m_shift_counter != 0x0f))
{
if (SI_O2_CONTROL(m_acr) || SO_O2_CONTROL(m_acr))
@ -445,11 +445,11 @@ void via6522_device::device_timer(emu_timer &timer, device_timer_id id, int para
{
m_shift_timer->adjust(clocks_to_attotime(m_t2ll + 2) / 2);
}
else // otherwise we stop it
{
m_shift_timer->adjust(attotime::never);
}
}
else // otherwise we stop it
{
m_shift_timer->adjust(attotime::never);
}
}
break;
case TIMER_T1:
if (T1_CONTINUOUS (m_acr))
@ -485,7 +485,7 @@ void via6522_device::device_timer(emu_timer &timer, device_timer_id id, int para
m_out_ca2 = 1;
m_ca2_handler(m_out_ca2);
break;
}
}
}
uint8_t via6522_device::input_pa()
@ -1051,16 +1051,16 @@ WRITE_LINE_MEMBER( via6522_device::write_cb1 )
}
// The shifter shift is not controlled by PCR
if (SO_EXT_CONTROL(m_acr))
{
LOGSHIFT("SHIFT OUT EXT/CB1 falling edge, %d\n", m_shift_counter);
shift_out();
}
else if (SI_EXT_CONTROL(m_acr))
{
LOGSHIFT("SHIFT IN EXT/CB1 raising edge, %d\n", m_shift_counter);
shift_in();
}
if (SO_EXT_CONTROL(m_acr))
{
LOGSHIFT("SHIFT OUT EXT/CB1 falling edge, %d\n", m_shift_counter);
shift_out();
}
else if (SI_EXT_CONTROL(m_acr))
{
LOGSHIFT("SHIFT IN EXT/CB1 raising edge, %d\n", m_shift_counter);
shift_in();
}
}
}

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@ -52,7 +52,7 @@ class hdc92x4_device : public device_t
{
public:
/*
Enumeration of the latches outside of the controller
Enumeration of the latches outside of the controller
*/
enum
{
@ -64,7 +64,7 @@ public:
/*
Definition of bits in the Disk-Status register
Definition of bits in the Disk-Status register
*/
enum
{

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@ -6,7 +6,7 @@
#pragma once
#define MCFG_K054321_ADD(_tag, _left, _right) \
#define MCFG_K054321_ADD(_tag, _left, _right) \
MCFG_DEVICE_ADD(_tag, K054321, 0) \
downcast<k054321_device *>(device)->set_gain_devices(_left, _right);

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@ -160,17 +160,17 @@ protected:
struct uart_t
{
static constexpr offs_t ULCON = 0X00 / 4; // UART Line Control
static constexpr offs_t UCON = 0X04 / 4; // UART Control
static constexpr offs_t UFCON = 0X08 / 4; // UART FIFO Control
static constexpr offs_t UMCON = 0X0c / 4; // UART Modem Control
static constexpr offs_t UTRSTAT = 0X10 / 4; // UART Tx/Rx Status
static constexpr offs_t UERSTAT = 0X14 / 4; // UART Rx Error Status
static constexpr offs_t UFSTAT = 0X18 / 4; // UART FIFO Status
static constexpr offs_t UMSTAT = 0X1c / 4; // UART Modem Status
static constexpr offs_t UTXH = 0X20 / 4; // UART Transmission Hold
static constexpr offs_t URXH = 0X24 / 4; // UART Receive Buffer
static constexpr offs_t UBRDIV = 0X28 / 4; // UART Baud Rate Divisor
static constexpr offs_t ULCON = 0x00 / 4; // UART Line Control
static constexpr offs_t UCON = 0x04 / 4; // UART Control
static constexpr offs_t UFCON = 0x08 / 4; // UART FIFO Control
static constexpr offs_t UMCON = 0x0c / 4; // UART Modem Control
static constexpr offs_t UTRSTAT = 0x10 / 4; // UART Tx/Rx Status
static constexpr offs_t UERSTAT = 0x14 / 4; // UART Rx Error Status
static constexpr offs_t UFSTAT = 0x18 / 4; // UART FIFO Status
static constexpr offs_t UMSTAT = 0x1c / 4; // UART Modem Status
static constexpr offs_t UTXH = 0x20 / 4; // UART Transmission Hold
static constexpr offs_t URXH = 0x24 / 4; // UART Receive Buffer
static constexpr offs_t UBRDIV = 0x28 / 4; // UART Baud Rate Divisor
void reset();

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@ -100,7 +100,7 @@ DONE (x) (p=partly) NMOS CMOS
#define LOGR(...) LOGMASKED(LOG_R, __VA_ARGS__)
#define LOGTX(...) LOGMASKED(LOG_TX, __VA_ARGS__)
#define LOGRX(...) LOGMASKED(LOG_RX, __VA_ARGS__)
#define LOGSETUP(...) LOGMASKED(LOG_SETUP, __VA_ARGS__)
#define LOGSETUP(...) LOGMASKED(LOG_SETUP, __VA_ARGS__)
#define LOGINT(...) LOGMASKED(LOG_INT, __VA_ARGS__)
#ifdef _MSC_VER

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@ -345,13 +345,13 @@ void vrc5074_device::map_extra(uint64_t memory_window_start, uint64_t memory_win
}
//// PCI Target Window 2
//if (m_cpu_regs[NREG_PCITW2]&0x1000) {
// winStart = m_cpu_regs[NREG_PCITW2]&0xffe00000;
// winEnd = winStart | (~(0xf0000000 | (((m_cpu_regs[NREG_PCITW2]>>13)&0x7f)<<21)));
// winSize = winEnd - winStart + 1;
// memory_space->install_read_handler(winStart, winEnd, read32_delegate(FUNC(vrc5074_device::target2_r), this));
// memory_space->install_write_handler(winStart, winEnd, write32_delegate(FUNC(vrc5074_device::target2_w), this));
// if (LOG_NILE)
// logerror("%s: map_extra Target Window 2 start=%08X end=%08X size=%08X laddr=%08X\n", tag(), winStart, winEnd, winSize, m_target2_laddr);
// winStart = m_cpu_regs[NREG_PCITW2]&0xffe00000;
// winEnd = winStart | (~(0xf0000000 | (((m_cpu_regs[NREG_PCITW2]>>13)&0x7f)<<21)));
// winSize = winEnd - winStart + 1;
// memory_space->install_read_handler(winStart, winEnd, read32_delegate(FUNC(vrc5074_device::target2_r), this));
// memory_space->install_write_handler(winStart, winEnd, write32_delegate(FUNC(vrc5074_device::target2_w), this));
// if (LOG_NILE)
// logerror("%s: map_extra Target Window 2 start=%08X end=%08X size=%08X laddr=%08X\n", tag(), winStart, winEnd, winSize, m_target2_laddr);
//}
}
@ -572,9 +572,9 @@ TIMER_CALLBACK_MEMBER (vrc5074_device::dma_transfer)
//// Check for dma suspension
//if (m_cpu_regs[NREG_DMACR1 + which * 0xc] & DMA_SUS) {
// if (LOG_NILE)
// logerror("%08X:nile DMA Suspended PCI: %08X MEM: %08X Words: %X\n", m_cpu->space(AS_PROGRAM).device().safe_pc(), m_cpu_regs[NREG_DMA_CPAR], m_cpu_regs[NREG_DMA_CMAR], m_cpu_regs[NREG_DMA_REM]);
// return;
// if (LOG_NILE)
// logerror("%08X:nile DMA Suspended PCI: %08X MEM: %08X Words: %X\n", m_cpu->space(AS_PROGRAM).device().safe_pc(), m_cpu_regs[NREG_DMA_CPAR], m_cpu_regs[NREG_DMA_CMAR], m_cpu_regs[NREG_DMA_REM]);
// return;
//}
//int pciSel = (m_cpu_regs[NREG_DMACR1+which*0xC] & DMA_MIO) ? AS_DATA : AS_IO;
@ -582,50 +582,50 @@ TIMER_CALLBACK_MEMBER (vrc5074_device::dma_transfer)
//uint32_t srcAddr, dstAddr;
//if (m_cpu_regs[NREG_DMACR1+which*0xC]&DMA_RW) {
// // Read data from PCI and write to cpu
// src = &this->space(pciSel);
// dst = &m_cpu->space(AS_PROGRAM);
// srcAddr = m_cpu_regs[NREG_DMA_CPAR];
// dstAddr = m_cpu_regs[NREG_DMA_CMAR];
// // Read data from PCI and write to cpu
// src = &this->space(pciSel);
// dst = &m_cpu->space(AS_PROGRAM);
// srcAddr = m_cpu_regs[NREG_DMA_CPAR];
// dstAddr = m_cpu_regs[NREG_DMA_CMAR];
//} else {
// // Read data from cpu and write to PCI
// src = &m_cpu->space(AS_PROGRAM);
// dst = &this->space(pciSel);
// srcAddr = m_cpu_regs[NREG_DMA_CMAR];
// dstAddr = m_cpu_regs[NREG_DMA_CPAR];
// // Read data from cpu and write to PCI
// src = &m_cpu->space(AS_PROGRAM);
// dst = &this->space(pciSel);
// srcAddr = m_cpu_regs[NREG_DMA_CMAR];
// dstAddr = m_cpu_regs[NREG_DMA_CPAR];
//}
//int dataCount = m_cpu_regs[NREG_DMA_REM];
//int burstCount = DMA_BURST_SIZE;
//while (dataCount>0 && burstCount>0) {
// dst->write_dword(dstAddr, src->read_dword(srcAddr));
// dstAddr += 0x4;
// srcAddr += 0x4;
// --dataCount;
// --burstCount;
// dst->write_dword(dstAddr, src->read_dword(srcAddr));
// dstAddr += 0x4;
// srcAddr += 0x4;
// --dataCount;
// --burstCount;
//}
//if (m_cpu_regs[NREG_DMACR1+which*0xC]&DMA_RW) {
// m_cpu_regs[NREG_DMA_CPAR] = srcAddr;
// m_cpu_regs[NREG_DMA_CMAR] = dstAddr;
// m_cpu_regs[NREG_DMA_CPAR] = srcAddr;
// m_cpu_regs[NREG_DMA_CMAR] = dstAddr;
//} else {
// m_cpu_regs[NREG_DMA_CMAR] = srcAddr;
// m_cpu_regs[NREG_DMA_CPAR] = dstAddr;
// m_cpu_regs[NREG_DMA_CMAR] = srcAddr;
// m_cpu_regs[NREG_DMA_CPAR] = dstAddr;
//}
//m_cpu_regs[NREG_DMA_REM] = dataCount;
//// Check for end of DMA
//if (dataCount == 0) {
// // Clear the busy and go flags
// m_cpu_regs[NREG_DMACR1 + which * 0xc] &= ~DMA_BUSY;
// m_cpu_regs[NREG_DMACR1 + which * 0xc] &= ~DMA_GO;
// // Set the interrupt
// if (m_cpu_regs[NREG_DMACR1 + which * 0xc] & DMA_INT_EN) {
// if (m_irq_num != -1) {
// m_cpu->set_input_line(m_irq_num, ASSERT_LINE);
// } else {
// logerror("vrc5074_device::dma_transfer Error: DMA configured to trigger interrupt but no interrupt line configured\n");
// }
// }
// // Turn off the timer
// m_dma_timer->adjust(attotime::never);
// // Clear the busy and go flags
// m_cpu_regs[NREG_DMACR1 + which * 0xc] &= ~DMA_BUSY;
// m_cpu_regs[NREG_DMACR1 + which * 0xc] &= ~DMA_GO;
// // Set the interrupt
// if (m_cpu_regs[NREG_DMACR1 + which * 0xc] & DMA_INT_EN) {
// if (m_irq_num != -1) {
// m_cpu->set_input_line(m_irq_num, ASSERT_LINE);
// } else {
// logerror("vrc5074_device::dma_transfer Error: DMA configured to trigger interrupt but no interrupt line configured\n");
// }
// }
// // Turn off the timer
// m_dma_timer->adjust(attotime::never);
//}
}
@ -929,7 +929,7 @@ WRITE32_MEMBER(vrc5074_device::cpu_reg_w)
case NREG_PCIINIT0 + 0: /* PCI master */
case NREG_PCIINIT1 + 0: /* PCI master */
//if (((olddata & 0xe) == 0xa) != ((m_cpu_regs[offset] & 0xe) == 0xa))
// remap_dynamic_addresses();
// remap_dynamic_addresses();
//remap_cb();
setup_pci_space();
logit = 0;

View File

@ -1737,17 +1737,17 @@ void z80scc_channel::do_sccreg_wr0(uint8_t data)
m_rx_first = 1;
break;
case WR0_RESET_TX_INT: // reset transmitter interrupt pending
/*Reset Tx Interrupt Pending Command (101). This command is used in cases where there are no
more characters to be sent; e.g., at the end of a message. This command prevents further transmit
interrupts until after the next character has been loaded into the transmit buffer or until CRC has
been completely sent. This command is necessary to prevent the transmitter from requesting an
interrupt when the transmit buffer becomes empty (with Transmit Interrupt Enabled).*/
/*Reset Tx Interrupt Pending Command (101). This command is used in cases where there are no
more characters to be sent; e.g., at the end of a message. This command prevents further transmit
interrupts until after the next character has been loaded into the transmit buffer or until CRC has
been completely sent. This command is necessary to prevent the transmitter from requesting an
interrupt when the transmit buffer becomes empty (with Transmit Interrupt Enabled).*/
m_tx_int_disarm = 1;
LOGCMD("%s: %c : WR0_RESET_TX_INT\n", owner()->tag(), 'A' + m_index);
m_uart->m_int_state[INT_TRANSMIT_PRIO + (m_index == z80scc_device::CHANNEL_A ? 0 : 3 )] = 0;
// Based on the fact that prio levels are aligned with the bitorder of rr3 we can do this...
m_uart->m_chanA->m_rr3 &= ~((1 << INT_TRANSMIT_PRIO) + (m_index == z80scc_device::CHANNEL_A ? 3 : 0 ));
// Update interrupt line
// Update interrupt line
m_uart->check_interrupts();
break;
default:
@ -2265,10 +2265,10 @@ void z80scc_channel::control_write(uint8_t data)
}
LOGSETUP(" * %s %c Reg %02x <- %02x - %s\n", owner()->tag(), 'A' + m_index, reg, data, std::array<char const *, 16>
{{ "Command register", "Tx/Rx Interrupt and Data Transfer Modes", "Interrupt Vector", "Rx Parameters and Control",
"Tx/Rx Misc Parameters and Modes", "Tx Parameters and Controls", "Sync Characters or SDLC Address Field","Sync Character or SDLC Flag/Prime",
"Tx Buffer", "Master Interrupt Control", "Miscellaneous Tx/Rx Control Bits", "Clock Mode Control",
"Lower Byte of BRG Time Constant", "Upper Byte of BRg Time Constant", "Miscellaneous Control Bits", "External/Status Interrupt Control"}}[reg]);
{{ "Command register", "Tx/Rx Interrupt and Data Transfer Modes", "Interrupt Vector", "Rx Parameters and Control",
"Tx/Rx Misc Parameters and Modes", "Tx Parameters and Controls", "Sync Characters or SDLC Address Field","Sync Character or SDLC Flag/Prime",
"Tx Buffer", "Master Interrupt Control", "Miscellaneous Tx/Rx Control Bits", "Clock Mode Control",
"Lower Byte of BRG Time Constant", "Upper Byte of BRg Time Constant", "Miscellaneous Control Bits", "External/Status Interrupt Control"}}[reg]);
scc_register_write(reg, data);
}
@ -2432,7 +2432,7 @@ void z80scc_channel::data_write(uint8_t data)
LOG("- TX interrupt are %s\n", (m_wr1 & WR1_TX_INT_ENABLE) ? "enabled" : "disabled" );
/* Arm interrupts since we wrote another data byte, however it may be set by the reset tx int pending
command before the shifter is done and the disarm flag is evaluated again in tra_complete() */
command before the shifter is done and the disarm flag is evaluated again in tra_complete() */
m_tx_int_disarm = 0;
if (m_wr1 & WR1_TX_INT_ENABLE)
{

View File

@ -614,8 +614,8 @@ protected:
int m_tx_fifo_wp; // FIFO write pointer
int m_tx_fifo_sz; // FIFO size
uint8_t m_tx_error; // current error
int m_tx_clock; // transmit clock pulse count
int m_tx_int_disarm; // temp Tx int disarm until next byte written
int m_tx_clock; // transmit clock pulse count
int m_tx_int_disarm; // temp Tx int disarm until next byte written
int m_dtr; // data terminal ready

View File

@ -351,14 +351,14 @@ void ppu2c0x_device::init_palette(palette_device &palette, int first_entry, bool
switch (color_emphasis)
{
case 0: r_mod = 1.0; g_mod = 1.0; b_mod = 1.0; break;
case 1: r_mod = 1.24; g_mod = .915; b_mod = .743; break;
case 2: r_mod = .794; g_mod = 1.09; b_mod = .882; break;
case 3: r_mod = .905; g_mod = 1.03; b_mod = 1.28; break;
case 4: r_mod = .741; g_mod = .987; b_mod = 1.0; break;
case 5: r_mod = 1.02; g_mod = .908; b_mod = .979; break;
case 6: r_mod = 1.02; g_mod = .98; b_mod = .653; break;
case 7: r_mod = .75; g_mod = .75; b_mod = .75; break;
case 0: r_mod = 1.0; g_mod = 1.0; b_mod = 1.0; break;
case 1: r_mod = 1.24; g_mod = .915; b_mod = .743; break;
case 2: r_mod = .794; g_mod = 1.09; b_mod = .882; break;
case 3: r_mod = .905; g_mod = 1.03; b_mod = 1.28; break;
case 4: r_mod = .741; g_mod = .987; b_mod = 1.0; break;
case 5: r_mod = 1.02; g_mod = .908; b_mod = .979; break;
case 6: r_mod = 1.02; g_mod = .98; b_mod = .653; break;
case 7: r_mod = .75; g_mod = .75; b_mod = .75; break;
}
*/

View File

@ -4,8 +4,8 @@
VT video emulation
The VT video is based on the ppu2c0x but with enhanced capabilities such
as 16 colour sprites.
The VT video is based on the ppu2c0x but with enhanced capabilities such
as 16 colour sprites.
******************************************************************************/
@ -275,13 +275,13 @@ uint8_t ppu_vt03_device::get_speva2_speva0()
void ppu_vt03_device::set_2010_reg(uint8_t data)
{
/* 7 : COLCOMP
6 : UNUSED (8bpp enable on VT09?)
5 : UNUSED
4 : BKEXTEN
3 : SPEXTEN
2 : SP16EN
1 : BK16EN
0 : PIX16EN */
6 : UNUSED (8bpp enable on VT09?)
5 : UNUSED
4 : BKEXTEN
3 : SPEXTEN
2 : SP16EN
1 : BK16EN
0 : PIX16EN */
if ((m_201x_regs[0x0] & 0x80) != (data & 0x80))
{

View File

@ -4,8 +4,8 @@
VT video emulation
The VT video is based on the ppu2c0x but with enhanced capabilities such
as 16 colour sprites.
The VT video is based on the ppu2c0x but with enhanced capabilities such
as 16 colour sprites.
******************************************************************************/

View File

@ -1452,31 +1452,31 @@ void cli_frontend::romident(const std::vector<std::string> &args)
//-------------------------------------------------
// find_command
// find_command
//-------------------------------------------------
const cli_frontend::info_command_struct *cli_frontend::find_command(const std::string &s)
{
static const info_command_struct s_info_commands[] =
{
{ CLICOMMAND_LISTXML, 0, -1, false, &cli_frontend::listxml, "[pattern] ..." },
{ CLICOMMAND_LISTFULL, 0, 1, false, &cli_frontend::listfull, "[system name]" },
{ CLICOMMAND_LISTSOURCE, 0, 1, false, &cli_frontend::listsource, "[system name]" },
{ CLICOMMAND_LISTCLONES, 0, 1, false, &cli_frontend::listclones, "[system name]" },
{ CLICOMMAND_LISTBROTHERS, 0, 1, false, &cli_frontend::listbrothers, "[system name]" },
{ CLICOMMAND_LISTCRC, 0, 1, false, &cli_frontend::listcrc, "[system name]" },
{ CLICOMMAND_LISTDEVICES, 0, 1, true, &cli_frontend::listdevices, "[system name]" },
{ CLICOMMAND_LISTSLOTS, 0, 1, true, &cli_frontend::listslots, "[system name]" },
{ CLICOMMAND_LISTROMS, 0, -1, false, &cli_frontend::listroms, "[pattern] ..." },
{ CLICOMMAND_LISTSAMPLES, 0, 1, false, &cli_frontend::listsamples, "[system name]" },
{ CLICOMMAND_VERIFYROMS, 0, -1, false, &cli_frontend::verifyroms, "[pattern] ..." },
{ CLICOMMAND_VERIFYSAMPLES, 0, 1, false, &cli_frontend::verifysamples, "[system name|*]" },
{ CLICOMMAND_LISTMEDIA, 0, 1, true, &cli_frontend::listmedia, "[system name]" },
{ CLICOMMAND_LISTSOFTWARE, 0, 1, false, &cli_frontend::listsoftware, "[system name]" },
{ CLICOMMAND_VERIFYSOFTWARE, 0, 1, false, &cli_frontend::verifysoftware, "[system name|*]" },
{ CLICOMMAND_ROMIDENT, 1, 1, false, &cli_frontend::romident, "(file or directory path)" },
{ CLICOMMAND_GETSOFTLIST, 0, 1, false, &cli_frontend::getsoftlist, "[system name|*]" },
{ CLICOMMAND_VERIFYSOFTLIST, 0, 1, false, &cli_frontend::verifysoftlist, "[system name|*]" }
{ CLICOMMAND_LISTXML, 0, -1, false, &cli_frontend::listxml, "[pattern] ..." },
{ CLICOMMAND_LISTFULL, 0, 1, false, &cli_frontend::listfull, "[system name]" },
{ CLICOMMAND_LISTSOURCE, 0, 1, false, &cli_frontend::listsource, "[system name]" },
{ CLICOMMAND_LISTCLONES, 0, 1, false, &cli_frontend::listclones, "[system name]" },
{ CLICOMMAND_LISTBROTHERS, 0, 1, false, &cli_frontend::listbrothers, "[system name]" },
{ CLICOMMAND_LISTCRC, 0, 1, false, &cli_frontend::listcrc, "[system name]" },
{ CLICOMMAND_LISTDEVICES, 0, 1, true, &cli_frontend::listdevices, "[system name]" },
{ CLICOMMAND_LISTSLOTS, 0, 1, true, &cli_frontend::listslots, "[system name]" },
{ CLICOMMAND_LISTROMS, 0, -1, false, &cli_frontend::listroms, "[pattern] ..." },
{ CLICOMMAND_LISTSAMPLES, 0, 1, false, &cli_frontend::listsamples, "[system name]" },
{ CLICOMMAND_VERIFYROMS, 0, -1, false, &cli_frontend::verifyroms, "[pattern] ..." },
{ CLICOMMAND_VERIFYSAMPLES, 0, 1, false, &cli_frontend::verifysamples, "[system name|*]" },
{ CLICOMMAND_LISTMEDIA, 0, 1, true, &cli_frontend::listmedia, "[system name]" },
{ CLICOMMAND_LISTSOFTWARE, 0, 1, false, &cli_frontend::listsoftware, "[system name]" },
{ CLICOMMAND_VERIFYSOFTWARE, 0, 1, false, &cli_frontend::verifysoftware, "[system name|*]" },
{ CLICOMMAND_ROMIDENT, 1, 1, false, &cli_frontend::romident, "(file or directory path)" },
{ CLICOMMAND_GETSOFTLIST, 0, 1, false, &cli_frontend::getsoftlist, "[system name|*]" },
{ CLICOMMAND_VERIFYSOFTLIST, 0, 1, false, &cli_frontend::verifysoftlist, "[system name|*]" }
};
for (const auto &info_command : s_info_commands)
@ -1489,7 +1489,7 @@ const cli_frontend::info_command_struct *cli_frontend::find_command(const std::s
//-------------------------------------------------
// parse_slot_options_for_auxverb
// parse_slot_options_for_auxverb
//-------------------------------------------------
bool cli_frontend::parse_slot_options_for_auxverb(const std::string &auxverb)

View File

@ -159,9 +159,9 @@ favorite_manager::favorite_manager(running_machine &machine, ui_options &moption
void favorite_manager::add_favorite_game(const game_driver *driver)
{
m_list.emplace(driver->type.fullname(),
ui_software_info{driver->name, driver->type.fullname(), "", "", "", 0, "", driver, "", "", "",
1, "", "", "", true});
m_list.emplace(driver->type.fullname(),
ui_software_info{driver->name, driver->type.fullname(), "", "", "", 0, "", driver, "", "", "",
1, "", "", "", true});
save_favorite_games();
}

View File

@ -872,15 +872,15 @@ void menu_select_game::inkey_select_favorite(const event *menu_event)
if (summary == media_auditor::CORRECT || summary == media_auditor::BEST_AVAILABLE || summary == media_auditor::NONE_NEEDED)
{
if ((ui_swinfo->driver->flags & MACHINE_TYPE_ARCADE) == 0)
{
for (software_list_device &swlistdev : software_list_device_iterator(enumerator.config()->root_device()))
if (!swlistdev.get_info().empty())
{
menu::stack_push<menu_select_software>(ui(), container(), ui_swinfo->driver);
return;
}
}
if ((ui_swinfo->driver->flags & MACHINE_TYPE_ARCADE) == 0)
{
for (software_list_device &swlistdev : software_list_device_iterator(enumerator.config()->root_device()))
if (!swlistdev.get_info().empty())
{
menu::stack_push<menu_select_software>(ui(), container(), ui_swinfo->driver);
return;
}
}
// if everything looks good, schedule the new driver
s_bios biosname;

View File

@ -19,7 +19,7 @@
/***************************************************************************
UTILITY
UTILITY
***************************************************************************/
namespace {
@ -30,7 +30,7 @@ char DIVIDER[] = "------";
//-------------------------------------------------
// get_slot_length
// get_slot_length
//-------------------------------------------------
int get_slot_length(const device_slot_interface &slot)
@ -45,7 +45,7 @@ int get_slot_length(const device_slot_interface &slot)
//-------------------------------------------------
// get_slot_option
// get_slot_option
//-------------------------------------------------
const char *get_slot_option(device_slot_interface &slot, int index)
@ -69,13 +69,13 @@ const char *get_slot_option(device_slot_interface &slot, int index)
};
/***************************************************************************
SLOT MENU
SLOT MENU
***************************************************************************/
namespace ui {
//-------------------------------------------------
// menu_slot_devices constructor
// menu_slot_devices constructor
//-------------------------------------------------
menu_slot_devices::menu_slot_devices(mame_ui_manager &mui, render_container &container) : menu(mui, container)
@ -83,7 +83,7 @@ menu_slot_devices::menu_slot_devices(mame_ui_manager &mui, render_container &con
}
//-------------------------------------------------
// menu_slot_devices destructor
// menu_slot_devices destructor
//-------------------------------------------------
menu_slot_devices::~menu_slot_devices()
@ -92,8 +92,8 @@ menu_slot_devices::~menu_slot_devices()
//-------------------------------------------------
// get_current_option - returns the current
// slot option
// get_current_option - returns the current
// slot option
//-------------------------------------------------
device_slot_option *menu_slot_devices::get_current_option(device_slot_interface &slot) const
@ -117,7 +117,7 @@ device_slot_option *menu_slot_devices::get_current_option(device_slot_interface
//-------------------------------------------------
// get_current_index
// get_current_index
//-------------------------------------------------
int menu_slot_devices::get_current_index(device_slot_interface &slot) const
@ -142,7 +142,7 @@ int menu_slot_devices::get_current_index(device_slot_interface &slot) const
//-------------------------------------------------
// get_next_slot
// get_next_slot
//-------------------------------------------------
const char *menu_slot_devices::get_next_slot(device_slot_interface &slot) const
@ -161,7 +161,7 @@ const char *menu_slot_devices::get_next_slot(device_slot_interface &slot) const
//-------------------------------------------------
// get_previous_slot
// get_previous_slot
//-------------------------------------------------
const char *menu_slot_devices::get_previous_slot(device_slot_interface &slot) const
@ -180,7 +180,7 @@ const char *menu_slot_devices::get_previous_slot(device_slot_interface &slot) co
//-------------------------------------------------
// set_slot_device
// set_slot_device
//-------------------------------------------------
void menu_slot_devices::set_slot_device(device_slot_interface &slot, const char *val)
@ -192,7 +192,7 @@ void menu_slot_devices::set_slot_device(device_slot_interface &slot, const char
//-------------------------------------------------
// populate
// populate
//-------------------------------------------------
void menu_slot_devices::populate(float &customtop, float &custombottom)
@ -226,7 +226,7 @@ void menu_slot_devices::populate(float &customtop, float &custombottom)
//-------------------------------------------------
// handle
// handle
//-------------------------------------------------
void menu_slot_devices::handle()

View File

@ -88,7 +88,7 @@ struct ui_gfx_state
int yoffs; // current Y offset
int zoom; // zoom factor
uint8_t rotate; // current rotation (orientation) value
uint32_t flags; // render flags
uint32_t flags; // render flags
} tilemap;
};

View File

@ -2,45 +2,45 @@
// copyright-holders: Ansgar Kückes, F. Ulivi
/*********************************************************************
hpi_dsk.cpp
hpi_dsk.cpp
HP9895A "HPI" disk images
HP9895A "HPI" disk images
CHS = 77/2/30
Sector size 256 bytes
Cell size 2 µs
Gap1 = 16 x 0x00
Gap2 = 34 x 0x00
Gap3 = ~490 x 0x00 (depends on actual rotation speed)
Sync = 4 x 0x00 + 4 x 0xff
ID AM = 0x0e clock + 0x70 data
Data AM = 0x0e clock + 0x50 data
DefectTrack AM = 0x0e clock + 0xf0 data
CRC-16 excludes address markers
MMFM/M2FM encoding (LS bit first)
CHS = 77/2/30
Sector size 256 bytes
Cell size 2 µs
Gap1 = 16 x 0x00
Gap2 = 34 x 0x00
Gap3 = ~490 x 0x00 (depends on actual rotation speed)
Sync = 4 x 0x00 + 4 x 0xff
ID AM = 0x0e clock + 0x70 data
Data AM = 0x0e clock + 0x50 data
DefectTrack AM = 0x0e clock + 0xf0 data
CRC-16 excludes address markers
MMFM/M2FM encoding (LS bit first)
The order of sectors in a track depends on the interleave factor
which is the distance (in number of sectors) between two consecutively
numbered sectors. Interleave factor is specified at formatting time.
The default factor is 7. The order of sectors for this factor is:
0, 13, 26, 9, 22, 5, 18, 1, 14, 27, 10, 23, 6, 19, 2,
15, 28, 11, 24, 7, 20, 3, 16, 29, 12, 25, 8, 21, 4, 17
The order of sectors in a track depends on the interleave factor
which is the distance (in number of sectors) between two consecutively
numbered sectors. Interleave factor is specified at formatting time.
The default factor is 7. The order of sectors for this factor is:
0, 13, 26, 9, 22, 5, 18, 1, 14, 27, 10, 23, 6, 19, 2,
15, 28, 11, 24, 7, 20, 3, 16, 29, 12, 25, 8, 21, 4, 17
<Track> := [Index hole]|Sector0|Gap2|Sector1|Gap2|...|Sector29|Gap3|
<Track> := [Index hole]|Sector0|Gap2|Sector1|Gap2|...|Sector29|Gap3|
<Sector> := ID field|Gap1|Data field
<Sector> := ID field|Gap1|Data field
<ID field> := Sync|ID AM|Track no.|Sector no.|CRC-16|0x00
<ID field> := Sync|ID AM|Track no.|Sector no.|CRC-16|0x00
<Data field> := Sync|Data AM|Data|CRC-16|0x00
<Data field> := Sync|Data AM|Data|CRC-16|0x00
This format is just a raw image of every sector on a HP-formatted
8" floppy disk. Files with this format have no header/trailer and
are exactly 1182720 bytes in size (30 sectors, 2 heads, 77 tracks,
256 bytes per sector). There's also a "reduced" version holding
just 75 cylinders.
When loading, the disk image is translated to MMFM encoding so
that it can be loaded into HP9895 emulator.
This format is just a raw image of every sector on a HP-formatted
8" floppy disk. Files with this format have no header/trailer and
are exactly 1182720 bytes in size (30 sectors, 2 heads, 77 tracks,
256 bytes per sector). There's also a "reduced" version holding
just 75 cylinders.
When loading, the disk image is translated to MMFM encoding so
that it can be loaded into HP9895 emulator.
*********************************************************************/
@ -51,20 +51,20 @@
#define VERBOSE 0
#define LOG(...) do { if (VERBOSE) printf(__VA_ARGS__); } while (false)
constexpr unsigned IL_OFFSET = 0x12; // Position of interleave factor in HPI image (2 bytes, big-endian)
constexpr unsigned DEFAULT_IL = 7; // Default interleaving factor
constexpr unsigned CELL_SIZE = 1200; // Bit cell size (1 µs)
constexpr uint8_t ID_AM = 0x70; // ID address mark
constexpr uint8_t DATA_AM = 0x50; // Data address mark
constexpr uint8_t AM_CLOCK = 0x0e; // Clock pattern of AM
constexpr uint32_t ID_CD_PATTERN= 0x55552a54; // C/D pattern of 0xff + ID_AM
constexpr uint32_t DATA_CD_PATTERN = 0x55552a44; // C/D pattern of 0xff + DATA_AM
constexpr unsigned GAP1_SIZE = 17; // Size of gap 1 (+1)
constexpr unsigned GAP2_SIZE = 35; // Size of gap 2 (+1)
constexpr int ID_DATA_OFFSET = 30 * 16; // Nominal distance (in cells) between ID & DATA AM
constexpr unsigned IL_OFFSET = 0x12; // Position of interleave factor in HPI image (2 bytes, big-endian)
constexpr unsigned DEFAULT_IL = 7; // Default interleaving factor
constexpr unsigned CELL_SIZE = 1200; // Bit cell size (1 µs)
constexpr uint8_t ID_AM = 0x70; // ID address mark
constexpr uint8_t DATA_AM = 0x50; // Data address mark
constexpr uint8_t AM_CLOCK = 0x0e; // Clock pattern of AM
constexpr uint32_t ID_CD_PATTERN= 0x55552a54; // C/D pattern of 0xff + ID_AM
constexpr uint32_t DATA_CD_PATTERN = 0x55552a44; // C/D pattern of 0xff + DATA_AM
constexpr unsigned GAP1_SIZE = 17; // Size of gap 1 (+1)
constexpr unsigned GAP2_SIZE = 35; // Size of gap 2 (+1)
constexpr int ID_DATA_OFFSET = 30 * 16; // Nominal distance (in cells) between ID & DATA AM
// Size of image file (holding 77 cylinders)
constexpr unsigned HPI_IMAGE_SIZE = HPI_TRACKS * HPI_HEADS * HPI_SECTORS * HPI_SECTOR_SIZE;
constexpr unsigned HPI_RED_TRACKS = 75; // Reduced number of tracks
constexpr unsigned HPI_RED_TRACKS = 75; // Reduced number of tracks
// Size of reduced image file (holding 75 cylinders)
constexpr unsigned HPI_RED_IMAGE_SIZE = HPI_RED_TRACKS * HPI_HEADS * HPI_SECTORS * HPI_SECTOR_SIZE;
@ -89,7 +89,7 @@ int hpi_format::identify(io_generic *io, uint32_t form_factor)
bool hpi_format::load(io_generic *io, uint32_t form_factor, floppy_image *image)
{
image->set_variant(floppy_image::DSDD); // We actually need to derive the variant from the image size depending on the form factor
image->set_variant(floppy_image::DSDD); // We actually need to derive the variant from the image size depending on the form factor
uint64_t size = io_generic_size(io);
unsigned cylinders;
@ -396,35 +396,35 @@ bool hpi_format::get_next_sector(const uint8_t *bitstream , int bitstream_size ,
// to move forward in the interleaved sector list when beginning a new track.
// There are different offsets for tracks on head 0 and tracks on head 1.
const uint8_t hpi_format::m_track_skew[ HPI_SECTORS - 1 ][ HPI_HEADS ] = {
{ 0x1c , 0x18 }, // Interleave = 1
{ 0x1c , 0x18 }, // Interleave = 2
{ 0x1c , 0x18 }, // Interleave = 3
{ 0x1d , 0x1a }, // Interleave = 4
{ 0x1a , 0x18 }, // Interleave = 5
{ 0x19 , 0x18 }, // Interleave = 6
{ 0x00 , 0x00 }, // Interleave = 7
{ 0x1d , 0x1d }, // Interleave = 8
{ 0x1c , 0x1c }, // Interleave = 9
{ 0x15 , 0x15 }, // Interleave = 10
{ 0x00 , 0x00 }, // Interleave = 11
{ 0x19 , 0x19 }, // Interleave = 12
{ 0x00 , 0x00 }, // Interleave = 13
{ 0x1d , 0x1d }, // Interleave = 14
{ 0x10 , 0x10 }, // Interleave = 15
{ 0x1d , 0x1d }, // Interleave = 16
{ 0x00 , 0x00 }, // Interleave = 17
{ 0x19 , 0x19 }, // Interleave = 18
{ 0x00 , 0x00 }, // Interleave = 19
{ 0x15 , 0x15 }, // Interleave = 20
{ 0x1c , 0x1c }, // Interleave = 21
{ 0x1d , 0x1d }, // Interleave = 22
{ 0x00 , 0x00 }, // Interleave = 23
{ 0x19 , 0x19 }, // Interleave = 24
{ 0x1a , 0x1a }, // Interleave = 25
{ 0x1d , 0x1d }, // Interleave = 26
{ 0x1c , 0x1c }, // Interleave = 27
{ 0x1d , 0x1d }, // Interleave = 28
{ 0x00 , 0x00 } // Interleave = 29
{ 0x1c , 0x18 }, // Interleave = 1
{ 0x1c , 0x18 }, // Interleave = 2
{ 0x1c , 0x18 }, // Interleave = 3
{ 0x1d , 0x1a }, // Interleave = 4
{ 0x1a , 0x18 }, // Interleave = 5
{ 0x19 , 0x18 }, // Interleave = 6
{ 0x00 , 0x00 }, // Interleave = 7
{ 0x1d , 0x1d }, // Interleave = 8
{ 0x1c , 0x1c }, // Interleave = 9
{ 0x15 , 0x15 }, // Interleave = 10
{ 0x00 , 0x00 }, // Interleave = 11
{ 0x19 , 0x19 }, // Interleave = 12
{ 0x00 , 0x00 }, // Interleave = 13
{ 0x1d , 0x1d }, // Interleave = 14
{ 0x10 , 0x10 }, // Interleave = 15
{ 0x1d , 0x1d }, // Interleave = 16
{ 0x00 , 0x00 }, // Interleave = 17
{ 0x19 , 0x19 }, // Interleave = 18
{ 0x00 , 0x00 }, // Interleave = 19
{ 0x15 , 0x15 }, // Interleave = 20
{ 0x1c , 0x1c }, // Interleave = 21
{ 0x1d , 0x1d }, // Interleave = 22
{ 0x00 , 0x00 }, // Interleave = 23
{ 0x19 , 0x19 }, // Interleave = 24
{ 0x1a , 0x1a }, // Interleave = 25
{ 0x1d , 0x1d }, // Interleave = 26
{ 0x1c , 0x1c }, // Interleave = 27
{ 0x1d , 0x1d }, // Interleave = 28
{ 0x00 , 0x00 } // Interleave = 29
};
const floppy_format_type FLOPPY_HPI_FORMAT = &floppy_image_format_creator<hpi_format>;

View File

@ -16,7 +16,7 @@
#include "flopimg.h"
// Geometry constants
constexpr unsigned HPI_TRACKS = 77;
constexpr unsigned HPI_TRACKS = 77;
constexpr unsigned HPI_HEADS = 2;
constexpr unsigned HPI_SECTORS = 30;
constexpr unsigned HPI_SECTOR_SIZE = 256;
@ -24,19 +24,19 @@ constexpr unsigned HPI_SECTOR_SIZE = 256;
class hpi_format : public floppy_image_format_t
{
public:
hpi_format();
hpi_format();
virtual int identify(io_generic *io, uint32_t form_factor) override;
virtual bool load(io_generic *io, uint32_t form_factor, floppy_image *image) override;
virtual bool save(io_generic *io, floppy_image *image) override;
virtual const char *name() const override;
virtual const char *description() const override;
virtual const char *extensions() const override;
virtual bool supports_save() const override;
virtual int identify(io_generic *io, uint32_t form_factor) override;
virtual bool load(io_generic *io, uint32_t form_factor, floppy_image *image) override;
virtual bool save(io_generic *io, floppy_image *image) override;
virtual const char *name() const override;
virtual const char *description() const override;
virtual const char *extensions() const override;
virtual bool supports_save() const override;
private:
typedef std::array<uint8_t , HPI_SECTORS> sector_list_t;
static void interleaved_sectors(unsigned il_factor , sector_list_t& sector_list);
static void interleaved_sectors(unsigned il_factor , sector_list_t& sector_list);
void write_mmfm_bit(std::vector<uint32_t> &buffer , bool data_bit , bool clock_bit);
void write_mmfm_byte(std::vector<uint32_t> &buffer , uint8_t data , uint8_t clock = 0);
void write_sync(std::vector<uint32_t> &buffer);

View File

@ -83,10 +83,10 @@ namespace plib {
double lfsr_random()
{
std::uint16_t lsb = m_lfsr & 1;
m_lfsr >>= 1;
if (lsb)
m_lfsr ^= 0xB400u; // taps 15, 13, 12, 10
return static_cast<double>(m_lfsr) / static_cast<double>(0xffffu);
m_lfsr >>= 1;
if (lsb)
m_lfsr ^= 0xB400u; // taps 15, 13, 12, 10
return static_cast<double>(m_lfsr) / static_cast<double>(0xffffu);
}
std::vector<rpn_inst> m_precompiled; //!< precompiled expression

View File

@ -202,7 +202,7 @@ private:
simple_list<entry> m_entrylist; // head of list of entries
std::unordered_map<std::string,entry *> m_entrymap; // map for fast lookup
std::string m_command; // command found
std::vector<std::string> m_command_arguments; // command arguments
std::vector<std::string> m_command_arguments; // command arguments
static const char *const s_option_unadorned[]; // array of unadorned option "names"
};

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@ -131,7 +131,7 @@ private:
device_t *m_maincpu;
u8 m_in_latch; // input latch
u8 m_out_latch; // output latch
u8 m_last_p2_value; // current P2 output value
u8 m_last_p2_value; // current P2 output value
optional_shared_ptr<u8> m_program_ram; // pointer to program RAM
required_shared_ptr<u8> m_work_ram; // pointer to work RAM
u8 m_work_ram_bank; // currently selected work RAM bank

View File

@ -7,8 +7,8 @@
Driver-in-progress by R. Belmont
Electron ULA emulation by Wilbert Pol
Main CPU: 65C816
Other chips: 6850 UART, 6522 VIA, SAA5240(video?), AM7910 modem, PCF0335(?)
Main CPU: 65C816
Other chips: 6850 UART, 6522 VIA, SAA5240(video?), AM7910 modem, PCF0335(?)
****************************************************************************/
@ -543,13 +543,13 @@ void accomm_state::interrupt_handler(int mode, int interrupt)
static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, accomm_state )
AM_RANGE(0x000000, 0x007fff) AM_RAM
AM_RANGE(0x008000, 0x00ffff) AM_DEVICE("bank0dev", address_map_bank_device, amap8)
AM_RANGE(0x010000, 0x08ffff) AM_RAM // "576K RAM"
AM_RANGE(0x010000, 0x08ffff) AM_RAM // "576K RAM"
AM_RANGE(0x440000, 0x440000) AM_WRITE(b0_rom_disable_w)
AM_RANGE(0x450000, 0x457fff) AM_RAM AM_SHARE("vram")
AM_RANGE(0x458000, 0x45bfff) AM_READ(read_keyboard)
AM_RANGE(0x45fe00, 0x45feff) AM_READWRITE(sheila_r, sheila_w)
AM_RANGE(0x460000, 0x467fff) AM_RAM // nvram?
AM_RANGE(0x460000, 0x467fff) AM_RAM // nvram?
AM_RANGE(0xfc0000, 0xffffff) AM_ROM AM_REGION("maincpu", 0)
ADDRESS_MAP_END

View File

@ -242,35 +242,35 @@ WRITE16_MEMBER(acommand_state::output_7seg1_w)
}
/*
"Upper switch / Under Switch"
xx-x ---- xx-x xx-x
-x-- ---- ---- ---- Catch Switch - 3
--x- ---- ---- ---- Lower Switch - 3
---x ---- ---- ---- Upper Switch - 3
---- -x-- ---- ---- Catch Switch - 2
---- --x- ---- ---- Lower Switch - 2
---- ---x ---- ---- Upper Switch - 2
---- ---- -x-- ---- Catch Switch - 1
---- ---- --x- ---- Lower Switch - 1 (active high)
---- ---- ---x ---- Upper Switch - 1 (active low)
---- ---- ---- --xx Boss Door - Motor
state of UFO lanes:
0x0
0x1
0x2
0x3
0x4
0x5 ufo lane limit switch
0x6
0x7 astronaut switch or jamming
0x8
0x9 ufo lane switch or motor
0xa astronaut switch or jamming
0xb ufo lane switch or motor
0xc ""
0xd ufo lane limit switch
0xe astronaut switch or jamming
0xf ""
"Upper switch / Under Switch"
xx-x ---- xx-x xx-x
-x-- ---- ---- ---- Catch Switch - 3
--x- ---- ---- ---- Lower Switch - 3
---x ---- ---- ---- Upper Switch - 3
---- -x-- ---- ---- Catch Switch - 2
---- --x- ---- ---- Lower Switch - 2
---- ---x ---- ---- Upper Switch - 2
---- ---- -x-- ---- Catch Switch - 1
---- ---- --x- ---- Lower Switch - 1 (active high)
---- ---- ---x ---- Upper Switch - 1 (active low)
---- ---- ---- --xx Boss Door - Motor
state of UFO lanes:
0x0
0x1
0x2
0x3
0x4
0x5 ufo lane limit switch
0x6
0x7 astronaut switch or jamming
0x8
0x9 ufo lane switch or motor
0xa astronaut switch or jamming
0xb ufo lane switch or motor
0xc ""
0xd ufo lane limit switch
0xe astronaut switch or jamming
0xf ""
*/
READ16_MEMBER(acommand_state::ext_devices_0_r)
{
@ -285,10 +285,10 @@ WRITE16_MEMBER(acommand_state::ext_devices_0_w)
}
/*
---- ---- --x- ---- Lower Switch - 5
---- ---- ---x ---- Upper Switch - 5
---- ---- ---- --x- Lower Switch - 4 (active high)
---- ---- ---- ---x Upper Switch - 4 (active low)
---- ---- --x- ---- Lower Switch - 5
---- ---- ---x ---- Upper Switch - 5
---- ---- ---- --x- Lower Switch - 4 (active high)
---- ---- ---- ---x Upper Switch - 4 (active low)
*/
READ16_MEMBER(acommand_state::ext_devices_1_r)
{

View File

@ -2305,8 +2305,8 @@ ROM_START( cgold2 )
ROM_LOAD("3vlsh076_a.u46", 0x08000, 0x2000, CRC(9580c2c2) SHA1(8a010fb9e349c066e1af53ed9aa659dbf7dbf17e))
ROM_LOAD("3vlsh076.u47", 0x0a000, 0x2000, CRC(f3cb845a) SHA1(288f7fe991bb60194a9ef9e8c9b2b18ebbd3b49c)) // matches cgold
// Note: cgold tiles are not a perfect match, cgold2 needs dollar and cent signs in tiles 0x64 and 0x65 respectively, which cgold does not have. This causes a garbled graphics in the denomination.
// Tiles 0x27F and 0x280 are cent and dollar signs, but these are unused by the game.
// Note: cgold tiles are not a perfect match, cgold2 needs dollar and cent signs in tiles 0x64 and 0x65 respectively, which cgold does not have. This causes a garbled graphics in the denomination.
// Tiles 0x27F and 0x280 are cent and dollar signs, but these are unused by the game.
/* COLOR PROM */
ROM_REGION(0x200, "proms", 0 )

View File

@ -3545,7 +3545,7 @@ ROM_END
ROM_START( goldpyrb )
ARISTOCRAT_MK5_BIOS
/*
Using New Zealand 0700474V BIOS until an Australian casino BIOS is dumped.
Using New Zealand 0700474V BIOS until an Australian casino BIOS is dumped.
note, this actually contains a 2nd checksum for the game, this is the base/bios check only.

View File

@ -739,7 +739,7 @@ MACHINE_RESET_MEMBER(badlands_state,badlandsb)
{
// m_pedal_value[0] = m_pedal_value[1] = 0x80;
atarigen_state::machine_reset();
// scanline_timer_reset(*m_screen, 32);
// scanline_timer_reset(*m_screen, 32);
// memcpy(m_bank_base, &m_bank_source_data[0x0000], 0x1000);
}

View File

@ -21,33 +21,33 @@
Notes from Tomasz Slanina:
Tile decoding:
Tile decoding:
Each 8x8 BG tile is defined by:
- 1 bit 8x8 mask (one tile - 8 consecutive bytes - user2 region)
- 4+4 bits of color ( one tile - 8 consecutive bytes - user1 region)
- bit 3 of color = brightness ?
Each 8x8 BG tile is defined by:
- 1 bit 8x8 mask (one tile - 8 consecutive bytes - user2 region)
- 4+4 bits of color ( one tile - 8 consecutive bytes - user1 region)
- bit 3 of color = brightness ?
Single mask byte defines one row of tile pixels (FG or BG)
Single color byte defines color of FG (4 bits) and color of BG (4 bits)
of high (odd address in user1) or low (even address in user1)
nibbles of two tile pixels rows.
Single mask byte defines one row of tile pixels (FG or BG)
Single color byte defines color of FG (4 bits) and color of BG (4 bits)
of high (odd address in user1) or low (even address in user1)
nibbles of two tile pixels rows.
Here's an example (single tile):
Here's an example (single tile):
user2 user1 colors
----------------------------
00011100 0x32 33321144
00111100 0x41 33221144
00111100 0x41 33221144
00111100 0x32 33227744
00011000 0x47 33327444
00111100 0x32 33227744
00011000 0x47 33327444
00011000 0x56 55566555
00011000 0x56 55566555
00011000 0x56 55566555
00011000 0x56 55566555
00011000 0x84 88844777
00011000 0x74 88844777
00011000 0x84 88844777
00011000 0x74 88844777

View File

@ -112,12 +112,12 @@
the lower rightmost ic, from left to right then top to bottom
and ic4 being the 93c46;
The 74hct164s are chained in this order and drive the following pins:
IC3: TODO: ADD ME
IC2: "
IC7: "
IC5: "
IC6: "
IC1: "
IC3: TODO: ADD ME
IC2: "
IC7: "
IC5: "
IC6: "
IC1: "
* Looking "through" the pcb from the top, the connectors are arranged
as such:

View File

@ -154,7 +154,7 @@ READ8_MEMBER(cfx9850_state::in0_r)
static INPUT_PORTS_START(cfx9850)
PORT_START("KO1")
/* KI1 */ PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("AC On/Off") PORT_CODE(KEYCODE_BACKSLASH)
PORT_BIT(0xfe, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_BIT(0xfe, IP_ACTIVE_HIGH, IPT_UNUSED)
PORT_START("KO2")
/* KI3 */ PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_NAME("EXE Enter") PORT_CODE(KEYCODE_ENTER)

View File

@ -2284,7 +2284,7 @@ ROM_START( qofd3 )
// DVD QOD 3.02
// CDV-10026D
DISK_REGION( "gdrom" )
DISK_IMAGE_READONLY( "cdv-10026d", 0, SHA1(b079778f7837100a9b4fa2a536a4efc7817dd2d2) ) // DVD
DISK_IMAGE_READONLY( "cdv-10026d", 0, SHA1(b079778f7837100a9b4fa2a536a4efc7817dd2d2) ) // DVD
// satellite Chihiro security PIC is missing
ROM_REGION( 0x4000, "pic", ROMREGION_ERASEFF)
@ -2294,13 +2294,13 @@ ROM_START( qofd3 )
// CD QOD3 VERSION UPDATE
// CDP-10062
DISK_REGION("update")
DISK_IMAGE_READONLY( "cdp-10062", 0, SHA1(abe337cb8782155c4cb92895ba22454a175d479d) ) // CD
DISK_IMAGE_READONLY( "cdp-10062", 0, SHA1(abe337cb8782155c4cb92895ba22454a175d479d) ) // CD
// "Quest of D Ver. 2.0"
// DVD QOD CHECK DISC
// CDV-10028
DISK_REGION("check")
DISK_IMAGE_READONLY( "cdv-10028", 0, SHA1(9f0f64cb4278cf51a42a21f880cda82b585c63f6) ) // DVD
DISK_IMAGE_READONLY( "cdv-10028", 0, SHA1(9f0f64cb4278cf51a42a21f880cda82b585c63f6) ) // DVD
ROM_END
ROM_START( gundcb83 )
@ -2336,7 +2336,7 @@ ROM_START( qofdtbk )
// DVD QOD VS
// CDV-10035B
DISK_REGION( "gdrom" )
DISK_IMAGE_READONLY( "cdv-10035b", 0, SHA1(710776b88e7403193c1e0889bbd2d15fc8a92880) ) // DVD
DISK_IMAGE_READONLY( "cdv-10035b", 0, SHA1(710776b88e7403193c1e0889bbd2d15fc8a92880) ) // DVD
// satellite Chihiro security PIC
ROM_REGION( 0x4000, "pic", ROMREGION_ERASEFF)
@ -2348,13 +2348,13 @@ ROM_START( qofdtbk )
// CD QOD VS VERSION UPDATE
// CDP-10078
DISK_REGION("update")
DISK_IMAGE_READONLY( "cdp-10078", 0, SHA1(f7dde6a95c8b9087f984f92248c22a3b148ef645) ) // CD
DISK_IMAGE_READONLY( "cdp-10078", 0, SHA1(f7dde6a95c8b9087f984f92248c22a3b148ef645) ) // CD
// "Quest of D The Battle Kingdom"
// CD QOD SERVICE END
// CDP-10136
DISK_REGION("serv_end")
DISK_IMAGE_READONLY( "cdp-10136", 0, SHA1(3bfb6258bf9c08e1c8056183d02fe8aa3b65db49) ) // CD
DISK_IMAGE_READONLY( "cdp-10136", 0, SHA1(3bfb6258bf9c08e1c8056183d02fe8aa3b65db49) ) // CD
ROM_END
ROM_START( gundcb83b )

View File

@ -2,11 +2,11 @@
// copyright-holders: David Haywood, Uki, Dirk Best
/***************************************************************************
Ganbare Chinsan Ooshoubu ()
© 1987 Sanritsu
Ganbare Chinsan Ooshoubu ()
© 1987 Sanritsu
Kiki-Ippatsu Mayumi-chan ()
© 1988 Victory L.L.C. (developed by Sanritsu)
Kiki-Ippatsu Mayumi-chan ()
© 1988 Victory L.L.C. (developed by Sanritsu)
TODO:
- Figure out the rest of the dip switches

View File

@ -506,7 +506,7 @@ static ADDRESS_MAP_START( dunhuang_io_map, AS_IO, 8, dunhuang_state )
AM_RANGE( 0x0081, 0x0081 ) AM_DEVWRITE("ymsnd", ym2413_device, register_port_w)
AM_RANGE( 0x0089, 0x0089 ) AM_DEVWRITE("ymsnd", ym2413_device, data_port_w)
AM_RANGE( 0x0082, 0x0082 ) AM_DEVWRITE("oki", okim6295_device, write)
AM_RANGE( 0x0082, 0x0082 ) AM_DEVWRITE("oki", okim6295_device, write)
AM_RANGE( 0x0083, 0x0083 ) AM_DEVWRITE("ramdac", ramdac_device, index_w)
AM_RANGE( 0x008b, 0x008b ) AM_DEVWRITE("ramdac", ramdac_device, pal_w)

View File

@ -32,8 +32,8 @@
halves of the palette are identical, this is not an issue. See $039c.
The other games have a different color test, not using the busy loop.
- dealer/beastf/revngr84: "PSG registers not OK" in service mode thru
sound menu, internal ay8910 not right?
- dealer/beastf/revngr84: "PSG registers not OK" in service mode thru
sound menu, internal ay8910 not right?
***************************************************************************/
@ -499,7 +499,7 @@ static MACHINE_CONFIG_START( dealer ) /* EPOS TRISTAR 9000 PCB */
// RAM-based palette instead of prom
MCFG_PALETTE_ADD_INIT_BLACK("palette", 32)
// MCFG_PALETTE_INIT_OWNER(epos_state, epos)
// MCFG_PALETTE_INIT_OWNER(epos_state, epos)
MCFG_WATCHDOG_ADD("watchdog")

View File

@ -5,13 +5,13 @@
Flower (c) 1986 Clarue
driver by Angelo Salese,
original "wiped off due of not anymore licenseable" driver by insideoutboy.
original "wiped off due of not anymore licenseable" driver by insideoutboy.
TODO:
- sprite zooming;
- some video glitches;
- $a000 outputs;
- sound, third z80 not hooked up;
TODO:
- sprite zooming;
- some video glitches;
- $a000 outputs;
- sound, third z80 not hooked up;
===============================================================================

View File

@ -1248,10 +1248,10 @@ ROM_START( footbpow )
ROM_LOAD( "fop_26.ic26", 0x0040000, 0x020000, CRC(b5877b68) SHA1(6f6f00da84d6d84895691266c2022fd4cd92f228) )
ROM_LOAD( "fop_27.ic27", 0x0060000, 0x020000, CRC(58309912) SHA1(eb62ccfd75fc168338d30bc30214e6f9f62e5e70) )
/* these 4 are copies of the previous 4 */
// ROM_LOAD( "fop_34.ic34", 0x0000000, 0x020000, CRC(3214ae1b) SHA1(3ae2fa28ef603b34b3c72313c513f200e2750b85) )
// ROM_LOAD( "fop_35.ic35", 0x0020000, 0x020000, CRC(69a8734c) SHA1(835db85371d8fbf0c1a2bc0c6109286f12c95794) )
// ROM_LOAD( "fop_36.ic36", 0x0040000, 0x020000, CRC(b5877b68) SHA1(6f6f00da84d6d84895691266c2022fd4cd92f228) )
// ROM_LOAD( "fop_37.ic37", 0x0060000, 0x020000, CRC(58309912) SHA1(eb62ccfd75fc168338d30bc30214e6f9f62e5e70) )
// ROM_LOAD( "fop_34.ic34", 0x0000000, 0x020000, CRC(3214ae1b) SHA1(3ae2fa28ef603b34b3c72313c513f200e2750b85) )
// ROM_LOAD( "fop_35.ic35", 0x0020000, 0x020000, CRC(69a8734c) SHA1(835db85371d8fbf0c1a2bc0c6109286f12c95794) )
// ROM_LOAD( "fop_36.ic36", 0x0040000, 0x020000, CRC(b5877b68) SHA1(6f6f00da84d6d84895691266c2022fd4cd92f228) )
// ROM_LOAD( "fop_37.ic37", 0x0060000, 0x020000, CRC(58309912) SHA1(eb62ccfd75fc168338d30bc30214e6f9f62e5e70) )
ROM_END

View File

@ -10557,18 +10557,18 @@ ROM_START( cmast99b )
ROM_END
/*
A-Plan
(C) 1993 WeaShing H.K.
A-Plan
(C) 1993 WeaShing H.K.
TMP91P640 @ 5MHz or 10MHz (or SDIP64 gfx chip of some kind?)
Z80 [clock probably 12/4]
8255 x2
YM2149 [clock probably 12/8]
12MHz and 10MHz XTALs
6116 2kx8 SRAM x4
BPROM 82S129 x2
8-position DIPSW x5
PCB number only says 'WEASHING'
TMP91P640 @ 5MHz or 10MHz (or SDIP64 gfx chip of some kind?)
Z80 [clock probably 12/4]
8255 x2
YM2149 [clock probably 12/8]
12MHz and 10MHz XTALs
6116 2kx8 SRAM x4
BPROM 82S129 x2
8-position DIPSW x5
PCB number only says 'WEASHING'
*/
ROM_START( aplan ) // Has "DYNA QL-1 V1.01" string.

View File

@ -1372,7 +1372,7 @@ INPUT_PORTS_END
hp9845ct_base_state::hp9845ct_base_state(const machine_config &mconfig, device_type type, const char *tag)
: hp9845_base_state(mconfig , type , tag),
m_io_softkeys(*this, "SOFTKEYS"),
m_io_softkeys(*this, "SOFTKEYS"),
m_lightpen_x(*this, "LIGHTPENX"),
m_lightpen_y(*this, "LIGHTPENY"),
m_lightpen_sw(*this, "GKEY")
@ -2787,7 +2787,7 @@ READ16_MEMBER(hp9845t_state::graphic_r)
}
// TODO: gsr/
if (m_gv_sk_status) {
BIT_SET(res, 1); // Softkey service request
BIT_SET(res, 1); // Softkey service request
}
BIT_SET(res, 9); // ID
BIT_SET(res, 11); // ID
@ -3258,10 +3258,10 @@ void hp9845t_state::advance_gv_fsm(bool ds , bool trigger)
break;
case 0xc: // load color mask (no effect, just for compatibility with 9845c), takes a single word as parameter
break;
case 0xe: // Y cursor position
case 0xe: // Y cursor position
m_gv_lyc = m_gv_data_w;
break;
case 0xf: // X cursor position
case 0xf: // X cursor position
m_gv_lxc = m_gv_data_w;
break;
default:

View File

@ -288,7 +288,7 @@ uint8_t common_state::read_key(required_ioport_array<8> & key, uint8_t mask)
void common_state::debug_out()
{
// popmessage("OUT: %04X | %04X | %02X--", m_out1 >> 16, m_out2 >> 16, m_out3 >> 24);
// popmessage("OUT: %04X | %04X | %02X--", m_out1 >> 16, m_out2 >> 16, m_out3 >> 24);
}
/***************************************************************************
@ -346,18 +346,18 @@ void darkhors_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprec
for ( ; s < end; s += 8/4 )
{
int sx = (s[ 0 ] >> 16);
int sy = (s[ 0 ] & 0xffff);
int attr = (s[ 1 ] >> 16);
int code = (s[ 1 ] & 0xffff);
int sx = (s[ 0 ] >> 16);
int sy = (s[ 0 ] & 0xffff);
int attr = (s[ 1 ] >> 16);
int code = (s[ 1 ] & 0xffff);
// List end
if (sx & 0x8000)
break;
int flipx = 0;
int flipy = 0;
int color = (attr & 0x0200) ? (attr & 0x1ff) : (attr & 0x1ff) * 4;
int flipx = 0;
int flipy = 0;
int color = (attr & 0x0200) ? (attr & 0x1ff) : (attr & 0x1ff) * 4;
// Sign extend the position
sx = (sx & 0x1ff) - (sx & 0x200);
@ -570,9 +570,9 @@ static ADDRESS_MAP_START( jclub2o_map, AS_PROGRAM, 32, jclub2o_state )
AM_RANGE(0x490000, 0x490003) AM_WRITE(eeprom_s29290_w)
AM_RANGE(0x4a0000, 0x4a0003) AM_WRITE(out2_w)
// AM_RANGE(0x4a0010, 0x4a0013) AM_WRITE
// AM_RANGE(0x4a0020, 0x4a0023) AM_WRITE
// AM_RANGE(0x4a0030, 0x4a0033) AM_WRITE
// AM_RANGE(0x4a0010, 0x4a0013) AM_WRITE
// AM_RANGE(0x4a0020, 0x4a0023) AM_WRITE
// AM_RANGE(0x4a0030, 0x4a0033) AM_WRITE
// ST-0016
AM_RANGE(0x4b0000, 0x4b0003) AM_READWRITE(cmd1_word_r, cmd1_word_w)
@ -591,14 +591,14 @@ static ADDRESS_MAP_START( jclub2o_map, AS_PROGRAM, 32, jclub2o_state )
AM_RANGE(0x580008, 0x58000b) AM_READ_PORT("COIN")
AM_RANGE(0x58000c, 0x58000f) AM_WRITE(input_sel1_out3_w)
AM_RANGE(0x580010, 0x580013) AM_WRITE(out1_w)
// AM_RANGE(0x580018, 0x58001b) AM_WRITE
// AM_RANGE(0x58001c, 0x58001f) AM_WRITE
// AM_RANGE(0x580018, 0x58001b) AM_WRITE
// AM_RANGE(0x58001c, 0x58001f) AM_WRITE
AM_RANGE(0x580200, 0x580203) AM_DEVREAD16("watchdog", watchdog_timer_device, reset16_r, 0xffff0000)
AM_RANGE(0x580400, 0x580403) AM_READWRITE8(console_r, console_w, 0x00ff0000)
AM_RANGE(0x580420, 0x580423) AM_READ8(console_status_r, 0x00ff0000) //AM_WRITE
// AM_RANGE(0x580440, 0x580443) AM_WRITE
// AM_RANGE(0x580440, 0x580443) AM_WRITE
// ST-0020
AM_RANGE(0x600000, 0x67ffff) AM_DEVREADWRITE16( "st0020", st0020_device, sprram_r, sprram_w, 0xffffffff );
@ -706,14 +706,14 @@ static ADDRESS_MAP_START( jclub2_map, AS_PROGRAM, 32, jclub2_state )
AM_RANGE(0x580008, 0x58000b) AM_READ_PORT("COIN")
AM_RANGE(0x58000c, 0x58000f) AM_WRITE(input_sel1_out3_w)
AM_RANGE(0x580010, 0x580013) AM_WRITE(out1_w)
// AM_RANGE(0x580018, 0x58001b) AM_WRITE
// AM_RANGE(0x58001c, 0x58001f) AM_WRITE
// AM_RANGE(0x580018, 0x58001b) AM_WRITE
// AM_RANGE(0x58001c, 0x58001f) AM_WRITE
AM_RANGE(0x580200, 0x580203) AM_DEVREAD16("watchdog", watchdog_timer_device, reset16_r, 0xffff0000)
AM_RANGE(0x580400, 0x580403) AM_READWRITE8(console_r, console_w, 0x00ff0000)
AM_RANGE(0x580420, 0x580423) AM_READ8(console_status_r, 0x00ff0000) //AM_WRITE
// AM_RANGE(0x580440, 0x580443) AM_WRITE
// AM_RANGE(0x580440, 0x580443) AM_WRITE
// ST-0032
AM_RANGE(0x800000, 0x87ffff) AM_DEVREADWRITE16( "st0020", st0020_device, sprram_r, sprram_w, 0xffffffff );
@ -786,11 +786,11 @@ static ADDRESS_MAP_START( darkhors_map, AS_PROGRAM, 32, darkhors_state )
AM_RANGE(0x580004, 0x580007) AM_READ_PORT("COIN")
AM_RANGE(0x580008, 0x58000b) AM_READ(input_r)
AM_RANGE(0x58000c, 0x58000f) AM_WRITE(input_sel_w)
// AM_RANGE(0x580010, 0x580013) AM_WRITE
// AM_RANGE(0x580018, 0x58001b) AM_WRITE
// AM_RANGE(0x58001c, 0x58001f) AM_WRITE
// AM_RANGE(0x580010, 0x580013) AM_WRITE
// AM_RANGE(0x580018, 0x58001b) AM_WRITE
// AM_RANGE(0x58001c, 0x58001f) AM_WRITE
AM_RANGE(0x580084, 0x580087) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0xff000000)
// AM_RANGE(0x58008c, 0x58008f) AM_WRITE
// AM_RANGE(0x58008c, 0x58008f) AM_WRITE
AM_RANGE(0x580200, 0x580203) AM_DEVREAD16("watchdog", watchdog_timer_device, reset16_r, 0xffff0000)
AM_RANGE(0x580400, 0x580403) AM_READWRITE8(console_r, console_w, 0x00ff0000)
@ -1318,7 +1318,7 @@ ROM_START( jclub2v203 )
ROM_REGION16_BE( 0x100, "eeprom", 0 )
// 2.03X (JC26203 :00020400C5IK)
// ROM_LOAD16_WORD_SWAP( "eeprom-jclub2o.bin", 0x000, 0x100, CRC(dd1c88ec) SHA1(acb67e41e832f203361e0f93afcd4eaf963fd13e) ) // dump (SETA1997JC26203 )
// ROM_LOAD16_WORD_SWAP( "eeprom-jclub2o.bin", 0x000, 0x100, CRC(dd1c88ec) SHA1(acb67e41e832f203361e0f93afcd4eaf963fd13e) ) // dump (SETA1997JC26203 )
ROM_LOAD16_WORD_SWAP( "eeprom_jc2v203", 0x000, 0x100, CRC(c1bc58e7) SHA1(4670c94fd655d223f21254167e4334b81affdf8d) ) // from MAME (SETA1997JC26203 )
ROM_END

View File

@ -2,47 +2,47 @@
// copyright-holders: Jean-Francois DEL NERO
/***************************************************************************
Minitel 2
Minitel 2
The Minitel is a small, on-line computer/Videotex terminal with multi-services that
can be connected to any French telephone line. This terminal was widely used in France
during the 80's and 90's.
The Minitel is a small, on-line computer/Videotex terminal with multi-services that
can be connected to any French telephone line. This terminal was widely used in France
during the 80's and 90's.
There are several modeles and version. Most of them are based on a mcu from the 8051 family
and a EF9345 like semi graphic video chip.
There are several modeles and version. Most of them are based on a mcu from the 8051 family
and a EF9345 like semi graphic video chip.
The current implementation is an Minitel 2 from "La RADIOTECHNIQUE PORTENSEIGNE" / RPIC (Philips)
You can found more informations about this hardware there :
http://hxc2001.free.fr/minitel
The current implementation is an Minitel 2 from "La RADIOTECHNIQUE PORTENSEIGNE" / RPIC (Philips)
You can found more informations about this hardware there :
http://hxc2001.free.fr/minitel
What is implemented and working :
What is implemented and working :
- Main MCU
- Video output
- Keyboard
- Main MCU
- Video output
- Keyboard
What is not yet implemented :
What is not yet implemented :
- Modem and sound output.
- The rear serial port.
- Parameters I2C 24C02 EEPROM.
- Modem and sound output.
- The rear serial port.
- Parameters I2C 24C02 EEPROM.
The original firmware and the experimental demo rom are currently both working.
The original firmware and the experimental demo rom are currently both working.
Please note the current special function keys assignation :
Please note the current special function keys assignation :
F1 -> Suite
F2 -> Retour
F3 -> Envoi
F4 -> Repetition
F5 -> TEL
F6 -> Guide
F7 -> Sommaire
F8 -> Connexion/Fin
F9 -> Fonction
F10-> ON / OFF
F1 -> Suite
F2 -> Retour
F3 -> Envoi
F4 -> Repetition
F5 -> TEL
F6 -> Guide
F7 -> Sommaire
F8 -> Connexion/Fin
F9 -> Fonction
F10-> ON / OFF
With the official ROM you need to press F10 to switch on the CRT.
With the official ROM you need to press F10 to switch on the CRT.
****************************************************************************/

View File

@ -929,7 +929,7 @@ Notes:
Libero Grande (LG2/VER.A)
Tekken 3 (TET2/VER.A)
Ehrgeiz (EG2/VER.A)
Kart Duel (KTD1/VER.A)
Kart Duel (KTD1/VER.A)
Note that the games will also work without this PCB, minus the network functionality.
@ -1308,9 +1308,9 @@ static ADDRESS_MAP_START( namcos12_map, AS_PROGRAM, 32, namcos12_state )
AM_RANGE(0x1f1bff08, 0x1f1bff0f) AM_WRITENOP /* ?? */
AM_RANGE(0x1f700000, 0x1f70ffff) AM_WRITE16(dmaoffset_w, 0xffffffff) /* dma */
/* Network area */
// AM_RANGE(0x1f780000, 0x1f78ffff) AM_READWRITE16(link_sharedram_r, link_sharedram_w, 0xffffffff) /* H8 link CPU code */
// AM_RANGE(0x1f796000, 0x1f796003) AM_WRITE16(linkcpu_enable_w,0xffff0000)
// AM_RANGE(0x1f796020, 0x1f796023) AM_WRITE16(linkcpu_disable_w,0xffff0000)
// AM_RANGE(0x1f780000, 0x1f78ffff) AM_READWRITE16(link_sharedram_r, link_sharedram_w, 0xffffffff) /* H8 link CPU code */
// AM_RANGE(0x1f796000, 0x1f796003) AM_WRITE16(linkcpu_enable_w,0xffff0000)
// AM_RANGE(0x1f796020, 0x1f796023) AM_WRITE16(linkcpu_disable_w,0xffff0000)
AM_RANGE(0x1fa00000, 0x1fbfffff) AM_ROMBANK("bank1") /* banked roms */
ADDRESS_MAP_END

View File

@ -4387,12 +4387,12 @@ ROM_START( mushi2k4 )
NAOMI_DEFAULT_EEPROM
ROM_REGION( 0x5800000, "rom_board", ROMREGION_ERASEFF)
ROM_LOAD( "epr-24241.ic22", 0x00000000, 0x00400000, CRC(ad9237ce) SHA1(f1010a30281ae55bbaece17b6c6a6e9e558d291f) )
ROM_LOAD( "mpr-24242.ic1", 0x00800000, 0x01000000, CRC(b4b81edb) SHA1(65f1527b276838b6b20e14c563fe5ef1e7d0ff27) )
ROM_LOAD( "mpr-24243.ic2", 0x01800000, 0x01000000, CRC(ff812290) SHA1(57835738ba7d47c999dfdef6c93d10b4f2c55cd4) )
ROM_LOAD( "mpr-24244.ic3", 0x02800000, 0x01000000, CRC(f6b97d21) SHA1(f45c868500fd6bf751c84546df40054510a673c9) )
ROM_LOAD( "mpr-24245.ic4", 0x03800000, 0x01000000, CRC(9dcee46f) SHA1(570bc01a2d5efdbec8403e68831a8eafe77ca31f) )
ROM_LOAD( "mpr-24246.ic5", 0x04800000, 0x01000000, CRC(fd97e2f5) SHA1(c9f7438049def346c9a2f2275110c5b385cb57f0) )
ROM_LOAD( "epr-24241.ic22", 0x00000000, 0x00400000, CRC(ad9237ce) SHA1(f1010a30281ae55bbaece17b6c6a6e9e558d291f) )
ROM_LOAD( "mpr-24242.ic1", 0x00800000, 0x01000000, CRC(b4b81edb) SHA1(65f1527b276838b6b20e14c563fe5ef1e7d0ff27) )
ROM_LOAD( "mpr-24243.ic2", 0x01800000, 0x01000000, CRC(ff812290) SHA1(57835738ba7d47c999dfdef6c93d10b4f2c55cd4) )
ROM_LOAD( "mpr-24244.ic3", 0x02800000, 0x01000000, CRC(f6b97d21) SHA1(f45c868500fd6bf751c84546df40054510a673c9) )
ROM_LOAD( "mpr-24245.ic4", 0x03800000, 0x01000000, CRC(9dcee46f) SHA1(570bc01a2d5efdbec8403e68831a8eafe77ca31f) )
ROM_LOAD( "mpr-24246.ic5", 0x04800000, 0x01000000, CRC(fd97e2f5) SHA1(c9f7438049def346c9a2f2275110c5b385cb57f0) )
ROM_PARAMETER( ":rom_board:segam2crypt:key", "-1") // 315-5881 not populated
ROM_END

View File

@ -25,7 +25,7 @@
VT1682 - NOT compatible with NES, different video system, sound CPU (4x
main CPU clock), optional internal ROM etc. (will need it's own
driver)
driver)
todo (VT03):
@ -604,25 +604,25 @@ WRITE8_MEMBER(nes_vt_state::vt03_8000_w)
case 0x02: // hand?
//if ((data != 0x00) && (data != 0x2f) && (data != 0x31) && (data != 0x32) )
// logerror("%s vt03_8001_data_w latch %02x data %02x\n", machine().describe_context(), m_8000_addr_latch, data);
// logerror("%s vt03_8001_data_w latch %02x data %02x\n", machine().describe_context(), m_8000_addr_latch, data);
m_ppu->set_201x_reg(0x2, data);
break;
case 0x03: // dog?
//if ((data != 0x00) && (data != 0x2c) && (data != 0x2d) && (data != 0x2e) && (data != 0x2f) && (data != 0x32) && (data != 0x3d) && (data != 0x3e) && (data != 0x3f) && (data != 0x40) && (data != 0x41) && (data != 0x42) && (data != 0x43) && (data != 0x44) && (data != 0x45) && (data != 0x46))
// logerror("%s vt03_8001_data_w latch %02x data %02x\n", machine().describe_context(), m_8000_addr_latch, data);
// logerror("%s vt03_8001_data_w latch %02x data %02x\n", machine().describe_context(), m_8000_addr_latch, data);
m_ppu->set_201x_reg(0x3, data);
break;
case 0x04: // ball thrown
//if ((data != 0x00) && (data != 0x10) && (data != 0x12))
// logerror("%s vt03_8001_data_w latch %02x data %02x\n", machine().describe_context(), m_8000_addr_latch, data);
// logerror("%s vt03_8001_data_w latch %02x data %02x\n", machine().describe_context(), m_8000_addr_latch, data);
m_ppu->set_201x_reg(0x4, data);
break;
case 0x05: // ball thrown
//if ((data != 0x00) && (data != 0x11))
// logerror("%s vt03_8001_data_w latch %02x data %02x\n", machine().describe_context(), m_8000_addr_latch, data);
// logerror("%s vt03_8001_data_w latch %02x data %02x\n", machine().describe_context(), m_8000_addr_latch, data);
m_ppu->set_201x_reg(0x5, data);
break;
@ -739,7 +739,7 @@ ADDRESS_MAP_END
WRITE_LINE_MEMBER(nes_vt_state::apu_irq)
{
// set_input_line(N2A03_APU_IRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
// set_input_line(N2A03_APU_IRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
}
READ8_MEMBER(nes_vt_state::apu_read_mem)

View File

@ -2,27 +2,27 @@
// copyright-holders: Takahiro Nogi, Uki, Dirk Best
/***************************************************************************
Video System Mahjong hardware
Video System Mahjong hardware
Ojanko High School ()
© 1988 V-System Co.
Ojanko High School ()
© 1988 V-System Co.
Ojanko Yakata ( )
© 1986 V-System Co.
Ojanko Yakata ( )
© 1986 V-System Co.
Ojanko Yakata 2bankan ( 2)
© 1987 V-System Co.
Ojanko Yakata 2bankan ( 2)
© 1987 V-System Co.
Chinese Casino ()
© 1987 V-System Co.
Chinese Casino ()
© 1987 V-System Co.
Ojanko Club ()
© 1986 V-System Co.
Ojanko Club ()
© 1986 V-System Co.
TODO:
- Figure out the rest of the dip switches
- XTAL values/clocks
- Raw screen params
TODO:
- Figure out the rest of the dip switches
- XTAL values/clocks
- Raw screen params
***************************************************************************/

View File

@ -4977,8 +4977,8 @@ ROM_END
ROM_START( rkjanoh2 )
ROM_REGION( 0x10000, "maincpu", 0 )
ROM_LOAD( "pf_1", 0x000000, 0x001000, CRC(582e7eda) SHA1(96578b6142051d9452f23c8c1b674e2d8a4c3b62) )
ROM_LOAD( "pf_2", 0x001000, 0x001000, CRC(49e7dc40) SHA1(d6232a82b6927c79dd47884e5e2a6589c5524424) )
ROM_LOAD( "pf_1", 0x000000, 0x001000, CRC(582e7eda) SHA1(96578b6142051d9452f23c8c1b674e2d8a4c3b62) )
ROM_LOAD( "pf_2", 0x001000, 0x001000, CRC(49e7dc40) SHA1(d6232a82b6927c79dd47884e5e2a6589c5524424) )
ROM_LOAD( "pf_3_1", 0x002000, 0x001000, CRC(a1fdc929) SHA1(27cab4da2365bcf311d7f00d75e8db150183b108) )
ROM_LOAD( "pf_4l", 0x003000, 0x001000, CRC(c9ccdfa0) SHA1(ce6f2df7fb6739ddf0529bcae0596e4593ecc3e0) )
//ROM_LOAD( "pf_4_fewest", 0x003000, 0x001000, CRC(9a1650a0) SHA1(2da5957879d9f207721fc2f0d63dccc32850cbe2) )
@ -4991,7 +4991,7 @@ ROM_START( rkjanoh2 )
ROM_LOAD( "pf_8", 0x000000, 0x002000, CRC(c789e2b3) SHA1(33b5c8f22a1e337816a61fd2c91bc175a412d10e) )
ROM_REGION( 0x0020, "proms", 0 )
ROM_LOAD( "82s123", 0x000, 0x020, CRC(74a53e94) SHA1(ca9114bd9b2b07f5abe82616b41ae9fdb9537a4f) )
ROM_LOAD( "82s123", 0x000, 0x020, CRC(74a53e94) SHA1(ca9114bd9b2b07f5abe82616b41ae9fdb9537a4f) )
ROM_END
DRIVER_INIT_MEMBER(royalmah_state, tahjong)

View File

@ -2915,9 +2915,9 @@ ROM_END
CPU: 68000
ROM Board: 171-5873B
game No. 833-7246-03
pcb No. 837-7248-01
rom No. 834-7247-02
game No. 833-7246-03
pcb No. 837-7248-01
rom No. 834-7247-02
*/
ROM_START( shdancer )
ROM_REGION( 0x80000, "maincpu", 0 ) // 68000 code

View File

@ -6,10 +6,10 @@
Skeleton driver by R. Belmont
Main CPU: ROMless Mitsubishi M37450 rebadged as Namco C68 custom
I/O CPU: TMPZ84C011
Main CPU: ROMless Mitsubishi M37450 rebadged as Namco C68 custom
I/O CPU: TMPZ84C011
M37450 needs on-board timers implemented to go anywhere
M37450 needs on-board timers implemented to go anywhere
(see Mitsu '89 single-chip CPU databook on Bitsavers)
****************************************************************************/
@ -79,7 +79,7 @@ static MACHINE_CONFIG_START( m74 )
MCFG_CPU_ADD("maincpu", M37450, XTAL_8MHz) /* C68 @ 8.0MHz - main CPU */
MCFG_CPU_PROGRAM_MAP(c68_map)
MCFG_CPU_ADD("subcpu", TMPZ84C011, XTAL_12MHz / 3) /* Z84C011 @ 4 MHz - sub CPU */
MCFG_CPU_ADD("subcpu", TMPZ84C011, XTAL_12MHz / 3) /* Z84C011 @ 4 MHz - sub CPU */
MCFG_CPU_PROGRAM_MAP(sub_map)
MCFG_SCREEN_ADD("screen", RASTER)

View File

@ -141,8 +141,8 @@ WRITE8_MEMBER(stv_state::stv_ioga_w)
switch(offset)
{
case 0x07:
// if (data != m_system_output)
// logerror("OUT %02x\n", data);
// if (data != m_system_output)
// logerror("OUT %02x\n", data);
m_system_output = data;
/*Why does the BIOS tests these as ACTIVE HIGH? A program bug?*/
machine().bookkeeping().coin_counter_w(0,~data & 0x01);
@ -1698,15 +1698,15 @@ static INPUT_PORTS_START( patocar )
PORT_INCLUDE( stv )
PORT_MODIFY("PORTA")
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 ) // hopper ?
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 ) // hopper ?
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("hopper", ticket_dispenser_device, line_r)
PORT_BIT( 0xfc, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_MODIFY("PORTB")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 ) // ??
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON4 ) // Door switch ?
PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_BUTTON5 ) // ??
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_NAME("Medal")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 ) // ??
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON4 ) // Door switch ?
PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_BUTTON5 ) // ??
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_NAME("Medal")
PORT_BIT( 0xd0, IP_ACTIVE_LOW, IPT_UNUSED )
// TODO: sense/delta values seems wrong
@ -2821,11 +2821,11 @@ ROM_START( tatacot ) /* Must use Japan or Asia BIOS */
ROM_RELOAD ( 0x0100001, 0x0080000 )
ROM_RELOAD_PLAIN( 0x0200000, 0x0080000)
ROM_RELOAD_PLAIN( 0x0300000, 0x0080000)
// ROM_LOAD16_WORD_SWAP( "mpr18138.2", 0x0400000, 0x0400000, CRC(f5567049) SHA1(6eb35e4b5fbda39cf7e8c42b6a568bd53a364d6d) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18139.3", 0x0800000, 0x0400000, CRC(f36b4878) SHA1(e3f63c0046bd37b7ab02fb3865b8ebcf4cf68e75) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18140.4", 0x0c00000, 0x0400000, CRC(228850a0) SHA1(d83f7fa7df08407fa45a13661393679b88800805) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18141.5", 0x1000000, 0x0400000, CRC(b51eef36) SHA1(2745cba48dc410d6d31327b956886ec284b9eac3) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18142.6", 0x1400000, 0x0400000, CRC(cf259541) SHA1(51e2c8d16506d6074f6511112ec4b6b44bed4886) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18138.2", 0x0400000, 0x0400000, CRC(f5567049) SHA1(6eb35e4b5fbda39cf7e8c42b6a568bd53a364d6d) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18139.3", 0x0800000, 0x0400000, CRC(f36b4878) SHA1(e3f63c0046bd37b7ab02fb3865b8ebcf4cf68e75) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18140.4", 0x0c00000, 0x0400000, CRC(228850a0) SHA1(d83f7fa7df08407fa45a13661393679b88800805) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18141.5", 0x1000000, 0x0400000, CRC(b51eef36) SHA1(2745cba48dc410d6d31327b956886ec284b9eac3) ) // good
// ROM_LOAD16_WORD_SWAP( "mpr18142.6", 0x1400000, 0x0400000, CRC(cf259541) SHA1(51e2c8d16506d6074f6511112ec4b6b44bed4886) ) // good
ROM_LOAD16_WORD_SWAP( "mpr-18789.ic8", 0x1c00000, 0x0400000, CRC(b388616f) SHA1(0b2c5a547c3a6a8fb9f4ca54336cf6dc9adb8c6a) ) // good
ROM_LOAD16_WORD_SWAP( "mpr-18788.ic9", 0x2000000, 0x0400000, CRC(feae5867) SHA1(7d2e47d5ab18700a246d53fdb7872a905cdac55a) ) // good
@ -3549,7 +3549,7 @@ ROM_START( patocar )
ROM_LOAD16_WORD_SWAP( "ic24.bin", 0x0400000, 0x200000, CRC(cbbb687e) SHA1(cfc87ae6124f9978bb2432b98d77f0da07d020b7) )
ROM_LOAD16_WORD_SWAP( "ic26.bin", 0x0600000, 0x200000, CRC(91db9dbe) SHA1(8652fe45ce56633016403c75e8b3a7b77f279819) )
ROM_LOAD16_WORD_SWAP( "ic28.bin", 0x0800000, 0x200000, CRC(bff0cd9c) SHA1(3c62aa2d7f71bd6fb147fdcd8d99cd7815f3047e) )
ROM_LOAD16_WORD_SWAP( "ic30.bin", 0x0a00000, 0x200000, CRC(9a4109e5) SHA1(ba59caac5f5a80fc52c507d8a47f322a380aa9a1) ) // empty / FF filled
ROM_LOAD16_WORD_SWAP( "ic30.bin", 0x0a00000, 0x200000, CRC(9a4109e5) SHA1(ba59caac5f5a80fc52c507d8a47f322a380aa9a1) ) // empty / FF filled
ROM_REGION16_BE( 0x80, "eeprom", 0 ) // preconfigured to 1 player
ROM_LOAD( "patocar.nv", 0x0000, 0x0080, CRC(d9873ee8) SHA1(e74747816bba6745afd718b0beec67a884c6a31c) )

View File

@ -626,7 +626,7 @@ WRITE8_MEMBER( tm990189_state::video_joy_w )
// user tms9901 setup
static const tms9901_interface usr9901reset_param =
{
tms9901_device::INT1 | tms9901_device::INT2 | tms9901_device::INT3 | tms9901_device::INT4 | tms9901_device::INT5 | tms9901_device::INT6, // only input pins whose state is always known
tms9901_device::INT1 | tms9901_device::INT2 | tms9901_device::INT3 | tms9901_device::INT4 | tms9901_device::INT5 | tms9901_device::INT6, // only input pins whose state is always known
// Read handler. Covers all input lines (see tms9901.h)
DEVCB_NOOP,

View File

@ -5,7 +5,7 @@
"Universal System 16" Hardware (c) 1983/1986 Namco
driver by Angelo Salese,
original "wiped off due of not anymore licenseable" driver by Edgardo E. Contini Salvan.
original "wiped off due of not anymore licenseable" driver by Edgardo E. Contini Salvan.
TODO:
- PAL is presumably inverted with address bit 11 (0x800) for 0x6000-0x7fff area

View File

@ -994,7 +994,7 @@ static INPUT_PORTS_START( warfa )
PORT_DIPSETTING( 0x4000, "Medium Res 512x384" )
PORT_DIPSETTING( 0x0000, "VGA Res 640x480" )
PORT_MODIFY("IN1")
PORT_MODIFY("IN1")
PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_CODE(KEYCODE_J) PORT_NAME("Trigger")
PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CODE(KEYCODE_K) PORT_NAME("Discard")
PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CODE(KEYCODE_L) PORT_NAME("Jump")

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@ -86,7 +86,7 @@
mocapglf Security code error
mocapb,j Crash after self checks
p911 "Distribution error"
p911e,j,uc,kc Hangs at POST, with IRQ3 it crashes at first 3d frame
p911e,j,uc,kc Hangs at POST, with IRQ3 it crashes at first 3d frame
p9112 RTC self check bad
popn9 Doesn't boot: bad CHD?
sscopex/sogeki Security code error

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@ -13,7 +13,7 @@ Motherboard is FIC AZIIEA with AMD Duron processor of unknown speed
Chipset: VIA KT133a with VT8363A Northbridge and VT82C686B Southbridge
Video: Jaton 3DForce2MX-32, based on Nvidia GeForce 2MX chipset w/32 MB of VRAM
I/O: JAMMA adapter board connects to parallel port, VGA out, audio out.
Labelled "MEGAJAMMA 101 REV A2" for the stand-up Voyager
Labelled "MEGAJAMMA 101 REV A2" for the stand-up Voyager
HDD for stand-up Voyager is a Maxtor D740X-6L 20 GB model.

View File

@ -5,7 +5,7 @@
Skeleton driver for XaviX TV PNP console and childs (Let's! Play TV Classic)
CPU is an M6502 derivative where opcode 0x22 has 3 bytes of operands.
Definitely not: 65C816 or Mitsu M740.
Definitely not: 65C816 or Mitsu M740.
Code at F34F is thus:

View File

@ -161,8 +161,8 @@ public:
emu_timer *m_stv_rtc_timer;
uint8_t m_port_sel,m_mux_data;
uint8_t m_system_output;
uint8_t m_ioga_mode;
uint8_t m_ioga_portg;
uint8_t m_ioga_mode;
uint8_t m_ioga_portg;
uint16_t m_serial_tx;
required_device<sh2_device> m_maincpu;

View File

@ -30,7 +30,7 @@ private:
extern const device_type NV2A_HOST;
#define MCFG_NV2A_HOST_ADD(_tag, _cpu_tag) MCFG_PCI_HOST_ADD(_tag, NV2A_HOST, 0x10de02a5, 0, 0) \
#define MCFG_NV2A_HOST_ADD(_tag, _cpu_tag) MCFG_PCI_HOST_ADD(_tag, NV2A_HOST, 0x10de02a5, 0, 0) \
downcast<nv2a_host_device *>(device)->set_cpu_tag(_cpu_tag);
/*
@ -221,7 +221,7 @@ private:
extern const device_type MCPX_APU;
#define MCFG_MCPX_APU_ADD(_tag, _cpu_tag) MCFG_PCI_DEVICE_ADD(_tag, MCPX_APU, 0x10de01b0, 0, 0, 0) \
#define MCFG_MCPX_APU_ADD(_tag, _cpu_tag) MCFG_PCI_DEVICE_ADD(_tag, MCPX_APU, 0x10de01b0, 0, 0, 0) \
downcast<mcpx_apu_device *>(device)->set_cpu_tag(_cpu_tag);
/*

View File

@ -55,7 +55,7 @@
<!-- ToDo: Two of the Dipswitches enable an alt control schemes where Odds and Bet use
different buttons and lamps, but this is not the default and is supported neither
here nor in the driver -->
here nor in the driver -->
<view name="Button Lamps">
<screen index="0">
<bounds left="0" top="0" right="4" bottom="3" />

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@ -81,8 +81,8 @@ WRITE16_MEMBER(interpro_mcga_device::control_w)
// HACK: set or clear error status depending on ENMMBE bit
if (data & MCGA_CTRL_ENMMBE)
m_error |= MCGA_ERROR_VALID;
// else
// error &= ~MCGA_ERROR_VALID;
// else
// error &= ~MCGA_ERROR_VALID;
}
WRITE16_MEMBER(interpro_fmcc_device::control_w)
@ -92,6 +92,6 @@ WRITE16_MEMBER(interpro_fmcc_device::control_w)
// HACK: set or clear error status depending on ENMMBE bit
if (data & MCGA_CTRL_ENMMBE)
m_error |= MCGA_ERROR_VALID;
// else
// error &= ~MCGA_ERROR_VALID;
// else
// error &= ~MCGA_ERROR_VALID;
}

View File

@ -37,7 +37,7 @@
(when i.e. first boss goes to bottom of the screen and become unreachable)
- (btanb) Throw is made by quickly double jumping (!)
Heated Barrel
- (btanb) if player moves in diagonal a bogus projectile is fired.
- (btanb) if player moves in diagonal a bogus projectile is fired.
- gives random value to hi-score if you continue (only the first time, not a bug?);
- (fixed) throws random address exceptions at level 3 and above, a RAM address arrives corrupt in the snippet at 0x136a;
- (fixed) some corrupt sprites, probably a non-fatal version of the one above;

View File

@ -292,7 +292,7 @@ ac1_32 // 1984 Amateurcomputer AC1 (32 lines)
ac1scch // 1984 Amateurcomputer AC1 SCCH
@source:accomm.cpp
accomm // 1986 Acorn Computer
accomm // 1986 Acorn Computer
@source:aceex.cpp
aceex2814
@ -1238,7 +1238,7 @@ space84 // 1985 IBS/ComputerTechnik Space 84
uniap2en // 1982 Unitron AP II (in English)
uniap2pt // 1982 Unitron AP II (in Brazilian Portuguese)
uniap2ti // 1982 Unitron AP II+ (Teclado Inteligente)
craft2p // 1982 Craft?
craft2p // 1982 Craft?
@source:apple2e.cpp
apple2c // Apr 1984 Apple //c
@ -12062,7 +12062,7 @@ catapult // (c) 1982
dealer // (c) 198?
igmo // (c) 1984
megadon // (c) 1982
revngr84 // (c) 1984
revngr84 // (c) 1984
revenger // (c) 1984
suprglob // (c) 1983
theglob // (c) 1983
@ -15361,16 +15361,16 @@ jchan2 // (c) 1995 Kaneko
@source:jclub2.cpp
darkhors // bootleg of Jockey Club II
jclub2v100 // v1.00 5 OCT. 1994
jclub2v101 // v1.01 20 FEB. 1995
jclub2v110 // v1.10X 5 MAY. 1996
jclub2v112 // v1.12X 3 JUN. 1996
jclub2v200 // v2.00 7 SEP. 1996
jclub2v201 // v2.01 20 NOV. 1996
jclub2v203 // v2.03X RC 26 MAR. 1997
jclub2v204 // v2.04 30 APR. 1997
jclub2v205 // v2.05 21 JUL. 1997
jclub2v220 // v2.20 14 APR. 1998
jclub2v100 // v1.00 5 OCT. 1994
jclub2v101 // v1.01 20 FEB. 1995
jclub2v110 // v1.10X 5 MAY. 1996
jclub2v112 // v1.12X 3 JUN. 1996
jclub2v200 // v2.00 7 SEP. 1996
jclub2v201 // v2.01 20 NOV. 1996
jclub2v203 // v2.03X RC 26 MAR. 1997
jclub2v204 // v2.04 30 APR. 1997
jclub2v205 // v2.05 21 JUL. 1997
jclub2v220 // v2.20 14 APR. 1998
@source:jedi.cpp
jedi // 136030 (c) 1984
@ -20968,7 +20968,7 @@ monzagpb // bootleg
bucky // GX173 (c) 1992 (World)
buckyaab // GX173 (c) 1992 (Asia)
buckyea // GX173 (c) 1992 (World)
buckyjaa // GX173 (c) 1992 (Japan)
buckyjaa // GX173 (c) 1992 (Japan)
buckyuab // GX173 (c) 1992 (US)
moomesa // GX151 (c) 1992 (World)
moomesaaab // GX151 (c) 1992 (Asia)
@ -33923,7 +33923,7 @@ shootoutb // bootleg
shootoutj // (c) 1985 Data East USA (Japan)
@source:shootaway2.cpp
shootaw2 // (c) 1996 Namco
shootaw2 // (c) 1996 Namco
@source:shougi.cpp
shougi // (c) 1982 (Arcade TV Game List - P.80, Left, 9 from top)
@ -35570,7 +35570,7 @@ spacegunu // C57 (c) 1990 Taito America Corporation (US)
ainferno // C45 (c) 1990 Taito America Corporation (US)
ainfernoj // C45 (c) 1990 Taito Corporation (Japan)
topland // B62 (c) 1988 Taito Corporation Japan (World)
toplandj // B62 (c) 1988 Taito Corporation (Japan)
toplandj // B62 (c) 1988 Taito Corporation (Japan)
@source:taitogn.cpp
chaoshea // 1998.10 Chaos Heat (V2.09O)
@ -37133,7 +37133,7 @@ votrtnt // 1980 Votrax Type-'N-Talk
@source:voyager.cpp
voyager // (c) 2002 Team Play, Inc.
voyagers // (c) 2002 Team Play, Inc.
voyagers // (c) 2002 Team Play, Inc.
policet2 // (c) 2003 Team Play, Inc.
@source:vp101.cpp

View File

@ -24,7 +24,7 @@ private:
static constexpr unsigned VBL_END = 8; // vblank ends in this scanline
static constexpr unsigned VDATA_START = 11; // video display begins in this scanline
static constexpr unsigned VDATA_END = 244; // video display ends in this scanline
static constexpr unsigned VBL_START = 248; // vblank starts in this scanline
static constexpr unsigned VBL_START = 248; // vblank starts in this scanline
public:
// total number of lines per frame (incl. vblank)

View File

@ -63,9 +63,9 @@ void st0020_device::device_start()
m_rom_size = rgn ? rgn->bytes() : 0;
// Allocate RAM
m_gfxram = make_unique_clear<uint16_t[]>(4 * 0x100000/2);
m_spriteram = make_unique_clear<uint16_t[]>(0x80000/2);
m_regs = make_unique_clear<uint16_t[]>(0x100/2);
m_gfxram = make_unique_clear<uint16_t[]>(4 * 0x100000/2);
m_spriteram = make_unique_clear<uint16_t[]>(0x80000/2);
m_regs = make_unique_clear<uint16_t[]>(0x100/2);
// Gfx element
const int granularity = 16;
@ -90,13 +90,13 @@ void st0020_device::device_start()
for (int i = 0; i < 4; ++i)
{
m_tmap[i]->set_transparent_pen(0);
// m_tmap[i]->set_scrolldy(-0x301, 0);
// m_tmap[i]->set_scrolldy(-0x301, 0);
}
// Save state
save_pointer(NAME(m_gfxram.get()), 4 * 0x100000/2);
save_pointer(NAME(m_spriteram.get()), 0x80000/2);
save_pointer(NAME(m_regs.get()), 0x100/2);
save_pointer(NAME(m_gfxram.get()), 4 * 0x100000/2);
save_pointer(NAME(m_spriteram.get()), 0x80000/2);
save_pointer(NAME(m_regs.get()), 0x100/2);
save_item(NAME(m_gfxram_bank));
}
@ -137,21 +137,21 @@ WRITE16_MEMBER(st0020_device::gfxram_bank_w)
// Tilemaps
int st0020_device::tmap_offset(int i)
{
return m_is_st0032 ? (m_regs[i * 16/2 + 0x28/2] & 0x007c) * 0x1000/2 :
(m_regs[i * 8/2 ] & 0x7c00) * 0x10/2 ;
return m_is_st0032 ? (m_regs[i * 16/2 + 0x28/2] & 0x007c) * 0x1000/2 :
(m_regs[i * 8/2 ] & 0x7c00) * 0x10/2 ;
}
int st0020_device::tmap_priority(int i)
{
return m_is_st0032 ? (m_regs[i * 16/2 + 0x24/2] & 0x0fc0) >> 6 :
(m_regs[i * 8/2 + 0x04/2] & 0x0fc0) >> 6 ;
return m_is_st0032 ? (m_regs[i * 16/2 + 0x24/2] & 0x0fc0) >> 6 :
(m_regs[i * 8/2 + 0x04/2] & 0x0fc0) >> 6 ;
}
int st0020_device::tmap_is_enabled(int i)
{
// jclub2 uses 0x19/0x00 for used/unused tilemaps
return m_is_st0032 ? m_regs[i * 16/2 + 0x24/2] & 0x0001 :
m_regs[i * 8/2 + 0x04/2] & 0x0001 ;
return m_is_st0032 ? m_regs[i * 16/2 + 0x24/2] & 0x0001 :
m_regs[i * 8/2 + 0x04/2] & 0x0001 ;
}
/***************************************************************************
@ -174,19 +174,19 @@ int st0020_device::tmap_is_enabled(int i)
inline void st0020_device::get_tile_info_i(int i, tilemap_t &tilemap, tile_data &tileinfo, tilemap_memory_index tile_index)
{
int offset = tmap_offset(i) + ((tile_index % 0x40) + (tile_index / 0x80) * 0x40) * 2;
uint16_t tile = m_spriteram[offset + 0] + ((tile_index / 0x40) & 1);
uint16_t color = m_spriteram[offset + 1];
uint16_t tile = m_spriteram[offset + 0] + ((tile_index / 0x40) & 1);
uint16_t color = m_spriteram[offset + 1];
if (m_is_st0032) color = (color & 0x1ff) * ((color & 0x200) ? 4 : 16);
else color = color * ((m_regs[i * 4 + 3] & 0x0100) ? 2 : 8);
if (m_is_st0032) color = (color & 0x1ff) * ((color & 0x200) ? 4 : 16);
else color = color * ((m_regs[i * 4 + 3] & 0x0100) ? 2 : 8);
SET_TILE_INFO_MEMBER(0, tile, color, 0);
}
TILE_GET_INFO_MEMBER(st0020_device::get_tile_info_0) { get_tile_info_i(0, tilemap, tileinfo, tile_index); }
TILE_GET_INFO_MEMBER(st0020_device::get_tile_info_1) { get_tile_info_i(1, tilemap, tileinfo, tile_index); }
TILE_GET_INFO_MEMBER(st0020_device::get_tile_info_2) { get_tile_info_i(2, tilemap, tileinfo, tile_index); }
TILE_GET_INFO_MEMBER(st0020_device::get_tile_info_3) { get_tile_info_i(3, tilemap, tileinfo, tile_index); }
TILE_GET_INFO_MEMBER(st0020_device::get_tile_info_0) { get_tile_info_i(0, tilemap, tileinfo, tile_index); }
TILE_GET_INFO_MEMBER(st0020_device::get_tile_info_1) { get_tile_info_i(1, tilemap, tileinfo, tile_index); }
TILE_GET_INFO_MEMBER(st0020_device::get_tile_info_2) { get_tile_info_i(2, tilemap, tileinfo, tile_index); }
TILE_GET_INFO_MEMBER(st0020_device::get_tile_info_3) { get_tile_info_i(3, tilemap, tileinfo, tile_index); }
// Sprite RAM
@ -285,7 +285,7 @@ WRITE16_MEMBER(st0020_device::tmap_st0020_w)
m_tmap[i]->set_scrollx(0, data);
break;
case 0x02/2:
m_tmap[i]->set_scrolly(0, data + m_regs[0x7a/2] + 1); // fixme update when writing offset
m_tmap[i]->set_scrolly(0, data + m_regs[0x7a/2] + 1); // fixme update when writing offset
break;
case 0x04/2:
// Priority/Enable?
@ -312,7 +312,7 @@ WRITE16_MEMBER(st0020_device::tmap_st0032_w)
m_tmap[i]->set_scrollx(0, data);
break;
case 0x02/2:
m_tmap[i]->set_scrolly(0, data + m_regs[0x78/2] - 1); // fixme update when writing offset
m_tmap[i]->set_scrolly(0, data + m_regs[0x78/2] - 1); // fixme update when writing offset
break;
case 0x08/2:
if ((old ^ data) & 0x007c)
@ -357,36 +357,36 @@ WRITE16_MEMBER(st0020_device::regs_st0020_w)
switch (offset)
{
// crtc
// jclub2v203:
// case 0x20/2: // 0000
// case 0x22/2: // 0000
// case 0x62/2: // 004C (normal monitor), 0050 (wide monitor)
// case 0x64/2: // 01AC (normal monitor), 01E0 (wide monitor)
// case 0x7c/2: // 0301 (normal monitor), 0302 (wide monitor)
// case 0x84/2: // 0082 (normal monitor), 0081 (wide monitor)
// jclub2v203:
// case 0x20/2: // 0000
// case 0x22/2: // 0000
// case 0x62/2: // 004C (normal monitor), 0050 (wide monitor)
// case 0x64/2: // 01AC (normal monitor), 01E0 (wide monitor)
// case 0x7c/2: // 0301 (normal monitor), 0302 (wide monitor)
// case 0x84/2: // 0082 (normal monitor), 0081 (wide monitor)
// gdfs:
// case 0x20/2: // 000C
// case 0x22/2: // 03F0
// case 0x68/2: // 0000 (normal), 0298 (flip screen)
// case 0x6a/2: // 0000 (normal), 0298 (flip screen)
// case 0x84/2: // 0002 (normal), 001A (flip screen) <- mask 0018 might be flip_xy
// case 0x20/2: // 000C
// case 0x22/2: // 03F0
// case 0x68/2: // 0000 (normal), 0298 (flip screen)
// case 0x6a/2: // 0000 (normal), 0298 (flip screen)
// case 0x84/2: // 0002 (normal), 001A (flip screen) <- mask 0018 might be flip_xy
// case 0x86/2: double buffering?
// case 0x86/2: double buffering?
case 0x8a/2:
gfxram_bank_w(space, offset, data, mem_mask);
break;
// blitter
case 0xc0/2: // source address
case 0xc0/2: // source address
case 0xc2/2:
case 0xc4/2: // destination address
case 0xc4/2: // destination address
case 0xc6/2:
case 0xc8/2: // length
case 0xc8/2: // length
break;
case 0xca/2: // start
case 0xca/2: // start
do_blit_w(space, offset, data, mem_mask);
break;
@ -407,25 +407,25 @@ WRITE16_MEMBER(st0020_device::regs_st0032_w)
switch (offset)
{
// crtc
// jclub2v200:
// case 0x62/2: // 004C (normal monitor), 0050 (wide monitor)
// case 0x64/2: // 01AC (normal monitor), 01E0 (wide monitor)
// jclub2v200:
// case 0x62/2: // 004C (normal monitor), 0050 (wide monitor)
// case 0x64/2: // 01AC (normal monitor), 01E0 (wide monitor)
// case 0x82/2: double buffering?
// case 0x82/2: double buffering?
case 0x86/2:
gfxram_bank_w(space, offset, data, mem_mask);
break;
// blitter
case 0xc0/2: // source address
case 0xc0/2: // source address
case 0xc2/2:
case 0xc4/2: // destination address
case 0xc4/2: // destination address
case 0xc6/2:
case 0xc8/2: // length
case 0xc8/2: // length
break;
case 0xca/2: // start
case 0xca/2: // start
do_blit_w(space, offset, data, mem_mask);
break;
@ -503,8 +503,8 @@ void st0020_device::draw_zooming_sprites(bitmap_ind16 &bitmap, const rectangle &
// Sprites list
uint16_t *spriteram = m_spriteram.get();
uint16_t *s1 = spriteram;
uint16_t *end1 = spriteram + 0x02000/2;
uint16_t *s1 = spriteram;
uint16_t *end1 = spriteram + 0x02000/2;
priority <<= 4;
@ -518,10 +518,10 @@ void st0020_device::draw_zooming_sprites(bitmap_ind16 &bitmap, const rectangle &
if (m_is_st0032)
{
num = s1[ 0 ];
sprite = s1[ 1 ];
xoffs = s1[ 2 ];
yoffs = s1[ 3 ];
num = s1[ 0 ];
sprite = s1[ 1 ];
xoffs = s1[ 2 ];
yoffs = s1[ 3 ];
// List end
if (num & 0x8000)
@ -529,10 +529,10 @@ void st0020_device::draw_zooming_sprites(bitmap_ind16 &bitmap, const rectangle &
}
else
{
xoffs = s1[ 0 ];
yoffs = s1[ 1 ];
sprite = s1[ 2 ];
num = s1[ 3 ];
xoffs = s1[ 0 ];
yoffs = s1[ 1 ];
sprite = s1[ 2 ];
num = s1[ 3 ];
// List end
if (sprite & 0x8000)
@ -657,9 +657,9 @@ void st0020_device::update_screen(screen_device &screen, bitmap_ind16 &bitmap, c
// tilemaps
for (int pri = 0x3f; pri >= 0; --pri)
for (int i = 0; i < 4; ++i)
if ( (layers_ctrl & (1 << i))
if ( (layers_ctrl & (1 << i))
&& (tmap_priority(i) == pri)
&& tmap_is_enabled(i) )
&& tmap_is_enabled(i) )
m_tmap[i]->draw(screen, bitmap, cliprect, 0, 0);
// sprites

View File

@ -58,7 +58,7 @@ public:
// overscan sizes in intv pixels
// these values are approximate.
static constexpr unsigned OVERSCAN_LEFT_WIDTH = 13;
static constexpr unsigned OVERSCAN_LEFT_WIDTH = 13;
static constexpr unsigned OVERSCAN_RIGHT_WIDTH = 17;
static constexpr unsigned OVERSCAN_TOP_HEIGHT = 12;
static constexpr unsigned OVERSCAN_BOTTOM_HEIGHT = 12;

View File

@ -78,7 +78,7 @@ static floppy_format_type floppy_formats[] = {
FLOPPY_APPLIX_FORMAT,
FLOPPY_HPI_FORMAT
FLOPPY_HPI_FORMAT
};
void CLIB_DECL ATTR_PRINTF(1,2) logerror(const char *format, ...)

View File

@ -785,8 +785,8 @@ void imgtool::partition::get_attribute_name(uint32_t attribute, const imgtool_at
//-------------------------------------------------
// imgtool_validitychecks - checks the validity
// of the imgtool modules
// imgtool_validitychecks - checks the validity
// of the imgtool modules
//-------------------------------------------------
bool imgtool_validitychecks(void)