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replace assert with guessed behavior + logerror (nw)

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Alex W. Jackson 2014-04-02 22:07:31 +00:00
parent ad10c5d0cd
commit e8b628402e
1 changed files with 2 additions and 2 deletions
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4
src/emu/cpu/i86/i86.c
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@ -1354,8 +1354,8 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0x8c: // i_mov_wsreg case 0x8c: // i_mov_wsreg
m_modrm = fetch(); m_modrm = fetch();
assert(((m_modrm & 0x38) >> 3) >= 0 && ((m_modrm & 0x38) >> 3) < ARRAY_LENGTH(m_sregs)); PutRMWord(m_sregs[(m_modrm & 0x18) >> 3]); // guess: ignore bit 5
PutRMWord(m_sregs[(m_modrm & 0x38) >> 3]); if(m_modrm & 0x20) logerror("%s: %06x: Mov Sreg - Invalid register\n", tag(), pc());
CLKM(MOV_RS,MOV_MS); CLKM(MOV_RS,MOV_MS);
break; break;