tms5220: Use device_clock_changed instead of custom method; misc. modernization (nw)

This commit is contained in:
AJR 2017-06-26 10:18:04 -04:00
parent b1576db62c
commit e8c51fbfb2
6 changed files with 16 additions and 23 deletions

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@ -1674,7 +1674,6 @@ void tms5220_device::device_start()
default:
fatalerror("Unknown variant in tms5220_set_variant\n");
}
m_clock = clock();
/* resolve callbacks */
m_irq_handler.resolve();
@ -1858,7 +1857,7 @@ WRITE_LINE_MEMBER( tms5220_device::rsq_w )
m_io_ready = 0;
update_ready_state();
/* How long does /READY stay inactive, when /RS is pulled low? I believe its almost always ~16 clocks (25 usec at 800khz as shown on the datasheet) */
m_timer_io_ready->adjust(attotime::from_hz(clock()/16), 1); // this should take around 10-16 (closer to ~11?) cycles to complete
m_timer_io_ready->adjust(clocks_to_attotime(16), 1); // this should take around 10-16 (closer to ~11?) cycles to complete
}
}
}
@ -1920,7 +1919,7 @@ WRITE_LINE_MEMBER( tms5220_device::wsq_w )
SET RATE (5220C and CD2501ECD only): ? cycles (probably ~16)
*/
// TODO: actually HANDLE the timing differences! currently just assuming always 16 cycles
m_timer_io_ready->adjust(attotime::from_hz(clock()/16), 1); // this should take around 10-16 (closer to ~15) cycles to complete for fifo writes, TODO: but actually depends on what command is written if in command mode
m_timer_io_ready->adjust(clocks_to_attotime(16), 1); // this should take around 10-16 (closer to ~15) cycles to complete for fifo writes, TODO: but actually depends on what command is written if in command mode
}
}
}
@ -1979,7 +1978,7 @@ WRITE8_MEMBER( tms5220_device::combined_rsq_wsq_w )
SET RATE (5220C and CD2501ECD only): ? cycles (probably ~16)
*/
// TODO: actually HANDLE the timing differences! currently just assuming always 16 cycles
m_timer_io_ready->adjust(attotime::from_hz(clock()/16), 1); // this should take around 10-16 (closer to ~15) cycles to complete for fifo writes, TODO: but actually depends on what command is written if in command mode
m_timer_io_ready->adjust(clocks_to_attotime(16), 1); // this should take around 10-16 (closer to ~15) cycles to complete for fifo writes, TODO: but actually depends on what command is written if in command mode
return;
case 1: // /RS active, /WS not
/* check for falling or rising edge */
@ -1992,7 +1991,7 @@ WRITE8_MEMBER( tms5220_device::combined_rsq_wsq_w )
m_io_ready = 0;
update_ready_state();
/* How long does /READY stay inactive, when /RS is pulled low? I believe its almost always ~16 clocks (25 usec at 800khz as shown on the datasheet) */
m_timer_io_ready->adjust(attotime::from_hz(clock()/16), 1); // this should take around 10-16 (closer to ~11?) cycles to complete
m_timer_io_ready->adjust(clocks_to_attotime(16), 1); // this should take around 10-16 (closer to ~11?) cycles to complete
return;
}
}
@ -2081,18 +2080,15 @@ READ_LINE_MEMBER( tms5220_device::readyq_r )
/**********************************************************************************************
tms5220_time_to_ready -- return the time in seconds until the ready line is asserted
tms5220_time_to_ready -- return the time until the ready line is asserted
***********************************************************************************************/
double tms5220_device::time_to_ready()
attotime tms5220_device::time_to_ready()
{
double cycles;
/* bring up to date first */
m_stream->update();
cycles = cycles_to_ready();
return cycles * 80.0 / m_clock;
return clocks_to_attotime(cycles_to_ready() * 80);
}
@ -2151,10 +2147,9 @@ void tms5220_device::sound_stream_update(sound_stream &stream, stream_sample_t *
***********************************************************************************************/
void tms5220_device::set_frequency(int frequency)
void tms5220_device::device_clock_changed()
{
m_stream->set_sample_rate(frequency / 80);
m_clock = frequency;
m_stream->set_sample_rate(clock() / 80);
}

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@ -87,9 +87,7 @@ public:
READ_LINE_MEMBER( readyq_r );
READ_LINE_MEMBER( intq_r );
double time_to_ready();
void set_frequency(int frequency);
attotime time_to_ready();
protected:
tms5220_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int variant);
@ -97,6 +95,7 @@ protected:
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_clock_changed() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
@ -248,7 +247,6 @@ private:
uint8_t m_write_latch;
sound_stream *m_stream;
int m_clock;
emu_timer *m_timer_io_ready;
/* callbacks */

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@ -619,7 +619,7 @@ WRITE8_MEMBER( atari_jsa_i_device::wrio_w )
if (m_tms5220 != nullptr)
{
int count = 5 | ((data >> 2) & 2);
m_tms5220->set_frequency(JSA_MASTER_CLOCK*2 / (16 - count));
m_tms5220->set_unscaled_clock(JSA_MASTER_CLOCK*2 / (16 - count));
m_tms5220->wsq_w((data >> 1) & 1);
m_tms5220->rsq_w((data >> 2) & 1);
}

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@ -398,7 +398,7 @@ WRITE8_MEMBER(atarisy1_state::via_pb_w)
/* bit 4 is connected to an up-counter, clocked by SYCLKB */
data = 5 | ((data >> 3) & 2);
m_tms->set_frequency(ATARI_CLOCK_14MHz/2 / (16 - data));
m_tms->set_unscaled_clock(ATARI_CLOCK_14MHz/2 / (16 - data));
}

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@ -341,7 +341,7 @@ WRITE8_MEMBER(atarisy2_state::switch_6502_w)
if (m_tms5220.found())
{
data = 12 | ((data >> 5) & 1);
m_tms5220->set_frequency(MASTER_CLOCK/4 / (16 - data) / 2);
m_tms5220->set_unscaled_clock(MASTER_CLOCK/4 / (16 - data) / 2);
}
}

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@ -195,7 +195,7 @@ WRITE16_MEMBER(gauntlet_state::sound_reset_w)
{
m_ym2151->reset();
m_tms5220->reset();
m_tms5220->set_frequency(ATARI_CLOCK_14MHz/2 / 11);
m_tms5220->set_unscaled_clock(ATARI_CLOCK_14MHz/2 / 11);
m_ym2151->set_output_gain(ALL_OUTPUTS, 0.0f);
m_pokey->set_output_gain(ALL_OUTPUTS, 0.0f);
m_tms5220->set_output_gain(ALL_OUTPUTS, 0.0f);
@ -249,7 +249,7 @@ WRITE8_MEMBER(gauntlet_state::sound_ctl_w)
case 3: /* speech squeak, bit D7 */
data = 5 | ((data >> 6) & 2);
m_tms5220->set_frequency(ATARI_CLOCK_14MHz/2 / (16 - data));
m_tms5220->set_unscaled_clock(ATARI_CLOCK_14MHz/2 / (16 - data));
break;
}
}