Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-07-05 09:57:47 +03:00
Code Issues Actions 33 Packages Projects Releases Wiki Activity

Fixed DASM for the new opcodes, nw

Browse Source
This commit is contained in:
angelosa 2016-02-09 20:14:40 +01:00
parent af839de735
commit e8d0922fb1
5 changed files with 23 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

16
src/devices/cpu/m6800/6800dasm.cpp
View File

@ -52,7 +52,8 @@ enum op_names {
rts, sba, sbca, sbcb, sec, sev, sta, stb, rts, sba, sbca, sbcb, sec, sev, sta, stb,
_std, sei, sts, stx, suba, subb, subd, swi, _std, sei, sts, stx, suba, subb, subd, swi,
wai, tab, tap, tba, tim, tpa, tst, tsta, wai, tab, tap, tba, tim, tpa, tst, tsta,
tstb, tsx, txs, asx1, asx2, xgdx, addx, adcx tstb, tsx, txs, asx1, asx2, xgdx, addx, adcx,
bitx
}; };
static const char *const op_name_str[] = { static const char *const op_name_str[] = {
@ -71,7 +72,8 @@ static const char *const op_name_str[] = {
"rts", "sba", "sbca", "sbcb", "sec", "sev", "sta", "stb", "rts", "sba", "sbca", "sbcb", "sec", "sev", "sta", "stb",
"std", "sei", "sts", "stx", "suba", "subb", "subd", "swi", "std", "sei", "sts", "stx", "suba", "subb", "subd", "swi",
"wai", "tab", "tap", "tba", "tim", "tpa", "tst", "tsta", "wai", "tab", "tap", "tba", "tim", "tpa", "tst", "tsta",
"tstb", "tsx", "txs", "asx1", "asx2", "xgdx", "addx", "adcx" "tstb", "tsx", "txs", "asx1", "asx2", "xgdx", "addx", "adcx",
"bitx"
}; };
/* /*
@ -82,7 +84,7 @@ static const char *const op_name_str[] = {
* 2 invalid opcode for 1:6800/6802/6808, 2:6801/6803, 4:HD63701 * 2 invalid opcode for 1:6800/6802/6808, 2:6801/6803, 4:HD63701
*/ */
static const UINT8 table[0x102][3] = { static const UINT8 table[0x104][3] = {
{ill, inh,7},{nop, inh,0},{ill, inh,7},{ill, inh,7},/* 00 */ {ill, inh,7},{nop, inh,0},{ill, inh,7},{ill, inh,7},/* 00 */
{lsrd,inh,1},{asld,inh,1},{tap, inh,0},{tpa, inh,0}, {lsrd,inh,1},{asld,inh,1},{tap, inh,0},{tpa, inh,0},
{inx, inh,0},{dex, inh,0},{clv, inh,0},{sev, inh,0}, {inx, inh,0},{dex, inh,0},{clv, inh,0},{sev, inh,0},
@ -151,7 +153,11 @@ static const UINT8 table[0x102][3] = {
/* extra instruction $fc for NSC-8105 */ /* extra instruction $fc for NSC-8105 */
{addx,ext,0}, {addx,ext,0},
/* extra instruction $ec for NSC-8105 */ /* extra instruction $ec for NSC-8105 */
{adcx,imb,0} {adcx,imb,0},
/* extra instruction $bb for NSC-8105 */
{bitx,imx,0},
/* extra instruction $b2 for NSC-8105 */
{stx,imx,0}
}; };
/* some macros to keep things short */ /* some macros to keep things short */
@ -188,6 +194,8 @@ static unsigned Dasm680x (int subtype, char *buf, unsigned pc, const UINT8 *opro
/* and check for extra instruction */ /* and check for extra instruction */
if (code == 0xfc) code = 0x0100; if (code == 0xfc) code = 0x0100;
if (code == 0xec) code = 0x0101; if (code == 0xec) code = 0x0101;
if (code == 0x7b) code = 0x0102;
if (code == 0x71) code = 0x0103;
} }
opcode = table[code][0]; opcode = table[code][0];

20
src/devices/cpu/m6800/6800ops.inc
View File

@ -2285,17 +2285,18 @@ OP_HANDLER( stx_ex )
} }
/* NSC8105 specific, guessed opcodes (tested by Night Gal Summer) */ /* NSC8105 specific, guessed opcodes (tested by Night Gal Summer) */
// $bb - load A from [X + $0] // $bb - $mask & [X + $disp8]
OP_HANDLER( ldax_imm ) OP_HANDLER( btst_ix )
{ {
UINT8 val; UINT8 val;
{EA=X+((M_RDOP_ARG(PCD)<<8) | M_RDOP_ARG((PCD+1)&0xffff));PC+=2;} UINT8 mask = M_RDOP_ARG(PCD);
val = RM(EAD); {EA=X+(M_RDOP_ARG(PCD+1));PC+=2;}
val = RM(EAD) & mask;
CLR_NZVC; SET_NZ8(val); CLR_NZVC; SET_NZ8(val);
} }
// $b2 - assuming correct, store first byte to (X + $disp8) // $b2 - assuming correct, store first byte to (X + $disp8)
OP_HANDLER( nsc_unk ) OP_HANDLER( stx_nsc )
{ {
IMM8; IMM8;
UINT8 val = RM(EAD); UINT8 val = RM(EAD);
@ -2304,13 +2305,4 @@ OP_HANDLER( nsc_unk )
CLR_NZV; CLR_NZV;
SET_NZ8(val); SET_NZ8(val);
WM(EAD,val); WM(EAD,val);
}
// $00 - store A to [X + $0]
OP_HANDLER( stax_imm )
{
CLR_NZV;
SET_NZ8(A);
EA=X;
WM(EAD,A);
} }

6
src/devices/cpu/m6800/6800tbl.inc
View File

@ -106,7 +106,7 @@ const m6800_cpu_device::op_func m6800_cpu_device::hd63701_insn[0x100] = {
const m6800_cpu_device::op_func m6800_cpu_device::nsc8105_insn[0x100] = { const m6800_cpu_device::op_func m6800_cpu_device::nsc8105_insn[0x100] = {
// 0 // 0
&m6800_cpu_device::stax_imm,&m6800_cpu_device::illegal,&m6800_cpu_device::nop, &m6800_cpu_device::illegal,&m6800_cpu_device::illegal,&m6800_cpu_device::tap, &m6800_cpu_device::illegal,&m6800_cpu_device::tpa, &m6800_cpu_device::illegal,&m6800_cpu_device::illegal,&m6800_cpu_device::nop, &m6800_cpu_device::illegal,&m6800_cpu_device::illegal,&m6800_cpu_device::tap, &m6800_cpu_device::illegal,&m6800_cpu_device::tpa,
// 8 // 8
&m6800_cpu_device::inx, &m6800_cpu_device::clv, &m6800_cpu_device::dex, &m6800_cpu_device::sev, &m6800_cpu_device::clc, &m6800_cpu_device::cli, &m6800_cpu_device::sec, &m6800_cpu_device::sei, &m6800_cpu_device::inx, &m6800_cpu_device::clv, &m6800_cpu_device::dex, &m6800_cpu_device::sev, &m6800_cpu_device::clc, &m6800_cpu_device::cli, &m6800_cpu_device::sec, &m6800_cpu_device::sei,
// 10 // 10
@ -150,9 +150,9 @@ const m6800_cpu_device::op_func m6800_cpu_device::nsc8105_insn[0x100] = {
// a8 // a8
&m6800_cpu_device::asl_ix, &m6800_cpu_device::dec_ix, &m6800_cpu_device::rol_ix, &m6800_cpu_device::illegal,&m6800_cpu_device::inc_ix, &m6800_cpu_device::jmp_ix, &m6800_cpu_device::tst_ix, &m6800_cpu_device::clr_ix, &m6800_cpu_device::asl_ix, &m6800_cpu_device::dec_ix, &m6800_cpu_device::rol_ix, &m6800_cpu_device::illegal,&m6800_cpu_device::inc_ix, &m6800_cpu_device::jmp_ix, &m6800_cpu_device::tst_ix, &m6800_cpu_device::clr_ix,
// b0 // b0
&m6800_cpu_device::neg_ex, &m6800_cpu_device::illegal,&m6800_cpu_device::nsc_unk,&m6800_cpu_device::com_ex, &m6800_cpu_device::lsr_ex, &m6800_cpu_device::ror_ex, &m6800_cpu_device::illegal,&m6800_cpu_device::asr_ex, &m6800_cpu_device::neg_ex, &m6800_cpu_device::illegal,&m6800_cpu_device::stx_nsc,&m6800_cpu_device::com_ex, &m6800_cpu_device::lsr_ex, &m6800_cpu_device::ror_ex, &m6800_cpu_device::illegal,&m6800_cpu_device::asr_ex,
// b8 // b8
&m6800_cpu_device::asl_ex, &m6800_cpu_device::dec_ex, &m6800_cpu_device::rol_ex, &m6800_cpu_device::ldax_imm,&m6800_cpu_device::inc_ex, &m6800_cpu_device::jmp_ex, &m6800_cpu_device::tst_ex, &m6800_cpu_device::clr_ex, &m6800_cpu_device::asl_ex, &m6800_cpu_device::dec_ex, &m6800_cpu_device::rol_ex, &m6800_cpu_device::btst_ix,&m6800_cpu_device::inc_ex, &m6800_cpu_device::jmp_ex, &m6800_cpu_device::tst_ex, &m6800_cpu_device::clr_ex,
&m6800_cpu_device::subb_im,&m6800_cpu_device::sbcb_im,&m6800_cpu_device::cmpb_im,&m6800_cpu_device::illegal,&m6800_cpu_device::andb_im,&m6800_cpu_device::ldb_im, &m6800_cpu_device::bitb_im,&m6800_cpu_device::stb_im, &m6800_cpu_device::subb_im,&m6800_cpu_device::sbcb_im,&m6800_cpu_device::cmpb_im,&m6800_cpu_device::illegal,&m6800_cpu_device::andb_im,&m6800_cpu_device::ldb_im, &m6800_cpu_device::bitb_im,&m6800_cpu_device::stb_im,
&m6800_cpu_device::eorb_im,&m6800_cpu_device::orb_im, &m6800_cpu_device::adcb_im,&m6800_cpu_device::addb_im,&m6800_cpu_device::illegal,&m6800_cpu_device::ldx_im, &m6800_cpu_device::illegal,&m6800_cpu_device::stx_im, &m6800_cpu_device::eorb_im,&m6800_cpu_device::orb_im, &m6800_cpu_device::adcb_im,&m6800_cpu_device::addb_im,&m6800_cpu_device::illegal,&m6800_cpu_device::ldx_im, &m6800_cpu_device::illegal,&m6800_cpu_device::stx_im,
&m6800_cpu_device::subb_di,&m6800_cpu_device::sbcb_di,&m6800_cpu_device::cmpb_di,&m6800_cpu_device::illegal,&m6800_cpu_device::andb_di,&m6800_cpu_device::ldb_di, &m6800_cpu_device::bitb_di,&m6800_cpu_device::stb_di, &m6800_cpu_device::subb_di,&m6800_cpu_device::sbcb_di,&m6800_cpu_device::cmpb_di,&m6800_cpu_device::illegal,&m6800_cpu_device::andb_di,&m6800_cpu_device::ldb_di, &m6800_cpu_device::bitb_di,&m6800_cpu_device::stb_di,

5
src/devices/cpu/m6800/m6800.h
View File

@ -426,9 +426,8 @@ protected:
void cpx_im(); void cpx_im();
void cpx_ix(); void cpx_ix();
void trap(); void trap();
void ldax_imm(); void btst_ix();
void stax_imm(); void stx_nsc();
void nsc_unk();
}; };

8
src/mame/drivers/nightgal.cpp
View File

@ -87,7 +87,6 @@ public:
DECLARE_DRIVER_INIT(ngalsumr); DECLARE_DRIVER_INIT(ngalsumr);
DECLARE_DRIVER_INIT(royalqn); DECLARE_DRIVER_INIT(royalqn);
DECLARE_WRITE8_MEMBER(ngalsumr_unk_w); DECLARE_WRITE8_MEMBER(ngalsumr_unk_w);
DECLARE_READ8_MEMBER(ngalsumr_color_r);
virtual void machine_start() override; virtual void machine_start() override;
virtual void machine_reset() override; virtual void machine_reset() override;
virtual void video_start() override; virtual void video_start() override;
@ -1099,17 +1098,10 @@ WRITE8_MEMBER(nightgal_state::ngalsumr_unk_w)
//m_z80_latch = data; //m_z80_latch = data;
} }
// check with the unknown opcode, maybe it actually just masks with first parameter and second one is displacement byte offset?
READ8_MEMBER(nightgal_state::ngalsumr_color_r)
{
return (m_comms_ram[offset] & 0x80);
}
DRIVER_INIT_MEMBER(nightgal_state,ngalsumr) DRIVER_INIT_MEMBER(nightgal_state,ngalsumr)
{ {
m_maincpu->space(AS_PROGRAM).install_write_handler(0x6000, 0x6000, write8_delegate(FUNC(nightgal_state::ngalsumr_unk_w), this) ); m_maincpu->space(AS_PROGRAM).install_write_handler(0x6000, 0x6000, write8_delegate(FUNC(nightgal_state::ngalsumr_unk_w), this) );
// 0x6003 some kind of f/f state // 0x6003 some kind of f/f state
m_subcpu->space(AS_PROGRAM).install_read_handler(0x9000, 0x903f, read8_delegate(FUNC(nightgal_state::ngalsumr_color_r),this) );
} }
/* Type 1 HW */ /* Type 1 HW */