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z8000: Use callbacks to vector all external interrupts; correct data pushed during acknowledgment (nw)

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For NMI and NVI, a vector is read from the bus but merely stored on the stack. (Most Z8000 systems seem to just leave the bus open here.) For VI, the vector offset calculation has been changed for the Z8001: the low byte is multiplied by 2, not 4, so AD0 generally must be driven low.
This commit is contained in:
AJR 2020-04-16 18:46:27 -04:00
parent 675fb3e680
commit e8e453d061
7 changed files with 93 additions and 117 deletions
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78
src/devices/cpu/z8000/z8000.cpp
View File

@ -40,6 +40,7 @@ z8002_device::z8002_device(const machine_config &mconfig, device_type type, cons
, m_opcodes_config("first word", ENDIANNESS_BIG, 16, addrbits, 0)
, m_stack_config("stack", ENDIANNESS_BIG, 16, addrbits, 0)
, m_sio_config("special I/O", ENDIANNESS_BIG, iobits, 16, 0)
, m_iack_in(*this)
, m_mo_out(*this)
, m_ppc(0), m_pc(0), m_psapseg(0), m_psapoff(0), m_fcw(0), m_refresh(0), m_nspseg(0), m_nspoff(0), m_irq_req(0), m_irq_vec(0), m_op_valid(0), m_nmi_state(0), m_mi(0), m_halt(false), m_program(nullptr), m_data(nullptr), m_cache(nullptr), m_io(nullptr), m_icount(0)
, m_vector_mult(vecmult)
@ -333,41 +334,6 @@ void z8002_device::cycles(int cycles)
#include "z8000ops.hxx"
#include "z8000tbl.hxx"
void z8002_device::set_irq(int type)
{
switch ((type >> 8) & 255)
{
case Z8000_EPU >> 8:
m_irq_req = type;
break;
case Z8000_TRAP >> 8:
m_irq_req = type;
break;
case Z8000_NMI >> 8:
m_irq_req = type;
break;
case Z8000_SEGTRAP >> 8:
m_irq_req = type;
break;
case Z8000_NVI >> 8:
m_irq_req = type;
break;
case Z8000_VI >> 8:
m_irq_req = type;
break;
case Z8000_SYSCALL >> 8:
LOG("Z8K SYSCALL $%02x\n", type & 0xff);
m_irq_req = type;
break;
default:
logerror("Z8000 invalid Cause_Interrupt %04x\n", type);
return;
}
/* set interrupt request flag, reset HALT flag */
m_irq_req = type;
m_halt = false;
}
void z8002_device::PUSH_PC()
{
PUSHW(SP, m_pc); /* save current pc */
@ -447,7 +413,7 @@ void z8002_device::Interrupt()
CHANGE_FCW(fcw | F_S_N | F_SEG_Z8001());/* switch to segmented (on Z8001) system mode */
PUSH_PC();
PUSHW(SP, fcw); /* save current m_fcw */
PUSHW(SP, RDMEM_W(*m_program, m_ppc)); /* for internal traps, the 1st word of the instruction is pushed */
PUSHW(SP, m_op[0]); /* for internal traps, the 1st word of the instruction is pushed */
m_irq_req &= ~Z8000_EPU;
CHANGE_FCW(GET_FCW(EPU));
m_pc = GET_PC(EPU);
@ -459,7 +425,7 @@ void z8002_device::Interrupt()
CHANGE_FCW(fcw | F_S_N | F_SEG_Z8001());/* switch to segmented (on Z8001) system mode */
PUSH_PC();
PUSHW(SP, fcw); /* save current m_fcw */
PUSHW(SP, RDMEM_W(*m_program, m_ppc)); /* for internal traps, the 1st word of the instruction is pushed */
PUSHW(SP, m_op[0]); /* for internal traps, the 1st word of the instruction is pushed */
m_irq_req &= ~Z8000_TRAP;
CHANGE_FCW(GET_FCW(TRAP));
m_pc = GET_PC(TRAP);
@ -471,19 +437,22 @@ void z8002_device::Interrupt()
CHANGE_FCW(fcw | F_S_N | F_SEG_Z8001());/* switch to segmented (on Z8001) system mode */
PUSH_PC();
PUSHW(SP, fcw); /* save current m_fcw */
PUSHW(SP, RDMEM_W(*m_program, m_ppc)); /* for internal traps, the 1st word of the instruction is pushed */
PUSHW(SP, m_op[0]); /* for internal traps, the 1st word of the instruction is pushed */
m_irq_req &= ~Z8000_SYSCALL;
CHANGE_FCW(GET_FCW(SYSCALL));
m_pc = GET_PC(SYSCALL);
LOG("Z8K syscall $%04x\n", m_pc);
LOG("Z8K syscall [$%02x/$%04x]\n", m_op[0] & 0xff, m_pc);
}
else
if (m_irq_req & Z8000_SEGTRAP)
{
//standard_irq_callback(SEGT_LINE);
m_irq_vec = m_iack_in[0](m_pc);
CHANGE_FCW(fcw | F_S_N | F_SEG_Z8001());/* switch to segmented (on Z8001) system mode */
PUSH_PC();
PUSHW(SP, fcw); /* save current m_fcw */
PUSHW(SP, m_irq_req); /* save interrupt/trap type tag */
PUSHW(SP, m_irq_vec); /* save interrupt/trap type tag */
m_irq_req &= ~Z8000_SEGTRAP;
CHANGE_FCW(GET_FCW(SEGTRAP));
m_pc = GET_PC(SEGTRAP);
@ -492,10 +461,14 @@ void z8002_device::Interrupt()
else
if (m_irq_req & Z8000_NMI)
{
standard_irq_callback(NMI_LINE);
m_irq_vec = m_iack_in[1](m_pc);
m_halt = false;
CHANGE_FCW(fcw | F_S_N | F_SEG_Z8001());/* switch to segmented (on Z8001) system mode */
PUSH_PC();
PUSHW(SP, fcw); /* save current m_fcw */
PUSHW(SP, m_irq_req); /* save interrupt/trap type tag */
PUSHW(SP, m_irq_vec); /* save interrupt/trap type tag */
m_pc = RDMEM_W(*m_program, NMI);
m_irq_req &= ~Z8000_NMI;
CHANGE_FCW(GET_FCW(NMI));
@ -505,13 +478,14 @@ void z8002_device::Interrupt()
else
if ((m_irq_req & Z8000_NVI) && (m_fcw & F_NVIE))
{
int type = standard_irq_callback(NVI_LINE);
set_irq(type | Z8000_NVI);
standard_irq_callback(VI_LINE);
m_irq_vec = m_iack_in[2](m_pc);
m_halt = false;
CHANGE_FCW(fcw | F_S_N | F_SEG_Z8001());/* switch to segmented (on Z8001) system mode */
PUSH_PC();
PUSHW(SP, fcw); /* save current m_fcw */
PUSHW(SP, m_irq_req); /* save interrupt/trap type tag */
PUSHW(SP, m_irq_vec); /* save interrupt/trap type tag */
m_pc = GET_PC(NVI);
m_irq_req &= ~Z8000_NVI;
CHANGE_FCW(GET_FCW(NVI));
@ -520,29 +494,30 @@ void z8002_device::Interrupt()
else
if ((m_irq_req & Z8000_VI) && (m_fcw & F_VIE))
{
int type = standard_irq_callback(VI_LINE);
set_irq(type | Z8000_VI);
standard_irq_callback(VI_LINE);
m_irq_vec = m_iack_in[3](m_pc);
m_halt = false;
CHANGE_FCW(fcw | F_S_N | F_SEG_Z8001());/* switch to segmented (on Z8001) system mode */
PUSH_PC();
PUSHW(SP, fcw); /* save current m_fcw */
PUSHW(SP, m_irq_req); /* save interrupt/trap type tag */
PUSHW(SP, m_irq_vec); /* save interrupt/trap type tag */
m_pc = read_irq_vector();
m_irq_req &= ~Z8000_VI;
CHANGE_FCW(GET_FCW(VI));
LOG("Z8K VI [$%04x/$%04x] fcw $%04x, pc $%04x\n", m_irq_vec, VEC00 + ( m_vector_mult * 2 ) * (m_irq_req & 0xff), m_fcw, m_pc);
LOG("Z8K VI [$%04x/$%04x] fcw $%04x, pc $%04x\n", m_irq_vec, VEC00 + 2 * (m_irq_vec & 0xff), m_fcw, m_pc);
}
}
uint32_t z8002_device::read_irq_vector()
{
return RDMEM_W(*m_program, VEC00 + 2 * (m_irq_req & 0xff));
return RDMEM_W(*m_program, VEC00 + 2 * (m_irq_vec & 0xff));
}
uint32_t z8001_device::read_irq_vector()
{
return segmented_addr(RDMEM_L(*m_program, VEC00 + 4 * (m_irq_req & 0xff)));
return segmented_addr(RDMEM_L(*m_program, VEC00 + 2 * (m_irq_vec & 0xff)));
}
@ -574,7 +549,6 @@ void z8002_device::register_debug_state()
state_add( Z8000_PSAPOFF, "PSAPOFF", m_psapoff ).formatstr("%04X");
state_add( Z8000_PSAPSEG, "PSAPSEG", m_psapseg ).formatstr("%04X");
state_add( Z8000_REFRESH, "REFR", m_refresh ).formatstr("%04X");
state_add( Z8000_IRQ_REQ, "IRQR", m_irq_req ).formatstr("%04X");
state_add( Z8000_IRQ_VEC, "IRQV", m_irq_vec ).formatstr("%04X");
state_add( Z8000_R0, "R0", RW(0) ).formatstr("%04X");
state_add( Z8000_R1, "R1", RW(1) ).formatstr("%04X");
@ -701,6 +675,7 @@ void z8002_device::device_start()
register_save_state();
set_icountptr(m_icount);
m_iack_in.resolve_all_safe(0xffff);
m_mo_out.resolve_safe();
m_mi = CLEAR_LINE;
}
@ -757,7 +732,6 @@ void z8002_device::execute_set_input(int irqline, int state)
if (state != CLEAR_LINE)
{
m_irq_req = Z8000_NMI;
m_irq_vec = NMI;
}
}
else if (irqline < 2)

24
src/devices/cpu/z8000/z8000.h
View File

@ -23,14 +23,14 @@ class z8002_device : public cpu_device, public z8000_disassembler::config
{
protected:
/* Interrupt Types that can be generated by outside sources */
static constexpr uint16_t Z8000_EPU = 0x8000; /* extended instruction trap */
static constexpr uint16_t Z8000_TRAP = 0x4000; /* privileged instruction trap */
static constexpr uint16_t Z8000_NMI = 0x2000; /* non maskable interrupt */
static constexpr uint16_t Z8000_SEGTRAP = 0x1000; /* segment trap (Z8001) */
static constexpr uint16_t Z8000_NVI = 0x0800; /* non vectored interrupt */
static constexpr uint16_t Z8000_VI = 0x0400; /* vectored interrupt (LSB is vector) */
static constexpr uint16_t Z8000_SYSCALL = 0x0200; /* system call (lsb is vector) */
static constexpr uint16_t Z8000_RESET = 0x0100; /* reset flag */
static constexpr uint8_t Z8000_EPU = 0x80; /* extended instruction trap */
static constexpr uint8_t Z8000_TRAP = 0x40; /* privileged instruction trap */
static constexpr uint8_t Z8000_NMI = 0x20; /* non maskable interrupt */
static constexpr uint8_t Z8000_SEGTRAP = 0x10; /* segment trap (Z8001) */
static constexpr uint8_t Z8000_NVI = 0x08; /* non vectored interrupt */
static constexpr uint8_t Z8000_VI = 0x04; /* vectored interrupt (LSB is vector) */
static constexpr uint8_t Z8000_SYSCALL = 0x02; /* system call (lsb is vector) */
static constexpr uint8_t Z8000_RESET = 0x01; /* reset flag */
public:
enum
@ -50,6 +50,10 @@ public:
z8002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
~z8002_device();
auto segtack() { return m_iack_in[0].bind(); }
auto nmiack() { return m_iack_in[1].bind(); }
auto nviack() { return m_iack_in[2].bind(); }
auto viack() { return m_iack_in[3].bind(); }
auto mo() { return m_mo_out.bind(); }
DECLARE_WRITE_LINE_MEMBER(mi_w) { m_mi = state; } // XXX: this has to apply in the middle of an insn for now
@ -87,6 +91,7 @@ protected:
address_space_config m_opcodes_config;
address_space_config m_stack_config;
address_space_config m_sio_config;
devcb_read16::array<4> m_iack_in;
devcb_write_line m_mo_out;
uint32_t m_op[4]; /* opcodes/data of current instruction */
@ -98,7 +103,7 @@ protected:
uint16_t m_refresh; /* refresh timer/counter */
uint16_t m_nspseg; /* system stack pointer, segment (Z8001 only) */
uint16_t m_nspoff; /* system stack pointer, offset */
uint16_t m_irq_req; /* CPU is halted, interrupt or trap request */
uint8_t m_irq_req; /* reset, interrupt or trap request */
uint16_t m_irq_vec; /* interrupt vector */
uint32_t m_op_valid; /* bit field indicating if given op[] field is already initialized */
union
@ -144,7 +149,6 @@ protected:
inline void WRPORT_B(int mode, uint16_t addr, uint8_t value);
virtual void WRPORT_W(int mode, uint16_t addr, uint16_t value);
inline void cycles(int cycles);
inline void set_irq(int type);
virtual void PUSH_PC();
virtual void CHANGE_FCW(uint16_t fcw);
static inline uint32_t make_segmented_addr(uint32_t addr);

10
src/devices/cpu/z8000/z8000ops.hxx
View File

@ -266,10 +266,10 @@ uint32_t z8002_device::POPL(uint8_t src)
#define CHK_SUBL_V if (((~value & dest & ~result) | (value & ~dest & result)) & S32) SET_V
/* check for privileged instruction and trap if executed */
#define CHECK_PRIVILEGED_INSTR() if (!(m_fcw & F_S_N)) { m_irq_req = Z8000_TRAP; return; }
#define CHECK_PRIVILEGED_INSTR() if (!(m_fcw & F_S_N)) { m_irq_req |= Z8000_TRAP; return; }
/* if no EPU is present (it isn't), raise an extended intstuction trap */
#define CHECK_EXT_INSTR() if (!(m_fcw & F_EPU)) { m_irq_req = Z8000_EPU; return; }
#define CHECK_EXT_INSTR() if (!(m_fcw & F_EPU)) { m_irq_req |= Z8000_EPU; return; }
/******************************************
@ -2474,7 +2474,7 @@ void z8002_device::Z35_ssN0_dddd_imm16()
void z8002_device::Z36_0000_0000()
{
/* execute break point trap m_irq_req */
m_irq_req = Z8000_TRAP;
m_irq_req |= Z8000_TRAP;
}
/******************************************
@ -4872,8 +4872,8 @@ void z8002_device::Z7F_imm8()
{
GET_IMM8(0);
/* execute system call via IRQ */
m_irq_req = Z8000_SYSCALL | imm8;
m_irq_req |= Z8000_SYSCALL;
(void)imm8;
}
/******************************************

33
src/mame/drivers/m20.cpp
View File

@ -100,10 +100,10 @@ private:
virtual void machine_start() override;
virtual void machine_reset() override;
DECLARE_READ16_MEMBER(m20_i8259_r);
DECLARE_WRITE16_MEMBER(m20_i8259_w);
DECLARE_READ16_MEMBER(port21_r);
DECLARE_WRITE16_MEMBER(port21_w);
uint16_t i8259_r(offs_t offset);
void i8259_w(offs_t offset, uint16_t data);
uint16_t port21_r();
void port21_w(uint16_t data);
DECLARE_WRITE_LINE_MEMBER(tty_clock_tick_w);
DECLARE_WRITE_LINE_MEMBER(kbd_clock_tick_w);
DECLARE_WRITE_LINE_MEMBER(timer_tick_w);
@ -119,7 +119,7 @@ private:
void install_memory();
DECLARE_FLOPPY_FORMATS( floppy_formats );
IRQ_CALLBACK_MEMBER(m20_irq_callback);
uint16_t viack_r();
};
@ -169,15 +169,15 @@ port21 = 0x21 !TTL latch
! B7 See B3 input 0 => colour card present
*/
READ16_MEMBER(m20_state::port21_r)
uint16_t m20_state::port21_r()
{
//printf("port21 read: offset 0x%x\n", offset);
//printf("port21 read\n");
return m_port21;
}
WRITE16_MEMBER(m20_state::port21_w)
void m20_state::port21_w(uint16_t data)
{
//printf("port21 write: offset 0x%x, data 0x%x\n", offset, data);
//printf("port21 write: data 0x%x\n", data);
m_port21 = (m_port21 & 0xf8) | (data & 0x7);
// floppy drive select
@ -202,12 +202,12 @@ WRITE16_MEMBER(m20_state::port21_w)
m_fd1797->dden_w(data & 8);
}
READ16_MEMBER(m20_state::m20_i8259_r)
uint16_t m20_state::i8259_r(offs_t offset)
{
return m_i8259->read(offset)<<1;
}
WRITE16_MEMBER(m20_state::m20_i8259_w)
void m20_state::i8259_w(offs_t offset, uint16_t data)
{
m_i8259->write(offset, (data>>1));
}
@ -727,17 +727,14 @@ void m20_state::m20_io(address_map &map)
map(0x120, 0x127).rw("pit8253", FUNC(pit8253_device::read), FUNC(pit8253_device::write)).umask16(0x00ff);
map(0x140, 0x143).rw(FUNC(m20_state::m20_i8259_r), FUNC(m20_state::m20_i8259_w));
map(0x140, 0x143).rw(FUNC(m20_state::i8259_r), FUNC(m20_state::i8259_w));
map(0x3ffa, 0x3ffd).w(m_apb, FUNC(m20_8086_device::handshake_w));
}
IRQ_CALLBACK_MEMBER(m20_state::m20_irq_callback)
uint16_t m20_state::viack_r()
{
if (! irqline)
return 0xff; // NVI, value ignored
else
return m_i8259->acknowledge();
return m_i8259->acknowledge()<<1;
}
WRITE_LINE_MEMBER(m20_state::int_w)
@ -796,7 +793,7 @@ void m20_state::m20(machine_config &config)
m_maincpu->set_addrmap(AS_PROGRAM, &m20_state::m20_program_mem);
m_maincpu->set_addrmap(AS_DATA, &m20_state::m20_data_mem);
m_maincpu->set_addrmap(AS_IO, &m20_state::m20_io);
m_maincpu->set_irq_acknowledge_callback(FUNC(m20_state::m20_irq_callback));
m_maincpu->viack().set(FUNC(m20_state::viack_r));
RAM(config, RAM_TAG).set_default_size("160K").set_default_value(0).set_extra_options("128K,192K,224K,256K,384K,512K");

43
src/mame/drivers/p8k.cpp
View File

@ -64,12 +64,11 @@ class p8k_16_daisy_device : public device_t, public z80_daisy_chain_interface
{
public:
p8k_16_daisy_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
IRQ_CALLBACK_MEMBER(irq_callback) {
if(!irqline) return 0;
uint16_t viack_r() {
device_z80daisy_interface *intf = daisy_get_irq_device();
return intf ? intf->z80daisy_irq_ack() >> 1 : 0;
return intf ? intf->z80daisy_irq_ack() : 0;
}
DECLARE_WRITE8_MEMBER(reti_w) { if(data == 0x4d) daisy_call_reti_device(); }
void reti_w(uint8_t data) { if(data == 0x4d) daisy_call_reti_device(); }
protected:
void device_start() override {}
};
@ -98,18 +97,18 @@ public:
void init_p8k();
private:
DECLARE_READ8_MEMBER(p8k_port0_r);
DECLARE_WRITE8_MEMBER(p8k_port0_w);
uint8_t port0_r(offs_t offset);
void port0_w(offs_t offset, uint8_t data);
DECLARE_MACHINE_RESET(p8k);
DECLARE_WRITE_LINE_MEMBER(fdc_irq);
DECLARE_WRITE_LINE_MEMBER(p8k_daisy_interrupt);
DECLARE_WRITE_LINE_MEMBER(p8k_dma_irq_w);
DECLARE_WRITE_LINE_MEMBER(p8k_16_daisy_interrupt );
DECLARE_READ8_MEMBER(memory_read_byte);
DECLARE_WRITE8_MEMBER(memory_write_byte);
DECLARE_READ8_MEMBER(io_read_byte);
DECLARE_WRITE8_MEMBER(io_write_byte);
uint8_t memory_read_byte(offs_t offset);
void memory_write_byte(offs_t offset, uint8_t data);
uint8_t io_read_byte(offs_t offset);
void io_write_byte(offs_t offset, uint8_t data);
void p8k_16_datamap(address_map &map);
void p8k_16_iomap(address_map &map);
@ -152,7 +151,7 @@ void p8k_state::p8k_memmap(address_map &map)
void p8k_state::p8k_iomap(address_map &map)
{
map.global_mask(0xff);
map(0x00, 0x07).rw(FUNC(p8k_state::p8k_port0_r), FUNC(p8k_state::p8k_port0_w)); // MH7489
map(0x00, 0x07).rw(FUNC(p8k_state::port0_r), FUNC(p8k_state::port0_w)); // MH7489
map(0x08, 0x0b).rw("ctc0", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write));
map(0x0c, 0x0f).rw("pio0", FUNC(z80pio_device::read_alt), FUNC(z80pio_device::write_alt));
map(0x18, 0x1b).rw("pio1", FUNC(z80pio_device::read_alt), FUNC(z80pio_device::write_alt));
@ -166,13 +165,13 @@ void p8k_state::p8k_iomap(address_map &map)
READ8_MEMBER( p8k_state::p8k_port0_r )
uint8_t p8k_state::port0_r(offs_t offset)
{
return 0;
}
// see memory explanation above
WRITE8_MEMBER( p8k_state::p8k_port0_w )
void p8k_state::port0_w(offs_t offset, uint8_t data)
{
uint8_t breg = m_maincpu->state_int(Z80_B) >> 4;
if ((data==1) || (data==2) || (data==4))
@ -216,25 +215,25 @@ WRITE_LINE_MEMBER( p8k_state::p8k_dma_irq_w )
p8k_daisy_interrupt(state);
}
READ8_MEMBER(p8k_state::memory_read_byte)
uint8_t p8k_state::memory_read_byte(offs_t offset)
{
address_space& prog_space = m_maincpu->space(AS_PROGRAM);
return prog_space.read_byte(offset);
}
WRITE8_MEMBER(p8k_state::memory_write_byte)
void p8k_state::memory_write_byte(offs_t offset, uint8_t data)
{
address_space& prog_space = m_maincpu->space(AS_PROGRAM);
prog_space.write_byte(offset, data);
}
READ8_MEMBER(p8k_state::io_read_byte)
uint8_t p8k_state::io_read_byte(offs_t offset)
{
address_space& prog_space = m_maincpu->space(AS_IO);
return prog_space.read_byte(offset);
}
WRITE8_MEMBER(p8k_state::io_write_byte)
void p8k_state::io_write_byte(offs_t offset, uint8_t data)
{
address_space& prog_space = m_maincpu->space(AS_IO);
prog_space.write_byte(offset, data);
@ -488,11 +487,11 @@ void p8k_state::p8k(machine_config &config)
void p8k_state::p8k_16(machine_config &config)
{
/* basic machine hardware */
Z8001(config, m_maincpu, XTAL(4'000'000));
m_maincpu->set_addrmap(AS_PROGRAM, &p8k_state::p8k_16_memmap);
m_maincpu->set_addrmap(AS_DATA, &p8k_state::p8k_16_datamap);
m_maincpu->set_addrmap(AS_IO, &p8k_state::p8k_16_iomap);
m_maincpu->set_irq_acknowledge_callback("p8k_16_daisy", FUNC(p8k_16_daisy_device::irq_callback));
z8001_device &maincpu(Z8001(config, m_maincpu, XTAL(4'000'000)));
maincpu.set_addrmap(AS_PROGRAM, &p8k_state::p8k_16_memmap);
maincpu.set_addrmap(AS_DATA, &p8k_state::p8k_16_datamap);
maincpu.set_addrmap(AS_IO, &p8k_state::p8k_16_iomap);
maincpu.viack().set("p8k_16_daisy", FUNC(p8k_16_daisy_device::viack_r));
P8K_16_DAISY(config, m_daisy, 0);
m_daisy->set_daisy_config(p8k_16_daisy_chain);

19
src/mame/machine/m24_z8000.cpp
View File

@ -74,7 +74,8 @@ void m24_z8000_device::device_add_mconfig(machine_config &config)
m_z8000->set_addrmap(AS_PROGRAM, &m24_z8000_device::z8000_prog);
m_z8000->set_addrmap(AS_DATA, &m24_z8000_device::z8000_data);
m_z8000->set_addrmap(AS_IO, &m24_z8000_device::z8000_io);
m_z8000->set_irq_acknowledge_callback(FUNC(m24_z8000_device::int_cb));
m_z8000->nviack().set(FUNC(m24_z8000_device::nviack_r));
m_z8000->viack().set(FUNC(m24_z8000_device::viack_r));
m_z8000->mo().set(FUNC(m24_z8000_device::mo_w));
pit8253_device &pit8253(PIT8253(config, "pit8253", 0));
@ -183,15 +184,15 @@ WRITE8_MEMBER(m24_z8000_device::serctl_w)
m_z8000_mem = (data & 0x20) ? true : false;
}
IRQ_CALLBACK_MEMBER(m24_z8000_device::int_cb)
uint16_t m24_z8000_device::nviack_r()
{
if (!irqline)
{
m_z8000->set_input_line(z8001_device::NVI_LINE, CLEAR_LINE);
return 0xff; // NVI, value ignored
}
else
return m_pic->acknowledge();
m_z8000->set_input_line(z8001_device::NVI_LINE, CLEAR_LINE);
return 0xffff;
}
uint16_t m24_z8000_device::viack_r()
{
return m_pic->acknowledge() << 1;
}
READ8_MEMBER(m24_z8000_device::handshake_r)

3
src/mame/machine/m24_z8000.h
View File

@ -55,7 +55,8 @@ private:
DECLARE_WRITE_LINE_MEMBER(mo_w);
DECLARE_WRITE_LINE_MEMBER(timer_irq_w);
IRQ_CALLBACK_MEMBER(int_cb);
uint16_t nviack_r();
uint16_t viack_r();
};
DECLARE_DEVICE_TYPE(M24_Z8000, m24_z8000_device)