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Flipped the damn mem_mask. It is no longer inverted when passed to

Browse Source 
read/write handlers. Updated all drivers accordingly. Hope I didn't
miss anything important!

Blame OG and smf for goading me into it. :)
This commit is contained in:
Aaron Giles 2008-04-20 02:38:35 +00:00
parent 9017dbad99
commit e91eb4007c
219 changed files with 1252 additions and 1285 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

36
src/emu/cpu/h83002/h83002.c
View File

@ -3941,16 +3941,16 @@ static void h8_set_info(UINT32 state, cpuinfo *info)
static READ16_HANDLER( h8_itu_r ) static READ16_HANDLER( h8_itu_r )
{ {
if (mem_mask == 0) if (mem_mask == 0xffff)
{ {
// 16-bit read // 16-bit read
return h8_register_read8(offset*2 + 0xffff10)<<8 | h8_register_read8((offset*2) + 1 + 0xffff10); return h8_register_read8(offset*2 + 0xffff10)<<8 | h8_register_read8((offset*2) + 1 + 0xffff10);
} }
else if (mem_mask == 0xff) else if (mem_mask == 0xff00)
{ {
return h8_register_read8(offset*2 + 0xffff10)<<8; return h8_register_read8(offset*2 + 0xffff10)<<8;
} }
else if (mem_mask == 0xff00) else if (mem_mask == 0x00ff)
{ {
return h8_register_read8((offset*2) + 1 + 0xffff10); return h8_register_read8((offset*2) + 1 + 0xffff10);
} }
@ -3960,17 +3960,17 @@ static READ16_HANDLER( h8_itu_r )
static WRITE16_HANDLER( h8_itu_w ) static WRITE16_HANDLER( h8_itu_w )
{ {
if (mem_mask == 0) if (mem_mask == 0xffff)
{ {
// 16-bit write // 16-bit write
h8_register_write8(offset*2 + 0xffff10, data>>8); h8_register_write8(offset*2 + 0xffff10, data>>8);
h8_register_write8((offset*2) + 1 + 0xffff10, data&0xff); h8_register_write8((offset*2) + 1 + 0xffff10, data&0xff);
} }
else if (mem_mask == 0xff) else if (mem_mask == 0xff00)
{ {
h8_register_write8(offset*2 + 0xffff10, data>>8); h8_register_write8(offset*2 + 0xffff10, data>>8);
} }
else if (mem_mask == 0xff00) else if (mem_mask == 0x00ff)
{ {
h8_register_write8((offset*2) + 1 + 0xffff10, data&0xff); h8_register_write8((offset*2) + 1 + 0xffff10, data&0xff);
} }
@ -3978,16 +3978,16 @@ static WRITE16_HANDLER( h8_itu_w )
static READ16_HANDLER( h8_3007_itu_r ) static READ16_HANDLER( h8_3007_itu_r )
{ {
if (mem_mask == 0) if (mem_mask == 0xffff)
{ {
// 16-bit read // 16-bit read
return h8_3007_register_read8(offset*2 + 0xffff20)<<8 | h8_3007_register_read8((offset*2) + 1 + 0xffff20); return h8_3007_register_read8(offset*2 + 0xffff20)<<8 | h8_3007_register_read8((offset*2) + 1 + 0xffff20);
} }
else if (mem_mask == 0xff) else if (mem_mask == 0xff00)
{ {
return h8_3007_register_read8(offset*2 + 0xffff20)<<8; return h8_3007_register_read8(offset*2 + 0xffff20)<<8;
} }
else if (mem_mask == 0xff00) else if (mem_mask == 0x00ff)
{ {
return h8_3007_register_read8((offset*2) + 1 + 0xffff20); return h8_3007_register_read8((offset*2) + 1 + 0xffff20);
} }
@ -3996,17 +3996,17 @@ static READ16_HANDLER( h8_3007_itu_r )
} }
static WRITE16_HANDLER( h8_3007_itu_w ) static WRITE16_HANDLER( h8_3007_itu_w )
{ {
if (mem_mask == 0) if (mem_mask == 0xffff)
{ {
// 16-bit write // 16-bit write
h8_3007_register_write8(offset*2 + 0xffff20, data>>8); h8_3007_register_write8(offset*2 + 0xffff20, data>>8);
h8_3007_register_write8((offset*2) + 1 + 0xffff20, data&0xff); h8_3007_register_write8((offset*2) + 1 + 0xffff20, data&0xff);
} }
else if (mem_mask == 0xff) else if (mem_mask == 0xff00)
{ {
h8_3007_register_write8(offset*2 + 0xffff20, data>>8); h8_3007_register_write8(offset*2 + 0xffff20, data>>8);
} }
else if (mem_mask == 0xff00) else if (mem_mask == 0x00ff)
{ {
h8_3007_register_write8((offset*2) + 1 + 0xffff20, data&0xff); h8_3007_register_write8((offset*2) + 1 + 0xffff20, data&0xff);
} }
@ -4014,16 +4014,16 @@ static WRITE16_HANDLER( h8_3007_itu_w )
static READ16_HANDLER( h8_3007_itu1_r ) static READ16_HANDLER( h8_3007_itu1_r )
{ {
if (mem_mask == 0) if (mem_mask == 0xffff)
{ {
// 16-bit read // 16-bit read
return h8_3007_register1_read8(offset*2 + 0xfee000)<<8 | h8_3007_register1_read8((offset*2) + 1 + 0xfee000); return h8_3007_register1_read8(offset*2 + 0xfee000)<<8 | h8_3007_register1_read8((offset*2) + 1 + 0xfee000);
} }
else if (mem_mask == 0xff) else if (mem_mask == 0xff00)
{ {
return h8_3007_register1_read8(offset*2 + 0xfee000)<<8; return h8_3007_register1_read8(offset*2 + 0xfee000)<<8;
} }
else if (mem_mask == 0xff00) else if (mem_mask == 0x00ff)
{ {
return h8_3007_register1_read8((offset*2) + 1 + 0xfee000); return h8_3007_register1_read8((offset*2) + 1 + 0xfee000);
} }
@ -4032,17 +4032,17 @@ static READ16_HANDLER( h8_3007_itu1_r )
} }
static WRITE16_HANDLER( h8_3007_itu1_w ) static WRITE16_HANDLER( h8_3007_itu1_w )
{ {
if (mem_mask == 0) if (mem_mask == 0xffff)
{ {
// 16-bit write // 16-bit write
h8_3007_register1_write8(offset*2 + 0xfee000, data>>8); h8_3007_register1_write8(offset*2 + 0xfee000, data>>8);
h8_3007_register1_write8((offset*2) + 1 + 0xfee000, data&0xff); h8_3007_register1_write8((offset*2) + 1 + 0xfee000, data&0xff);
} }
else if (mem_mask == 0xff) else if (mem_mask == 0xff00)
{ {
h8_3007_register1_write8(offset*2 + 0xfee000, data>>8); h8_3007_register1_write8(offset*2 + 0xfee000, data>>8);
} }
else if (mem_mask == 0xff00) else if (mem_mask == 0x00ff)
{ {
h8_3007_register1_write8((offset*2) + 1 + 0xfee000, data&0xff); h8_3007_register1_write8((offset*2) + 1 + 0xfee000, data&0xff);
} }

6
src/emu/cpu/m37710/m37710.c
View File

@ -669,16 +669,16 @@ static READ16_HANDLER( m37710_internal_word_r )
static WRITE16_HANDLER( m37710_internal_word_w ) static WRITE16_HANDLER( m37710_internal_word_w )
{ {
if (mem_mask == 0) if (mem_mask == 0xffff)
{ {
m37710_internal_w((offset*2), data & 0xff); m37710_internal_w((offset*2), data & 0xff);
m37710_internal_w((offset*2)+1, data>>8); m37710_internal_w((offset*2)+1, data>>8);
} }
else if (mem_mask == 0xff) else if (mem_mask == 0xff00)
{ {
m37710_internal_w((offset*2)+1, data>>8); m37710_internal_w((offset*2)+1, data>>8);
} }
else if (mem_mask == 0xff00) else if (mem_mask == 0x00ff)
{ {
m37710_internal_w((offset*2), data & 0xff); m37710_internal_w((offset*2), data & 0xff);
} }

22
src/emu/cpu/sh2/sh2.c
View File

@ -189,7 +189,7 @@ static TIMER_CALLBACK( sh2_timer_callback );
INLINE UINT8 RB(offs_t A) INLINE UINT8 RB(offs_t A)
{ {
if (A >= 0xe0000000) if (A >= 0xe0000000)
return sh2_internal_r(Machine, (A & 0x1fc)>>2, ~(0xff << (((~A) & 3)*8))) >> (((~A) & 3)*8); return sh2_internal_r(Machine, (A & 0x1fc)>>2, 0xff << (((~A) & 3)*8)) >> (((~A) & 3)*8);
if (A >= 0xc0000000) if (A >= 0xc0000000)
return program_read_byte_32be(A); return program_read_byte_32be(A);
@ -203,7 +203,7 @@ INLINE UINT8 RB(offs_t A)
INLINE UINT16 RW(offs_t A) INLINE UINT16 RW(offs_t A)
{ {
if (A >= 0xe0000000) if (A >= 0xe0000000)
return sh2_internal_r(Machine, (A & 0x1fc)>>2, ~(0xffff << (((~A) & 2)*8))) >> (((~A) & 2)*8); return sh2_internal_r(Machine, (A & 0x1fc)>>2, 0xffff << (((~A) & 2)*8)) >> (((~A) & 2)*8);
if (A >= 0xc0000000) if (A >= 0xc0000000)
return program_read_word_32be(A); return program_read_word_32be(A);
@ -217,7 +217,7 @@ INLINE UINT16 RW(offs_t A)
INLINE UINT32 RL(offs_t A) INLINE UINT32 RL(offs_t A)
{ {
if (A >= 0xe0000000) if (A >= 0xe0000000)
return sh2_internal_r(Machine, (A & 0x1fc)>>2, 0); return sh2_internal_r(Machine, (A & 0x1fc)>>2, 0xffffffff);
if (A >= 0xc0000000) if (A >= 0xc0000000)
return program_read_dword_32be(A); return program_read_dword_32be(A);
@ -233,7 +233,7 @@ INLINE void WB(offs_t A, UINT8 V)
if (A >= 0xe0000000) if (A >= 0xe0000000)
{ {
sh2_internal_w(Machine, (A & 0x1fc)>>2, V << (((~A) & 3)*8), ~(0xff << (((~A) & 3)*8))); sh2_internal_w(Machine, (A & 0x1fc)>>2, V << (((~A) & 3)*8), 0xff << (((~A) & 3)*8));
return; return;
} }
@ -253,7 +253,7 @@ INLINE void WW(offs_t A, UINT16 V)
{ {
if (A >= 0xe0000000) if (A >= 0xe0000000)
{ {
sh2_internal_w(Machine, (A & 0x1fc)>>2, V << (((~A) & 2)*8), ~(0xffff << (((~A) & 2)*8))); sh2_internal_w(Machine, (A & 0x1fc)>>2, V << (((~A) & 2)*8), 0xffff << (((~A) & 2)*8));
return; return;
} }
@ -273,7 +273,7 @@ INLINE void WL(offs_t A, UINT32 V)
{ {
if (A >= 0xe0000000) if (A >= 0xe0000000)
{ {
sh2_internal_w(Machine, (A & 0x1fc)>>2, V, 0); sh2_internal_w(Machine, (A & 0x1fc)>>2, V, 0xffffffff);
return; return;
} }
@ -2651,12 +2651,12 @@ WRITE32_HANDLER( sh2_internal_w )
{ {
// Timers // Timers
case 0x04: // TIER, FTCSR, FRC case 0x04: // TIER, FTCSR, FRC
if((mem_mask & 0x00ffffff) != 0xffffff) if((mem_mask & 0x00ffffff) != 0)
sh2_timer_resync(); sh2_timer_resync();
logerror("SH2.%d: TIER write %04x @ %04x\n", sh2.cpu_number, data >> 16, mem_mask>>16); logerror("SH2.%d: TIER write %04x @ %04x\n", sh2.cpu_number, data >> 16, mem_mask>>16);
sh2.m[4] = (sh2.m[4] & ~(ICF|OCFA|OCFB|OVF)) | (old & sh2.m[4] & (ICF|OCFA|OCFB|OVF)); sh2.m[4] = (sh2.m[4] & ~(ICF|OCFA|OCFB|OVF)) | (old & sh2.m[4] & (ICF|OCFA|OCFB|OVF));
COMBINE_DATA(&sh2.frc); COMBINE_DATA(&sh2.frc);
if((mem_mask & 0x00ffffff) != 0xffffff) if((mem_mask & 0x00ffffff) != 0)
sh2_timer_activate(); sh2_timer_activate();
sh2_recalc_irq(); sh2_recalc_irq();
break; break;
@ -2664,9 +2664,9 @@ WRITE32_HANDLER( sh2_internal_w )
logerror("SH2.%d: TCR write %08x @ %08x\n", sh2.cpu_number, data, mem_mask); logerror("SH2.%d: TCR write %08x @ %08x\n", sh2.cpu_number, data, mem_mask);
sh2_timer_resync(); sh2_timer_resync();
if(sh2.m[5] & 0x10) if(sh2.m[5] & 0x10)
sh2.ocrb = (sh2.ocrb & (mem_mask >> 16)) | ((data & ~mem_mask) >> 16); sh2.ocrb = (sh2.ocrb & (~mem_mask >> 16)) | ((data & mem_mask) >> 16);
else else
sh2.ocra = (sh2.ocra & (mem_mask >> 16)) | ((data & ~mem_mask) >> 16); sh2.ocra = (sh2.ocra & (~mem_mask >> 16)) | ((data & mem_mask) >> 16);
sh2_timer_activate(); sh2_timer_activate();
break; break;
@ -2813,7 +2813,7 @@ READ32_HANDLER( sh2_internal_r )
switch( offset ) switch( offset )
{ {
case 0x04: // TIER, FTCSR, FRC case 0x04: // TIER, FTCSR, FRC
if ( mem_mask == 0xff00ffff ) if ( mem_mask == 0x00ff0000 )
if ( sh2.ftcsr_read_callback != NULL ) if ( sh2.ftcsr_read_callback != NULL )
sh2.ftcsr_read_callback( (sh2.m[4] & 0xffff0000) | sh2.frc ); sh2.ftcsr_read_callback( (sh2.m[4] & 0xffff0000) | sh2.frc );
sh2_timer_resync(); sh2_timer_resync();

12
src/emu/cpu/sh4/sh4.c
View File

@ -239,7 +239,7 @@ UINT32 abs;
INLINE UINT8 RB(offs_t A) INLINE UINT8 RB(offs_t A)
{ {
if (A >= 0xfe000000) if (A >= 0xfe000000)
return sh4_internal_r(Machine, ((A & 0x0fc) >> 2) | ((A & 0x1fe0000) >> 11), ~(0xff << ((A & 3)*8))) >> ((A & 3)*8); return sh4_internal_r(Machine, ((A & 0x0fc) >> 2) | ((A & 0x1fe0000) >> 11), 0xff << ((A & 3)*8)) >> ((A & 3)*8);
if (A >= 0xe0000000) if (A >= 0xe0000000)
return program_read_byte_64le(A); return program_read_byte_64le(A);
@ -253,7 +253,7 @@ INLINE UINT8 RB(offs_t A)
INLINE UINT16 RW(offs_t A) INLINE UINT16 RW(offs_t A)
{ {
if (A >= 0xfe000000) if (A >= 0xfe000000)
return sh4_internal_r(Machine, ((A & 0x0fc) >> 2) | ((A & 0x1fe0000) >> 11), ~(0xffff << ((A & 2)*8))) >> ((A & 2)*8); return sh4_internal_r(Machine, ((A & 0x0fc) >> 2) | ((A & 0x1fe0000) >> 11), 0xffff << ((A & 2)*8)) >> ((A & 2)*8);
if (A >= 0xe0000000) if (A >= 0xe0000000)
return program_read_word_64le(A); return program_read_word_64le(A);
@ -267,7 +267,7 @@ INLINE UINT16 RW(offs_t A)
INLINE UINT32 RL(offs_t A) INLINE UINT32 RL(offs_t A)
{ {
if (A >= 0xfe000000) if (A >= 0xfe000000)
return sh4_internal_r(Machine, ((A & 0x0fc) >> 2) | ((A & 0x1fe0000) >> 11), 0); return sh4_internal_r(Machine, ((A & 0x0fc) >> 2) | ((A & 0x1fe0000) >> 11), 0xffffffff);
if (A >= 0xe0000000) if (A >= 0xe0000000)
return program_read_dword_64le(A); return program_read_dword_64le(A);
@ -283,7 +283,7 @@ INLINE void WB(offs_t A, UINT8 V)
if (A >= 0xfe000000) if (A >= 0xfe000000)
{ {
sh4_internal_w(Machine, ((A & 0x0fc) >> 2) | ((A & 0x1fe0000) >> 11), V << ((A & 3)*8), ~(0xff << ((A & 3)*8))); sh4_internal_w(Machine, ((A & 0x0fc) >> 2) | ((A & 0x1fe0000) >> 11), V << ((A & 3)*8), 0xff << ((A & 3)*8));
return; return;
} }
@ -303,7 +303,7 @@ INLINE void WW(offs_t A, UINT16 V)
{ {
if (A >= 0xfe000000) if (A >= 0xfe000000)
{ {
sh4_internal_w(Machine, ((A & 0x0fc) >> 2) | ((A & 0x1fe0000) >> 11), V << ((A & 2)*8), ~(0xffff << ((A & 2)*8))); sh4_internal_w(Machine, ((A & 0x0fc) >> 2) | ((A & 0x1fe0000) >> 11), V << ((A & 2)*8), 0xffff << ((A & 2)*8));
return; return;
} }
@ -323,7 +323,7 @@ INLINE void WL(offs_t A, UINT32 V)
{ {
if (A >= 0xfe000000) if (A >= 0xfe000000)
{ {
sh4_internal_w(Machine, ((A & 0x0fc) >> 2) | ((A & 0x1fe0000) >> 11), V, 0); sh4_internal_w(Machine, ((A & 0x0fc) >> 2) | ((A & 0x1fe0000) >> 11), V, 0xffffffff);
return; return;
} }

6
src/emu/cpu/tms34010/tms34010.c
View File

@ -701,7 +701,7 @@ static void tms34010_reset(void)
/* the first time we are run */ /* the first time we are run */
state.reset_deferred = state.config->halt_on_reset; state.reset_deferred = state.config->halt_on_reset;
if (state.config->halt_on_reset) if (state.config->halt_on_reset)
tms34010_io_register_w(Machine, REG_HSTCTLH, 0x8000, 0); tms34010_io_register_w(Machine, REG_HSTCTLH, 0x8000, 0xffff);
} }
#if (HAS_TMS34020) #if (HAS_TMS34020)
@ -1672,8 +1672,8 @@ void tms34010_host_w(int cpunum, int reg, int data)
/* control register */ /* control register */
case TMS34010_HOST_CONTROL: case TMS34010_HOST_CONTROL:
external_host_access = TRUE; external_host_access = TRUE;
tms34010_io_register_w(state.screen->machine, REG_HSTCTLH, data & 0xff00, 0); tms34010_io_register_w(state.screen->machine, REG_HSTCTLH, data & 0xff00, 0xffff);
tms34010_io_register_w(state.screen->machine, REG_HSTCTLL, data & 0x00ff, 0); tms34010_io_register_w(state.screen->machine, REG_HSTCTLL, data & 0x00ff, 0xffff);
external_host_access = FALSE; external_host_access = FALSE;
break; break;

6
src/emu/debug/debugcpu.c
View File

@ -1320,7 +1320,7 @@ static void check_watchpoints(int cpunum, int spacenum, int type, offs_t address
within_debugger_code = TRUE; within_debugger_code = TRUE;
/* adjust address, size & value_to_write based on mem_mask. */ /* adjust address, size & value_to_write based on mem_mask. */
if( mem_mask != 0 ) if (mem_mask != 0)
{ {
const debug_cpu_info *info = &debug_cpuinfo[cpunum]; const debug_cpu_info *info = &debug_cpuinfo[cpunum];
int address_offset = 0; int address_offset = 0;
@ -1340,13 +1340,9 @@ static void check_watchpoints(int cpunum, int spacenum, int type, offs_t address
} }
if (info->endianness == CPU_IS_LE) if (info->endianness == CPU_IS_LE)
{
address += address_offset; address += address_offset;
}
else else
{
address += bus_size - size - address_offset; address += bus_size - size - address_offset;
}
} }
/* if we are a write watchpoint, stash the value that will be written */ /* if we are a write watchpoint, stash the value that will be written */

112
src/emu/devconv.h
View File

@ -88,9 +88,9 @@
INLINE UINT16 read16be_with_read8_device_handler(read8_device_func handler, const device_config *device, offs_t offset, UINT16 mem_mask) INLINE UINT16 read16be_with_read8_device_handler(read8_device_func handler, const device_config *device, offs_t offset, UINT16 mem_mask)
{ {
UINT16 result = 0; UINT16 result = 0;
if ((mem_mask & 0xff00) != 0xff00) if ((mem_mask & 0xff00) != 0)
result |= ((UINT16)(*handler)(device, offset * 2 + 0)) << 8; result |= ((UINT16)(*handler)(device, offset * 2 + 0)) << 8;
if ((mem_mask & 0x00ff) != 0x00ff) if ((mem_mask & 0x00ff) != 0)
result |= ((UINT16)(*handler)(device, offset * 2 + 1)) << 0; result |= ((UINT16)(*handler)(device, offset * 2 + 1)) << 0;
return result; return result;
} }
@ -98,9 +98,9 @@ INLINE UINT16 read16be_with_read8_device_handler(read8_device_func handler, cons
INLINE void write16be_with_write8_device_handler(write8_device_func handler, const device_config *device, offs_t offset, UINT16 data, UINT16 mem_mask) INLINE void write16be_with_write8_device_handler(write8_device_func handler, const device_config *device, offs_t offset, UINT16 data, UINT16 mem_mask)
{ {
if ((mem_mask & 0xff00) != 0xff00) if ((mem_mask & 0xff00) != 0)
(*handler)(device, offset * 2 + 0, data >> 8); (*handler)(device, offset * 2 + 0, data >> 8);
if ((mem_mask & 0x00ff) != 0x00ff) if ((mem_mask & 0x00ff) != 0)
(*handler)(device, offset * 2 + 1, data >> 0); (*handler)(device, offset * 2 + 1, data >> 0);
} }
@ -114,9 +114,9 @@ INLINE void write16be_with_write8_device_handler(write8_device_func handler, con
INLINE UINT16 read16le_with_read8_device_handler(read8_device_func handler, const device_config *device, offs_t offset, UINT16 mem_mask) INLINE UINT16 read16le_with_read8_device_handler(read8_device_func handler, const device_config *device, offs_t offset, UINT16 mem_mask)
{ {
UINT16 result = 0; UINT16 result = 0;
if ((mem_mask & 0x00ff) != 0x00ff) if ((mem_mask & 0x00ff) != 0)
result |= ((UINT16) (*handler)(device, offset * 2 + 0)) << 0; result |= ((UINT16) (*handler)(device, offset * 2 + 0)) << 0;
if ((mem_mask & 0xff00) != 0xff00) if ((mem_mask & 0xff00) != 0)
result |= ((UINT16) (*handler)(device, offset * 2 + 1)) << 8; result |= ((UINT16) (*handler)(device, offset * 2 + 1)) << 8;
return result; return result;
} }
@ -124,9 +124,9 @@ INLINE UINT16 read16le_with_read8_device_handler(read8_device_func handler, cons
INLINE void write16le_with_write8_device_handler(write8_device_func handler, const device_config *device, offs_t offset, UINT16 data, UINT16 mem_mask) INLINE void write16le_with_write8_device_handler(write8_device_func handler, const device_config *device, offs_t offset, UINT16 data, UINT16 mem_mask)
{ {
if ((mem_mask & 0x00ff) != 0x00ff) if ((mem_mask & 0x00ff) != 0)
(*handler)(device, offset * 2 + 0, data >> 0); (*handler)(device, offset * 2 + 0, data >> 0);
if ((mem_mask & 0xff00) != 0xff00) if ((mem_mask & 0xff00) != 0)
(*handler)(device, offset * 2 + 1, data >> 8); (*handler)(device, offset * 2 + 1, data >> 8);
} }
@ -140,9 +140,9 @@ INLINE void write16le_with_write8_device_handler(write8_device_func handler, con
INLINE UINT32 read32be_with_read8_device_handler(read8_device_func handler, const device_config *device, offs_t offset, UINT32 mem_mask) INLINE UINT32 read32be_with_read8_device_handler(read8_device_func handler, const device_config *device, offs_t offset, UINT32 mem_mask)
{ {
UINT32 result = 0; UINT32 result = 0;
if ((mem_mask & 0xffff0000) != 0xffff0000) if ((mem_mask & 0xffff0000) != 0)
result |= read16be_with_read8_device_handler(handler, device, offset * 2 + 0, mem_mask >> 16) << 16; result |= read16be_with_read8_device_handler(handler, device, offset * 2 + 0, mem_mask >> 16) << 16;
if ((mem_mask & 0x0000ffff) != 0x0000ffff) if ((mem_mask & 0x0000ffff) != 0)
result |= read16be_with_read8_device_handler(handler, device, offset * 2 + 1, mem_mask) << 0; result |= read16be_with_read8_device_handler(handler, device, offset * 2 + 1, mem_mask) << 0;
return result; return result;
} }
@ -150,9 +150,9 @@ INLINE UINT32 read32be_with_read8_device_handler(read8_device_func handler, cons
INLINE void write32be_with_write8_device_handler(write8_device_func handler, const device_config *device, offs_t offset, UINT32 data, UINT32 mem_mask) INLINE void write32be_with_write8_device_handler(write8_device_func handler, const device_config *device, offs_t offset, UINT32 data, UINT32 mem_mask)
{ {
if ((mem_mask & 0xffff0000) != 0xffff0000) if ((mem_mask & 0xffff0000) != 0)
write16be_with_write8_device_handler(handler, device, offset * 2 + 0, data >> 16, mem_mask >> 16); write16be_with_write8_device_handler(handler, device, offset * 2 + 0, data >> 16, mem_mask >> 16);
if ((mem_mask & 0x0000ffff) != 0x0000ffff) if ((mem_mask & 0x0000ffff) != 0)
write16be_with_write8_device_handler(handler, device, offset * 2 + 1, data, mem_mask); write16be_with_write8_device_handler(handler, device, offset * 2 + 1, data, mem_mask);
} }
@ -166,9 +166,9 @@ INLINE void write32be_with_write8_device_handler(write8_device_func handler, con
INLINE UINT32 read32le_with_read8_device_handler(read8_device_func handler, const device_config *device, offs_t offset, UINT32 mem_mask) INLINE UINT32 read32le_with_read8_device_handler(read8_device_func handler, const device_config *device, offs_t offset, UINT32 mem_mask)
{ {
UINT32 result = 0; UINT32 result = 0;
if ((mem_mask & 0x0000ffff) != 0x0000ffff) if ((mem_mask & 0x0000ffff) != 0)
result |= read16le_with_read8_device_handler(handler, device, offset * 2 + 0, mem_mask) << 0; result |= read16le_with_read8_device_handler(handler, device, offset * 2 + 0, mem_mask) << 0;
if ((mem_mask & 0xffff0000) != 0xffff0000) if ((mem_mask & 0xffff0000) != 0)
result |= read16le_with_read8_device_handler(handler, device, offset * 2 + 1, mem_mask >> 16) << 16; result |= read16le_with_read8_device_handler(handler, device, offset * 2 + 1, mem_mask >> 16) << 16;
return result; return result;
} }
@ -176,9 +176,9 @@ INLINE UINT32 read32le_with_read8_device_handler(read8_device_func handler, cons
INLINE void write32le_with_write8_device_handler(write8_device_func handler, const device_config *device, offs_t offset, UINT32 data, UINT32 mem_mask) INLINE void write32le_with_write8_device_handler(write8_device_func handler, const device_config *device, offs_t offset, UINT32 data, UINT32 mem_mask)
{ {
if ((mem_mask & 0x0000ffff) != 0x0000ffff) if ((mem_mask & 0x0000ffff) != 0)
write16le_with_write8_device_handler(handler, device, offset * 2 + 0, data, mem_mask); write16le_with_write8_device_handler(handler, device, offset * 2 + 0, data, mem_mask);
if ((mem_mask & 0xffff0000) != 0xffff0000) if ((mem_mask & 0xffff0000) != 0)
write16le_with_write8_device_handler(handler, device, offset * 2 + 1, data >> 16, mem_mask >> 16); write16le_with_write8_device_handler(handler, device, offset * 2 + 1, data >> 16, mem_mask >> 16);
} }
@ -192,9 +192,9 @@ INLINE void write32le_with_write8_device_handler(write8_device_func handler, con
INLINE UINT32 read32be_with_16be_device_handler(read16_device_func handler, const device_config *device, offs_t offset, UINT32 mem_mask) INLINE UINT32 read32be_with_16be_device_handler(read16_device_func handler, const device_config *device, offs_t offset, UINT32 mem_mask)
{ {
UINT32 result = 0; UINT32 result = 0;
if ((mem_mask & 0xffff0000) != 0xffff0000) if ((mem_mask & 0xffff0000) != 0)
result |= (*handler)(device, offset * 2 + 0, mem_mask >> 16) << 16; result |= (*handler)(device, offset * 2 + 0, mem_mask >> 16) << 16;
if ((mem_mask & 0x0000ffff) != 0x0000ffff) if ((mem_mask & 0x0000ffff) != 0)
result |= (*handler)(device, offset * 2 + 1, mem_mask) << 0; result |= (*handler)(device, offset * 2 + 1, mem_mask) << 0;
return result; return result;
} }
@ -202,9 +202,9 @@ INLINE UINT32 read32be_with_16be_device_handler(read16_device_func handler, cons
INLINE void write32be_with_16be_device_handler(write16_device_func handler, const device_config *device, offs_t offset, UINT32 data, UINT32 mem_mask) INLINE void write32be_with_16be_device_handler(write16_device_func handler, const device_config *device, offs_t offset, UINT32 data, UINT32 mem_mask)
{ {
if ((mem_mask & 0xffff0000) != 0xffff0000) if ((mem_mask & 0xffff0000) != 0)
(*handler)(device, offset * 2 + 0, data >> 16, mem_mask >> 16); (*handler)(device, offset * 2 + 0, data >> 16, mem_mask >> 16);
if ((mem_mask & 0x0000ffff) != 0x0000ffff) if ((mem_mask & 0x0000ffff) != 0)
(*handler)(device, offset * 2 + 1, data, mem_mask); (*handler)(device, offset * 2 + 1, data, mem_mask);
} }
@ -218,9 +218,9 @@ INLINE void write32be_with_16be_device_handler(write16_device_func handler, cons
INLINE UINT32 read32le_with_16le_device_handler(read16_device_func handler, const device_config *device, offs_t offset, UINT32 mem_mask) INLINE UINT32 read32le_with_16le_device_handler(read16_device_func handler, const device_config *device, offs_t offset, UINT32 mem_mask)
{ {
UINT32 result = 0; UINT32 result = 0;
if ((mem_mask & 0x0000ffff) != 0x0000ffff) if ((mem_mask & 0x0000ffff) != 0)
result |= (*handler)(device, offset * 2 + 0, mem_mask) << 0; result |= (*handler)(device, offset * 2 + 0, mem_mask) << 0;
if ((mem_mask & 0xffff0000) != 0xffff0000) if ((mem_mask & 0xffff0000) != 0)
result |= (*handler)(device, offset * 2 + 1, mem_mask >> 16) << 16; result |= (*handler)(device, offset * 2 + 1, mem_mask >> 16) << 16;
return result; return result;
} }
@ -228,9 +228,9 @@ INLINE UINT32 read32le_with_16le_device_handler(read16_device_func handler, cons
INLINE void write32le_with_16le_device_handler(write16_device_func handler, const device_config *device, offs_t offset, UINT32 data, UINT32 mem_mask) INLINE void write32le_with_16le_device_handler(write16_device_func handler, const device_config *device, offs_t offset, UINT32 data, UINT32 mem_mask)
{ {
if ((mem_mask & 0x0000ffff) != 0x0000ffff) if ((mem_mask & 0x0000ffff) != 0)
(*handler)(device, offset * 2 + 0, data, mem_mask); (*handler)(device, offset * 2 + 0, data, mem_mask);
if ((mem_mask & 0xffff0000) != 0xffff0000) if ((mem_mask & 0xffff0000) != 0)
(*handler)(device, offset * 2 + 1, data >> 16, mem_mask >> 16); (*handler)(device, offset * 2 + 1, data >> 16, mem_mask >> 16);
} }
@ -290,9 +290,9 @@ INLINE void write32le_with_16be_device_handler(write16_device_func handler, cons
INLINE UINT64 read64be_with_read8_device_handler(read8_device_func handler, const device_config *device, offs_t offset, UINT64 mem_mask) INLINE UINT64 read64be_with_read8_device_handler(read8_device_func handler, const device_config *device, offs_t offset, UINT64 mem_mask)
{ {
UINT64 result = 0; UINT64 result = 0;
if ((mem_mask & U64(0xffffffff00000000)) != U64(0xffffffff00000000)) if ((mem_mask & U64(0xffffffff00000000)) != 0)
result |= (UINT64)read32be_with_read8_device_handler(handler, device, offset * 2 + 0, mem_mask >> 32) << 32; result |= (UINT64)read32be_with_read8_device_handler(handler, device, offset * 2 + 0, mem_mask >> 32) << 32;
if ((mem_mask & U64(0x00000000ffffffff)) != U64(0x00000000ffffffff)) if ((mem_mask & U64(0x00000000ffffffff)) != 0)
result |= (UINT64)read32be_with_read8_device_handler(handler, device, offset * 2 + 1, mem_mask) << 0; result |= (UINT64)read32be_with_read8_device_handler(handler, device, offset * 2 + 1, mem_mask) << 0;
return result; return result;
} }
@ -300,9 +300,9 @@ INLINE UINT64 read64be_with_read8_device_handler(read8_device_func handler, cons
INLINE void write64be_with_write8_device_handler(write8_device_func handler, const device_config *device, offs_t offset, UINT64 data, UINT64 mem_mask) INLINE void write64be_with_write8_device_handler(write8_device_func handler, const device_config *device, offs_t offset, UINT64 data, UINT64 mem_mask)
{ {
if ((mem_mask & U64(0xffffffff00000000)) != U64(0xffffffff00000000)) if ((mem_mask & U64(0xffffffff00000000)) != 0)
write32be_with_write8_device_handler(handler, device, offset * 2 + 0, data >> 32, mem_mask >> 32); write32be_with_write8_device_handler(handler, device, offset * 2 + 0, data >> 32, mem_mask >> 32);
if ((mem_mask & U64(0x00000000ffffffff)) != U64(0x00000000ffffffff)) if ((mem_mask & U64(0x00000000ffffffff)) != 0)
write32be_with_write8_device_handler(handler, device, offset * 2 + 1, data, mem_mask); write32be_with_write8_device_handler(handler, device, offset * 2 + 1, data, mem_mask);
} }
@ -316,9 +316,9 @@ INLINE void write64be_with_write8_device_handler(write8_device_func handler, con
INLINE UINT64 read64le_with_read8_device_handler(read8_device_func handler, const device_config *device, offs_t offset, UINT64 mem_mask) INLINE UINT64 read64le_with_read8_device_handler(read8_device_func handler, const device_config *device, offs_t offset, UINT64 mem_mask)
{ {
UINT64 result = 0; UINT64 result = 0;
if ((mem_mask & U64(0x00000000ffffffff)) != U64(0x00000000ffffffff)) if ((mem_mask & U64(0x00000000ffffffff)) != 0)
result |= (UINT64)read32le_with_read8_device_handler(handler, device, offset * 2 + 0, mem_mask >> 0) << 0; result |= (UINT64)read32le_with_read8_device_handler(handler, device, offset * 2 + 0, mem_mask >> 0) << 0;
if ((mem_mask & U64(0xffffffff00000000)) != U64(0xffffffff00000000)) if ((mem_mask & U64(0xffffffff00000000)) != 0)
result |= (UINT64)read32le_with_read8_device_handler(handler, device, offset * 2 + 1, mem_mask >> 32) << 32; result |= (UINT64)read32le_with_read8_device_handler(handler, device, offset * 2 + 1, mem_mask >> 32) << 32;
return result; return result;
} }
@ -326,9 +326,9 @@ INLINE UINT64 read64le_with_read8_device_handler(read8_device_func handler, cons
INLINE void write64le_with_write8_device_handler(write8_device_func handler, const device_config *device, offs_t offset, UINT64 data, UINT64 mem_mask) INLINE void write64le_with_write8_device_handler(write8_device_func handler, const device_config *device, offs_t offset, UINT64 data, UINT64 mem_mask)
{ {
if ((mem_mask & U64(0x00000000ffffffff)) != U64(0x00000000ffffffff)) if ((mem_mask & U64(0x00000000ffffffff)) != 0)
write32le_with_write8_device_handler(handler, device, offset * 2 + 0, data >> 0, mem_mask >> 0); write32le_with_write8_device_handler(handler, device, offset * 2 + 0, data >> 0, mem_mask >> 0);
if ((mem_mask & U64(0xffffffff00000000)) != U64(0xffffffff00000000)) if ((mem_mask & U64(0xffffffff00000000)) != 0)
write32le_with_write8_device_handler(handler, device, offset * 2 + 1, data >> 32, mem_mask >> 32); write32le_with_write8_device_handler(handler, device, offset * 2 + 1, data >> 32, mem_mask >> 32);
} }
@ -342,9 +342,9 @@ INLINE void write64le_with_write8_device_handler(write8_device_func handler, con
INLINE UINT32 read64be_with_16be_device_handler(read16_device_func handler, const device_config *device, offs_t offset, UINT64 mem_mask) INLINE UINT32 read64be_with_16be_device_handler(read16_device_func handler, const device_config *device, offs_t offset, UINT64 mem_mask)
{ {
UINT64 result = 0; UINT64 result = 0;
if ((mem_mask & U64(0xffffffff00000000)) != U64(0xffffffff00000000)) if ((mem_mask & U64(0xffffffff00000000)) != 0)
result |= (UINT64)read32be_with_16be_device_handler(handler, device, offset * 2 + 0, mem_mask >> 32) << 32; result |= (UINT64)read32be_with_16be_device_handler(handler, device, offset * 2 + 0, mem_mask >> 32) << 32;
if ((mem_mask & U64(0x00000000ffffffff)) != U64(0x00000000ffffffff)) if ((mem_mask & U64(0x00000000ffffffff)) != 0)
result |= (UINT64)read32be_with_16be_device_handler(handler, device, offset * 2 + 1, mem_mask >> 0) << 0; result |= (UINT64)read32be_with_16be_device_handler(handler, device, offset * 2 + 1, mem_mask >> 0) << 0;
return result; return result;
} }
@ -352,9 +352,9 @@ INLINE UINT32 read64be_with_16be_device_handler(read16_device_func handler, cons
INLINE void write64be_with_16be_device_handler(write16_device_func handler, const device_config *device, offs_t offset, UINT64 data, UINT64 mem_mask) INLINE void write64be_with_16be_device_handler(write16_device_func handler, const device_config *device, offs_t offset, UINT64 data, UINT64 mem_mask)
{ {
if ((mem_mask & U64(0xffffffff00000000)) != U64(0xffffffff00000000)) if ((mem_mask & U64(0xffffffff00000000)) != 0)
write32be_with_16be_device_handler(handler, device, offset * 2 + 0, data >> 32, mem_mask >> 32); write32be_with_16be_device_handler(handler, device, offset * 2 + 0, data >> 32, mem_mask >> 32);
if ((mem_mask & U64(0x00000000ffffffff)) != U64(0x00000000ffffffff)) if ((mem_mask & U64(0x00000000ffffffff)) != 0)
write32be_with_16be_device_handler(handler, device, offset * 2 + 1, data >> 0, mem_mask >> 0); write32be_with_16be_device_handler(handler, device, offset * 2 + 1, data >> 0, mem_mask >> 0);
} }
@ -368,9 +368,9 @@ INLINE void write64be_with_16be_device_handler(write16_device_func handler, cons
INLINE UINT32 read64le_with_16le_device_handler(read16_device_func handler, const device_config *device, offs_t offset, UINT64 mem_mask) INLINE UINT32 read64le_with_16le_device_handler(read16_device_func handler, const device_config *device, offs_t offset, UINT64 mem_mask)
{ {
UINT64 result = 0; UINT64 result = 0;
if ((mem_mask & U64(0x00000000ffffffff)) != U64(0x00000000ffffffff)) if ((mem_mask & U64(0x00000000ffffffff)) != 0)
result |= (UINT64)read32le_with_16le_device_handler(handler, device, offset * 2 + 0, mem_mask >> 0) << 0; result |= (UINT64)read32le_with_16le_device_handler(handler, device, offset * 2 + 0, mem_mask >> 0) << 0;
if ((mem_mask & U64(0xffffffff00000000)) != U64(0xffffffff00000000)) if ((mem_mask & U64(0xffffffff00000000)) != 0)
result |= (UINT64)read32le_with_16le_device_handler(handler, device, offset * 2 + 1, mem_mask >> 32) << 32; result |= (UINT64)read32le_with_16le_device_handler(handler, device, offset * 2 + 1, mem_mask >> 32) << 32;
return result; return result;
} }
@ -378,9 +378,9 @@ INLINE UINT32 read64le_with_16le_device_handler(read16_device_func handler, cons
INLINE void write64le_with_16le_device_handler(write16_device_func handler, const device_config *device, offs_t offset, UINT64 data, UINT64 mem_mask) INLINE void write64le_with_16le_device_handler(write16_device_func handler, const device_config *device, offs_t offset, UINT64 data, UINT64 mem_mask)
{ {
if ((mem_mask & U64(0x00000000ffffffff)) != U64(0x00000000ffffffff)) if ((mem_mask & U64(0x00000000ffffffff)) != 0)
write32le_with_16le_device_handler(handler, device, offset * 2 + 0, data >> 0, mem_mask >> 0); write32le_with_16le_device_handler(handler, device, offset * 2 + 0, data >> 0, mem_mask >> 0);
if ((mem_mask & U64(0xffffffff00000000)) != U64(0xffffffff00000000)) if ((mem_mask & U64(0xffffffff00000000)) != 0)
write32le_with_16le_device_handler(handler, device, offset * 2 + 1, data >> 32, mem_mask >> 32); write32le_with_16le_device_handler(handler, device, offset * 2 + 1, data >> 32, mem_mask >> 32);
} }
@ -394,9 +394,9 @@ INLINE void write64le_with_16le_device_handler(write16_device_func handler, cons
INLINE UINT32 read64be_with_16le_device_handler(read16_device_func handler, const device_config *device, offs_t offset, UINT64 mem_mask) INLINE UINT32 read64be_with_16le_device_handler(read16_device_func handler, const device_config *device, offs_t offset, UINT64 mem_mask)
{ {
UINT64 result = 0; UINT64 result = 0;
if ((mem_mask & U64(0xffffffff00000000)) != U64(0xffffffff00000000)) if ((mem_mask & U64(0xffffffff00000000)) != 0)
result |= (UINT64)read32be_with_16le_device_handler(handler, device, offset * 2 + 0, mem_mask >> 32) << 32; result |= (UINT64)read32be_with_16le_device_handler(handler, device, offset * 2 + 0, mem_mask >> 32) << 32;
if ((mem_mask & U64(0x00000000ffffffff)) != U64(0x00000000ffffffff)) if ((mem_mask & U64(0x00000000ffffffff)) != 0)
result |= (UINT64)read32be_with_16le_device_handler(handler, device, offset * 2 + 1, mem_mask >> 0) << 0; result |= (UINT64)read32be_with_16le_device_handler(handler, device, offset * 2 + 1, mem_mask >> 0) << 0;
return result; return result;
} }
@ -404,9 +404,9 @@ INLINE UINT32 read64be_with_16le_device_handler(read16_device_func handler, cons
INLINE void write64be_with_16le_device_handler(write16_device_func handler, const device_config *device, offs_t offset, UINT64 data, UINT64 mem_mask) INLINE void write64be_with_16le_device_handler(write16_device_func handler, const device_config *device, offs_t offset, UINT64 data, UINT64 mem_mask)
{ {
if ((mem_mask & U64(0xffffffff00000000)) != U64(0xffffffff00000000)) if ((mem_mask & U64(0xffffffff00000000)) != 0)
write32be_with_16le_device_handler(handler, device, offset * 2 + 0, data >> 32, mem_mask >> 32); write32be_with_16le_device_handler(handler, device, offset * 2 + 0, data >> 32, mem_mask >> 32);
if ((mem_mask & U64(0x00000000ffffffff)) != U64(0x00000000ffffffff)) if ((mem_mask & U64(0x00000000ffffffff)) != 0)
write32be_with_16le_device_handler(handler, device, offset * 2 + 1, data >> 0, mem_mask >> 0); write32be_with_16le_device_handler(handler, device, offset * 2 + 1, data >> 0, mem_mask >> 0);
} }
@ -420,9 +420,9 @@ INLINE void write64be_with_16le_device_handler(write16_device_func handler, cons
INLINE UINT32 read64le_with_16be_device_handler(read16_device_func handler, const device_config *device, offs_t offset, UINT64 mem_mask) INLINE UINT32 read64le_with_16be_device_handler(read16_device_func handler, const device_config *device, offs_t offset, UINT64 mem_mask)
{ {
UINT64 result = 0; UINT64 result = 0;
if ((mem_mask & U64(0x00000000ffffffff)) != U64(0x00000000ffffffff)) if ((mem_mask & U64(0x00000000ffffffff)) != 0)
result |= (UINT64)read32le_with_16be_device_handler(handler, device, offset * 2 + 0, mem_mask >> 0) << 0; result |= (UINT64)read32le_with_16be_device_handler(handler, device, offset * 2 + 0, mem_mask >> 0) << 0;
if ((mem_mask & U64(0xffffffff00000000)) != U64(0xffffffff00000000)) if ((mem_mask & U64(0xffffffff00000000)) != 0)
result |= (UINT64)read32le_with_16be_device_handler(handler, device, offset * 2 + 1, mem_mask >> 32) << 32; result |= (UINT64)read32le_with_16be_device_handler(handler, device, offset * 2 + 1, mem_mask >> 32) << 32;
return result; return result;
} }
@ -430,9 +430,9 @@ INLINE UINT32 read64le_with_16be_device_handler(read16_device_func handler, cons
INLINE void write64le_with_16be_device_handler(write16_device_func handler, const device_config *device, offs_t offset, UINT64 data, UINT64 mem_mask) INLINE void write64le_with_16be_device_handler(write16_device_func handler, const device_config *device, offs_t offset, UINT64 data, UINT64 mem_mask)
{ {
if ((mem_mask & U64(0x00000000ffffffff)) != U64(0x00000000ffffffff)) if ((mem_mask & U64(0x00000000ffffffff)) != 0)
write32le_with_16be_device_handler(handler, device, offset * 2 + 0, data >> 0, mem_mask >> 0); write32le_with_16be_device_handler(handler, device, offset * 2 + 0, data >> 0, mem_mask >> 0);
if ((mem_mask & U64(0xffffffff00000000)) != U64(0xffffffff00000000)) if ((mem_mask & U64(0xffffffff00000000)) != 0)
write32le_with_16be_device_handler(handler, device, offset * 2 + 1, data >> 32, mem_mask >> 32); write32le_with_16be_device_handler(handler, device, offset * 2 + 1, data >> 32, mem_mask >> 32);
} }
@ -446,9 +446,9 @@ INLINE void write64le_with_16be_device_handler(write16_device_func handler, cons
INLINE UINT64 read64be_with_32be_device_handler(read32_device_func handler, const device_config *device, offs_t offset, UINT64 mem_mask) INLINE UINT64 read64be_with_32be_device_handler(read32_device_func handler, const device_config *device, offs_t offset, UINT64 mem_mask)
{ {
UINT64 result = 0; UINT64 result = 0;
if ((mem_mask & U64(0xffffffff00000000)) != U64(0xffffffff00000000)) if ((mem_mask & U64(0xffffffff00000000)) != 0)
result |= (UINT64)(*handler)(device, offset * 2 + 0, mem_mask >> 32) << 32; result |= (UINT64)(*handler)(device, offset * 2 + 0, mem_mask >> 32) << 32;
if ((mem_mask & U64(0x00000000ffffffff)) != U64(0x00000000ffffffff)) if ((mem_mask & U64(0x00000000ffffffff)) != 0)
result |= (UINT64)(*handler)(device, offset * 2 + 1, mem_mask >> 0) << 0; result |= (UINT64)(*handler)(device, offset * 2 + 1, mem_mask >> 0) << 0;
return result; return result;
} }
@ -456,9 +456,9 @@ INLINE UINT64 read64be_with_32be_device_handler(read32_device_func handler, cons
INLINE void write64be_with_32be_device_handler(write32_device_func handler, const device_config *device, offs_t offset, UINT64 data, UINT64 mem_mask) INLINE void write64be_with_32be_device_handler(write32_device_func handler, const device_config *device, offs_t offset, UINT64 data, UINT64 mem_mask)
{ {
if ((mem_mask & U64(0xffffffff00000000)) != U64(0xffffffff00000000)) if ((mem_mask & U64(0xffffffff00000000)) != 0)
(*handler)(device, offset * 2 + 0, data >> 32, mem_mask >> 32); (*handler)(device, offset * 2 + 0, data >> 32, mem_mask >> 32);
if ((mem_mask & U64(0x00000000ffffffff)) != U64(0x00000000ffffffff)) if ((mem_mask & U64(0x00000000ffffffff)) != 0)
(*handler)(device, offset * 2 + 1, data >> 0, mem_mask >> 0); (*handler)(device, offset * 2 + 1, data >> 0, mem_mask >> 0);
} }
@ -472,9 +472,9 @@ INLINE void write64be_with_32be_device_handler(write32_device_func handler, cons
INLINE UINT64 read64le_with_32le_device_handler(read32_device_func handler, const device_config *device, offs_t offset, UINT64 mem_mask) INLINE UINT64 read64le_with_32le_device_handler(read32_device_func handler, const device_config *device, offs_t offset, UINT64 mem_mask)
{ {
UINT64 result = 0; UINT64 result = 0;
if ((mem_mask & U64(0x00000000ffffffff)) != U64(0x00000000ffffffff)) if ((mem_mask & U64(0x00000000ffffffff)) != 0)
result |= (UINT64)(*handler)(device, offset * 2 + 0, mem_mask >> 0) << 0; result |= (UINT64)(*handler)(device, offset * 2 + 0, mem_mask >> 0) << 0;
if ((mem_mask & U64(0xffffffff00000000)) != U64(0xffffffff00000000)) if ((mem_mask & U64(0xffffffff00000000)) != 0)
result |= (UINT64)(*handler)(device, offset * 2 + 1, mem_mask >> 32) << 32; result |= (UINT64)(*handler)(device, offset * 2 + 1, mem_mask >> 32) << 32;
return result; return result;
} }
@ -482,9 +482,9 @@ INLINE UINT64 read64le_with_32le_device_handler(read32_device_func handler, cons
INLINE void write64le_with_32le_device_handler(write32_device_func handler, const device_config *device, offs_t offset, UINT64 data, UINT64 mem_mask) INLINE void write64le_with_32le_device_handler(write32_device_func handler, const device_config *device, offs_t offset, UINT64 data, UINT64 mem_mask)
{ {
if ((mem_mask & U64(0x00000000ffffffff)) != U64(0x00000000ffffffff)) if ((mem_mask & U64(0x00000000ffffffff)) != 0)
(*handler)(device, offset * 2 + 0, data >> 0, mem_mask >> 0); (*handler)(device, offset * 2 + 0, data >> 0, mem_mask >> 0);
if ((mem_mask & U64(0xffffffff00000000)) != U64(0xffffffff00000000)) if ((mem_mask & U64(0xffffffff00000000)) != 0)
(*handler)(device, offset * 2 + 1, data >> 32, mem_mask >> 32); (*handler)(device, offset * 2 + 1, data >> 32, mem_mask >> 32);
} }

4
src/emu/machine/am53cf96.c
View File

@ -45,7 +45,7 @@ READ32_HANDLER( am53cf96_r )
static const int states[] = { 0, 0, 1, 1, 2, 3, 4, 5, 6, 7, 0 }; static const int states[] = { 0, 0, 1, 1, 2, 3, 4, 5, 6, 7, 0 };
reg = offset * 2; reg = offset * 2;
if (mem_mask == 0xffffff00) if (mem_mask == 0x000000ff)
{ {
shift = 0; shift = 0;
} }
@ -96,7 +96,7 @@ WRITE32_HANDLER( am53cf96_w )
reg = offset * 2; reg = offset * 2;
val = data; val = data;
if (mem_mask == 0xffffff00) if (mem_mask == 0x000000ff)
{ {
} }
else else

6
src/emu/machine/smc91c9x.c
View File

@ -440,7 +440,7 @@ READ16_HANDLER( smc91c94_r )
} }
if (LOG_ETHERNET && offset != EREG_BANK) if (LOG_ETHERNET && offset != EREG_BANK)
logerror("%08X:ethernet_r(%s) = %04X & %04X\n", activecpu_get_pc(), ethernet_regname[offset], result, mem_mask ^ 0xffff); logerror("%08X:ethernet_r(%s) = %04X & %04X\n", activecpu_get_pc(), ethernet_regname[offset], result, mem_mask);
return result; return result;
} }
@ -463,11 +463,11 @@ WRITE16_HANDLER( smc91c94_w )
/* update the data generically */ /* update the data generically */
olddata = ethernet.reg[offset]; olddata = ethernet.reg[offset];
mem_mask |= ~ethernet.regmask[offset]; mem_mask &= ethernet.regmask[offset];
COMBINE_DATA(&ethernet.reg[offset]); COMBINE_DATA(&ethernet.reg[offset]);
if (LOG_ETHERNET && offset != 7) if (LOG_ETHERNET && offset != 7)
logerror("%08X:ethernet_w(%s) = %04X & %04X\n", activecpu_get_pc(), ethernet_regname[offset], data, mem_mask ^ 0xffff); logerror("%08X:ethernet_w(%s) = %04X & %04X\n", activecpu_get_pc(), ethernet_regname[offset], data, mem_mask);
/* handle it */ /* handle it */
switch (offset) switch (offset)

436
src/emu/memory.c
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File diff suppressed because it is too large Load Diff

30
src/emu/memory.h
View File

@ -428,24 +428,24 @@ union _addrmap64_token
/* helper macro for merging data with the memory mask */ /* helper macro for merging data with the memory mask */
#define COMBINE_DATA(varptr) (*(varptr) = (*(varptr) & mem_mask) | (data & ~mem_mask)) #define COMBINE_DATA(varptr) (*(varptr) = (*(varptr) & ~mem_mask) | (data & mem_mask))
#define ACCESSING_BITS_0_7 ((~mem_mask & 0x000000ff) != 0) #define ACCESSING_BITS_0_7 ((mem_mask & 0x000000ff) != 0)
#define ACCESSING_BITS_8_15 ((~mem_mask & 0x0000ff00) != 0) #define ACCESSING_BITS_8_15 ((mem_mask & 0x0000ff00) != 0)
#define ACCESSING_BITS_16_23 ((~mem_mask & 0x00ff0000) != 0) #define ACCESSING_BITS_16_23 ((mem_mask & 0x00ff0000) != 0)
#define ACCESSING_BITS_24_31 ((~mem_mask & 0xff000000) != 0) #define ACCESSING_BITS_24_31 ((mem_mask & 0xff000000) != 0)
#define ACCESSING_BITS_32_39 ((~mem_mask & U64(0x000000ff00000000)) != 0) #define ACCESSING_BITS_32_39 ((mem_mask & U64(0x000000ff00000000)) != 0)
#define ACCESSING_BITS_40_47 ((~mem_mask & U64(0x0000ff0000000000)) != 0) #define ACCESSING_BITS_40_47 ((mem_mask & U64(0x0000ff0000000000)) != 0)
#define ACCESSING_BITS_48_55 ((~mem_mask & U64(0x00ff000000000000)) != 0) #define ACCESSING_BITS_48_55 ((mem_mask & U64(0x00ff000000000000)) != 0)
#define ACCESSING_BITS_56_63 ((~mem_mask & U64(0xff00000000000000)) != 0) #define ACCESSING_BITS_56_63 ((mem_mask & U64(0xff00000000000000)) != 0)
#define ACCESSING_BITS_0_15 ((~mem_mask & 0x0000ffff) != 0) #define ACCESSING_BITS_0_15 ((mem_mask & 0x0000ffff) != 0)
#define ACCESSING_BITS_16_31 ((~mem_mask & 0xffff0000) != 0) #define ACCESSING_BITS_16_31 ((mem_mask & 0xffff0000) != 0)
#define ACCESSING_BITS_32_47 ((~mem_mask & U64(0x0000ffff00000000)) != 0) #define ACCESSING_BITS_32_47 ((mem_mask & U64(0x0000ffff00000000)) != 0)
#define ACCESSING_BITS_48_63 ((~mem_mask & U64(0xffff000000000000)) != 0) #define ACCESSING_BITS_48_63 ((mem_mask & U64(0xffff000000000000)) != 0)
#define ACCESSING_BITS_0_31 ((~mem_mask & 0xffffffff) != 0) #define ACCESSING_BITS_0_31 ((mem_mask & 0xffffffff) != 0)
#define ACCESSING_BITS_32_63 ((~mem_mask & U64(0xffffffff00000000)) != 0) #define ACCESSING_BITS_32_63 ((mem_mask & U64(0xffffffff00000000)) != 0)
/* bank switching for CPU cores */ /* bank switching for CPU cores */

2
src/emu/sound/c352.c
View File

@ -572,7 +572,7 @@ READ16_HANDLER( c352_0_r )
WRITE16_HANDLER( c352_0_w ) WRITE16_HANDLER( c352_0_w )
{ {
if (mem_mask == 0) if (mem_mask == 0xffff)
{ {
c352_write_reg16(sndti_token(SOUND_C352, 0), offset*2, data); c352_write_reg16(sndti_token(SOUND_C352, 0), offset*2, data);
} }

4
src/emu/sound/es5506.c
View File

@ -1711,7 +1711,7 @@ INLINE void es5505_reg_write_high(struct ES5506Chip *chip, struct ES5506Voice *v
((data << 2) & (CONTROL_CA0 | CONTROL_CA1)); ((data << 2) & (CONTROL_CA0 | CONTROL_CA1));
} }
if (LOG_COMMANDS && eslog) if (LOG_COMMANDS && eslog)
fprintf(eslog, "%06x:voice %d, control=%04x (raw=%04x & %04x)\n", activecpu_get_previouspc(), chip->current_page & 0x1f, voice->control, data, mem_mask ^ 0xffff); fprintf(eslog, "%06x:voice %d, control=%04x (raw=%04x & %04x)\n", activecpu_get_previouspc(), chip->current_page & 0x1f, voice->control, data, mem_mask);
break; break;
case 0x01: /* O4(n-1) */ case 0x01: /* O4(n-1) */
@ -1847,7 +1847,7 @@ static void es5505_reg_write(struct ES5506Chip *chip, offs_t offset, UINT16 data
{ {
struct ES5506Voice *voice = &chip->voice[chip->current_page & 0x1f]; struct ES5506Voice *voice = &chip->voice[chip->current_page & 0x1f];
// logerror("%04x:ES5505 write %02x/%02x = %04x & %04x\n", activecpu_get_previouspc(), chip->current_page, offset, data, mem_mask ^ 0xffff); // logerror("%04x:ES5505 write %02x/%02x = %04x & %04x\n", activecpu_get_previouspc(), chip->current_page, offset, data, mem_mask);
/* force an update */ /* force an update */
stream_update(chip->stream); stream_update(chip->stream);

32
src/emu/video/voodoo.c
View File

@ -2014,7 +2014,7 @@ static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
/* loop over words */ /* loop over words */
for (i = 0; i < count; i++) for (i = 0; i < count; i++)
cycles += lfb_w(v, target++, *src++, 0, FALSE); cycles += lfb_w(v, target++, *src++, 0xffffffff, FALSE);
} }
else if ((command >> 30) == 3) else if ((command >> 30) == 3)
{ {
@ -3535,13 +3535,13 @@ static void flush_fifos(voodoo_state *v, attotime current_time)
cycles = texture_w(v, address, data); cycles = texture_w(v, address, data);
else else
{ {
UINT32 mem_mask = 0; UINT32 mem_mask = 0xffffffff;
/* compute mem_mask */ /* compute mem_mask */
if (address & 0x80000000) if (address & 0x80000000)
mem_mask |= 0xffff0000; mem_mask &= 0x0000ffff;
if (address & 0x40000000) if (address & 0x40000000)
mem_mask |= 0x0000ffff; mem_mask &= 0xffff0000;
address &= 0xffffff; address &= 0xffffff;
cycles = lfb_w(v, address, data, mem_mask, FALSE); cycles = lfb_w(v, address, data, mem_mask, FALSE);
@ -4384,7 +4384,7 @@ static void banshee_agp_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 me
} }
if (LOG_REGISTERS) if (LOG_REGISTERS)
logerror("%08X:banshee_w(AGP:%s) = %08X & %08X\n", activecpu_get_pc(), banshee_agp_reg_name[offset], data, ~mem_mask); logerror("%08X:banshee_w(AGP:%s) = %08X & %08X\n", activecpu_get_pc(), banshee_agp_reg_name[offset], data, mem_mask);
} }
@ -4399,15 +4399,15 @@ static void banshee_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_ma
else if (offset < 0x100000/4) else if (offset < 0x100000/4)
banshee_agp_w(v, offset, data, mem_mask); banshee_agp_w(v, offset, data, mem_mask);
else if (offset < 0x200000/4) else if (offset < 0x200000/4)
logerror("%08X:banshee_w(2D:%X) = %08X & %08X\n", activecpu_get_pc(), (offset*4) & 0xfffff, data, ~mem_mask); logerror("%08X:banshee_w(2D:%X) = %08X & %08X\n", activecpu_get_pc(), (offset*4) & 0xfffff, data, mem_mask);
else if (offset < 0x600000/4) else if (offset < 0x600000/4)
register_w(v, offset & 0x1fffff/4, data); register_w(v, offset & 0x1fffff/4, data);
else if (offset < 0x800000/4) else if (offset < 0x800000/4)
logerror("%08X:banshee_w(TEX:%X) = %08X & %08X\n", activecpu_get_pc(), (offset*4) & 0x1fffff, data, ~mem_mask); logerror("%08X:banshee_w(TEX:%X) = %08X & %08X\n", activecpu_get_pc(), (offset*4) & 0x1fffff, data, mem_mask);
else if (offset < 0xc00000/4) else if (offset < 0xc00000/4)
logerror("%08X:banshee_w(RES:%X) = %08X & %08X\n", activecpu_get_pc(), (offset*4) & 0x3fffff, data, ~mem_mask); logerror("%08X:banshee_w(RES:%X) = %08X & %08X\n", activecpu_get_pc(), (offset*4) & 0x3fffff, data, mem_mask);
else if (offset < 0x1000000/4) else if (offset < 0x1000000/4)
logerror("%08X:banshee_w(YUV:%X) = %08X & %08X\n", activecpu_get_pc(), (offset*4) & 0x3fffff, data, ~mem_mask); logerror("%08X:banshee_w(YUV:%X) = %08X & %08X\n", activecpu_get_pc(), (offset*4) & 0x3fffff, data, mem_mask);
else if (offset < 0x2000000/4) else if (offset < 0x2000000/4)
{ {
UINT8 temp = v->fbi.lfb_stride; UINT8 temp = v->fbi.lfb_stride;
@ -4436,7 +4436,7 @@ static void banshee_fb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem
{ {
if (offset*4 <= v->fbi.mask) if (offset*4 <= v->fbi.mask)
COMBINE_DATA(&((UINT32 *)v->fbi.ram)[offset]); COMBINE_DATA(&((UINT32 *)v->fbi.ram)[offset]);
logerror("%08X:banshee_fb_w(%X) = %08X & %08X\n", activecpu_get_pc(), offset*4, data, ~mem_mask); logerror("%08X:banshee_fb_w(%X) = %08X & %08X\n", activecpu_get_pc(), offset*4, data, mem_mask);
} }
} }
else else
@ -4518,7 +4518,7 @@ static void banshee_io_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem
if ((v->banshee.io[offset] ^ old) & 0x2800) if ((v->banshee.io[offset] ^ old) & 0x2800)
v->fbi.clut_dirty = TRUE; v->fbi.clut_dirty = TRUE;
if (LOG_REGISTERS) if (LOG_REGISTERS)
logerror("%08X:banshee_io_w(%s) = %08X & %08X\n", activecpu_get_pc(), banshee_io_reg_name[offset], data, ~mem_mask); logerror("%08X:banshee_io_w(%s) = %08X & %08X\n", activecpu_get_pc(), banshee_io_reg_name[offset], data, mem_mask);
break; break;
case io_dacData: case io_dacData:
@ -4529,14 +4529,14 @@ static void banshee_io_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem
v->fbi.clut_dirty = TRUE; v->fbi.clut_dirty = TRUE;
} }
if (LOG_REGISTERS) if (LOG_REGISTERS)
logerror("%08X:banshee_dac_w(%X) = %08X & %08X\n", activecpu_get_pc(), v->banshee.io[io_dacAddr] & 0x1ff, data, ~mem_mask); logerror("%08X:banshee_dac_w(%X) = %08X & %08X\n", activecpu_get_pc(), v->banshee.io[io_dacAddr] & 0x1ff, data, mem_mask);
break; break;
case io_miscInit0: case io_miscInit0:
COMBINE_DATA(&v->banshee.io[offset]); COMBINE_DATA(&v->banshee.io[offset]);
v->fbi.yorigin = (data >> 18) & 0xfff; v->fbi.yorigin = (data >> 18) & 0xfff;
if (LOG_REGISTERS) if (LOG_REGISTERS)
logerror("%08X:banshee_io_w(%s) = %08X & %08X\n", activecpu_get_pc(), banshee_io_reg_name[offset], data, ~mem_mask); logerror("%08X:banshee_io_w(%s) = %08X & %08X\n", activecpu_get_pc(), banshee_io_reg_name[offset], data, mem_mask);
break; break;
case io_vidScreenSize: case io_vidScreenSize:
@ -4550,14 +4550,14 @@ static void banshee_io_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem
video_screen_set_visarea(v->screen, 0, v->fbi.width - 1, 0, v->fbi.height - 1); video_screen_set_visarea(v->screen, 0, v->fbi.width - 1, 0, v->fbi.height - 1);
adjust_vblank_timer(v); adjust_vblank_timer(v);
if (LOG_REGISTERS) if (LOG_REGISTERS)
logerror("%08X:banshee_io_w(%s) = %08X & %08X\n", activecpu_get_pc(), banshee_io_reg_name[offset], data, ~mem_mask); logerror("%08X:banshee_io_w(%s) = %08X & %08X\n", activecpu_get_pc(), banshee_io_reg_name[offset], data, mem_mask);
break; break;
case io_lfbMemoryConfig: case io_lfbMemoryConfig:
v->fbi.lfb_base = (data & 0x1fff) << 10; v->fbi.lfb_base = (data & 0x1fff) << 10;
v->fbi.lfb_stride = ((data >> 13) & 7) + 9; v->fbi.lfb_stride = ((data >> 13) & 7) + 9;
if (LOG_REGISTERS) if (LOG_REGISTERS)
logerror("%08X:banshee_io_w(%s) = %08X & %08X\n", activecpu_get_pc(), banshee_io_reg_name[offset], data, ~mem_mask); logerror("%08X:banshee_io_w(%s) = %08X & %08X\n", activecpu_get_pc(), banshee_io_reg_name[offset], data, mem_mask);
break; break;
case io_vgab0: case io_vgab4: case io_vgab8: case io_vgabc: case io_vgab0: case io_vgab4: case io_vgab8: case io_vgabc:
@ -4576,7 +4576,7 @@ static void banshee_io_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem
default: default:
COMBINE_DATA(&v->banshee.io[offset]); COMBINE_DATA(&v->banshee.io[offset]);
if (LOG_REGISTERS) if (LOG_REGISTERS)
logerror("%08X:banshee_io_w(%s) = %08X & %08X\n", activecpu_get_pc(), banshee_io_reg_name[offset], data, ~mem_mask); logerror("%08X:banshee_io_w(%s) = %08X & %08X\n", activecpu_get_pc(), banshee_io_reg_name[offset], data, mem_mask);
break; break;
} }
} }

2
src/mame/audio/amiga.c
View File

@ -83,7 +83,7 @@ static amiga_audio *audio_state;
static TIMER_CALLBACK( signal_irq ) static TIMER_CALLBACK( signal_irq )
{ {
amiga_custom_w(machine, REG_INTREQ, 0x8000 | (0x80 << param), 0); amiga_custom_w(machine, REG_INTREQ, 0x8000 | (0x80 << param), 0xffff);
} }

2
src/mame/audio/cage.c
View File

@ -506,7 +506,7 @@ UINT16 main_from_cage_r(void)
logerror("%06X:main read data = %04X\n", activecpu_get_pc(), soundlatch_word_r(Machine, 0, 0)); logerror("%06X:main read data = %04X\n", activecpu_get_pc(), soundlatch_word_r(Machine, 0, 0));
cage_to_cpu_ready = 0; cage_to_cpu_ready = 0;
update_control_lines(); update_control_lines();
return soundlatch_word_r(Machine, 0, 0); return soundlatch_word_r(Machine, 0, 0xffff);
} }

10
src/mame/audio/cchasm.c
View File

@ -22,7 +22,7 @@ READ8_HANDLER( cchasm_snd_io_r )
switch (offset & 0x61 ) switch (offset & 0x61 )
{ {
case 0x00: case 0x00:
coin = (input_port_3_r (machine, offset) >> 4) & 0x7; coin = (input_port_read_indexed(machine, 3) >> 4) & 0x7;
if (coin != 0x7) coin |= 0x8; if (coin != 0x7) coin |= 0x8;
return sound_flags | coin; return sound_flags | coin;
@ -119,11 +119,11 @@ READ16_HANDLER( cchasm_io_r )
sound_flags &= ~0x40; sound_flags &= ~0x40;
return soundlatch4_r (machine,offset) << 8; return soundlatch4_r (machine,offset) << 8;
case 0x2: case 0x2:
return (sound_flags| (input_port_3_r (machine, offset) & 0x07) | 0x08) << 8; return (sound_flags| (input_port_read_indexed(machine, 3) & 0x07) | 0x08) << 8;
case 0x5: case 0x5:
return input_port_2_r (machine, offset) << 8; return input_port_read_indexed(machine, 2) << 8;
case 0x8: case 0x8:
return input_port_1_r (machine, offset) << 8; return input_port_read_indexed(machine, 1) << 8;
default: default:
return 0xff << 8; return 0xff << 8;
} }
@ -169,7 +169,7 @@ static z80ctc_interface ctc_intf =
static TIMER_CALLBACK( cchasm_sh_update ) static TIMER_CALLBACK( cchasm_sh_update )
{ {
if ((input_port_3_r (machine, 0) & 0x70) != 0x70) if ((input_port_read_indexed(machine, 3) & 0x70) != 0x70)
z80ctc_0_trg0_w (machine, 0, 1); z80ctc_0_trg0_w (machine, 0, 1);
} }

2
src/mame/audio/cps3.c
View File

@ -142,7 +142,7 @@ READ32_HANDLER( cps3_sound_r )
if (offset < 0x80) if (offset < 0x80)
{ {
return chip.voice[offset / 8].regs[offset & 7] & ~mem_mask; return chip.voice[offset / 8].regs[offset & 7] & mem_mask;
} }
else if (offset == 0x80) else if (offset == 0x80)
{ {

10
src/mame/audio/dcs.c
View File

@ -1562,7 +1562,7 @@ static WRITE16_HANDLER( input_latch_ack_w )
static READ16_HANDLER( input_latch_r ) static READ16_HANDLER( input_latch_r )
{ {
if (dcs.auto_ack) if (dcs.auto_ack)
input_latch_ack_w(machine,0,0,0); input_latch_ack_w(machine,0,0,0xffff);
if (LOG_DCS_IO) if (LOG_DCS_IO)
logerror("%08X:input_latch_r(%04X)\n", activecpu_get_pc(), dcs.input_data); logerror("%08X:input_latch_r(%04X)\n", activecpu_get_pc(), dcs.input_data);
return dcs.input_data; return dcs.input_data;
@ -2070,7 +2070,7 @@ static TIMER_CALLBACK( s1_ack_callback2 )
timer_set(ATTOTIME_IN_USEC(1), NULL, param, s1_ack_callback2); timer_set(ATTOTIME_IN_USEC(1), NULL, param, s1_ack_callback2);
return; return;
} }
output_latch_w(machine, 0, 0x000a, 0); output_latch_w(machine, 0, 0x000a, 0xffff);
} }
@ -2082,7 +2082,7 @@ static TIMER_CALLBACK( s1_ack_callback1 )
timer_set(ATTOTIME_IN_USEC(1), NULL, param, s1_ack_callback1); timer_set(ATTOTIME_IN_USEC(1), NULL, param, s1_ack_callback1);
return; return;
} }
output_latch_w(machine, 0, param, 0); output_latch_w(machine, 0, param, 0xffff);
/* chain to the next word we need to write back */ /* chain to the next word we need to write back */
timer_set(ATTOTIME_IN_USEC(1), NULL, 0, s1_ack_callback2); timer_set(ATTOTIME_IN_USEC(1), NULL, 0, s1_ack_callback2);
@ -2220,8 +2220,8 @@ static TIMER_CALLBACK( s2_ack_callback )
timer_set(ATTOTIME_IN_USEC(1), NULL, param, s2_ack_callback); timer_set(ATTOTIME_IN_USEC(1), NULL, param, s2_ack_callback);
return; return;
} }
output_latch_w(machine, 0, param, 0); output_latch_w(machine, 0, param, 0xffff);
output_control_w(machine, 0, (dcs.output_control & ~0xff00) | 0x0300, 0); output_control_w(machine, 0, (dcs.output_control & ~0xff00) | 0x0300, 0xffff);
} }

76
src/mame/audio/leland.c
View File

@ -1270,28 +1270,28 @@ static WRITE16_HANDLER( i80186_internal_port_w )
/* handle partials */ /* handle partials */
if (!ACCESSING_BITS_8_15) if (!ACCESSING_BITS_8_15)
data = (i80186_internal_port_r(machine, offset, 0) & 0xff00) | (data & 0x00ff); data = (i80186_internal_port_r(machine, offset, 0xff00) & 0xff00) | (data & 0x00ff);
else if (!ACCESSING_BITS_0_7) else if (!ACCESSING_BITS_0_7)
data = (i80186_internal_port_r(machine, offset, 0) & 0x00ff) | (data & 0xff00); data = (i80186_internal_port_r(machine, offset, 0x00ff) & 0x00ff) | (data & 0xff00);
switch (offset) switch (offset)
{ {
case 0x22/2: case 0x22/2:
if (LOG_PORTS) logerror("%05X:80186 EOI = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 EOI = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
handle_eoi(0x8000); handle_eoi(0x8000);
update_interrupt_state(); update_interrupt_state();
break; break;
case 0x24/2: case 0x24/2:
logerror("%05X:ERROR - write to 80186 interrupt poll = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); logerror("%05X:ERROR - write to 80186 interrupt poll = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
break; break;
case 0x26/2: case 0x26/2:
logerror("%05X:ERROR - write to 80186 interrupt poll status = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); logerror("%05X:ERROR - write to 80186 interrupt poll status = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
break; break;
case 0x28/2: case 0x28/2:
if (LOG_PORTS) logerror("%05X:80186 interrupt mask = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 interrupt mask = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
i80186.intr.timer = (i80186.intr.timer & ~0x08) | ((data << 3) & 0x08); i80186.intr.timer = (i80186.intr.timer & ~0x08) | ((data << 3) & 0x08);
i80186.intr.dma[0] = (i80186.intr.dma[0] & ~0x08) | ((data << 1) & 0x08); i80186.intr.dma[0] = (i80186.intr.dma[0] & ~0x08) | ((data << 1) & 0x08);
i80186.intr.dma[1] = (i80186.intr.dma[1] & ~0x08) | ((data << 0) & 0x08); i80186.intr.dma[1] = (i80186.intr.dma[1] & ~0x08) | ((data << 0) & 0x08);
@ -1303,69 +1303,69 @@ static WRITE16_HANDLER( i80186_internal_port_w )
break; break;
case 0x2a/2: case 0x2a/2:
if (LOG_PORTS) logerror("%05X:80186 interrupt priority mask = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 interrupt priority mask = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
i80186.intr.priority_mask = data & 0x0007; i80186.intr.priority_mask = data & 0x0007;
update_interrupt_state(); update_interrupt_state();
break; break;
case 0x2c/2: case 0x2c/2:
if (LOG_PORTS) logerror("%05X:80186 interrupt in-service = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 interrupt in-service = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
i80186.intr.in_service = data & 0x00ff; i80186.intr.in_service = data & 0x00ff;
update_interrupt_state(); update_interrupt_state();
break; break;
case 0x2e/2: case 0x2e/2:
if (LOG_PORTS) logerror("%05X:80186 interrupt request = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 interrupt request = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
i80186.intr.request = (i80186.intr.request & ~0x00c0) | (data & 0x00c0); i80186.intr.request = (i80186.intr.request & ~0x00c0) | (data & 0x00c0);
update_interrupt_state(); update_interrupt_state();
break; break;
case 0x30/2: case 0x30/2:
if (LOG_PORTS) logerror("%05X:WARNING - wrote to 80186 interrupt status = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:WARNING - wrote to 80186 interrupt status = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
i80186.intr.status = (i80186.intr.status & ~0x8000) | (data & 0x8000); i80186.intr.status = (i80186.intr.status & ~0x8000) | (data & 0x8000);
i80186.intr.status = (i80186.intr.status & ~0x0007) | (data & 0x0007); i80186.intr.status = (i80186.intr.status & ~0x0007) | (data & 0x0007);
update_interrupt_state(); update_interrupt_state();
break; break;
case 0x32/2: case 0x32/2:
if (LOG_PORTS) logerror("%05X:80186 timer interrupt contol = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 timer interrupt contol = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
i80186.intr.timer = data & 0x000f; i80186.intr.timer = data & 0x000f;
break; break;
case 0x34/2: case 0x34/2:
if (LOG_PORTS) logerror("%05X:80186 DMA 0 interrupt control = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 DMA 0 interrupt control = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
i80186.intr.dma[0] = data & 0x000f; i80186.intr.dma[0] = data & 0x000f;
break; break;
case 0x36/2: case 0x36/2:
if (LOG_PORTS) logerror("%05X:80186 DMA 1 interrupt control = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 DMA 1 interrupt control = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
i80186.intr.dma[1] = data & 0x000f; i80186.intr.dma[1] = data & 0x000f;
break; break;
case 0x38/2: case 0x38/2:
if (LOG_PORTS) logerror("%05X:80186 INT 0 interrupt control = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 INT 0 interrupt control = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
i80186.intr.ext[0] = data & 0x007f; i80186.intr.ext[0] = data & 0x007f;
break; break;
case 0x3a/2: case 0x3a/2:
if (LOG_PORTS) logerror("%05X:80186 INT 1 interrupt control = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 INT 1 interrupt control = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
i80186.intr.ext[1] = data & 0x007f; i80186.intr.ext[1] = data & 0x007f;
break; break;
case 0x3c/2: case 0x3c/2:
if (LOG_PORTS) logerror("%05X:80186 INT 2 interrupt control = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 INT 2 interrupt control = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
i80186.intr.ext[2] = data & 0x001f; i80186.intr.ext[2] = data & 0x001f;
break; break;
case 0x3e/2: case 0x3e/2:
if (LOG_PORTS) logerror("%05X:80186 INT 3 interrupt control = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 INT 3 interrupt control = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
i80186.intr.ext[3] = data & 0x001f; i80186.intr.ext[3] = data & 0x001f;
break; break;
case 0x50/2: case 0x50/2:
case 0x58/2: case 0x58/2:
case 0x60/2: case 0x60/2:
if (LOG_PORTS) logerror("%05X:80186 Timer %d count = %04X & %04X\n", activecpu_get_pc(), (offset - 0x50/2) / 4, data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 Timer %d count = %04X & %04X\n", activecpu_get_pc(), (offset - 0x50/2) / 4, data, mem_mask);
which = (offset - 0x50/2) / 4; which = (offset - 0x50/2) / 4;
internal_timer_update(which, data, -1, -1, -1); internal_timer_update(which, data, -1, -1, -1);
break; break;
@ -1373,14 +1373,14 @@ static WRITE16_HANDLER( i80186_internal_port_w )
case 0x52/2: case 0x52/2:
case 0x5a/2: case 0x5a/2:
case 0x62/2: case 0x62/2:
if (LOG_PORTS) logerror("%05X:80186 Timer %d max A = %04X & %04X\n", activecpu_get_pc(), (offset - 0x50/2) / 4, data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 Timer %d max A = %04X & %04X\n", activecpu_get_pc(), (offset - 0x50/2) / 4, data, mem_mask);
which = (offset - 0x50/2) / 4; which = (offset - 0x50/2) / 4;
internal_timer_update(which, -1, data, -1, -1); internal_timer_update(which, -1, data, -1, -1);
break; break;
case 0x54/2: case 0x54/2:
case 0x5c/2: case 0x5c/2:
if (LOG_PORTS) logerror("%05X:80186 Timer %d max B = %04X & %04X\n", activecpu_get_pc(), (offset - 0x50/2) / 4, data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 Timer %d max B = %04X & %04X\n", activecpu_get_pc(), (offset - 0x50/2) / 4, data, mem_mask);
which = (offset - 0x50/2) / 4; which = (offset - 0x50/2) / 4;
internal_timer_update(which, -1, -1, data, -1); internal_timer_update(which, -1, -1, data, -1);
break; break;
@ -1388,33 +1388,33 @@ static WRITE16_HANDLER( i80186_internal_port_w )
case 0x56/2: case 0x56/2:
case 0x5e/2: case 0x5e/2:
case 0x66/2: case 0x66/2:
if (LOG_PORTS) logerror("%05X:80186 Timer %d control = %04X & %04X\n", activecpu_get_pc(), (offset - 0x50/2) / 4, data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 Timer %d control = %04X & %04X\n", activecpu_get_pc(), (offset - 0x50/2) / 4, data, mem_mask);
which = (offset - 0x50/2) / 4; which = (offset - 0x50/2) / 4;
internal_timer_update(which, -1, -1, -1, data); internal_timer_update(which, -1, -1, -1, data);
break; break;
case 0xa0/2: case 0xa0/2:
if (LOG_PORTS) logerror("%05X:80186 upper chip select = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 upper chip select = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
i80186.mem.upper = data | 0xc038; i80186.mem.upper = data | 0xc038;
break; break;
case 0xa2/2: case 0xa2/2:
if (LOG_PORTS) logerror("%05X:80186 lower chip select = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 lower chip select = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
i80186.mem.lower = (data & 0x3fff) | 0x0038; i80186.mem.lower = (data & 0x3fff) | 0x0038;
break; break;
case 0xa4/2: case 0xa4/2:
if (LOG_PORTS) logerror("%05X:80186 peripheral chip select = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 peripheral chip select = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
i80186.mem.peripheral = data | 0x0038; i80186.mem.peripheral = data | 0x0038;
break; break;
case 0xa6/2: case 0xa6/2:
if (LOG_PORTS) logerror("%05X:80186 middle chip select = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 middle chip select = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
i80186.mem.middle = data | 0x01f8; i80186.mem.middle = data | 0x01f8;
break; break;
case 0xa8/2: case 0xa8/2:
if (LOG_PORTS) logerror("%05X:80186 middle P chip select = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 middle P chip select = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
i80186.mem.middle_size = data | 0x8038; i80186.mem.middle_size = data | 0x8038;
temp = (i80186.mem.peripheral & 0xffc0) << 4; temp = (i80186.mem.peripheral & 0xffc0) << 4;
@ -1434,7 +1434,7 @@ static WRITE16_HANDLER( i80186_internal_port_w )
case 0xc0/2: case 0xc0/2:
case 0xd0/2: case 0xd0/2:
if (LOG_PORTS) logerror("%05X:80186 DMA%d lower source address = %04X & %04X\n", activecpu_get_pc(), (offset - 0xc0/2) / 8, data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 DMA%d lower source address = %04X & %04X\n", activecpu_get_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
which = (offset - 0xc0/2) / 8; which = (offset - 0xc0/2) / 8;
stream_update(dma_stream); stream_update(dma_stream);
i80186.dma[which].source = (i80186.dma[which].source & ~0x0ffff) | (data & 0x0ffff); i80186.dma[which].source = (i80186.dma[which].source & ~0x0ffff) | (data & 0x0ffff);
@ -1442,7 +1442,7 @@ static WRITE16_HANDLER( i80186_internal_port_w )
case 0xc2/2: case 0xc2/2:
case 0xd2/2: case 0xd2/2:
if (LOG_PORTS) logerror("%05X:80186 DMA%d upper source address = %04X & %04X\n", activecpu_get_pc(), (offset - 0xc0/2) / 8, data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 DMA%d upper source address = %04X & %04X\n", activecpu_get_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
which = (offset - 0xc0/2) / 8; which = (offset - 0xc0/2) / 8;
stream_update(dma_stream); stream_update(dma_stream);
i80186.dma[which].source = (i80186.dma[which].source & ~0xf0000) | ((data << 16) & 0xf0000); i80186.dma[which].source = (i80186.dma[which].source & ~0xf0000) | ((data << 16) & 0xf0000);
@ -1450,7 +1450,7 @@ static WRITE16_HANDLER( i80186_internal_port_w )
case 0xc4/2: case 0xc4/2:
case 0xd4/2: case 0xd4/2:
if (LOG_PORTS) logerror("%05X:80186 DMA%d lower dest address = %04X & %04X\n", activecpu_get_pc(), (offset - 0xc0/2) / 8, data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 DMA%d lower dest address = %04X & %04X\n", activecpu_get_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
which = (offset - 0xc0/2) / 8; which = (offset - 0xc0/2) / 8;
stream_update(dma_stream); stream_update(dma_stream);
i80186.dma[which].dest = (i80186.dma[which].dest & ~0x0ffff) | (data & 0x0ffff); i80186.dma[which].dest = (i80186.dma[which].dest & ~0x0ffff) | (data & 0x0ffff);
@ -1458,7 +1458,7 @@ static WRITE16_HANDLER( i80186_internal_port_w )
case 0xc6/2: case 0xc6/2:
case 0xd6/2: case 0xd6/2:
if (LOG_PORTS) logerror("%05X:80186 DMA%d upper dest address = %04X & %04X\n", activecpu_get_pc(), (offset - 0xc0/2) / 8, data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 DMA%d upper dest address = %04X & %04X\n", activecpu_get_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
which = (offset - 0xc0/2) / 8; which = (offset - 0xc0/2) / 8;
stream_update(dma_stream); stream_update(dma_stream);
i80186.dma[which].dest = (i80186.dma[which].dest & ~0xf0000) | ((data << 16) & 0xf0000); i80186.dma[which].dest = (i80186.dma[which].dest & ~0xf0000) | ((data << 16) & 0xf0000);
@ -1466,7 +1466,7 @@ static WRITE16_HANDLER( i80186_internal_port_w )
case 0xc8/2: case 0xc8/2:
case 0xd8/2: case 0xd8/2:
if (LOG_PORTS) logerror("%05X:80186 DMA%d transfer count = %04X & %04X\n", activecpu_get_pc(), (offset - 0xc0/2) / 8, data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 DMA%d transfer count = %04X & %04X\n", activecpu_get_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
which = (offset - 0xc0/2) / 8; which = (offset - 0xc0/2) / 8;
stream_update(dma_stream); stream_update(dma_stream);
i80186.dma[which].count = data; i80186.dma[which].count = data;
@ -1474,14 +1474,14 @@ static WRITE16_HANDLER( i80186_internal_port_w )
case 0xca/2: case 0xca/2:
case 0xda/2: case 0xda/2:
if (LOG_PORTS) logerror("%05X:80186 DMA%d control = %04X & %04X\n", activecpu_get_pc(), (offset - 0xc0/2) / 8, data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 DMA%d control = %04X & %04X\n", activecpu_get_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
which = (offset - 0xc0/2) / 8; which = (offset - 0xc0/2) / 8;
stream_update(dma_stream); stream_update(dma_stream);
update_dma_control(which, data); update_dma_control(which, data);
break; break;
case 0xfe/2: case 0xfe/2:
if (LOG_PORTS) logerror("%05X:80186 relocation register = %04X & %04X\n", activecpu_get_pc(), data, mem_mask ^ 0xffff); if (LOG_PORTS) logerror("%05X:80186 relocation register = %04X & %04X\n", activecpu_get_pc(), data, mem_mask);
/* we assume here there that this doesn't happen too often */ /* we assume here there that this doesn't happen too often */
/* plus, we can't really remove the old memory range, so we also assume that it's */ /* plus, we can't really remove the old memory range, so we also assume that it's */
@ -1498,7 +1498,7 @@ static WRITE16_HANDLER( i80186_internal_port_w )
break; break;
default: default:
logerror("%05X:80186 port %02X = %04X & %04X\n", activecpu_get_pc(), offset*2, data, mem_mask ^ 0xffff); logerror("%05X:80186 port %02X = %04X & %04X\n", activecpu_get_pc(), offset*2, data, mem_mask);
break; break;
} }
} }
@ -1923,13 +1923,13 @@ static WRITE16_HANDLER( ataxx_dac_control )
case 0x01: case 0x01:
case 0x02: case 0x02:
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
dac_w(machine, offset, data, 0xff00); dac_w(machine, offset, data, 0x00ff);
return; return;
case 0x03: case 0x03:
dac_w(machine, 0, ((data << 13) & 0xe000) | ((data << 10) & 0x1c00) | ((data << 7) & 0x0300), 0x00ff); dac_w(machine, 0, ((data << 13) & 0xe000) | ((data << 10) & 0x1c00) | ((data << 7) & 0x0300), 0xff00);
dac_w(machine, 2, ((data << 10) & 0xe000) | ((data << 7) & 0x1c00) | ((data << 4) & 0x0300), 0x00ff); dac_w(machine, 2, ((data << 10) & 0xe000) | ((data << 7) & 0x1c00) | ((data << 4) & 0x0300), 0xff00);
dac_w(machine, 4, ((data << 8) & 0xc000) | ((data << 6) & 0x3000) | ((data << 4) & 0x0c00) | ((data << 2) & 0x0300), 0x00ff); dac_w(machine, 4, ((data << 8) & 0xc000) | ((data << 6) & 0x3000) | ((data << 4) & 0x0c00) | ((data << 2) & 0x0300), 0xff00);
return; return;
} }

4
src/mame/audio/seibu.c
View File

@ -459,12 +459,12 @@ WRITE16_HANDLER( seibu_main_word_w )
READ8_HANDLER( seibu_main_v30_r ) READ8_HANDLER( seibu_main_v30_r )
{ {
return seibu_main_word_r(machine,offset/2,0) >> (8 * (offset & 1)); return seibu_main_word_r(machine,offset/2,0xffff) >> (8 * (offset & 1));
} }
WRITE8_HANDLER( seibu_main_v30_w ) WRITE8_HANDLER( seibu_main_v30_w )
{ {
seibu_main_word_w(machine,offset/2,data << (8 * (offset & 1)),0xff00 >> (8 * (offset & 1))); seibu_main_word_w(machine,offset/2,data << (8 * (offset & 1)),0x00ff << (8 * (offset & 1)));
} }
WRITE16_HANDLER( seibu_main_mustb_w ) WRITE16_HANDLER( seibu_main_mustb_w )

4
src/mame/drivers/acommand.c
View File

@ -281,7 +281,7 @@ static READ16_HANDLER(ac_devices_r)
---- ---- ---- --x- (Activate Test) ---- ---- ---- --x- (Activate Test)
---- ---- ---- ---x (Advance Thru Tests) ---- ---- ---- ---x (Advance Thru Tests)
*/ */
return input_port_0_word_r(machine,0,0); return input_port_read_indexed(machine,0);
case 0x0014/2: case 0x0014/2:
/* /*
write 0x40,read (~0x08) write 0x40,read (~0x08)
@ -315,7 +315,7 @@ static READ16_HANDLER(ac_devices_r)
xxxx xxxx ---- ---- DIPSW4 xxxx xxxx ---- ---- DIPSW4
---- ---- xxxx xxxx DIPSW3 ---- ---- xxxx xxxx DIPSW3
*/ */
return input_port_1_word_r(machine,0,0); return input_port_read_indexed(machine,1);
} }
return ac_devram[offset]; return ac_devram[offset];
} }

2
src/mame/drivers/aquarium.c
View File

@ -87,7 +87,7 @@ static MACHINE_RESET( aquarium )
static READ16_HANDLER( aquarium_coins_r ) static READ16_HANDLER( aquarium_coins_r )
{ {
int data; int data;
data = (input_port_2_word_r(machine,0,mem_mask) & 0x7fff); /* IN1 */ data = (input_port_read_indexed(machine,2) & 0x7fff); /* IN1 */
data |= aquarium_snd_ack; data |= aquarium_snd_ack;
aquarium_snd_ack = 0; aquarium_snd_ack = 0;
return data; return data;

2
src/mame/drivers/armedf.c
View File

@ -226,7 +226,7 @@ static WRITE16_HANDLER( kodure_io_w )
int i; int i;
for (i = 0; i < 0x1000; i++) for (i = 0; i < 0x1000; i++)
{ {
armedf_text_videoram_w(machine,i, ' ', 0); armedf_text_videoram_w(machine,i, ' ', 0xffff);
} }
} }
} }

2
src/mame/drivers/asterix.c
View File

@ -68,7 +68,7 @@ static READ16_HANDLER( control1_r )
/* bit 8 is EEPROM data */ /* bit 8 is EEPROM data */
/* bit 9 is EEPROM ready */ /* bit 9 is EEPROM ready */
/* bit 10 is service button */ /* bit 10 is service button */
res = (EEPROM_read_bit()<<8) | input_port_1_word_r(machine,0,0); res = (EEPROM_read_bit()<<8) | input_port_read_indexed(machine,1);
if (init_eeprom_count) if (init_eeprom_count)
{ {

8
src/mame/drivers/atarigt.c
View File

@ -93,7 +93,7 @@ static void cage_irq_callback(int reason)
if (reason) if (reason)
atarigen_sound_int_gen(Machine, 0); atarigen_sound_int_gen(Machine, 0);
else else
atarigen_sound_int_ack_w(Machine,0,0,0); atarigen_sound_int_ack_w(Machine,0,0,0xffff);
} }
@ -231,7 +231,7 @@ static WRITE32_HANDLER( mo_command_w )
static WRITE32_HANDLER( led_w ) static WRITE32_HANDLER( led_w )
{ {
// logerror("LED = %08X & %08X\n", data, ~mem_mask); // logerror("LED = %08X & %08X\n", data, mem_mask);
} }
@ -1078,14 +1078,14 @@ static WRITE32_HANDLER( tmek_pf_w )
/* protected version */ /* protected version */
if (pc == 0x2EB3C || pc == 0x2EB48) if (pc == 0x2EB3C || pc == 0x2EB48)
{ {
logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", activecpu_get_pc(), 0xd72000 + offset*4, data, ~mem_mask, (UINT32)activecpu_get_reg(M68K_A4) - 2); logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", activecpu_get_pc(), 0xd72000 + offset*4, data, mem_mask, (UINT32)activecpu_get_reg(M68K_A4) - 2);
/* skip these writes to make more stuff visible */ /* skip these writes to make more stuff visible */
return; return;
} }
/* unprotected version */ /* unprotected version */
if (pc == 0x25834 || pc == 0x25860) if (pc == 0x25834 || pc == 0x25860)
logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", activecpu_get_pc(), 0xd72000 + offset*4, data, ~mem_mask, (UINT32)activecpu_get_reg(M68K_A3) - 2); logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", activecpu_get_pc(), 0xd72000 + offset*4, data, mem_mask, (UINT32)activecpu_get_reg(M68K_A3) - 2);
atarigen_playfield32_w(machine, offset, data, mem_mask); atarigen_playfield32_w(machine, offset, data, mem_mask);
} }

2
src/mame/drivers/atarigx2.c
View File

@ -133,7 +133,7 @@ static WRITE32_HANDLER( latch_w )
D0 = CC.R D0 = CC.R
*/ */
logerror("latch_w(%08X) & %08X\n", data, ~mem_mask); logerror("latch_w(%08X) & %08X\n", data, mem_mask);
/* upper byte */ /* upper byte */
if (ACCESSING_BITS_24_31) if (ACCESSING_BITS_24_31)

12
src/mame/drivers/atarisy2.c
View File

@ -361,8 +361,8 @@ static WRITE16_HANDLER( bankselect_w )
static STATE_POSTLOAD( bankselect_postload ) static STATE_POSTLOAD( bankselect_postload )
{ {
bankselect_w(Machine, 0, bankselect[0], 0); bankselect_w(machine, 0, bankselect[0], 0xffff);
bankselect_w(Machine, 1, bankselect[1], 0); bankselect_w(machine, 1, bankselect[1], 0xffff);
} }
@ -375,7 +375,7 @@ static STATE_POSTLOAD( bankselect_postload )
static READ16_HANDLER( switch_r ) static READ16_HANDLER( switch_r )
{ {
int result = input_port_1_r(machine, offset) | (input_port_2_r(machine, offset) << 8); int result = input_port_read_indexed(machine, 1) | (input_port_read_indexed(machine, 2) << 8);
if (atarigen_cpu_to_sound_ready) result ^= 0x20; if (atarigen_cpu_to_sound_ready) result ^= 0x20;
if (atarigen_sound_to_cpu_ready) result ^= 0x10; if (atarigen_sound_to_cpu_ready) result ^= 0x10;
@ -386,12 +386,12 @@ static READ16_HANDLER( switch_r )
static READ8_HANDLER( switch_6502_r ) static READ8_HANDLER( switch_6502_r )
{ {
int result = input_port_0_r(machine, offset); int result = input_port_read_indexed(machine, 0);
if (atarigen_cpu_to_sound_ready) result ^= 0x01; if (atarigen_cpu_to_sound_ready) result ^= 0x01;
if (atarigen_sound_to_cpu_ready) result ^= 0x02; if (atarigen_sound_to_cpu_ready) result ^= 0x02;
if (!has_tms5220 || tms5220_ready_r()) result ^= 0x04; if (!has_tms5220 || tms5220_ready_r()) result ^= 0x04;
if (!(input_port_2_r(machine, offset) & 0x80)) result ^= 0x10; if (!(input_port_read_indexed(machine, 2) & 0x80)) result ^= 0x10;
return result; return result;
} }
@ -639,7 +639,7 @@ static READ16_HANDLER( sound_r )
atarigen_update_interrupts(machine); atarigen_update_interrupts(machine);
/* handle it normally otherwise */ /* handle it normally otherwise */
return atarigen_sound_r(machine,offset,0); return atarigen_sound_r(machine,offset,0xffff);
} }

4
src/mame/drivers/aztarac.c
View File

@ -60,8 +60,8 @@ static READ16_HANDLER( nvram_r )
static READ16_HANDLER( joystick_r ) static READ16_HANDLER( joystick_r )
{ {
return (((input_port_0_r (machine,offset) - 0xf) << 8) | return (((input_port_read_indexed(machine, 0) - 0xf) << 8) |
((input_port_1_r (machine,offset) - 0xf) & 0xff)); ((input_port_read_indexed(machine, 1) - 0xf) & 0xff));
} }

2
src/mame/drivers/badlands.c
View File

@ -166,7 +166,7 @@ static MACHINE_RESET( badlands )
static INTERRUPT_GEN( vblank_int ) static INTERRUPT_GEN( vblank_int )
{ {
int pedal_state = input_port_4_r(machine, 0); int pedal_state = input_port_read_indexed(machine, 4);
int i; int i;
/* update the pedals once per frame */ /* update the pedals once per frame */

6
src/mame/drivers/bbusters.c
View File

@ -709,13 +709,13 @@ static INTERRUPT_GEN( bbuster )
static VIDEO_EOF( bbuster ) static VIDEO_EOF( bbuster )
{ {
buffer_spriteram16_w(machine,0,0,0); buffer_spriteram16_w(machine,0,0,0xffff);
buffer_spriteram16_2_w(machine,0,0,0); buffer_spriteram16_2_w(machine,0,0,0xffff);
} }
static VIDEO_EOF( mechatt ) static VIDEO_EOF( mechatt )
{ {
buffer_spriteram16_w(machine,0,0,0); buffer_spriteram16_w(machine,0,0,0xffff);
} }
static MACHINE_DRIVER_START( bbusters ) static MACHINE_DRIVER_START( bbusters )

4
src/mame/drivers/beathead.c
View File

@ -248,7 +248,7 @@ static WRITE32_HANDLER( eeprom_data_w )
{ {
if (eeprom_enabled) if (eeprom_enabled)
{ {
mem_mask |= 0xffffff00; mem_mask &= 0x000000ff;
COMBINE_DATA(generic_nvram32 + offset); COMBINE_DATA(generic_nvram32 + offset);
eeprom_enabled = 0; eeprom_enabled = 0;
} }
@ -304,7 +304,7 @@ static READ32_HANDLER( input_3_r )
static READ32_HANDLER( sound_data_r ) static READ32_HANDLER( sound_data_r )
{ {
return atarigen_sound_r(machine,offset,0); return atarigen_sound_r(machine,offset,0xffff);
} }

2
src/mame/drivers/bfm_sc2.c
View File

@ -894,7 +894,7 @@ static WRITE8_HANDLER( coininhib_w )
static READ8_HANDLER( coin_input_r ) static READ8_HANDLER( coin_input_r )
{ {
return input_port_0_r(machine, 0); return input_port_read_indexed(machine, 0);
} }
/////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////

4
src/mame/drivers/bigfghtr.c
View File

@ -272,7 +272,7 @@ static VIDEO_UPDATE( bigfghtr )
static VIDEO_EOF( bigfghtr ) static VIDEO_EOF( bigfghtr )
{ {
buffer_spriteram16_w(machine,0,0,0); buffer_spriteram16_w(machine,0,0,0xffff);
} }
@ -317,7 +317,7 @@ static READ16_HANDLER(sharedram_r)
break; break;
case 0x46/2: case 0x46/2:
return (input_port_0_word_r(machine,0,0)&0xffff)^0xffff; return (input_port_read_indexed(machine,0)&0xffff)^0xffff;
} }

2
src/mame/drivers/btoads.c
View File

@ -172,7 +172,7 @@ static WRITE8_HANDLER( bsmt2000_port_w )
{ {
UINT16 reg = offset >> 8; UINT16 reg = offset >> 8;
UINT16 val = ((offset & 0xff) << 8) | data; UINT16 val = ((offset & 0xff) << 8) | data;
BSMT2000_data_0_w(machine, reg, val, 0); BSMT2000_data_0_w(machine, reg, val, 0xffff);
} }

8
src/mame/drivers/capbowl.c
View File

@ -163,21 +163,21 @@ static WRITE8_HANDLER( capbowl_rom_select_w )
static READ8_HANDLER( track_0_r ) static READ8_HANDLER( track_0_r )
{ {
return (input_port_0_r(machine, offset) & 0xf0) | ((input_port_2_r(machine, offset) - last_trackball_val[0]) & 0x0f); return (input_port_read_indexed(machine, 0) & 0xf0) | ((input_port_read_indexed(machine, 2) - last_trackball_val[0]) & 0x0f);
} }
static READ8_HANDLER( track_1_r ) static READ8_HANDLER( track_1_r )
{ {
return (input_port_1_r(machine, offset) & 0xf0) | ((input_port_3_r(machine, offset) - last_trackball_val[1]) & 0x0f); return (input_port_read_indexed(machine, 1) & 0xf0) | ((input_port_read_indexed(machine, 3) - last_trackball_val[1]) & 0x0f);
} }
static WRITE8_HANDLER( track_reset_w ) static WRITE8_HANDLER( track_reset_w )
{ {
/* reset the trackball counters */ /* reset the trackball counters */
last_trackball_val[0] = input_port_2_r(machine, offset); last_trackball_val[0] = input_port_read_indexed(machine, 2);
last_trackball_val[1] = input_port_3_r(machine, offset); last_trackball_val[1] = input_port_read_indexed(machine, 3);
watchdog_reset_w(machine, offset, data); watchdog_reset_w(machine, offset, data);
} }

6
src/mame/drivers/cave.c
View File

@ -230,14 +230,14 @@ static WRITE16_HANDLER( sound_cmd_w )
static READ8_HANDLER( soundlatch_lo_r ) static READ8_HANDLER( soundlatch_lo_r )
{ {
// sound_flag1 = 0; // sound_flag1 = 0;
return soundlatch_word_r(machine,offset,0) & 0xff; return soundlatch_word_r(machine,offset,0x00ff) & 0xff;
} }
/* Sound CPU: read the high 8 bits of the 16 bit sound latch */ /* Sound CPU: read the high 8 bits of the 16 bit sound latch */
static READ8_HANDLER( soundlatch_hi_r ) static READ8_HANDLER( soundlatch_hi_r )
{ {
// sound_flag2 = 0; // sound_flag2 = 0;
return soundlatch_word_r(machine,offset,0) >> 8; return soundlatch_word_r(machine,offset,0xff00) >> 8;
} }
/* Main CPU: read the latch written by the sound CPU (acknowledge) */ /* Main CPU: read the latch written by the sound CPU (acknowledge) */
@ -578,7 +578,7 @@ static READ16_HANDLER( donpachi_videoregs_r )
case 0: case 0:
case 1: case 1:
case 2: case 2:
case 3: return cave_irq_cause_r(machine,offset,0); case 3: return cave_irq_cause_r(machine,offset,0xffff);
default: return 0x0000; default: return 0x0000;
} }

2
src/mame/drivers/cbuster.c
View File

@ -38,7 +38,7 @@ static WRITE16_HANDLER( twocrude_control_w )
{ {
switch (offset<<1) { switch (offset<<1) {
case 0: /* DMA flag */ case 0: /* DMA flag */
buffer_spriteram16_w(machine,0,0,0); buffer_spriteram16_w(machine,0,0,0xffff);
return; return;
case 6: /* IRQ ack */ case 6: /* IRQ ack */

8
src/mame/drivers/cojag.c
View File

@ -247,8 +247,8 @@ static MACHINE_RESET( cojag )
jaguar_dsp_resume(); jaguar_dsp_resume();
/* halt the CPUs */ /* halt the CPUs */
jaguargpu_ctrl_w(1, G_CTRL, 0, 0); jaguargpu_ctrl_w(1, G_CTRL, 0, 0xffffffff);
jaguardsp_ctrl_w(2, D_CTRL, 0, 0); jaguardsp_ctrl_w(2, D_CTRL, 0, 0xffffffff);
/* init the sound system */ /* init the sound system */
cojag_sound_reset(); cojag_sound_reset();
@ -297,8 +297,8 @@ static WRITE32_HANDLER( misc_control_w )
jaguar_dsp_resume(); jaguar_dsp_resume();
/* halt the CPUs */ /* halt the CPUs */
jaguargpu_ctrl_w(1, G_CTRL, 0, 0); jaguargpu_ctrl_w(1, G_CTRL, 0, 0xffffffff);
jaguardsp_ctrl_w(2, D_CTRL, 0, 0); jaguardsp_ctrl_w(2, D_CTRL, 0, 0xffffffff);
} }
/* adjust banking */ /* adjust banking */

6
src/mame/drivers/crystal.c
View File

@ -168,7 +168,7 @@ static READ32_HANDLER(FlipCount_r)
static WRITE32_HANDLER(FlipCount_w) static WRITE32_HANDLER(FlipCount_w)
{ {
if((~mem_mask)&0x00ff0000) if(mem_mask&0x00ff0000)
{ {
int fc=(data>>16)&0xff; int fc=(data>>16)&0xff;
if(fc==1) if(fc==1)
@ -200,14 +200,14 @@ static READ32_HANDLER(Input_r)
static WRITE32_HANDLER(IntAck_w) static WRITE32_HANDLER(IntAck_w)
{ {
UINT32 IntPend=program_read_dword_32le(0x01800c0c); UINT32 IntPend=program_read_dword_32le(0x01800c0c);
if((~mem_mask)&0xff) if(mem_mask&0xff)
{ {
IntPend&=~(1<<(data&0x1f)); IntPend&=~(1<<(data&0x1f));
program_write_dword_32le(0x01800c0c,IntPend); program_write_dword_32le(0x01800c0c,IntPend);
if(!IntPend) if(!IntPend)
cpunum_set_input_line(machine, 0,SE3208_INT,CLEAR_LINE); cpunum_set_input_line(machine, 0,SE3208_INT,CLEAR_LINE);
} }
if((~mem_mask)&0xff00) if(mem_mask&0xff00)
IntHigh=(data>>8)&7; IntHigh=(data>>8)&7;
} }

12
src/mame/drivers/cvs.c
View File

@ -279,12 +279,12 @@ static READ8_HANDLER( cvs_input_r )
/* the lower 4 (or 3?) bits select the port to read */ /* the lower 4 (or 3?) bits select the port to read */
switch (offset & 0x0f) /* might be 0x07 */ switch (offset & 0x0f) /* might be 0x07 */
{ {
case 0x00: ret = input_port_0_r(machine, 0); break; case 0x00: ret = input_port_read_indexed(machine, 0); break;
case 0x02: ret = input_port_1_r(machine, 0); break; case 0x02: ret = input_port_read_indexed(machine, 1); break;
case 0x03: ret = input_port_2_r(machine, 0); break; case 0x03: ret = input_port_read_indexed(machine, 2); break;
case 0x04: ret = input_port_3_r(machine, 0); break; case 0x04: ret = input_port_read_indexed(machine, 3); break;
case 0x06: ret = input_port_4_r(machine, 0); break; case 0x06: ret = input_port_read_indexed(machine, 4); break;
case 0x07: ret = input_port_5_r(machine, 0); break; case 0x07: ret = input_port_read_indexed(machine, 5); break;
default: logerror("%04x : CVS: Reading unmapped input port 0x%02x\n", activecpu_get_pc(), offset & 0x0f); break; default: logerror("%04x : CVS: Reading unmapped input port 0x%02x\n", activecpu_get_pc(), offset & 0x0f); break;
} }

8
src/mame/drivers/darius.c
View File

@ -189,19 +189,19 @@ static READ16_HANDLER( darius_ioc_r )
return (taitosound_comm_r(machine,0) & 0xff); /* sound interface read */ return (taitosound_comm_r(machine,0) & 0xff); /* sound interface read */
case 0x04: case 0x04:
return input_port_0_word_r(machine,0,mem_mask); /* IN0 */ return input_port_read_indexed(machine,0); /* IN0 */
case 0x05: case 0x05:
return input_port_1_word_r(machine,0,mem_mask); /* IN1 */ return input_port_read_indexed(machine,1); /* IN1 */
case 0x06: case 0x06:
return input_port_2_word_r(machine,0,mem_mask); /* IN2 */ return input_port_read_indexed(machine,2); /* IN2 */
case 0x07: case 0x07:
return coin_word; /* bits 3&4 coin lockouts, must return zero */ return coin_word; /* bits 3&4 coin lockouts, must return zero */
case 0x08: case 0x08:
return input_port_3_word_r(machine,0,mem_mask); /* DSW */ return input_port_read_indexed(machine,3); /* DSW */
} }
logerror("CPU #0 PC %06x: warning - read unmapped ioc offset %06x\n",activecpu_get_pc(),offset); logerror("CPU #0 PC %06x: warning - read unmapped ioc offset %06x\n",activecpu_get_pc(),offset);

2
src/mame/drivers/darkseal.c
View File

@ -38,7 +38,7 @@ static WRITE16_HANDLER( darkseal_control_w )
{ {
switch (offset<<1) { switch (offset<<1) {
case 6: /* DMA flag */ case 6: /* DMA flag */
buffer_spriteram16_w(machine,0,0,0); buffer_spriteram16_w(machine,0,0,0xffff);
return; return;
case 8: /* Sound CPU write */ case 8: /* Sound CPU write */
soundlatch_w(machine,0,data & 0xff); soundlatch_w(machine,0,data & 0xff);

2
src/mame/drivers/dcheese.c
View File

@ -207,7 +207,7 @@ static WRITE8_HANDLER( bsmt_data_w )
if (offset % 2 == 0) if (offset % 2 == 0)
sound_msb_latch = data; sound_msb_latch = data;
else else
BSMT2000_data_0_w(machine, offset/2, (sound_msb_latch << 8) | data, 0); BSMT2000_data_0_w(machine, offset/2, (sound_msb_latch << 8) | data, 0xffff);
} }

10
src/mame/drivers/deco32.c
View File

@ -492,7 +492,7 @@ static WRITE32_HANDLER( tattass_control_w )
UINT8 *eeprom=EEPROM_get_data_pointer(0); UINT8 *eeprom=EEPROM_get_data_pointer(0);
/* Eprom in low byte */ /* Eprom in low byte */
if (mem_mask==0xffffff00) { /* Byte write to low byte only (different from word writing including low byte) */ if (mem_mask==0x000000ff) { /* Byte write to low byte only (different from word writing including low byte) */
/* /*
The Tattoo Assassins eprom seems strange... It's 1024 bytes in size, and 8 bit The Tattoo Assassins eprom seems strange... It's 1024 bytes in size, and 8 bit
in width, but offers a 'multiple read' mode where a bit stream can be read in width, but offers a 'multiple read' mode where a bit stream can be read
@ -597,13 +597,13 @@ static WRITE32_HANDLER( tattass_control_w )
} }
/* Volume in high byte */ /* Volume in high byte */
if (mem_mask==0xffff00ff) { if (mem_mask==0x0000ff00) {
//TODO: volume attenuation == ((data>>8)&0xff); //TODO: volume attenuation == ((data>>8)&0xff);
return; return;
} }
/* Playfield control - Only written in full word memory accesses */ /* Playfield control - Only written in full word memory accesses */
deco32_pri_w(machine,0,data&0x3,0); /* Bit 0 - layer priority toggle, Bit 1 - BG2/3 Joint mode (8bpp) */ deco32_pri_w(machine,0,data&0x3,0xffffffff); /* Bit 0 - layer priority toggle, Bit 1 - BG2/3 Joint mode (8bpp) */
/* Sound board reset control */ /* Sound board reset control */
if (data&0x80) if (data&0x80)
@ -641,7 +641,7 @@ static WRITE32_HANDLER( nslasher_eeprom_w )
EEPROM_write_bit(data & 0x10); EEPROM_write_bit(data & 0x10);
EEPROM_set_cs_line((data & 0x40) ? CLEAR_LINE : ASSERT_LINE); EEPROM_set_cs_line((data & 0x40) ? CLEAR_LINE : ASSERT_LINE);
deco32_pri_w(machine,0,data&0x3,0); /* Bit 0 - layer priority toggle, Bit 1 - BG2/3 Joint mode (8bpp) */ deco32_pri_w(machine,0,data&0x3,0xffffffff); /* Bit 0 - layer priority toggle, Bit 1 - BG2/3 Joint mode (8bpp) */
} }
} }
@ -1133,7 +1133,7 @@ static WRITE8_HANDLER(deco32_bsmt0_w)
static WRITE8_HANDLER(deco32_bsmt1_w) static WRITE8_HANDLER(deco32_bsmt1_w)
{ {
BSMT2000_data_0_w(machine, offset^ 0xff, ((bsmt_latch<<8)|data), 0); BSMT2000_data_0_w(machine, offset^ 0xff, ((bsmt_latch<<8)|data), 0xffff);
cpunum_set_input_line(machine, 1, M6809_IRQ_LINE, HOLD_LINE); /* BSMT is ready */ cpunum_set_input_line(machine, 1, M6809_IRQ_LINE, HOLD_LINE); /* BSMT is ready */
} }

8
src/mame/drivers/deco_mlc.c
View File

@ -143,7 +143,7 @@ static READ32_HANDLER(test3_r)
static WRITE32_HANDLER( avengrs_eprom_w ) static WRITE32_HANDLER( avengrs_eprom_w )
{ {
if (mem_mask==0xffff00ff) { if (ACCESSING_BITS_8_15) {
UINT8 ebyte=(data>>8)&0xff; UINT8 ebyte=(data>>8)&0xff;
// if (ebyte&0x80) { // if (ebyte&0x80) {
EEPROM_set_clock_line((ebyte & 0x2) ? ASSERT_LINE : CLEAR_LINE); EEPROM_set_clock_line((ebyte & 0x2) ? ASSERT_LINE : CLEAR_LINE);
@ -151,7 +151,7 @@ static WRITE32_HANDLER( avengrs_eprom_w )
EEPROM_set_cs_line((ebyte & 0x4) ? CLEAR_LINE : ASSERT_LINE); EEPROM_set_cs_line((ebyte & 0x4) ? CLEAR_LINE : ASSERT_LINE);
// } // }
} }
else if (mem_mask==0xffffff00) { else if (ACCESSING_BITS_0_7) {
//volume control todo //volume control todo
} }
else else
@ -167,7 +167,7 @@ static WRITE32_HANDLER( avengrs_palette_w )
static READ32_HANDLER( avengrs_sound_r ) static READ32_HANDLER( avengrs_sound_r )
{ {
if (mem_mask==0x00ffffff) { if (ACCESSING_BITS_24_31) {
return YMZ280B_status_0_r(machine,0)<<24; return YMZ280B_status_0_r(machine,0)<<24;
} else { } else {
logerror("%08x: non-byte read from sound mask %08x\n",activecpu_get_pc(),mem_mask); logerror("%08x: non-byte read from sound mask %08x\n",activecpu_get_pc(),mem_mask);
@ -178,7 +178,7 @@ static READ32_HANDLER( avengrs_sound_r )
static WRITE32_HANDLER( avengrs_sound_w ) static WRITE32_HANDLER( avengrs_sound_w )
{ {
if (mem_mask==0x00ffffff) { if (ACCESSING_BITS_24_31) {
if (offset) if (offset)
YMZ280B_data_0_w(machine,0,data>>24); YMZ280B_data_0_w(machine,0,data>>24);
else else

8
src/mame/drivers/dgpix.c
View File

@ -142,7 +142,7 @@ static WRITE32_HANDLER( vram_w )
{ {
UINT32 *dest = &vram[offset+(0x40000/4)*vbuffer]; UINT32 *dest = &vram[offset+(0x40000/4)*vbuffer];
if (mem_mask == 0) if (mem_mask == 0xffffffff)
{ {
if (~data & 0x80000000) if (~data & 0x80000000)
*dest = (*dest & 0x0000ffff) | (data & 0xffff0000); *dest = (*dest & 0x0000ffff) | (data & 0xffff0000);
@ -150,8 +150,8 @@ static WRITE32_HANDLER( vram_w )
if (~data & 0x00008000) if (~data & 0x00008000)
*dest = (*dest & 0xffff0000) | (data & 0x0000ffff); *dest = (*dest & 0xffff0000) | (data & 0x0000ffff);
} }
else if (((mem_mask == 0x0000ffff) && (~data & 0x80000000)) || else if (((mem_mask == 0xffff0000) && (~data & 0x80000000)) ||
((mem_mask == 0xffff0000) && (~data & 0x00008000))) ((mem_mask == 0x0000ffff) && (~data & 0x00008000)))
COMBINE_DATA(dest); COMBINE_DATA(dest);
} }
@ -182,7 +182,7 @@ static READ32_HANDLER( vblank_r )
{ {
/* burn a bunch of cycles because this is polled frequently during busy loops */ /* burn a bunch of cycles because this is polled frequently during busy loops */
activecpu_adjust_icount(-100); activecpu_adjust_icount(-100);
return input_port_0_dword_r(machine, offset, 0); return input_port_read_indexed(machine, 0);
} }
static ADDRESS_MAP_START( cpu_map, ADDRESS_SPACE_PROGRAM, 32 ) static ADDRESS_MAP_START( cpu_map, ADDRESS_SPACE_PROGRAM, 32 )

20
src/mame/drivers/djmain.c
View File

@ -212,7 +212,7 @@ static READ32_HANDLER( obj_rom_r )
if (ACCESSING_BITS_0_15) if (ACCESSING_BITS_0_15)
offset += 2; offset += 2;
if (~mem_mask & 0xff00ff00) if (~mem_mask & 0x00ff00ff)
offset++; offset++;
return mem8[offset] * 0x01010101; return mem8[offset] * 0x01010101;
@ -310,24 +310,24 @@ static WRITE32_HANDLER( turntable_select_w )
static READ32_DEVICE_HANDLER( ide_std_r ) static READ32_DEVICE_HANDLER( ide_std_r )
{ {
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
return ide_controller16_r(device, IDE_STD_OFFSET + offset, 0x00ff) >> 8; return ide_controller16_r(device, IDE_STD_OFFSET + offset, 0xff00) >> 8;
else else
return ide_controller16_r(device, IDE_STD_OFFSET + offset, 0x0000) << 16; return ide_controller16_r(device, IDE_STD_OFFSET + offset, 0xffff) << 16;
} }
static WRITE32_DEVICE_HANDLER( ide_std_w ) static WRITE32_DEVICE_HANDLER( ide_std_w )
{ {
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
ide_controller16_w(device, IDE_STD_OFFSET + offset, data << 8, 0x00ff); ide_controller16_w(device, IDE_STD_OFFSET + offset, data << 8, 0xff00);
else else
ide_controller16_w(device, IDE_STD_OFFSET + offset, data >> 16, 0x0000); ide_controller16_w(device, IDE_STD_OFFSET + offset, data >> 16, 0xffff);
} }
static READ32_DEVICE_HANDLER( ide_alt_r ) static READ32_DEVICE_HANDLER( ide_alt_r )
{ {
if (offset == 0) if (offset == 0)
return ide_controller16_r(device, IDE_ALT_OFFSET, 0xff00) << 24; return ide_controller16_r(device, IDE_ALT_OFFSET, 0x00ff) << 24;
return 0; return 0;
} }
@ -335,7 +335,7 @@ static READ32_DEVICE_HANDLER( ide_alt_r )
static WRITE32_DEVICE_HANDLER( ide_alt_w ) static WRITE32_DEVICE_HANDLER( ide_alt_w )
{ {
if (offset == 0 && ACCESSING_BITS_16_23) if (offset == 0 && ACCESSING_BITS_16_23)
ide_controller16_w(device, IDE_ALT_OFFSET, data >> 24, 0xff00); ide_controller16_w(device, IDE_ALT_OFFSET, data >> 24, 0x00ff);
} }
@ -402,17 +402,17 @@ static WRITE32_HANDLER( light_ctrl_2_w )
static WRITE32_HANDLER( unknown590000_w ) static WRITE32_HANDLER( unknown590000_w )
{ {
//logerror("%08X: unknown 590000 write %08X: %08X & %08X\n", activecpu_get_previouspc(), offset, data, ~mem_mask); //logerror("%08X: unknown 590000 write %08X: %08X & %08X\n", activecpu_get_previouspc(), offset, data, mem_mask);
} }
static WRITE32_HANDLER( unknown802000_w ) static WRITE32_HANDLER( unknown802000_w )
{ {
//logerror("%08X: unknown 802000 write %08X: %08X & %08X\n", activecpu_get_previouspc(), offset, data, ~mem_mask); //logerror("%08X: unknown 802000 write %08X: %08X & %08X\n", activecpu_get_previouspc(), offset, data, mem_mask);
} }
static WRITE32_HANDLER( unknownc02000_w ) static WRITE32_HANDLER( unknownc02000_w )
{ {
//logerror("%08X: unknown c02000 write %08X: %08X & %08X\n", activecpu_get_previouspc(), offset, data, ~mem_mask); //logerror("%08X: unknown c02000 write %08X: %08X & %08X\n", activecpu_get_previouspc(), offset, data, mem_mask);
} }

2
src/mame/drivers/dominob.c
View File

@ -124,7 +124,7 @@ static WRITE8_HANDLER( dominob_d008_w )
static READ8_HANDLER( dominob_input_2_r ) static READ8_HANDLER( dominob_input_2_r )
{ {
return input_port_2_r(machine, offset); return input_port_read_indexed(machine, 2);
} }

2
src/mame/drivers/exerion.c
View File

@ -31,7 +31,7 @@ static UINT8 *exerion_ram;
static READ8_HANDLER( exerion_port01_r ) static READ8_HANDLER( exerion_port01_r )
{ {
/* the cocktail flip bit muxes between ports 0 and 1 */ /* the cocktail flip bit muxes between ports 0 and 1 */
return exerion_cocktail_flip ? input_port_1_r(machine,offset) : input_port_0_r(machine,offset); return exerion_cocktail_flip ? input_port_read_indexed(machine, 1) : input_port_read_indexed(machine, 0);
} }

2
src/mame/drivers/exidy440.c
View File

@ -434,7 +434,7 @@ static READ8_HANDLER( claypign_protection_r )
static READ8_HANDLER( topsecex_input_port_5_r ) static READ8_HANDLER( topsecex_input_port_5_r )
{ {
return (input_port_5_r(machine, offset) & 1) ? 0x01 : 0x02; return (input_port_read_indexed(machine, 5) & 1) ? 0x01 : 0x02;
} }

3
src/mame/drivers/exterm.c
View File

@ -156,8 +156,7 @@ static UINT16 exterm_trackball_port_r(running_machine *machine, int which, UINT1
aimpos[which] = (aimpos[which] + trackball_diff) & 0x3f; aimpos[which] = (aimpos[which] + trackball_diff) & 0x3f;
/* Combine it with the standard input bits */ /* Combine it with the standard input bits */
port = which ? input_port_1_word_r(machine, 0, mem_mask) : port = which ? input_port_read_indexed(machine,1) : input_port_read_indexed(machine,0);
input_port_0_word_r(machine, 0, mem_mask);
return (port & 0xc0ff) | (aimpos[which] << 8); return (port & 0xc0ff) | (aimpos[which] << 8);
} }

2
src/mame/drivers/f-32.c
View File

@ -98,7 +98,7 @@ static READ32_HANDLER( f32_input_port_1_r )
if ((activecpu_get_pc() == 0x000379de) || if ((activecpu_get_pc() == 0x000379de) ||
(activecpu_get_pc() == 0x000379cc) ) activecpu_adjust_icount(-100); (activecpu_get_pc() == 0x000379cc) ) activecpu_adjust_icount(-100);
//else printf("PC %08x\n", activecpu_get_pc() ); //else printf("PC %08x\n", activecpu_get_pc() );
return input_port_1_dword_r(machine, 0, 0); return input_port_read_indexed(machine, 1);
} }

2
src/mame/drivers/fcombat.c
View File

@ -146,7 +146,7 @@ static READ8_HANDLER( fcombat_protection_r )
static READ8_HANDLER( fcombat_port01_r ) static READ8_HANDLER( fcombat_port01_r )
{ {
/* the cocktail flip bit muxes between ports 0 and 1 */ /* the cocktail flip bit muxes between ports 0 and 1 */
return fcombat_cocktail_flip ? input_port_1_r(machine,offset) : input_port_0_r(machine,offset); return fcombat_cocktail_flip ? input_port_read_indexed(machine, 1) : input_port_read_indexed(machine, 0);
} }

2
src/mame/drivers/findout.c
View File

@ -66,7 +66,7 @@ static READ8_HANDLER( portC_r )
static READ8_HANDLER( port1_r ) static READ8_HANDLER( port1_r )
{ {
return input_port_1_r(machine, 0) | (ticket_dispenser_0_r(machine, 0) >> 5); return input_port_read_indexed(machine, 1) | (ticket_dispenser_0_r(machine, 0) >> 5);
} }
static WRITE8_HANDLER( lamps_w ) static WRITE8_HANDLER( lamps_w )

8
src/mame/drivers/firebeat.c
View File

@ -1159,7 +1159,7 @@ static READ32_HANDLER( atapi_command_r )
{ {
UINT16 r; UINT16 r;
// printf("atapi_command_r: %08X, %08X\n", offset, mem_mask); // printf("atapi_command_r: %08X, %08X\n", offset, mem_mask);
if (mem_mask == 0x0000ffff) if (ACCESSING_BITS_16_31)
{ {
r = atapi_command_reg_r(offset*2); r = atapi_command_reg_r(offset*2);
return ATAPI_ENDIAN(r) << 16; return ATAPI_ENDIAN(r) << 16;
@ -1175,7 +1175,7 @@ static WRITE32_HANDLER( atapi_command_w )
{ {
// printf("atapi_command_w: %08X, %08X, %08X\n", data, offset, mem_mask); // printf("atapi_command_w: %08X, %08X, %08X\n", data, offset, mem_mask);
if (mem_mask == 0x0000ffff) if (ACCESSING_BITS_16_31)
{ {
atapi_command_reg_w(offset*2, ATAPI_ENDIAN((data >> 16) & 0xffff)); atapi_command_reg_w(offset*2, ATAPI_ENDIAN((data >> 16) & 0xffff));
} }
@ -1191,7 +1191,7 @@ static READ32_HANDLER( atapi_control_r )
UINT16 r; UINT16 r;
// printf("atapi_control_r: %08X, %08X\n", offset, mem_mask); // printf("atapi_control_r: %08X, %08X\n", offset, mem_mask);
if (mem_mask == 0x0000ffff) if (ACCESSING_BITS_16_31)
{ {
r = atapi_control_reg_r(offset*2); r = atapi_control_reg_r(offset*2);
return ATAPI_ENDIAN(r) << 16; return ATAPI_ENDIAN(r) << 16;
@ -1205,7 +1205,7 @@ static READ32_HANDLER( atapi_control_r )
static WRITE32_HANDLER( atapi_control_w ) static WRITE32_HANDLER( atapi_control_w )
{ {
if (mem_mask == 0x0000ffff) if (ACCESSING_BITS_16_31)
{ {
atapi_control_reg_w(offset*2, ATAPI_ENDIAN(data >> 16) & 0xff); atapi_control_reg_w(offset*2, ATAPI_ENDIAN(data >> 16) & 0xff);
} }

4
src/mame/drivers/foodf.c
View File

@ -180,9 +180,9 @@ static WRITE16_HANDLER( digital_w )
/* bit 1 = UPDATE */ /* bit 1 = UPDATE */
if (!(data & 0x04)) if (!(data & 0x04))
atarigen_scanline_int_ack_w(machine,0,0,0); atarigen_scanline_int_ack_w(machine,0,0,0xffff);
if (!(data & 0x08)) if (!(data & 0x08))
atarigen_video_int_ack_w(machine,0,0,0); atarigen_video_int_ack_w(machine,0,0,0xffff);
output_set_led_value(0, (data >> 4) & 1); output_set_led_value(0, (data >> 4) & 1);
output_set_led_value(1, (data >> 5) & 1); output_set_led_value(1, (data >> 5) & 1);

2
src/mame/drivers/funkybee.c
View File

@ -94,7 +94,7 @@ extern VIDEO_UPDATE( funkybee );
static READ8_HANDLER( funkybee_input_port_0_r ) static READ8_HANDLER( funkybee_input_port_0_r )
{ {
watchdog_reset_r(machine,0); watchdog_reset_r(machine,0);
return input_port_0_r(machine,offset); return input_port_read_indexed(machine,0);
} }
static WRITE8_HANDLER( funkybee_coin_counter_w ) static WRITE8_HANDLER( funkybee_coin_counter_w )

22
src/mame/drivers/gaelco3d.c
View File

@ -309,7 +309,7 @@ static TIMER_CALLBACK( delayed_sound_w )
static WRITE16_HANDLER( sound_data_w ) static WRITE16_HANDLER( sound_data_w )
{ {
logerror("%06X:sound_data_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask); logerror("%06X:sound_data_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, mem_mask);
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
timer_call_after_resynch(NULL, data & 0xff, delayed_sound_w); timer_call_after_resynch(NULL, data & 0xff, delayed_sound_w);
} }
@ -367,7 +367,7 @@ static WRITE16_HANDLER( analog_port_clock_w )
} }
} }
else else
logerror("%06X:analog_port_clock_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask); logerror("%06X:analog_port_clock_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, mem_mask);
} }
@ -385,7 +385,7 @@ static WRITE16_HANDLER( analog_port_latch_w )
} }
} }
else else
logerror("%06X:analog_port_latch_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask); logerror("%06X:analog_port_latch_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, mem_mask);
} }
@ -427,7 +427,7 @@ static WRITE16_HANDLER( tms_reset_w )
{ {
/* this is set to 0 while data is uploaded, then set to $ffff after it is done */ /* this is set to 0 while data is uploaded, then set to $ffff after it is done */
/* it does not ever appear to be touched after that */ /* it does not ever appear to be touched after that */
logerror("%06X:tms_reset_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask); logerror("%06X:tms_reset_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, mem_mask);
cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, (data == 0xffff) ? CLEAR_LINE : ASSERT_LINE); cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, (data == 0xffff) ? CLEAR_LINE : ASSERT_LINE);
} }
@ -436,7 +436,7 @@ static WRITE16_HANDLER( tms_irq_w )
{ {
/* this is written twice, 0,1, in quick succession */ /* this is written twice, 0,1, in quick succession */
/* done after uploading, and after modifying the comm area */ /* done after uploading, and after modifying the comm area */
logerror("%06X:tms_irq_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask); logerror("%06X:tms_irq_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, mem_mask);
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
cpunum_set_input_line(machine, 1, 0, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE); cpunum_set_input_line(machine, 1, 0, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
} }
@ -444,14 +444,14 @@ static WRITE16_HANDLER( tms_irq_w )
static WRITE16_HANDLER( tms_control3_w ) static WRITE16_HANDLER( tms_control3_w )
{ {
logerror("%06X:tms_control3_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask); logerror("%06X:tms_control3_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, mem_mask);
} }
static WRITE16_HANDLER( tms_comm_w ) static WRITE16_HANDLER( tms_comm_w )
{ {
COMBINE_DATA(&tms_comm_base[offset ^ tms_offset_xor]); COMBINE_DATA(&tms_comm_base[offset ^ tms_offset_xor]);
logerror("%06X:tms_comm_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset*2, data, ~mem_mask); logerror("%06X:tms_comm_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset*2, data, mem_mask);
} }
@ -650,7 +650,7 @@ static WRITE32_HANDLER( unknown_107_w )
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
logerror("%06X:unknown_107_w = %02X\n", activecpu_get_pc(), data & 0xff); logerror("%06X:unknown_107_w = %02X\n", activecpu_get_pc(), data & 0xff);
else else
logerror("%06X:unknown_107_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask); logerror("%06X:unknown_107_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, mem_mask);
} }
static WRITE32_HANDLER( unknown_127_w ) static WRITE32_HANDLER( unknown_127_w )
@ -659,7 +659,7 @@ static WRITE32_HANDLER( unknown_127_w )
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
logerror("%06X:unknown_127_w = %02X\n", activecpu_get_pc(), data & 0xff); logerror("%06X:unknown_127_w = %02X\n", activecpu_get_pc(), data & 0xff);
else else
logerror("%06X:unknown_127_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask); logerror("%06X:unknown_127_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, mem_mask);
} }
static WRITE32_HANDLER( unknown_137_w ) static WRITE32_HANDLER( unknown_137_w )
@ -668,7 +668,7 @@ static WRITE32_HANDLER( unknown_137_w )
if (ACCESSING_BITS_0_7) if (ACCESSING_BITS_0_7)
logerror("%06X:unknown_137_w = %02X\n", activecpu_get_pc(), data & 0xff); logerror("%06X:unknown_137_w = %02X\n", activecpu_get_pc(), data & 0xff);
else else
logerror("%06X:unknown_137_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask); logerror("%06X:unknown_137_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, mem_mask);
} }
static WRITE32_HANDLER( unknown_13a_w ) static WRITE32_HANDLER( unknown_13a_w )
@ -677,7 +677,7 @@ static WRITE32_HANDLER( unknown_13a_w )
if (ACCESSING_BITS_0_15) if (ACCESSING_BITS_0_15)
logerror("%06X:unknown_13a_w = %04X\n", activecpu_get_pc(), data & 0xffff); logerror("%06X:unknown_13a_w = %04X\n", activecpu_get_pc(), data & 0xffff);
else else
logerror("%06X:unknown_13a_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, ~mem_mask); logerror("%06X:unknown_13a_w(%02X) = %08X & %08X\n", activecpu_get_pc(), offset, data, mem_mask);
} }

6
src/mame/drivers/gcpinbal.c
View File

@ -81,13 +81,13 @@ static READ16_HANDLER( ioc_r )
switch (offset) switch (offset)
{ {
case 0x80/2: case 0x80/2:
return input_port_0_word_r(machine,0,mem_mask); /* DSW */ return input_port_read_indexed(machine,0); /* DSW */
case 0x84/2: case 0x84/2:
return input_port_1_word_r(machine,0,mem_mask); /* IN0 */ return input_port_read_indexed(machine,1); /* IN0 */
case 0x86/2: case 0x86/2:
return input_port_2_word_r(machine,0,mem_mask); /* IN1 */ return input_port_read_indexed(machine,2); /* IN1 */
case 0x50: case 0x50:
case 0x51: case 0x51:

2
src/mame/drivers/genesis.c
View File

@ -204,7 +204,7 @@ READ16_HANDLER(genesis_ctrl_r)
/* from MESS */ /* from MESS */
WRITE16_HANDLER(genesis_ctrl_w) WRITE16_HANDLER(genesis_ctrl_w)
{ {
data &= ~mem_mask; data &= mem_mask;
/* logerror("genesis_ctrl_w %x, %x\n", offset, data); */ /* logerror("genesis_ctrl_w %x, %x\n", offset, data); */

2
src/mame/drivers/getrivia.c
View File

@ -121,7 +121,7 @@ static WRITE8_HANDLER( getrivia_bitmap_w )
static READ8_HANDLER( port1_r ) static READ8_HANDLER( port1_r )
{ {
return input_port_1_r(machine, 0) | (ticket_dispenser_0_r(machine, 0) >> 5); return input_port_read_indexed(machine, 1) | (ticket_dispenser_0_r(machine, 0) >> 5);
} }
static WRITE8_HANDLER( lamps_w ) static WRITE8_HANDLER( lamps_w )

2
src/mame/drivers/gijoe.c
View File

@ -97,7 +97,7 @@ static READ16_HANDLER( control1_r )
/* bit 8 is EEPROM data */ /* bit 8 is EEPROM data */
/* bit 9 is EEPROM ready */ /* bit 9 is EEPROM ready */
/* bit 11 is service button */ /* bit 11 is service button */
res = (EEPROM_read_bit()<<8) | input_port_0_word_r(machine,0,0); res = (EEPROM_read_bit()<<8) | input_port_read_indexed(machine,0);
if (init_eeprom_count) if (init_eeprom_count)
{ {

8
src/mame/drivers/gottlieb.c
View File

@ -197,19 +197,19 @@ static int track[2];
static READ8_HANDLER( gottlieb_track_0_r ) static READ8_HANDLER( gottlieb_track_0_r )
{ {
return input_port_2_r(machine, offset) - track[0]; return input_port_read_indexed(machine, 2) - track[0];
} }
static READ8_HANDLER( gottlieb_track_1_r ) static READ8_HANDLER( gottlieb_track_1_r )
{ {
return input_port_3_r(machine, offset) - track[1]; return input_port_read_indexed(machine, 3) - track[1];
} }
static WRITE8_HANDLER( gottlieb_track_reset_w ) static WRITE8_HANDLER( gottlieb_track_reset_w )
{ {
/* reset the trackball counters */ /* reset the trackball counters */
track[0] = input_port_2_r(machine, offset); track[0] = input_port_read_indexed(machine, 2);
track[1] = input_port_3_r(machine, offset); track[1] = input_port_read_indexed(machine, 3);
} }
static int joympx; static int joympx;

6
src/mame/drivers/groundfx.c
View File

@ -164,13 +164,13 @@ static READ32_HANDLER( groundfx_input_r )
{ {
case 0x00: case 0x00:
{ {
return (input_port_0_word_r(machine,0,0) << 16) | input_port_1_word_r(machine,0,0) | return (input_port_read_indexed(machine,0) << 16) | input_port_read_indexed(machine,1) |
(EEPROM_read_bit() << 7) | frame_counter; (EEPROM_read_bit() << 7) | frame_counter;
} }
case 0x01: case 0x01:
{ {
return input_port_2_word_r(machine,0,0) | (coin_word << 16); return input_port_read_indexed(machine,2) | (coin_word << 16);
} }
} }
@ -215,7 +215,7 @@ static WRITE32_HANDLER( groundfx_input_w )
static READ32_HANDLER( groundfx_adc_r ) static READ32_HANDLER( groundfx_adc_r )
{ {
return (input_port_3_word_r(machine,0,0) << 8) | input_port_4_word_r(machine,0,0); return (input_port_read_indexed(machine,3) << 8) | input_port_read_indexed(machine,4);
} }
static WRITE32_HANDLER( groundfx_adc_w ) static WRITE32_HANDLER( groundfx_adc_w )

8
src/mame/drivers/gunbustr.c
View File

@ -92,13 +92,13 @@ static READ32_HANDLER( gunbustr_input_r )
{ {
case 0x00: case 0x00:
{ {
return (input_port_0_word_r(machine,0,0) << 16) | input_port_1_word_r(machine,0,0) | return (input_port_read_indexed(machine,0) << 16) | input_port_read_indexed(machine,1) |
(EEPROM_read_bit() << 7); (EEPROM_read_bit() << 7);
} }
case 0x01: case 0x01:
{ {
return input_port_2_word_r(machine,0,0) | (coin_word << 16); return input_port_read_indexed(machine,2) | (coin_word << 16);
} }
} }
logerror("CPU #0 PC %06x: read input %06x\n",activecpu_get_pc(),offset); logerror("CPU #0 PC %06x: read input %06x\n",activecpu_get_pc(),offset);
@ -175,8 +175,8 @@ static WRITE32_HANDLER( motor_control_w )
static READ32_HANDLER( gunbustr_gun_r ) static READ32_HANDLER( gunbustr_gun_r )
{ {
return ( input_port_3_word_r(machine,0,0) << 24) | (input_port_4_word_r(machine,0,0) << 16) | return ( input_port_read_indexed(machine,3) << 24) | (input_port_read_indexed(machine,4) << 16) |
( input_port_5_word_r(machine,0,0) << 8) | input_port_6_word_r(machine,0,0); ( input_port_read_indexed(machine,5) << 8) | input_port_read_indexed(machine,6);
} }
static WRITE32_HANDLER( gunbustr_gun_w ) static WRITE32_HANDLER( gunbustr_gun_w )

10
src/mame/drivers/hng64.c
View File

@ -571,14 +571,14 @@ static READ32_HANDLER( hng64_random_read )
static READ32_HANDLER( hng64_com_r ) static READ32_HANDLER( hng64_com_r )
{ {
logerror("com read (PC=%08x): %08x %08x = %08x\n", activecpu_get_pc(), (offset*4)+0xc0000000, ~mem_mask, hng64_com_ram[offset]); logerror("com read (PC=%08x): %08x %08x = %08x\n", activecpu_get_pc(), (offset*4)+0xc0000000, mem_mask, hng64_com_ram[offset]);
return hng64_com_ram[offset] ; return hng64_com_ram[offset] ;
} }
static WRITE32_HANDLER( hng64_com_w ) static WRITE32_HANDLER( hng64_com_w )
{ {
logerror("com write (PC=%08x): %08x %08x = %08x\n", activecpu_get_pc(), (offset*4)+0xc0000000, ~mem_mask, data); logerror("com write (PC=%08x): %08x %08x = %08x\n", activecpu_get_pc(), (offset*4)+0xc0000000, mem_mask, data);
COMBINE_DATA(&hng64_com_ram[offset]); COMBINE_DATA(&hng64_com_ram[offset]);
} }
@ -588,7 +588,7 @@ static UINT32 hng64_com_shared_b;
static WRITE32_HANDLER( hng64_com_share_w ) static WRITE32_HANDLER( hng64_com_share_w )
{ {
logerror("commw (PC=%08x): %08x %08x %08x\n", activecpu_get_pc(), data, (offset*4)+0xc0001000, ~mem_mask); logerror("commw (PC=%08x): %08x %08x %08x\n", activecpu_get_pc(), data, (offset*4)+0xc0001000, mem_mask);
if (offset==0x0) COMBINE_DATA(&hng64_com_shared_a); if (offset==0x0) COMBINE_DATA(&hng64_com_shared_a);
if (offset==0x1) COMBINE_DATA(&hng64_com_shared_b); if (offset==0x1) COMBINE_DATA(&hng64_com_shared_b);
@ -596,7 +596,7 @@ static WRITE32_HANDLER( hng64_com_share_w )
static READ32_HANDLER( hng64_com_share_r ) static READ32_HANDLER( hng64_com_share_r )
{ {
logerror("commr (PC=%08x): %08x %08x\n", activecpu_get_pc(), (offset*4)+0xc0001000, ~mem_mask); logerror("commr (PC=%08x): %08x %08x\n", activecpu_get_pc(), (offset*4)+0xc0001000, mem_mask);
// if(offset==0x0) return hng64_com_shared_a; // if(offset==0x0) return hng64_com_shared_a;
// if(offset==0x1) return hng64_com_shared_b; // if(offset==0x1) return hng64_com_shared_b;
@ -709,7 +709,7 @@ static READ32_HANDLER( hng64_sram_r )
static WRITE32_HANDLER( hng64_sram_w ) static WRITE32_HANDLER( hng64_sram_w )
{ {
logerror("HNG64 writing to SRAM 0x%08x == 0x%08x & 0x%08x. (PC=%08x)\n", offset*4, data, ~mem_mask, activecpu_get_pc()); logerror("HNG64 writing to SRAM 0x%08x == 0x%08x & 0x%08x. (PC=%08x)\n", offset*4, data, mem_mask, activecpu_get_pc());
COMBINE_DATA (&hng64_sram[offset]); COMBINE_DATA (&hng64_sram[offset]);
} }

45
src/mame/drivers/itech32.c
View File

@ -757,31 +757,6 @@ static READ32_HANDLER( drivedge_tms2_speedup_r )
* *
*************************************/ *************************************/
static READ32_HANDLER( input_port_0_msw_r )
{
return input_port_0_word_r(machine,offset,0) << 16;
}
static READ32_HANDLER( input_port_1_msw_r )
{
return input_port_1_word_r(machine,offset,0) << 16;
}
static READ32_HANDLER( input_port_2_msw_r )
{
return input_port_2_word_r(machine,offset,0) << 16;
}
static READ32_HANDLER( input_port_3_msw_r )
{
return input_port_3_word_r(machine,offset,0) << 16;
}
static READ32_HANDLER( input_port_4_msw_r )
{
return special_port4_r(machine,offset,0) << 16;
}
static WRITE32_HANDLER( int1_ack32_w ) static WRITE32_HANDLER( int1_ack32_w )
{ {
int1_ack_w(machine, offset, data, mem_mask); int1_ack_w(machine, offset, data, mem_mask);
@ -931,14 +906,14 @@ AM_RANGE(0x000100, 0x0003ff) AM_MIRROR(0x40000) AM_READWRITE(test1_r, test1_w)
AM_RANGE(0x000c00, 0x007fff) AM_MIRROR(0x40000) AM_READWRITE(test2_r, test2_w) AM_RANGE(0x000c00, 0x007fff) AM_MIRROR(0x40000) AM_READWRITE(test2_r, test2_w)
#endif #endif
AM_RANGE(0x000000, 0x03ffff) AM_MIRROR(0x40000) AM_RAM AM_BASE((UINT32 **)&main_ram) AM_SIZE(&main_ram_size) AM_RANGE(0x000000, 0x03ffff) AM_MIRROR(0x40000) AM_RAM AM_BASE((UINT32 **)&main_ram) AM_SIZE(&main_ram_size)
AM_RANGE(0x080000, 0x080003) AM_READ(input_port_3_msw_r) AM_RANGE(0x080000, 0x080003) AM_READ16(input_port_3_word_r, 0xffff0000)
AM_RANGE(0x082000, 0x082003) AM_READ(input_port_4_msw_r) AM_RANGE(0x082000, 0x082003) AM_READ16(special_port4_r, 0xffff0000)
AM_RANGE(0x084000, 0x084003) AM_READWRITE(sound_data32_r, sound_data32_w) AM_RANGE(0x084000, 0x084003) AM_READWRITE(sound_data32_r, sound_data32_w)
// AM_RANGE(0x086000, 0x08623f) AM_RAM -- networking -- first 0x40 bytes = our data, next 0x40*8 bytes = their data, r/w on IRQ2 // AM_RANGE(0x086000, 0x08623f) AM_RAM -- networking -- first 0x40 bytes = our data, next 0x40*8 bytes = their data, r/w on IRQ2
AM_RANGE(0x088000, 0x088003) AM_READ(drivedge_steering_r) AM_RANGE(0x088000, 0x088003) AM_READ(drivedge_steering_r)
AM_RANGE(0x08a000, 0x08a003) AM_READWRITE(drivedge_gas_r, SMH_NOP) AM_RANGE(0x08a000, 0x08a003) AM_READWRITE(drivedge_gas_r, SMH_NOP)
AM_RANGE(0x08c000, 0x08c003) AM_READWRITE(input_port_0_msw_r, SMH_NOP) AM_RANGE(0x08c000, 0x08c003) AM_READWRITE16(input_port_0_word_r, SMH_NOP, 0xffff0000)
AM_RANGE(0x08e000, 0x08e003) AM_READWRITE(input_port_1_msw_r, SMH_NOP) AM_RANGE(0x08e000, 0x08e003) AM_READWRITE16(input_port_1_word_r, SMH_NOP, 0xffff0000)
AM_RANGE(0x100000, 0x10000f) AM_WRITE(drivedge_zbuf_control_w) AM_BASE(&drivedge_zbuf_control) AM_RANGE(0x100000, 0x10000f) AM_WRITE(drivedge_zbuf_control_w) AM_BASE(&drivedge_zbuf_control)
AM_RANGE(0x180000, 0x180003) AM_WRITE(drivedge_color0_w) AM_RANGE(0x180000, 0x180003) AM_WRITE(drivedge_color0_w)
AM_RANGE(0x1a0000, 0x1bffff) AM_RAM_WRITE(drivedge_paletteram_w) AM_BASE(&paletteram32) AM_RANGE(0x1a0000, 0x1bffff) AM_RAM_WRITE(drivedge_paletteram_w) AM_BASE(&paletteram32)
@ -946,7 +921,7 @@ AM_RANGE(0x000c00, 0x007fff) AM_MIRROR(0x40000) AM_READWRITE(test2_r, test2_w)
AM_RANGE(0x1e0000, 0x1e0113) AM_READWRITE(itech020_video_r, itech020_video_w) AM_BASE((UINT32 **)&itech32_video) AM_RANGE(0x1e0000, 0x1e0113) AM_READWRITE(itech020_video_r, itech020_video_w) AM_BASE((UINT32 **)&itech32_video)
AM_RANGE(0x1e4000, 0x1e4003) AM_WRITE(tms_reset_assert_w) AM_RANGE(0x1e4000, 0x1e4003) AM_WRITE(tms_reset_assert_w)
AM_RANGE(0x1ec000, 0x1ec003) AM_WRITE(tms_reset_clear_w) AM_RANGE(0x1ec000, 0x1ec003) AM_WRITE(tms_reset_clear_w)
AM_RANGE(0x200000, 0x200003) AM_READ(input_port_2_msw_r) AM_RANGE(0x200000, 0x200003) AM_READ16(input_port_2_word_r, 0xffff0000)
AM_RANGE(0x280000, 0x280fff) AM_RAM_WRITE(tms1_68k_ram_w) AM_SHARE(1) AM_RANGE(0x280000, 0x280fff) AM_RAM_WRITE(tms1_68k_ram_w) AM_SHARE(1)
AM_RANGE(0x300000, 0x300fff) AM_RAM_WRITE(tms2_68k_ram_w) AM_SHARE(2) AM_RANGE(0x300000, 0x300fff) AM_RAM_WRITE(tms2_68k_ram_w) AM_SHARE(2)
AM_RANGE(0x380000, 0x380003) AM_WRITENOP // AM_WRITE(watchdog_reset16_w) AM_RANGE(0x380000, 0x380003) AM_WRITENOP // AM_WRITE(watchdog_reset16_w)
@ -968,11 +943,11 @@ ADDRESS_MAP_END
/*------ 68EC020-based memory layout ------*/ /*------ 68EC020-based memory layout ------*/
static ADDRESS_MAP_START( itech020_map, ADDRESS_SPACE_PROGRAM, 32 ) static ADDRESS_MAP_START( itech020_map, ADDRESS_SPACE_PROGRAM, 32 )
AM_RANGE(0x000000, 0x007fff) AM_RAM AM_BASE((UINT32 **)&main_ram) AM_SIZE(&main_ram_size) AM_RANGE(0x000000, 0x007fff) AM_RAM AM_BASE((UINT32 **)&main_ram) AM_SIZE(&main_ram_size)
AM_RANGE(0x080000, 0x080003) AM_READWRITE(input_port_0_msw_r, int1_ack32_w) AM_RANGE(0x080000, 0x080003) AM_READ16(input_port_0_word_r, 0xffff0000) AM_WRITE(int1_ack32_w)
AM_RANGE(0x100000, 0x100003) AM_READ(input_port_1_msw_r) AM_RANGE(0x100000, 0x100003) AM_READ16(input_port_1_word_r, 0xffff0000)
AM_RANGE(0x180000, 0x180003) AM_READ(input_port_2_msw_r) AM_RANGE(0x180000, 0x180003) AM_READ16(input_port_2_word_r, 0xffff0000)
AM_RANGE(0x200000, 0x200003) AM_READ(input_port_3_msw_r) AM_RANGE(0x200000, 0x200003) AM_READ16(input_port_3_word_r, 0xffff0000)
AM_RANGE(0x280000, 0x280003) AM_READ(input_port_4_msw_r) AM_RANGE(0x280000, 0x280003) AM_READ16(special_port4_r, 0xffff0000)
AM_RANGE(0x300000, 0x300003) AM_WRITE(itech020_color1_w) AM_RANGE(0x300000, 0x300003) AM_WRITE(itech020_color1_w)
AM_RANGE(0x380000, 0x380003) AM_WRITE(itech020_color2_w) AM_RANGE(0x380000, 0x380003) AM_WRITE(itech020_color2_w)
AM_RANGE(0x400000, 0x400003) AM_WRITE(watchdog_reset32_w) AM_RANGE(0x400000, 0x400003) AM_WRITE(watchdog_reset32_w)

36
src/mame/drivers/jalmah.c
View File

@ -202,14 +202,14 @@ static void daireika_mcu_run(running_machine *machine)
{ {
static UINT16 prg_prot; static UINT16 prg_prot;
if((0xffff - input_port_0_word_r(machine,0,0)) & 0x0008)//service_mode if((0xffff - input_port_read_indexed(machine,0)) & 0x0008)//service_mode
{ {
jm_regs[0x000/2] = input_port_2_word_r(machine,0,0); jm_regs[0x000/2] = input_port_read_indexed(machine,2);
jm_regs[0x002/2] = input_port_3_word_r(machine,0,0); jm_regs[0x002/2] = input_port_read_indexed(machine,3);
jm_regs[0x004/2] = input_port_4_word_r(machine,0,0); jm_regs[0x004/2] = input_port_read_indexed(machine,4);
jm_regs[0x006/2] = input_port_5_word_r(machine,0,0); jm_regs[0x006/2] = input_port_read_indexed(machine,5);
jm_regs[0x008/2] = input_port_6_word_r(machine,0,0); jm_regs[0x008/2] = input_port_read_indexed(machine,6);
jm_regs[0x00a/2] = input_port_7_word_r(machine,0,0); jm_regs[0x00a/2] = input_port_read_indexed(machine,7);
} }
else else
{ {
@ -247,14 +247,14 @@ static void urashima_mcu_run(running_machine *machine)
{ {
static UINT16 prg_prot; static UINT16 prg_prot;
if((0xffff - input_port_0_word_r(machine,0,0)) & 0x0008)//service_mode if((0xffff - input_port_read_indexed(machine,0)) & 0x0008)//service_mode
{ {
jm_regs[0x300/2] = input_port_2_word_r(machine,0,0); jm_regs[0x300/2] = input_port_read_indexed(machine,2);
jm_regs[0x302/2] = input_port_3_word_r(machine,0,0); jm_regs[0x302/2] = input_port_read_indexed(machine,3);
jm_regs[0x304/2] = input_port_4_word_r(machine,0,0); jm_regs[0x304/2] = input_port_read_indexed(machine,4);
jm_regs[0x306/2] = input_port_5_word_r(machine,0,0); jm_regs[0x306/2] = input_port_read_indexed(machine,5);
jm_regs[0x308/2] = input_port_6_word_r(machine,0,0); jm_regs[0x308/2] = input_port_read_indexed(machine,6);
jm_regs[0x30a/2] = input_port_7_word_r(machine,0,0); jm_regs[0x30a/2] = input_port_read_indexed(machine,7);
} }
else else
{ {
@ -289,11 +289,11 @@ static void urashima_mcu_run(running_machine *machine)
static void second_mcu_run(running_machine *machine) static void second_mcu_run(running_machine *machine)
{ {
if((0xffff - input_port_1_word_r(machine,0,0)) & 0x0004)//service_mode if((0xffff - input_port_read_indexed(machine,1)) & 0x0004)//service_mode
{ {
jm_regs[0x200/2] = input_port_2_word_r(machine,0,0); jm_regs[0x200/2] = input_port_read_indexed(machine,2);
jm_regs[0x202/2] = input_port_3_word_r(machine,0,0); jm_regs[0x202/2] = input_port_read_indexed(machine,3);
jm_regs[0x204/2] = input_port_4_word_r(machine,0,0); jm_regs[0x204/2] = input_port_read_indexed(machine,4);
} }
else else
{ {

2
src/mame/drivers/karnov.c
View File

@ -288,7 +288,7 @@ static WRITE16_HANDLER( karnov_control_w )
break; break;
case 4: /* DM (DMA to buffer spriteram) */ case 4: /* DM (DMA to buffer spriteram) */
buffer_spriteram16_w(machine,0,0,0); buffer_spriteram16_w(machine,0,0,0xffff);
break; break;
case 6: /* SECREQ (Interrupt & Data to i8751) */ case 6: /* SECREQ (Interrupt & Data to i8751) */

4
src/mame/drivers/kinst.c
View File

@ -311,13 +311,13 @@ static WRITE32_DEVICE_HANDLER( kinst_ide_w )
static READ32_DEVICE_HANDLER( kinst_ide_extra_r ) static READ32_DEVICE_HANDLER( kinst_ide_extra_r )
{ {
return ide_controller32_r(device, 0x3f6/4, 0xff00ffff) >> 16; return ide_controller32_r(device, 0x3f6/4, 0x00ff0000) >> 16;
} }
static WRITE32_DEVICE_HANDLER( kinst_ide_extra_w ) static WRITE32_DEVICE_HANDLER( kinst_ide_extra_w )
{ {
ide_controller32_w(device, 0x3f6/4, data << 16, 0xff00ffff); ide_controller32_w(device, 0x3f6/4, data << 16, 0x00ff0000);
} }

2
src/mame/drivers/koikoi.c
View File

@ -73,7 +73,7 @@ static READ8_HANDLER(input_r)
if(inputcnt<0){ return 0; } if(inputcnt<0){ return 0; }
if(!inputcnt) if(!inputcnt)
{ {
int key=input_port_2_word_r(machine,0,0); int key=input_port_read_indexed(machine,2);
int keyval=0; //we must return 0 (0x2 in 2nd read) to clear 4 bit at $6600 and allow next read int keyval=0; //we must return 0 (0x2 in 2nd read) to clear 4 bit at $6600 and allow next read
if(key) if(key)

18
src/mame/drivers/konamigv.c
View File

@ -456,7 +456,7 @@ static READ32_HANDLER( flash_r )
int reg = offset*2; int reg = offset*2;
int shift = 0; int shift = 0;
if (mem_mask == 0x0000ffff) if (mem_mask == 0xffff0000)
{ {
reg++; reg++;
shift = 16; shift = 16;
@ -486,7 +486,7 @@ static WRITE32_HANDLER( flash_w )
int reg = offset*2; int reg = offset*2;
int chip; int chip;
if (mem_mask == 0x0000ffff) if (mem_mask == 0xffff0000)
{ {
reg++; reg++;
data>>= 16; data>>= 16;
@ -517,7 +517,7 @@ static WRITE32_HANDLER( flash_w )
static READ32_HANDLER( trackball_r ) static READ32_HANDLER( trackball_r )
{ {
if( offset == 0 && mem_mask == 0xffff0000 ) if( offset == 0 && mem_mask == 0x0000ffff )
{ {
int axis; int axis;
UINT16 diff; UINT16 diff;
@ -573,11 +573,11 @@ INPUT_PORTS_END
static READ32_HANDLER( btcflash_r ) static READ32_HANDLER( btcflash_r )
{ {
if (mem_mask == 0xffff0000) if (mem_mask == 0x0000ffff)
{ {
return intelflash_read(0, offset*2); return intelflash_read(0, offset*2);
} }
else if (mem_mask == 0x0000ffff) else if (mem_mask == 0xffff0000)
{ {
return intelflash_read(0, (offset*2)+1)<<16; return intelflash_read(0, (offset*2)+1)<<16;
} }
@ -587,11 +587,11 @@ static READ32_HANDLER( btcflash_r )
static WRITE32_HANDLER( btcflash_w ) static WRITE32_HANDLER( btcflash_w )
{ {
if (mem_mask == 0xffff0000) if (mem_mask == 0x0000ffff)
{ {
intelflash_write(0, offset*2, data&0xffff); intelflash_write(0, offset*2, data&0xffff);
} }
else if (mem_mask == 0x0000ffff) else if (mem_mask == 0xffff0000)
{ {
intelflash_write(0, (offset*2)+1, (data>>16)&0xffff); intelflash_write(0, (offset*2)+1, (data>>16)&0xffff);
} }
@ -601,7 +601,7 @@ static READ32_HANDLER( btc_trackball_r )
{ {
// mame_printf_debug( "r %08x %08x %08x\n", activecpu_get_pc(), offset, mem_mask ); // mame_printf_debug( "r %08x %08x %08x\n", activecpu_get_pc(), offset, mem_mask );
if( offset == 1 && mem_mask == 0x0000ffff ) if( offset == 1 && mem_mask == 0xffff0000 )
{ {
int axis; int axis;
UINT16 diff; UINT16 diff;
@ -674,7 +674,7 @@ static READ32_HANDLER( tokimeki_serial_r )
static WRITE32_HANDLER( tokimeki_serial_w ) static WRITE32_HANDLER( tokimeki_serial_w )
{ {
/* /*
serial EEPROM-like device here: when mem_mask == 0xffffff00 only, serial EEPROM-like device here: when mem_mask == 0x000000ff only,
0x40 = chip enable 0x40 = chip enable
0x20 = clock 0x20 = clock

1
src/mame/drivers/konamigx.c
View File

@ -594,7 +594,6 @@ static struct { UINT32 offs, pc, mask, data; } waitskip;
static READ32_HANDLER(waitskip_r) static READ32_HANDLER(waitskip_r)
{ {
UINT32 data = gx_workram[waitskip.offs+offset]; UINT32 data = gx_workram[waitskip.offs+offset];
mem_mask = ~mem_mask;
if (activecpu_get_pc() == waitskip.pc && (data & mem_mask) == (waitskip.data & mem_mask)) if (activecpu_get_pc() == waitskip.pc && (data & mem_mask) == (waitskip.data & mem_mask))
{ {

8
src/mame/drivers/ksys573.c
View File

@ -527,7 +527,7 @@ static READ32_HANDLER( atapi_r )
{ {
int reg, data; int reg, data;
if (mem_mask == 0xffff0000) // word-wide command read if (mem_mask == 0x0000ffff) // word-wide command read
{ {
// mame_printf_debug("ATAPI: packet read = %04x\n", atapi_data[atapi_data_ptr]); // mame_printf_debug("ATAPI: packet read = %04x\n", atapi_data[atapi_data_ptr]);
@ -599,7 +599,7 @@ static READ32_HANDLER( atapi_r )
int shift; int shift;
reg = offset<<1; reg = offset<<1;
shift = 0; shift = 0;
if (mem_mask == 0xff00ffff) if (mem_mask == 0x00ff0000)
{ {
reg += 1; reg += 1;
shift = 16; shift = 16;
@ -650,7 +650,7 @@ static WRITE32_HANDLER( atapi_w )
verboselog( 2, "atapi_w( %08x, %08x, %08x )\n", offset, mem_mask, data ); verboselog( 2, "atapi_w( %08x, %08x, %08x )\n", offset, mem_mask, data );
if (mem_mask == 0xffff0000) // word-wide command write if (mem_mask == 0x0000ffff) // word-wide command write
{ {
verboselog( 2, "atapi_w: data=%04x\n", data ); verboselog( 2, "atapi_w: data=%04x\n", data );
@ -756,7 +756,7 @@ static WRITE32_HANDLER( atapi_w )
else else
{ {
reg = offset<<1; reg = offset<<1;
if (mem_mask == 0xff00ffff) if (mem_mask == 0x00ff0000)
{ {
reg += 1; reg += 1;
data >>= 16; data >>= 16;

2
src/mame/drivers/macrossp.c
View File

@ -278,7 +278,7 @@ static WRITE32_HANDLER( macrossp_soundcmd_w )
if (ACCESSING_BITS_16_31) if (ACCESSING_BITS_16_31)
{ {
//logerror("%08x write soundcmd %08x (%08x)\n",activecpu_get_pc(),data,mem_mask); //logerror("%08x write soundcmd %08x (%08x)\n",activecpu_get_pc(),data,mem_mask);
soundlatch_word_w(machine,0,data >> 16,0); soundlatch_word_w(machine,0,data >> 16,0xffff);
sndpending = 1; sndpending = 1;
cpunum_set_input_line(Machine, 1,2,HOLD_LINE); cpunum_set_input_line(Machine, 1,2,HOLD_LINE);
/* spin for a while to let the sound CPU read the command */ /* spin for a while to let the sound CPU read the command */

2
src/mame/drivers/mainsnk.c
View File

@ -117,7 +117,7 @@ static READ8_HANDLER( sound_ack_r )
static READ8_HANDLER( mainsnk_port_0_r ) static READ8_HANDLER( mainsnk_port_0_r )
{ {
int result = input_port_0_r( machine, 0 ); int result = input_port_read_indexed( machine, 0 );
if( !sound_cpu_ready ) result |= 0x20; if( !sound_cpu_ready ) result |= 0x20;
return result; return result;
} }

2
src/mame/drivers/mcr68.c
View File

@ -92,7 +92,7 @@ static READ16_HANDLER( zwackery_6840_r )
/* make this happen, we must assume that reads from the */ /* make this happen, we must assume that reads from the */
/* 6840 take 14 additional cycles */ /* 6840 take 14 additional cycles */
activecpu_adjust_icount(-14); activecpu_adjust_icount(-14);
return mcr68_6840_upper_r(machine,offset,0); return mcr68_6840_upper_r(machine,offset,0xffff);
} }

14
src/mame/drivers/megasys1.c
View File

@ -274,11 +274,11 @@ static READ16_HANDLER( ip_select_r )
switch (i) switch (i)
{ {
case 0 : return coins_r(machine,0,0); break; case 0 : return coins_r(machine,0,0xffff); break;
case 1 : return player1_r(machine,0,0); break; case 1 : return player1_r(machine,0,0xffff); break;
case 2 : return player2_r(machine,0,0); break; case 2 : return player2_r(machine,0,0xffff); break;
case 3 : return dsw1_r(machine,0,0); break; case 3 : return dsw1_r(machine,0,0xffff); break;
case 4 : return dsw2_r(machine,0,0); break; case 4 : return dsw2_r(machine,0,0xffff); break;
default : return 0x0006; default : return 0x0006;
} }
} }
@ -2931,8 +2931,8 @@ static READ16_HANDLER( protection_peekaboo_r )
switch (protection_val) switch (protection_val)
{ {
case 0x02: return 0x03; case 0x02: return 0x03;
case 0x51: return player1_r(machine,0,0); case 0x51: return player1_r(machine,0,0xffff);
case 0x52: return player2_r(machine,0,0); case 0x52: return player2_r(machine,0,0xffff);
default: return protection_val; default: return protection_val;
} }
} }

6
src/mame/drivers/metro.c
View File

@ -157,7 +157,7 @@ static void update_irq_state(void)
{ {
/* Get the pending IRQs (only the enabled ones, e.g. where /* Get the pending IRQs (only the enabled ones, e.g. where
irq_enable is *0*) */ irq_enable is *0*) */
UINT16 irq = metro_irq_cause_r(Machine,0,0) & ~*metro_irq_enable; UINT16 irq = metro_irq_cause_r(Machine,0,0xffff) & ~*metro_irq_enable;
if (irq_line == -1) /* mouja, gakusai, gakusai2, dokyusei, dokyusp */ if (irq_line == -1) /* mouja, gakusai, gakusai2, dokyusei, dokyusp */
{ {
@ -2151,12 +2151,12 @@ ADDRESS_MAP_END
static READ8_HANDLER( puzzlet_port7_r ) static READ8_HANDLER( puzzlet_port7_r )
{ {
return input_port_2_word_r(machine,0,0); return input_port_read_indexed(machine,2);
} }
static READ8_HANDLER( puzzlet_serB_r ) static READ8_HANDLER( puzzlet_serB_r )
{ {
return input_port_0_word_r(machine,0,0); // coin return input_port_read_indexed(machine,0); // coin
} }
static WRITE8_HANDLER( puzzlet_portb_w ) static WRITE8_HANDLER( puzzlet_portb_w )

22
src/mame/drivers/model2.c
View File

@ -924,7 +924,7 @@ static void snd_latch_to_68k_w(int data)
static READ32_HANDLER( model2_serial_r ) static READ32_HANDLER( model2_serial_r )
{ {
if ((offset == 0) && (mem_mask == 0x0000ffff)) if ((offset == 0) && (mem_mask == 0xffff0000))
{ {
return 0x00070000; // TxRdy RxRdy (zeroguna also needs bit 4 set) return 0x00070000; // TxRdy RxRdy (zeroguna also needs bit 4 set)
} }
@ -934,7 +934,7 @@ static READ32_HANDLER( model2_serial_r )
static WRITE32_HANDLER( model2o_serial_w ) static WRITE32_HANDLER( model2o_serial_w )
{ {
if (mem_mask == 0xffff0000) if (mem_mask == 0x0000ffff)
{ {
snd_latch_to_68k_w(data&0xff); snd_latch_to_68k_w(data&0xff);
} }
@ -1007,7 +1007,7 @@ static READ32_HANDLER( model2_prot_r )
static WRITE32_HANDLER( model2_prot_w ) static WRITE32_HANDLER( model2_prot_w )
{ {
if (mem_mask == 0xffff) if (mem_mask == 0xffff0000)
{ {
data >>= 16; data >>= 16;
} }
@ -1085,7 +1085,7 @@ static READ32_HANDLER( maxx_r )
if (offset <= 0x1f/4) if (offset <= 0x1f/4)
{ {
// special // special
if (mem_mask == 0x0000ffff) if (mem_mask == 0xffff0000)
{ {
// 16-bit protection reads // 16-bit protection reads
model2_maxxstate++; model2_maxxstate++;
@ -1106,7 +1106,7 @@ static READ32_HANDLER( maxx_r )
} }
} }
} }
else if (mem_mask == 0) else if (mem_mask == 0xffffffff)
{ {
// 32-bit read // 32-bit read
if (offset == 0x22/4) if (offset == 0x22/4)
@ -1127,7 +1127,7 @@ static int zflagi, zflag, sysres;
static READ32_HANDLER( network_r ) static READ32_HANDLER( network_r )
{ {
if ((mem_mask == 0) || (mem_mask == 0xffff0000) || (mem_mask == 0x0000ffff)) if ((mem_mask == 0xffffffff) || (mem_mask == 0x0000ffff) || (mem_mask == 0xffff0000))
{ {
return 0xffffffff; return 0xffffffff;
} }
@ -1137,11 +1137,11 @@ static READ32_HANDLER( network_r )
return model2_netram[offset]; return model2_netram[offset];
} }
if (mem_mask == 0xff00ffff) if (mem_mask == 0x00ff0000)
{ {
return sysres<<16; return sysres<<16;
} }
else if (mem_mask == 0xffffff00) else if (mem_mask == 0x000000ff)
{ {
return zflagi; return zflagi;
} }
@ -1151,7 +1151,7 @@ static READ32_HANDLER( network_r )
static WRITE32_HANDLER( network_w ) static WRITE32_HANDLER( network_w )
{ {
if ((mem_mask == 0) || (mem_mask == 0xffff0000) || (mem_mask == 0x0000ffff)) if ((mem_mask == 0xffffffff) || (mem_mask == 0x0000ffff) || (mem_mask == 0xffff0000))
{ {
COMBINE_DATA(&model2_netram[offset+0x4000/4]); COMBINE_DATA(&model2_netram[offset+0x4000/4]);
return; return;
@ -1163,11 +1163,11 @@ static WRITE32_HANDLER( network_w )
return; return;
} }
if (mem_mask == 0xff00ffff) if (mem_mask == 0x00ff0000)
{ {
sysres = data>>16; sysres = data>>16;
} }
else if (mem_mask == 0xffffff00) else if (mem_mask == 0x000000ff)
{ {
zflagi = data; zflagi = data;
zflag = 0; zflag = 0;

2
src/mame/drivers/model3.c
View File

@ -1323,7 +1323,7 @@ static WRITE64_HANDLER(model3_sound_w)
model3_irq_state &= ~0x40; model3_irq_state &= ~0x40;
// serial configuration writes // serial configuration writes
if ((mem_mask == U64(0x00ffffffffffffff)) && (offset == 0)) if ((mem_mask == U64(0xff00000000000000)) && (offset == 0))
{ {
SCSP_MidiIn(machine, 0, (data>>56)&0xff, 0); SCSP_MidiIn(machine, 0, (data>>56)&0xff, 0);

4
src/mame/drivers/mquake.c
View File

@ -126,13 +126,13 @@ static READ16_HANDLER( coin_chip_r )
{ {
if (offset == 1) if (offset == 1)
return input_port_read(machine, "COINCHIP"); return input_port_read(machine, "COINCHIP");
logerror("%06x:coin_chip_r(%02x) & %04x\n", activecpu_get_pc(), offset, mem_mask ^ 0xffff); logerror("%06x:coin_chip_r(%02x) & %04x\n", activecpu_get_pc(), offset, mem_mask);
return 0xffff; return 0xffff;
} }
static WRITE16_HANDLER( coin_chip_w ) static WRITE16_HANDLER( coin_chip_w )
{ {
logerror("%06x:coin_chip_w(%02x) = %04x & %04x\n", activecpu_get_pc(), offset, data, mem_mask ^ 0xffff); logerror("%06x:coin_chip_w(%02x) = %04x & %04x\n", activecpu_get_pc(), offset, data, mem_mask);
} }
// inputs at 282000, 282002 (full word) // inputs at 282000, 282002 (full word)

10
src/mame/drivers/namcona1.c
View File

@ -835,15 +835,15 @@ transfer_dword( running_machine *machine, UINT32 dest, UINT32 source )
} }
if( dest>=0xf00000 && dest<=0xf02000 ) if( dest>=0xf00000 && dest<=0xf02000 )
{ {
namcona1_paletteram_w( machine, (dest-0xf00000)/2, data, 0x0000 ); namcona1_paletteram_w( machine, (dest-0xf00000)/2, data, 0xffff );
} }
else if( dest>=0xf40000 && dest<=0xf80000 ) else if( dest>=0xf40000 && dest<=0xf80000 )
{ {
namcona1_gfxram_w( machine, (dest-0xf40000)/2, data, 0x0000 ); namcona1_gfxram_w( machine, (dest-0xf40000)/2, data, 0xffff );
} }
else if( dest>=0xff0000 && dest<0xff8000 ) else if( dest>=0xff0000 && dest<0xff8000 )
{ {
namcona1_videoram_w( machine, (dest-0xff0000)/2, data, 0x0000 ); namcona1_videoram_w( machine, (dest-0xff0000)/2, data, 0xffff );
} }
else if( dest>=0xff8000 && dest<=0xffdfff ) else if( dest>=0xff8000 && dest<=0xffdfff )
{ {
@ -1111,8 +1111,8 @@ static READ16_HANDLER( na1mcu_shared_r )
static WRITE16_HANDLER( na1mcu_shared_w ) static WRITE16_HANDLER( na1mcu_shared_w )
{ {
mem_mask = ((mem_mask>>8)&0xff) | ((mem_mask<<8)&0xff00); mem_mask = FLIPENDIAN_INT16(mem_mask);
data = ((data>>8)&0xff) | ((data<<8)&0xff00); data = FLIPENDIAN_INT16(data);
COMBINE_DATA(&namcona1_workram[offset]); COMBINE_DATA(&namcona1_workram[offset]);
} }

4
src/mame/drivers/namconb1.c
View File

@ -691,11 +691,11 @@ static WRITE32_HANDLER( sharedram_w )
{ {
if (offset < 0xb0) if (offset < 0xb0)
{ {
if (mem_mask == 0x0000ffff) if (mem_mask == 0xffff0000)
{ {
namcoc7x_sound_write16((data>>16), offset*2); namcoc7x_sound_write16((data>>16), offset*2);
} }
else if (mem_mask == 0xffff0000) else if (mem_mask == 0x0000ffff)
{ {
namcoc7x_sound_write16((data&0xffff), (offset*2)+1); namcoc7x_sound_write16((data&0xffff), (offset*2)+1);
} }

2
src/mame/drivers/namcos12.c
View File

@ -1207,7 +1207,7 @@ static READ32_HANDLER( tektagt_protection_2_r )
static MACHINE_RESET( namcos12 ) static MACHINE_RESET( namcos12 )
{ {
psx_machine_init(); psx_machine_init();
bankoffset_w(machine,0,0,0); bankoffset_w(machine,0,0,0xffffffff);
if( strcmp( machine->gamedrv->name, "tektagt" ) == 0 || if( strcmp( machine->gamedrv->name, "tektagt" ) == 0 ||
strcmp( machine->gamedrv->name, "tektagta" ) == 0 || strcmp( machine->gamedrv->name, "tektagta" ) == 0 ||

6
src/mame/drivers/namcos22.c
View File

@ -1148,7 +1148,7 @@ static WRITE32_HANDLER( namcos22_system_controller_w )
int i; int i;
for( i=0; i<4; i++ ) for( i=0; i<4; i++ )
{ {
if( (mask&0xff000000)==0 ) if( (mask&0xff000000)!=0 )
{ {
int offs = offset*4+i; int offs = offset*4+i;
if(offs<4 || offs>=8) if(offs<4 || offs>=8)
@ -1166,7 +1166,7 @@ static WRITE32_HANDLER( namcos22_system_controller_w )
if( mbSuperSystem22 ) if( mbSuperSystem22 )
{ {
if (offset == 0x14/4 && mem_mask == 0xffff00ff) if (offset == 0x14/4 && mem_mask == 0x0000ff00)
{ /* SUBCPU enable for Super System 22 */ { /* SUBCPU enable for Super System 22 */
if (data) if (data)
{ {
@ -1180,7 +1180,7 @@ static WRITE32_HANDLER( namcos22_system_controller_w )
} }
else else
{ {
if (offset == 0x18/4 && mem_mask == 0xffff00ff) if (offset == 0x18/4 && mem_mask == 0x0000ff00)
{ /* SUBCPU enable on System 22 (guessed, but too early crashes Rave Racer so it's a good test) */ { /* SUBCPU enable on System 22 (guessed, but too early crashes Rave Racer so it's a good test) */
if (data == 0xff00) if (data == 0xff00)
{ {

2
src/mame/drivers/namcos23.c
View File

@ -603,7 +603,7 @@ static READ32_HANDLER(sysctl_stat_r)
static WRITE32_HANDLER( s23_mcuen_w ) static WRITE32_HANDLER( s23_mcuen_w )
{ {
mame_printf_debug("mcuen_w: mask %08x, data %08x\n", mem_mask, data); mame_printf_debug("mcuen_w: mask %08x, data %08x\n", mem_mask, data);
if (mem_mask == 0xffff0000) if (mem_mask == 0x0000ffff)
{ {
if (data) if (data)
{ {

8
src/mame/drivers/nemesis.c
View File

@ -245,10 +245,10 @@ static READ16_HANDLER( selected_ip_r )
{ {
switch (hcrash_selected_ip & 0xf) switch (hcrash_selected_ip & 0xf)
{ // From WEC Le Mans Schems: { // From WEC Le Mans Schems:
case 0xc: return input_port_8_r(machine,offset); // Accel - Schems: Accelevr case 0xc: return input_port_read_indexed(machine,8); // Accel - Schems: Accelevr
case 0: return input_port_8_r(machine,offset); case 0: return input_port_read_indexed(machine,8);
case 0xd: return input_port_9_r(machine,offset); // Wheel - Schems: Handlevr case 0xd: return input_port_read_indexed(machine,9); // Wheel - Schems: Handlevr
case 1: return input_port_9_r(machine,offset); case 1: return input_port_read_indexed(machine,9);
default: return ~0; default: return ~0;
} }

4
src/mame/drivers/neogeo.c
View File

@ -562,7 +562,7 @@ static MEMCARD_HANDLER( neogeo )
static WRITE16_HANDLER( audio_command_w ) static WRITE16_HANDLER( audio_command_w )
{ {
/* accessing the LSB only is not mapped */ /* accessing the LSB only is not mapped */
if (mem_mask != 0xff00) if (mem_mask != 0x00ff)
{ {
soundlatch_w(machine, 0, data >> 8); soundlatch_w(machine, 0, data >> 8);
@ -1013,7 +1013,7 @@ static MACHINE_RESET( neogeo )
/* reset system control registers */ /* reset system control registers */
for (offs = 0; offs < 8; offs++) for (offs = 0; offs < 8; offs++)
system_control_w(machine, offs, 0, 0xff00); system_control_w(machine, offs, 0, 0x00ff);
neogeo_reset_rng(); neogeo_reset_rng();

2
src/mame/drivers/nmk16.c
View File

@ -335,7 +335,7 @@ static READ16_HANDLER( tharrier_mcu_r )
return res << 8; return res << 8;
} }
else else
return ~input_port_1_word_r(machine,0,0); return ~input_port_read_indexed(machine,1);
} }
static WRITE16_HANDLER( macross2_sound_command_w ) static WRITE16_HANDLER( macross2_sound_command_w )

6
src/mame/drivers/nyny.c
View File

@ -138,13 +138,13 @@ static INTERRUPT_GEN( update_pia_1 )
/* update the different PIA pins from the input ports */ /* update the different PIA pins from the input ports */
/* CA1 - copy of PA0 (COIN1) */ /* CA1 - copy of PA0 (COIN1) */
pia_1_ca1_w(machine, 0, input_port_0_r(machine, 0) & 0x01); pia_1_ca1_w(machine, 0, input_port_read_indexed(machine, 0) & 0x01);
/* CA2 - copy of PA1 (SERVICE1) */ /* CA2 - copy of PA1 (SERVICE1) */
pia_1_ca2_w(machine, 0, input_port_0_r(machine, 0) & 0x02); pia_1_ca2_w(machine, 0, input_port_read_indexed(machine, 0) & 0x02);
/* CB1 - (crosshatch) */ /* CB1 - (crosshatch) */
pia_1_cb1_w(machine, 0, input_port_5_r(machine, 0)); pia_1_cb1_w(machine, 0, input_port_read_indexed(machine, 5));
/* CB2 - NOT CONNECTED */ /* CB2 - NOT CONNECTED */
} }

2
src/mame/drivers/overdriv.c
View File

@ -129,7 +129,7 @@ static READ16_HANDLER( eeprom_r )
//logerror("%06x eeprom_r\n",activecpu_get_pc()); //logerror("%06x eeprom_r\n",activecpu_get_pc());
/* bit 6 is EEPROM data */ /* bit 6 is EEPROM data */
res = (EEPROM_read_bit() << 6) | input_port_0_word_r(machine,0,0); res = (EEPROM_read_bit() << 6) | input_port_read_indexed(machine,0);
return res; return res;
} }

4
src/mame/drivers/pacman.c
View File

@ -557,7 +557,7 @@ static READ8_HANDLER( alibaba_mystery_2_r )
static READ8_HANDLER( maketrax_special_port2_r ) static READ8_HANDLER( maketrax_special_port2_r )
{ {
int data = input_port_2_r(machine,offset); int data = input_port_read_indexed(machine, 2);
int pc = activecpu_get_previouspc(); int pc = activecpu_get_previouspc();
if ((pc == 0x1973) || (pc == 0x2389)) return data | 0x40; if ((pc == 0x1973) || (pc == 0x2389)) return data | 0x40;
@ -600,7 +600,7 @@ static READ8_HANDLER( maketrax_special_port3_r )
static READ8_HANDLER( korosuke_special_port2_r ) static READ8_HANDLER( korosuke_special_port2_r )
{ {
int data = input_port_2_r(machine,offset); int data = input_port_read_indexed(machine,2);
int pc = activecpu_get_previouspc(); int pc = activecpu_get_previouspc();
if ((pc == 0x196e) || (pc == 0x2387)) return data | 0x40; if ((pc == 0x196e) || (pc == 0x2387)) return data | 0x40;

8
src/mame/drivers/pasha2.c
View File

@ -140,17 +140,17 @@ static WRITE16_HANDLER( bitmap_1_w )
// handle overlapping pixels without writing them // handle overlapping pixels without writing them
switch(mem_mask) switch(mem_mask)
{ {
case 0: case 0xffff:
bitmap_1_w(machine,offset,data,0x00ff);
bitmap_1_w(machine,offset,data,0xff00); bitmap_1_w(machine,offset,data,0xff00);
bitmap_1_w(machine,offset,data,0x00ff);
return; return;
case 0x00ff: case 0xff00:
if((data & 0xff00) == 0xff00) if((data & 0xff00) == 0xff00)
return; return;
break; break;
case 0xff00: case 0x00ff:
if((data & 0x00ff) == 0x00ff) if((data & 0x00ff) == 0x00ff)
return; return;
break; break;

2
src/mame/drivers/peplus.c
View File

@ -484,7 +484,7 @@ static READ8_HANDLER( peplus_sf000_r )
/* External RAM Callback for I8052 */ /* External RAM Callback for I8052 */
static READ32_HANDLER( peplus_external_ram_iaddr ) static READ32_HANDLER( peplus_external_ram_iaddr )
{ {
if (mem_mask == 0xff) { if (mem_mask == 0xffffff00) {
return (io_port[2] << 8) | offset; return (io_port[2] << 8) | offset;
} else { } else {
return offset; return offset;

2
src/mame/drivers/pirates.c
View File

@ -170,7 +170,7 @@ static READ16_HANDLER( pirates_in1_r )
bit = 1; bit = 1;
/* bit 4 is EEPROM data, bit 7 is protection */ /* bit 4 is EEPROM data, bit 7 is protection */
return input_port_1_word_r(machine,0,0) | (EEPROM_read_bit() << 4) | (bit << 7); return input_port_read_indexed(machine,1) | (EEPROM_read_bit() << 4) | (bit << 7);
} }

12
src/mame/drivers/plygonet.c
View File

@ -216,18 +216,18 @@ static WRITE32_HANDLER( dsp_shared_ram_write )
return; return;
} }
if (mem_mask == (0x00000000)) if (mem_mask == (0xffffffff))
{ {
/* write the data to the dsp56k as well */ /* write the data to the dsp56k as well */
dsp56k_shared_ram_16[(offset<<1)] = (dsp_shared_ram[offset] & 0xffff0000) >> 16 ; dsp56k_shared_ram_16[(offset<<1)] = (dsp_shared_ram[offset] & 0xffff0000) >> 16 ;
dsp56k_shared_ram_16[(offset<<1)+1] = (dsp_shared_ram[offset] & 0x0000ffff) ; dsp56k_shared_ram_16[(offset<<1)+1] = (dsp_shared_ram[offset] & 0x0000ffff) ;
} }
else if (mem_mask == (0x0000ffff)) else if (mem_mask == (0xffff0000))
{ {
/* write to the 'current' dsp56k byte */ /* write to the 'current' dsp56k byte */
dsp56k_shared_ram_16[(offset<<1)] = (dsp_shared_ram[offset] & 0xffff0000) >> 16 ; dsp56k_shared_ram_16[(offset<<1)] = (dsp_shared_ram[offset] & 0xffff0000) >> 16 ;
} }
else if (mem_mask == (0xffff0000)) else if (mem_mask == (0x0000ffff))
{ {
/* write to the 'next' dsp56k byte */ /* write to the 'next' dsp56k byte */
dsp56k_shared_ram_16[(offset<<1)+1] = (dsp_shared_ram[offset] & 0x0000ffff) ; dsp56k_shared_ram_16[(offset<<1)+1] = (dsp_shared_ram[offset] & 0x0000ffff) ;
@ -267,12 +267,12 @@ static READ32_HANDLER( dsp_host_interface_r )
{ {
UINT8 hi_addr = offset<<1; UINT8 hi_addr = offset<<1;
if (mem_mask == (~0x0000ff00)) if (mem_mask == 0x0000ff00)
hi_addr++; hi_addr++;
logerror("CALLING dsp_host_interface_read %x = %x [%x] (@%x)\n", hi_addr, dsp56k_host_interface_read(hi_addr), mem_mask, activecpu_get_pc()); logerror("CALLING dsp_host_interface_read %x = %x [%x] (@%x)\n", hi_addr, dsp56k_host_interface_read(hi_addr), mem_mask, activecpu_get_pc());
if (mem_mask == (~0x0000ff00)) if (mem_mask == 0x0000ff00)
return dsp56k_host_interface_read(hi_addr) << 8; return dsp56k_host_interface_read(hi_addr) << 8;
else else
return dsp56k_host_interface_read(hi_addr) << 24; return dsp56k_host_interface_read(hi_addr) << 24;
@ -284,7 +284,7 @@ static WRITE32_HANDLER( dsp_host_interface_w )
UINT8 dsp_data; UINT8 dsp_data;
UINT8 hi_addr = offset<<1; UINT8 hi_addr = offset<<1;
if (mem_mask == (~0x0000ff00)) /* The second byte */ if (mem_mask == 0x0000ff00) /* The second byte */
{ {
hi_addr++; hi_addr++;
dsp_data = data >> 8; dsp_data = data >> 8;

6
src/mame/drivers/policetr.c
View File

@ -188,13 +188,13 @@ static WRITE32_HANDLER( control_w )
/* toggling BSMT off then on causes a reset */ /* toggling BSMT off then on causes a reset */
if (!(old & 0x80000000) && (control_data & 0x80000000)) if (!(old & 0x80000000) && (control_data & 0x80000000))
{ {
BSMT2000_data_0_w(machine, bsmt_data_bank, 0, 0); BSMT2000_data_0_w(machine, bsmt_data_bank, 0, 0xffff);
sndti_reset(SOUND_BSMT2000, 0); sndti_reset(SOUND_BSMT2000, 0);
} }
/* log any unknown bits */ /* log any unknown bits */
if (data & 0x4f1fffff) if (data & 0x4f1fffff)
logerror("%08X: control_w = %08X & %08X\n", activecpu_get_previouspc(), data, ~mem_mask); logerror("%08X: control_w = %08X & %08X\n", activecpu_get_previouspc(), data, mem_mask);
} }
@ -208,7 +208,7 @@ static WRITE32_HANDLER( control_w )
static WRITE32_HANDLER( bsmt2000_reg_w ) static WRITE32_HANDLER( bsmt2000_reg_w )
{ {
if (control_data & 0x80000000) if (control_data & 0x80000000)
BSMT2000_data_0_w(machine, bsmt_reg, data & 0xffff, mem_mask | 0xffff0000); BSMT2000_data_0_w(machine, bsmt_reg, data & 0xffff, mem_mask & 0xffff);
else else
COMBINE_DATA(&bsmt_data_offset); COMBINE_DATA(&bsmt_data_offset);
} }

4
src/mame/drivers/popeye.c
View File

@ -463,8 +463,8 @@ static READ8_HANDLER( popeye_portA_r )
int res; int res;
res = input_port_3_r(machine,offset); res = input_port_read_indexed(machine,3);
res |= (input_port_4_r(machine,offset) << (7-dswbit)) & 0x80; res |= (input_port_read_indexed(machine,4) << (7-dswbit)) & 0x80;
return res; return res;
} }

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