mirror of
https://github.com/holub/mame
synced 2025-04-23 08:49:55 +03:00
Conflicts (nw)
This commit is contained in:
angelosa
parent
7c9934c5c8
commit
e94ee9339a
@ -67,36 +67,21 @@ Verification still needed for the other PCBs.
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#include "sound/3812intf.h"
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#include "includes/aerofgt.h"
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WRITE16_MEMBER(aerofgt_state::sound_command_w)
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WRITE8_MEMBER(aerofgt_state::sound_command_w)
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{
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if (ACCESSING_BITS_0_7)
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{
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m_pending_command = 1;
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m_soundlatch->write(space, offset, data & 0xff);
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m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
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}
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m_pending_command = 1;
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m_soundlatch->write(space, 0, data);
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m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
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}
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WRITE16_MEMBER(aerofgt_state::turbofrc_sound_command_w)
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WRITE8_MEMBER(aerofgt_state::aerfboot_soundlatch_w)
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{
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if (ACCESSING_BITS_8_15)
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{
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m_pending_command = 1;
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m_soundlatch->write(space, offset, (data >> 8) & 0xff);
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m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
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}
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m_soundlatch->write(space, 0, data);
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m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
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}
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WRITE16_MEMBER(aerofgt_state::aerfboot_soundlatch_w)
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{
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if(ACCESSING_BITS_8_15)
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{
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m_soundlatch->write(space, 0, (data >> 8) & 0xff);
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m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
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}
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}
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READ16_MEMBER(aerofgt_state::pending_command_r)
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READ8_MEMBER(aerofgt_state::pending_command_r)
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{
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return m_pending_command;
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}
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@ -111,7 +96,6 @@ WRITE8_MEMBER(aerofgt_state::aerofgt_sh_bankswitch_w)
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membank("bank1")->set_entry(data & 0x03);
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}
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WRITE16_MEMBER(aerofgt_state::pspikesb_oki_banking_w)
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{
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m_oki->set_rom_bank(data & 3);
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@ -153,10 +137,10 @@ static ADDRESS_MAP_START( pspikes_map, AS_PROGRAM, 16, aerofgt_state )
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AM_RANGE(0xffc000, 0xffc3ff) AM_WRITEONLY AM_SHARE("spriteram3")
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AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
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AM_RANGE(0xffe000, 0xffefff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
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AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("IN0") AM_WRITE(pspikes_palette_bank_w)
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AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("IN1") AM_WRITE(pspikes_gfxbank_w)
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AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("IN0") AM_WRITE8(pspikes_palette_bank_w, 0x00ff)
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AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("IN1") AM_WRITE8(pspikes_gfxbank_w, 0x00ff)
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AM_RANGE(0xfff004, 0xfff005) AM_READ_PORT("DSW") AM_WRITE(aerofgt_bg1scrolly_w)
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AM_RANGE(0xfff006, 0xfff007) AM_READWRITE(pending_command_r, sound_command_w)
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AM_RANGE(0xfff006, 0xfff007) AM_READWRITE8(pending_command_r, sound_command_w, 0x00ff)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( pspikesb_map, AS_PROGRAM, 16, aerofgt_state )
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@ -190,7 +174,7 @@ static ADDRESS_MAP_START( spikes91_map, AS_PROGRAM, 16, aerofgt_state )
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AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
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AM_RANGE(0xffe000, 0xffefff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
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AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("IN0")
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AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("IN1") AM_WRITE(pspikes_gfxbank_w)
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AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("IN1") AM_WRITE8(pspikes_gfxbank_w, 0x00ff)
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AM_RANGE(0xfff004, 0xfff005) AM_READ_PORT("DSW") AM_WRITE(aerofgt_bg1scrolly_w)
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AM_RANGE(0xfff006, 0xfff007) AM_NOP
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AM_RANGE(0xfff008, 0xfff009) AM_WRITE(spikes91_lookup_w)
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@ -204,8 +188,8 @@ static ADDRESS_MAP_START( pspikesc_map, AS_PROGRAM, 16, aerofgt_state )
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AM_RANGE(0xffc000, 0xffcbff) AM_RAM AM_SHARE("spriteram3")
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AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
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AM_RANGE(0xffe000, 0xffefff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
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AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("IN0") AM_WRITE(pspikes_palette_bank_w)
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AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("IN1") AM_WRITE(pspikes_gfxbank_w)
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AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("IN0") AM_WRITE8(pspikes_palette_bank_w, 0x00ff)
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AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("IN1") AM_WRITE8(pspikes_gfxbank_w, 0x00ff)
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AM_RANGE(0xfff004, 0xfff005) AM_READ_PORT("DSW")
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AM_RANGE(0xfff004, 0xfff005) AM_WRITE(aerofgt_bg1scrolly_w)
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AM_RANGE(0xfff006, 0xfff007) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x00ff)
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@ -223,11 +207,11 @@ static ADDRESS_MAP_START( karatblz_map, AS_PROGRAM, 16, aerofgt_state )
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AM_RANGE(0x0fc000, 0x0fc7ff) AM_RAM AM_SHARE("spriteram3")
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AM_RANGE(0x0fe000, 0x0fe7ff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
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AM_RANGE(0x0ff000, 0x0ff001) AM_READ_PORT("IN0")
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AM_RANGE(0x0ff002, 0x0ff003) AM_READ_PORT("IN1") AM_WRITE(karatblz_gfxbank_w)
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AM_RANGE(0x0ff002, 0x0ff003) AM_READ_PORT("IN1") AM_WRITE8(karatblz_gfxbank_w, 0xff00)
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AM_RANGE(0x0ff004, 0x0ff005) AM_READ_PORT("IN2")
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AM_RANGE(0x0ff006, 0x0ff007) AM_READ_PORT("IN3") AM_WRITE(sound_command_w)
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AM_RANGE(0x0ff006, 0x0ff007) AM_READ_PORT("IN3") AM_WRITE8(sound_command_w, 0x00ff)
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AM_RANGE(0x0ff008, 0x0ff009) AM_READ_PORT("DSW") AM_WRITE(aerofgt_bg1scrollx_w)
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AM_RANGE(0x0ff00a, 0x0ff00b) AM_READ(pending_command_r) AM_WRITE(aerofgt_bg1scrolly_w)
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AM_RANGE(0x0ff00a, 0x0ff00b) AM_READ8(pending_command_r, 0x00ff) AM_WRITE(aerofgt_bg1scrolly_w)
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AM_RANGE(0x0ff00c, 0x0ff00d) AM_WRITE(aerofgt_bg2scrollx_w)
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AM_RANGE(0x0ff00e, 0x0ff00f) AM_WRITE(aerofgt_bg2scrolly_w)
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ADDRESS_MAP_END
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@ -240,10 +224,10 @@ static ADDRESS_MAP_START( spinlbrk_map, AS_PROGRAM, 16, aerofgt_state )
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AM_RANGE(0xffc000, 0xffc7ff) AM_RAM AM_SHARE("spriteram3")
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AM_RANGE(0xffd000, 0xffd1ff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
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AM_RANGE(0xffe000, 0xffe7ff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
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AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("IN0") AM_WRITE(spinlbrk_gfxbank_w)
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AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("IN0") AM_WRITE8(spinlbrk_gfxbank_w, 0x00ff)
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AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("IN1") AM_WRITE(aerofgt_bg2scrollx_w)
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AM_RANGE(0xfff004, 0xfff005) AM_READ_PORT("DSW")
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AM_RANGE(0xfff006, 0xfff007) AM_WRITE(sound_command_w)
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AM_RANGE(0xfff006, 0xfff007) AM_WRITE8(sound_command_w, 0x00ff)
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// AM_RANGE(0xfff008, 0xfff009) - read when analog inputs are enabled
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// AM_RANGE(0xfff00a, 0xfff00b) /
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ADDRESS_MAP_END
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@ -263,11 +247,11 @@ static ADDRESS_MAP_START( turbofrc_map, AS_PROGRAM, 16, aerofgt_state )
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AM_RANGE(0x0ff000, 0x0ff001) AM_READ_PORT("IN0")
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AM_RANGE(0x0ff002, 0x0ff003) AM_READ_PORT("IN1") AM_WRITE(aerofgt_bg1scrolly_w)
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AM_RANGE(0x0ff004, 0x0ff005) AM_READ_PORT("DSW") AM_WRITE(aerofgt_bg2scrollx_w)
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AM_RANGE(0x0ff006, 0x0ff007) AM_READ(pending_command_r) AM_WRITE(aerofgt_bg2scrolly_w)
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AM_RANGE(0x0ff006, 0x0ff007) AM_READ8(pending_command_r, 0x00ff) AM_WRITE(aerofgt_bg2scrolly_w)
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AM_RANGE(0x0ff008, 0x0ff009) AM_READ_PORT("IN2")
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AM_RANGE(0x0ff008, 0x0ff00b) AM_WRITE(turbofrc_gfxbank_w)
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AM_RANGE(0x0ff00c, 0x0ff00d) AM_WRITENOP /* related to bg2 (written together with the scroll registers) */
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AM_RANGE(0x0ff00e, 0x0ff00f) AM_WRITE(turbofrc_sound_command_w)
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AM_RANGE(0x0ff00e, 0x0ff00f) AM_WRITE8(sound_command_w, 0xff00)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( aerofgtb_map, AS_PROGRAM, 16, aerofgt_state )
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@ -283,10 +267,10 @@ static ADDRESS_MAP_START( aerofgtb_map, AS_PROGRAM, 16, aerofgt_state )
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AM_RANGE(0x0fe000, 0x0fe001) AM_READ_PORT("IN0")
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AM_RANGE(0x0fe002, 0x0fe003) AM_READ_PORT("IN1") AM_WRITE(aerofgt_bg1scrolly_w)
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AM_RANGE(0x0fe004, 0x0fe005) AM_READ_PORT("DSW1") AM_WRITE(aerofgt_bg2scrollx_w)
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AM_RANGE(0x0fe006, 0x0fe007) AM_READ(pending_command_r) AM_WRITE(aerofgt_bg2scrolly_w)
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AM_RANGE(0x0fe006, 0x0fe007) AM_READ8(pending_command_r, 0x00ff) AM_WRITE(aerofgt_bg2scrolly_w)
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AM_RANGE(0x0fe008, 0x0fe009) AM_READ_PORT("DSW2")
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AM_RANGE(0x0fe008, 0x0fe00b) AM_WRITE(turbofrc_gfxbank_w)
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AM_RANGE(0x0fe00e, 0x0fe00f) AM_WRITE(turbofrc_sound_command_w)
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AM_RANGE(0x0fe00e, 0x0fe00f) AM_WRITE8(sound_command_w, 0xff00)
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AM_RANGE(0x0ff000, 0x0fffff) AM_RAM AM_SHARE("rasterram") /* used only for the scroll registers */
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ADDRESS_MAP_END
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@ -309,9 +293,9 @@ static ADDRESS_MAP_START( aerofgt_map, AS_PROGRAM, 16, aerofgt_state )
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AM_RANGE(0xffffa4, 0xffffa5) AM_READ_PORT("SYSTEM")
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AM_RANGE(0xffffa6, 0xffffa7) AM_READ_PORT("DSW1")
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AM_RANGE(0xffffa8, 0xffffa9) AM_READ_PORT("DSW2")
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AM_RANGE(0xffffac, 0xffffad) AM_READ(pending_command_r) AM_WRITENOP /* ??? */
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AM_RANGE(0xffffac, 0xffffad) AM_READ8(pending_command_r, 0x00ff) AM_WRITENOP /* ??? */
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AM_RANGE(0xffffae, 0xffffaf) AM_READ_PORT("DSW3")
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AM_RANGE(0xffffc0, 0xffffc1) AM_WRITE(sound_command_w)
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AM_RANGE(0xffffc0, 0xffffc1) AM_WRITE8(sound_command_w, 0x00ff)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( aerfboot_map, AS_PROGRAM, 16, aerofgt_state )
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@ -332,7 +316,7 @@ static ADDRESS_MAP_START( aerfboot_map, AS_PROGRAM, 16, aerofgt_state )
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AM_RANGE(0x0fe004, 0x0fe005) AM_WRITE(aerofgt_bg2scrollx_w)
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AM_RANGE(0x0fe006, 0x0fe007) AM_WRITE(aerofgt_bg2scrolly_w)
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AM_RANGE(0x0fe008, 0x0fe00b) AM_WRITE(turbofrc_gfxbank_w)
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AM_RANGE(0x0fe00e, 0x0fe00f) AM_WRITE(aerfboot_soundlatch_w)
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AM_RANGE(0x0fe00e, 0x0fe00f) AM_WRITE8(aerfboot_soundlatch_w, 0xff00)
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AM_RANGE(0x0fe010, 0x0fe011) AM_WRITENOP
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AM_RANGE(0x0fe012, 0x0fe013) AM_WRITENOP
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AM_RANGE(0x0fe400, 0x0fe401) AM_WRITENOP
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@ -380,10 +364,10 @@ static ADDRESS_MAP_START( wbbc97_map, AS_PROGRAM, 16, aerofgt_state )
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AM_RANGE(0xffc000, 0xffc3ff) AM_WRITEONLY AM_SHARE("spriteram3")
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AM_RANGE(0xffd000, 0xffdfff) AM_RAM AM_SHARE("rasterram") /* bg1 scroll registers */
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AM_RANGE(0xffe000, 0xffefff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
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AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("IN0") AM_WRITE(pspikes_palette_bank_w)
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AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("IN1") AM_WRITE(pspikes_gfxbank_w)
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AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("IN0") AM_WRITE8(pspikes_palette_bank_w, 0x00ff)
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AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("IN1") AM_WRITE8(pspikes_gfxbank_w, 0x00ff)
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AM_RANGE(0xfff004, 0xfff005) AM_READ_PORT("DSW") AM_WRITE(aerofgt_bg1scrolly_w)
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AM_RANGE(0xfff006, 0xfff007) AM_READNOP AM_WRITE(sound_command_w)
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AM_RANGE(0xfff006, 0xfff007) AM_READNOP AM_WRITE8(sound_command_w, 0x00ff)
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AM_RANGE(0xfff00e, 0xfff00f) AM_WRITE(wbbc97_bitmap_enable_w)
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ADDRESS_MAP_END
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@ -1,5 +1,5 @@
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// license:BSD-3-Clause
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// copyright-holders:Steve Ellenoff,Jarek Parchanski,Vas Crabb
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// copyright-holders:Steve Ellenoff,Jarek Parchanski
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/*
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Great Swordsman (Taito) 1984
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Joshi Volleyball (Taito) 1983
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@ -9,9 +9,9 @@ TODO:
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-joshi volleyball
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-The incomplete graphic
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-The implementation of DAC sound ?
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-MCU hookup is incomplete
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-MCU code DUMP and emulation
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-The true interrupt circuit of SUB CPU
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-unknown ROM (BANK ROM of sub-cpu ?)
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-unknown ROM (BANK ROM of sub-cpu ? )
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Credits:
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- Steve Ellenoff: Original emulation and Mame driver
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@ -146,7 +146,6 @@ reg: 0->1 (main->2nd) / : (1->0) 2nd->main :
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#include "emu.h"
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#include "includes/gsword.h"
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#include "cpu/mcs48/mcs48.h"
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#include "cpu/z80/z80.h"
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#include "machine/i8255.h"
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#include "machine/tait8741.h"
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@ -167,48 +166,20 @@ int gsword_state::coins_in(void)
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}
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#endif
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void gsword_state_base::machine_start()
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{
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save_item(NAME(m_fake8910_0));
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save_item(NAME(m_fake8910_1));
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}
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void gsword_state_base::machine_reset()
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{
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}
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WRITE8_MEMBER(gsword_state_base::ay8910_control_port_0_w)
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{
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m_ay0->address_w(space,offset,data);
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m_fake8910_0 = data;
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}
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WRITE8_MEMBER(gsword_state_base::ay8910_control_port_1_w)
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{
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m_ay1->address_w(space,offset,data);
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m_fake8910_1 = data;
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}
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READ8_MEMBER(gsword_state_base::fake_0_r)
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{
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return m_fake8910_0+1;
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}
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READ8_MEMBER(gsword_state_base::fake_1_r)
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{
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return m_fake8910_1+1;
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}
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#include "cpu/z80/z80.h"
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/* CPU 2 memory hack */
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/* (402E) timeout upcount must be under 0AH */
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/* (4004,4005) clear down counter , if (4004,4005)==0 then (402E)=0 */
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READ8_MEMBER(gsword_state::hack_r)
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READ8_MEMBER(gsword_state::gsword_hack_r)
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{
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u8 const data = m_cpu2_ram[offset + 4];
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uint8_t data = m_cpu2_ram[offset + 4];
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/*if(offset==1)osd_printf_debug("CNT %02X%02X\n",m_cpu2_ram[5],m_cpu2_ram[4]); */
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/* speedup timeout count down */
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if (m_protect_hack)
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if(m_protect_hack)
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{
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switch(offset)
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{
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@ -219,55 +190,7 @@ READ8_MEMBER(gsword_state::hack_r)
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return data;
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}
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WRITE8_MEMBER(gsword_state::nmi_set_w)
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{
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/* osd_printf_debug("AY write %02X\n",data);*/
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m_protect_hack = (data & 0x80) ? false : true;
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#if 0
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/* An actual circuit isn't known. */
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/* write ff,02,ff,fe, 17 x 0d,0f */
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m_nmi_enable = ((data>>7) & (data&1) &1) == 0;
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#else
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switch(data)
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{
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case 0xff:
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m_nmi_enable = false; /* NMI must be disabled */
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break;
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case 0x02:
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m_nmi_enable = false; /* ANY */
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break;
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case 0x0d:
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m_nmi_enable = true;
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break;
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case 0x0f:
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m_nmi_enable = true; /* NMI must be enabled */
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break;
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case 0xfe:
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m_nmi_enable = true; /* NMI must be enabled */
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||||
break;
|
||||
}
|
||||
/* bit1= nmi disable , for ram check */
|
||||
logerror("NMI control %02x\n",data);
|
||||
#endif
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gsword_state::sound_command_w)
|
||||
{
|
||||
m_soundlatch->write(space, 0, data);
|
||||
m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(gsword_state::adpcm_data_w)
|
||||
{
|
||||
m_msm->data_w(data & 0x0f); // bit 0..3
|
||||
m_msm->reset_w(BIT(data, 5)); // bit 5
|
||||
m_msm->vclk_w(BIT(data, 4)); // bit 4
|
||||
}
|
||||
|
||||
READ8_MEMBER(gsword_state::i8741_2_r )
|
||||
READ8_MEMBER(gsword_state::gsword_8741_2_r )
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
@ -284,7 +207,7 @@ READ8_MEMBER(gsword_state::i8741_2_r )
|
||||
return 0;
|
||||
}
|
||||
|
||||
READ8_MEMBER(gsword_state::i8741_3_r )
|
||||
READ8_MEMBER(gsword_state::gsword_8741_3_r )
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
@ -300,166 +223,99 @@ READ8_MEMBER(gsword_state::i8741_3_r )
|
||||
return 0;
|
||||
}
|
||||
|
||||
INTERRUPT_GEN_MEMBER(gsword_state::sound_interrupt)
|
||||
{
|
||||
if (m_nmi_enable)
|
||||
device.execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(gsword_state, gsword)
|
||||
{
|
||||
#if 0
|
||||
uint8_t *ROM2 = memregion("sub")->base();
|
||||
ROM2[0x1da] = 0xc3; /* patch for rom self check */
|
||||
|
||||
ROM2[0x71e] = 0; /* patch for sound protection or time out function */
|
||||
ROM2[0x71f] = 0;
|
||||
#endif
|
||||
#if 1
|
||||
/* hack for sound protection or time out function */
|
||||
m_subcpu->space(AS_PROGRAM).install_read_handler(0x4004, 0x4005, read8_delegate(FUNC(gsword_state::hack_r),this));
|
||||
#endif
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(gsword_state, gsword2)
|
||||
{
|
||||
#if 0
|
||||
uint8_t *ROM2 = memregion("sub")->base();
|
||||
|
||||
ROM2[0x1da] = 0xc3; /* patch for rom self check */
|
||||
ROM2[0x726] = 0; /* patch for sound protection or time out function */
|
||||
ROM2[0x727] = 0;
|
||||
#endif
|
||||
#if 1
|
||||
/* hack for sound protection or time out function */
|
||||
m_subcpu->space(AS_PROGRAM).install_read_handler(0x4004, 0x4005, read8_delegate(FUNC(gsword_state::hack_r),this));
|
||||
#endif
|
||||
}
|
||||
|
||||
void gsword_state::machine_start()
|
||||
{
|
||||
gsword_state_base::machine_start();
|
||||
|
||||
save_item(NAME(m_protect_hack));
|
||||
save_item(NAME(m_fake8910_0));
|
||||
save_item(NAME(m_fake8910_1));
|
||||
save_item(NAME(m_nmi_enable));
|
||||
save_item(NAME(m_protect_hack));
|
||||
}
|
||||
|
||||
void gsword_state::machine_reset()
|
||||
{
|
||||
gsword_state_base::machine_reset();
|
||||
m_coins = 0;
|
||||
|
||||
m_protect_hack = false;
|
||||
m_nmi_enable = false;
|
||||
/* snd CPU mask NMI during reset phase */
|
||||
m_nmi_enable = 0;
|
||||
m_protect_hack = 0;
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(josvolly_state::mcu1_p1_r)
|
||||
INTERRUPT_GEN_MEMBER(gsword_state::gsword_snd_interrupt)
|
||||
{
|
||||
// the two MCUs appear to have port 1 tied together
|
||||
return m_mcu1_p1 & m_mcu2_p1;
|
||||
if(m_nmi_enable)
|
||||
device.execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
|
||||
}
|
||||
|
||||
READ8_MEMBER(josvolly_state::mcu1_p2_r)
|
||||
WRITE8_MEMBER(gsword_state::nmi_set_w)
|
||||
{
|
||||
// p27 needs to float high for the MCU to start in the right mode
|
||||
// p20 and p21 drive the test inputs of the other MCU
|
||||
// if DIPSW1:8 is allowed to pull p27 low, the game won't even boot to test mode
|
||||
// DIPSW1:1 and DIPSW1:2 are shown in test mode, but switching them on will break comms
|
||||
return 0x80U | ioport("DSW1")->read();
|
||||
}
|
||||
/* osd_printf_debug("AY write %02X\n",data);*/
|
||||
|
||||
READ8_MEMBER(josvolly_state::mcu2_p1_r)
|
||||
{
|
||||
// the two MCUs appear to have port 1 tied together
|
||||
return m_mcu1_p1 & m_mcu2_p1;
|
||||
}
|
||||
m_protect_hack = (data&0x80) ? 0 : 1;
|
||||
#if 0
|
||||
/* An actual circuit isn't known. */
|
||||
/* write ff,02,ff,fe, 17 x 0d,0f */
|
||||
m_nmi_enable = ((data>>7) & (data&1) &1) == 0;
|
||||
|
||||
READ8_MEMBER(josvolly_state::mcu2_p2_r)
|
||||
{
|
||||
// p27 needs to be tied low for the MCU to start in the right mode
|
||||
return 0x7fU & ioport("DSW2")->read();
|
||||
}
|
||||
|
||||
READ8_MEMBER(josvolly_state::mcu2_test_r)
|
||||
{
|
||||
// TEST0 and TEST1 are driven by P20 and P21 on the other MCU
|
||||
return BIT(m_mcu1_p2, offset);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(josvolly_state::cpu2_nmi_enable_w)
|
||||
{
|
||||
m_cpu2_nmi_enable = true;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(josvolly_state::cpu2_irq_clear_w)
|
||||
{
|
||||
m_audiocpu->set_input_line(INPUT_LINE_IRQ0, CLEAR_LINE);
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(josvolly_state::mcu1_p1_w)
|
||||
{
|
||||
if (data != m_mcu1_p1)
|
||||
#else
|
||||
switch(data)
|
||||
{
|
||||
logerror("mcu1 p1 = 0x%02x\n", data);
|
||||
m_mcu1_p1 = data;
|
||||
case 0xff:
|
||||
m_nmi_enable = 0; /* NMI must be disabled */
|
||||
break;
|
||||
case 0x02:
|
||||
m_nmi_enable = 0; /* ANY */
|
||||
break;
|
||||
case 0x0d:
|
||||
m_nmi_enable = 1;
|
||||
break;
|
||||
case 0x0f:
|
||||
m_nmi_enable = 1; /* NMI must be enabled */
|
||||
break;
|
||||
case 0xfe:
|
||||
m_nmi_enable = 1; /* NMI must be enabled */
|
||||
break;
|
||||
}
|
||||
/* bit1= nmi disable , for ram check */
|
||||
logerror("NMI control %02x\n",data);
|
||||
#endif
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(josvolly_state::mcu1_p2_w)
|
||||
WRITE8_MEMBER(gsword_state::ay8910_control_port_0_w)
|
||||
{
|
||||
if (data != m_mcu1_p2)
|
||||
{
|
||||
logerror("mcu1 p2 = 0x%02x\n", data);
|
||||
|
||||
// the second CPU somehow gets an NMI when data is available
|
||||
// it's probably implemented by the logic arrays somehow
|
||||
// this is just a hacky guess at how it works
|
||||
if (m_cpu2_nmi_enable && (data & (data ^ m_mcu1_p2) & 0x01))
|
||||
{
|
||||
m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
|
||||
m_cpu2_nmi_enable = false;
|
||||
}
|
||||
|
||||
m_mcu1_p2 = data;
|
||||
}
|
||||
m_ay0->address_w(space,offset,data);
|
||||
m_fake8910_0 = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(josvolly_state::mcu2_p1_w)
|
||||
WRITE8_MEMBER(gsword_state::ay8910_control_port_1_w)
|
||||
{
|
||||
if (data != m_mcu2_p1)
|
||||
{
|
||||
logerror("mcu2 p1 = 0x%02x\n", data);
|
||||
m_mcu2_p1 = data;
|
||||
}
|
||||
m_ay1->address_w(space,offset,data);
|
||||
m_fake8910_1 = data;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(josvolly_state::mcu2_p2_w)
|
||||
READ8_MEMBER(gsword_state::fake_0_r)
|
||||
{
|
||||
logerror("mcu2 p2 = 0x%02x\n", data);
|
||||
return m_fake8910_0+1;
|
||||
}
|
||||
|
||||
void josvolly_state::machine_start()
|
||||
READ8_MEMBER(gsword_state::fake_1_r)
|
||||
{
|
||||
gsword_state_base::machine_start();
|
||||
|
||||
save_item(NAME(m_cpu2_nmi_enable));
|
||||
save_item(NAME(m_mcu1_p1));
|
||||
save_item(NAME(m_mcu1_p2));
|
||||
save_item(NAME(m_mcu2_p1));
|
||||
return m_fake8910_1+1;
|
||||
}
|
||||
|
||||
void josvolly_state::machine_reset()
|
||||
WRITE8_MEMBER(gsword_state::gsword_adpcm_data_w)
|
||||
{
|
||||
gsword_state_base::machine_reset();
|
||||
m_msm->data_w (data & 0x0f); /* bit 0..3 */
|
||||
m_msm->reset_w(BIT(data, 5)); /* bit 5 */
|
||||
m_msm->vclk_w(BIT(data, 4)); /* bit 4 */
|
||||
}
|
||||
|
||||
m_cpu2_nmi_enable = false;
|
||||
m_mcu1_p1 = 0xffU;
|
||||
m_mcu1_p2 = 0xffU;
|
||||
m_mcu2_p1 = 0xffU;
|
||||
WRITE8_MEMBER(gsword_state::adpcm_soundcommand_w)
|
||||
{
|
||||
m_soundlatch->write(space, 0, data);
|
||||
m_audiocpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
|
||||
}
|
||||
|
||||
|
||||
static ADDRESS_MAP_START( cpu1_map, AS_PROGRAM , 8, gsword_state_base )
|
||||
static ADDRESS_MAP_START( cpu1_map, AS_PROGRAM , 8, gsword_state )
|
||||
AM_RANGE(0x0000, 0x8fff) AM_ROM
|
||||
AM_RANGE(0x9000, 0x9fff) AM_RAM
|
||||
AM_RANGE(0xa000, 0xa37f) AM_RAM
|
||||
@ -473,16 +329,21 @@ static ADDRESS_MAP_START( cpu1_map, AS_PROGRAM , 8, gsword_state_base )
|
||||
AM_RANGE(0xb000, 0xb7ff) AM_RAM_WRITE(videoram_w) AM_SHARE("videoram")
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
static ADDRESS_MAP_START( cpu1_io_map, AS_IO, 8, gsword_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x7e, 0x7f) AM_DEVREADWRITE("taito8741", taito8741_4pack_device, read_0, write_0)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( josvolly_cpu1_io_map, AS_IO, 8, gsword_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x7e, 0x7f) AM_DEVREADWRITE("josvolly_8741", josvolly8741_4pack_device, read_0, write_0)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
//
|
||||
static ADDRESS_MAP_START( cpu2_map, AS_PROGRAM, 8, gsword_state )
|
||||
AM_RANGE(0x0000, 0x3fff) AM_ROM
|
||||
AM_RANGE(0x4000, 0x43ff) AM_RAM AM_SHARE("cpu2_ram")
|
||||
AM_RANGE(0x6000, 0x6000) AM_WRITE(sound_command_w)
|
||||
AM_RANGE(0x6000, 0x6000) AM_WRITE(adpcm_soundcommand_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( cpu2_io_map, AS_IO, 8, gsword_state )
|
||||
@ -494,58 +355,44 @@ static ADDRESS_MAP_START( cpu2_io_map, AS_IO, 8, gsword_state )
|
||||
AM_RANGE(0x61, 0x61) AM_DEVREADWRITE("ay1", ay8910_device, data_r, data_w)
|
||||
AM_RANGE(0x80, 0x80) AM_READWRITE(fake_1_r, ay8910_control_port_1_w)
|
||||
AM_RANGE(0x81, 0x81) AM_DEVREADWRITE("ay2", ay8910_device, data_r, data_w)
|
||||
|
||||
//
|
||||
AM_RANGE(0xe0, 0xe0) AM_READNOP /* ?? */
|
||||
AM_RANGE(0xa0, 0xa0) AM_WRITENOP /* ?? */
|
||||
AM_RANGE(0xe0, 0xe0) AM_WRITENOP /* watchdog? */
|
||||
AM_RANGE(0xe0, 0xe0) AM_WRITENOP /* watch dog ?*/
|
||||
ADDRESS_MAP_END
|
||||
|
||||
//
|
||||
|
||||
static ADDRESS_MAP_START( cpu3_map, AS_PROGRAM, 8, gsword_state )
|
||||
AM_RANGE(0x0000, 0x7fff) AM_ROM
|
||||
AM_RANGE(0x8000, 0x8000) AM_WRITE(adpcm_data_w)
|
||||
AM_RANGE(0x8000, 0x8000) AM_WRITE(gsword_adpcm_data_w)
|
||||
AM_RANGE(0xa000, 0xa000) AM_DEVREAD("soundlatch", generic_latch_8_device, read)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
static ADDRESS_MAP_START( josvolly_cpu1_io_map, AS_IO, 8, josvolly_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x7e, 0x7f) AM_DEVREADWRITE("mcu1", upi41_cpu_device, upi41_master_r, upi41_master_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( josvolly_cpu2_map, AS_PROGRAM, 8, josvolly_state )
|
||||
static ADDRESS_MAP_START( josvolly_cpu2_map, AS_PROGRAM, 8, gsword_state )
|
||||
AM_RANGE(0x0000, 0x3fff) AM_ROM
|
||||
AM_RANGE(0x4000, 0x43ff) AM_RAM AM_SHARE("cpu2_ram")
|
||||
|
||||
/* NEC D8255A with silkscreen removed and replaced with "AA 007" */
|
||||
AM_RANGE(0x8000, 0x8003) AM_DEVREADWRITE("aa_007", i8255_device, read, write)
|
||||
AM_RANGE(0x8000, 0x8003) AM_DEVREADWRITE("josvolly_aa_007", i8255_device, read, write)
|
||||
|
||||
// AM_RANGE(0x6000, 0x6000) AM_WRITE(adpcm_soundcommand_w)
|
||||
AM_RANGE(0xA000, 0xA001) AM_DEVREADWRITE("mcu2", upi41_cpu_device, upi41_master_r, upi41_master_w)
|
||||
AM_RANGE(0xA000, 0xA001) AM_DEVREADWRITE("josvolly_8741", josvolly8741_4pack_device, read_1, write_1)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( josvolly_cpu2_io_map, AS_IO, 8, josvolly_state )
|
||||
static ADDRESS_MAP_START( josvolly_cpu2_io_map, AS_IO, 8, gsword_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||
AM_RANGE(0x00, 0x00) AM_READWRITE(fake_0_r, ay8910_control_port_0_w)
|
||||
AM_RANGE(0x01, 0x01) AM_DEVREADWRITE("ay1", ay8910_device, data_r, data_w)
|
||||
AM_RANGE(0x40, 0x40) AM_READWRITE(fake_1_r, ay8910_control_port_1_w)
|
||||
AM_RANGE(0x41, 0x41) AM_DEVREADWRITE("ay2", ay8910_device, data_r, data_w)
|
||||
|
||||
AM_RANGE(0x81, 0x81) AM_WRITE(cpu2_nmi_enable_w);
|
||||
AM_RANGE(0xC1, 0xC1) AM_WRITE(cpu2_irq_clear_w);
|
||||
ADDRESS_MAP_END
|
||||
AM_RANGE(0x81, 0x81) AM_DEVWRITE("josvolly_8741", josvolly8741_4pack_device, nmi_enable_w)
|
||||
AM_RANGE(0xC1, 0xC1) AM_NOP // irq clear
|
||||
|
||||
static ADDRESS_MAP_START( josvolly_mcu1_io_map, AS_IO, 8, josvolly_state )
|
||||
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(mcu1_p1_r, mcu1_p1_w)
|
||||
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(mcu1_p2_r, mcu1_p2_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( josvolly_mcu2_io_map, AS_IO, 8, josvolly_state )
|
||||
AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_READWRITE(mcu2_p1_r, mcu2_p1_w)
|
||||
AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(mcu2_p2_r, mcu2_p2_w)
|
||||
AM_RANGE(MCS48_PORT_T0, MCS48_PORT_T1) AM_READ(mcu2_test_r)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
static INPUT_PORTS_START( gsword )
|
||||
PORT_START("IN0") /* IN0 (8741-2 port1?) */
|
||||
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START1 )
|
||||
@ -692,55 +539,44 @@ static INPUT_PORTS_START( josvolly )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
|
||||
|
||||
PORT_START("DSW1") /* DSW1 */
|
||||
PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unused ) ) PORT_DIPLOCATION("DIPSW1:1")
|
||||
PORT_DIPSETTING( 0x01, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unused ) ) PORT_DIPLOCATION("DIPSW1:2")
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0c, 0x0c, "982E" ) PORT_DIPLOCATION("DIPSW1:3,4")
|
||||
PORT_DIPNAME( 0x0c, 0x00, "DIP1-0c(982E)" )
|
||||
PORT_DIPSETTING( 0x0c, "0" )
|
||||
PORT_DIPSETTING( 0x08, "1" )
|
||||
PORT_DIPSETTING( 0x04, "2" )
|
||||
PORT_DIPSETTING( 0x00, "3" )
|
||||
PORT_DIPNAME( 0x30, 0x30, "982A" ) PORT_DIPLOCATION("DIPSW1:5,6")
|
||||
PORT_DIPSETTING( 0x00, "60" )
|
||||
PORT_DIPSETTING( 0x10, "90" )
|
||||
PORT_DIPSETTING( 0x20, "120" )
|
||||
PORT_DIPSETTING( 0x30, "150" )
|
||||
PORT_DIPNAME( 0x40, 0x40, "TEST_MODE" ) PORT_DIPLOCATION("DIPSW1:7")
|
||||
PORT_DIPSETTING( 0x00, "2" )
|
||||
PORT_DIPSETTING( 0x0c, "3" )
|
||||
PORT_DIPNAME( 0x30, 0x00, "DIP1-30(982A)" )
|
||||
PORT_DIPSETTING( 0x30, "96H" )
|
||||
PORT_DIPSETTING( 0x20, "78H" )
|
||||
PORT_DIPSETTING( 0x10, "5AH" )
|
||||
PORT_DIPSETTING( 0x00, "3CH" )
|
||||
PORT_DIPNAME( 0x40, 0x40, "TEST_MODE" )
|
||||
PORT_DIPSETTING( 0x40, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("DIPSW1:8")
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x80, 0x80, "DIP1-80(982C)" )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( On ) )
|
||||
|
||||
PORT_START("DSW2") /* DSW2 */
|
||||
PORT_DIPNAME( 0x01, 0x01, "982C" ) PORT_DIPLOCATION("DIPSW2:8")
|
||||
PORT_DIPSETTING( 0x01, "0" )
|
||||
PORT_DIPSETTING( 0x00, "1" )
|
||||
PORT_DIPNAME( 0x02, 0x02, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("DIPSW2:7")
|
||||
PORT_DIPSETTING( 0x02, DEF_STR( Upright ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Cocktail ) )
|
||||
PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("DIPSW2:6,5")
|
||||
// PORT_DIPNAME( 0x01, 0x00, "DSW2-0" )
|
||||
// PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
// PORT_DIPSETTING( 0x01, DEF_STR( On ) )
|
||||
// PORT_DIPNAME( 0x02, 0x00, "DSW2-1($9831)" )
|
||||
// PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
|
||||
// PORT_DIPSETTING( 0x02, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0C, 0x0C, DEF_STR( Coin_A ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( 5C_1C ) )
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( 4C_1C ) )
|
||||
PORT_DIPSETTING( 0x04, DEF_STR( 2C_1C ) )
|
||||
PORT_DIPSETTING( 0x0c, DEF_STR( 1C_1C ) )
|
||||
PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("DIPSW2:4,3")
|
||||
PORT_DIPSETTING( 0x0C, DEF_STR( 1C_1C ) )
|
||||
PORT_DIPNAME( 0x30, 0x30, DEF_STR( Coin_B ) )
|
||||
PORT_DIPSETTING( 0x30, DEF_STR( 1C_1C ) )
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) )
|
||||
PORT_DIPSETTING( 0x20, DEF_STR( 1C_4C ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( 1C_5C ) )
|
||||
PORT_DIPNAME( 0x40, 0x40, "9827" ) PORT_DIPLOCATION("DIPSW2:2")
|
||||
PORT_DIPSETTING( 0x40, "1" )
|
||||
PORT_DIPSETTING( 0x00, "3" )
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION("DIPSW2:1")
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
// PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
|
||||
// PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
static const gfx_layout gsword_text =
|
||||
{
|
||||
8,8, /* 8x8 characters */
|
||||
@ -800,7 +636,7 @@ static MACHINE_CONFIG_START( gsword, gsword_state )
|
||||
MCFG_CPU_ADD("sub", Z80, XTAL_18MHz/6) /* verified on pcb */
|
||||
MCFG_CPU_PROGRAM_MAP(cpu2_map)
|
||||
MCFG_CPU_IO_MAP(cpu2_io_map)
|
||||
MCFG_CPU_PERIODIC_INT_DRIVER(gsword_state, sound_interrupt, 4*60)
|
||||
MCFG_CPU_PERIODIC_INT_DRIVER(gsword_state, gsword_snd_interrupt, 4*60)
|
||||
|
||||
MCFG_CPU_ADD("audiocpu", Z80, XTAL_18MHz/6) /* verified on pcb */
|
||||
MCFG_CPU_PROGRAM_MAP(cpu3_map)
|
||||
@ -810,7 +646,7 @@ static MACHINE_CONFIG_START( gsword, gsword_state )
|
||||
MCFG_TAITO8741_ADD("taito8741")
|
||||
MCFG_TAITO8741_MODES(TAITO8741_MASTER,TAITO8741_SLAVE,TAITO8741_PORT,TAITO8741_PORT)
|
||||
MCFG_TAITO8741_CONNECT(1,0,0,0)
|
||||
MCFG_TAITO8741_PORT_HANDLERS(IOPORT("DSW2"),IOPORT("DSW1"),READ8(gsword_state,i8741_2_r),READ8(gsword_state,i8741_3_r))
|
||||
MCFG_TAITO8741_PORT_HANDLERS(IOPORT("DSW2"),IOPORT("DSW1"),READ8(gsword_state,gsword_8741_2_r),READ8(gsword_state,gsword_8741_3_r))
|
||||
#if 1
|
||||
/* to MCU timeout champbbj */
|
||||
MCFG_QUANTUM_TIME(attotime::from_hz(6000))
|
||||
@ -847,32 +683,27 @@ static MACHINE_CONFIG_START( gsword, gsword_state )
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.60)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_START( josvolly, josvolly_state )
|
||||
static MACHINE_CONFIG_START( josvolly, gsword_state )
|
||||
|
||||
/* basic machine hardware */
|
||||
MCFG_CPU_ADD("maincpu", Z80, 18000000/4) /* ? */
|
||||
MCFG_CPU_ADD("maincpu", Z80, 18000000/6) /* ? */
|
||||
MCFG_CPU_PROGRAM_MAP(cpu1_map)
|
||||
MCFG_CPU_IO_MAP(josvolly_cpu1_io_map)
|
||||
MCFG_CPU_PERIODIC_INT_DRIVER(josvolly_state, irq0_line_hold, 2*60)
|
||||
MCFG_CPU_PERIODIC_INT_DRIVER(gsword_state, irq0_line_hold, 2*60)
|
||||
|
||||
MCFG_CPU_ADD("audiocpu", Z80, 12000000/4) /* ? */
|
||||
MCFG_CPU_PROGRAM_MAP(josvolly_cpu2_map)
|
||||
MCFG_CPU_IO_MAP(josvolly_cpu2_io_map)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", josvolly_state, irq0_line_assert)
|
||||
MCFG_CPU_VBLANK_INT_DRIVER("screen", gsword_state, irq0_line_hold)
|
||||
|
||||
MCFG_DEVICE_ADD("mcu1", I8741, 18000000/2) /* ? */
|
||||
MCFG_CPU_IO_MAP(josvolly_mcu1_io_map)
|
||||
|
||||
MCFG_DEVICE_ADD("mcu2", I8741, 12000000/2) /* ? */
|
||||
MCFG_CPU_IO_MAP(josvolly_mcu2_io_map)
|
||||
|
||||
MCFG_DEVICE_ADD("aa_007", I8255, 0)
|
||||
MCFG_DEVICE_ADD("josvolly_aa_007", I8255, 0)
|
||||
MCFG_I8255_IN_PORTA_CB(IOPORT("IN1")) // 1PL
|
||||
MCFG_I8255_IN_PORTB_CB(IOPORT("IN2")) // 2PL / ACK
|
||||
MCFG_I8255_IN_PORTB_CB(IOPORT("IN2")) // 2PL / ACK
|
||||
MCFG_I8255_IN_PORTC_CB(IOPORT("IN0")) // START
|
||||
|
||||
// the second MCU polls the first MCU's outputs, so it needs tight sync
|
||||
MCFG_QUANTUM_PERFECT_CPU("mcu2")
|
||||
MCFG_JOSVOLLY8741_ADD("josvolly_8741")
|
||||
MCFG_JOSVOLLY8741_CONNECT(1,0,0,0)
|
||||
MCFG_JOSVOLLY8741_PORT_HANDLERS(IOPORT("DSW1"),IOPORT("DSW2"),IOPORT("DSW1"),IOPORT("DSW2"))
|
||||
|
||||
|
||||
/* video hardware */
|
||||
@ -881,13 +712,13 @@ static MACHINE_CONFIG_START( josvolly, josvolly_state )
|
||||
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
|
||||
MCFG_SCREEN_SIZE(32*8, 32*8)
|
||||
MCFG_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(josvolly_state, screen_update_gsword)
|
||||
MCFG_SCREEN_UPDATE_DRIVER(gsword_state, screen_update_gsword)
|
||||
MCFG_SCREEN_PALETTE("palette")
|
||||
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", gsword)
|
||||
MCFG_PALETTE_ADD("palette", 64*4+64*4)
|
||||
MCFG_PALETTE_INDIRECT_ENTRIES(256)
|
||||
MCFG_PALETTE_INIT_OWNER(josvolly_state, josvolly)
|
||||
MCFG_PALETTE_INIT_OWNER(gsword_state,josvolly)
|
||||
|
||||
/* sound hardware */
|
||||
MCFG_SPEAKER_STANDARD_MONO("mono")
|
||||
@ -896,6 +727,7 @@ static MACHINE_CONFIG_START( josvolly, josvolly_state )
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
|
||||
|
||||
MCFG_SOUND_ADD("ay2", AY8910, 1500000)
|
||||
MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(gsword_state, nmi_set_w)) /* portA write */
|
||||
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
|
||||
|
||||
#if 0
|
||||
@ -1019,12 +851,11 @@ ROM_START( josvolly )
|
||||
ROM_REGION( 0x04000, "user1", 0 ) /* music data and samples - not sure where it's mapped */
|
||||
ROM_LOAD( "aa0-14.4j", 0x0000, 0x2000, CRC(436fe91f) SHA1(feb29501090c6db911e13ce6e9935ba004b0ce7e) )
|
||||
|
||||
ROM_REGION( 0x400, "mcu1", 0 )
|
||||
// there are other undumped chips on this, not sure how many
|
||||
// not hooked up yet
|
||||
ROM_REGION( 0x400, "mcu", 0 )
|
||||
ROM_LOAD( "aa003.bin", 0x0000, 0x400, CRC(68b399d9) SHA1(053482d12c2b714c23fc80ad0589a2afd258a5a6) )
|
||||
|
||||
ROM_REGION( 0x400, "mcu2", 0 )
|
||||
ROM_LOAD( "aa008.bin", 0x0000, 0x400, CRC(68b399d9) SHA1(053482d12c2b714c23fc80ad0589a2afd258a5a6) BAD_DUMP )
|
||||
|
||||
ROM_REGION( 0x4000, "gfx1", 0 )
|
||||
ROM_LOAD( "aa0-10.9n", 0x0000, 0x2000, CRC(207c4f42) SHA1(4cf2922d55cfc9e68cc07c3252ea3b5619b8aca5) ) /* tiles */
|
||||
ROM_LOAD( "aa1-11.9p", 0x2000, 0x1000, CRC(c130464a) SHA1(9d23577b8aaaffeefff3d8f93668d1b2bd0ba3d9) )
|
||||
@ -1047,7 +878,37 @@ ROM_START( josvolly )
|
||||
ROM_LOAD( "005.3h", 0x0440, 0x0020, CRC(e8d6dec0) SHA1(d15cba9a4b24255d41046b15c2409391ab13ce95) ) /* address decoder? not used */
|
||||
ROM_END
|
||||
|
||||
DRIVER_INIT_MEMBER(gsword_state,gsword)
|
||||
{
|
||||
#if 0
|
||||
uint8_t *ROM2 = memregion("sub")->base();
|
||||
ROM2[0x1da] = 0xc3; /* patch for rom self check */
|
||||
|
||||
GAME( 1983, josvolly, 0, josvolly, josvolly, driver_device, 0, ROT90, "Allumer / Taito Corporation", "Joshi Volleyball", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
|
||||
ROM2[0x71e] = 0; /* patch for sound protection or time out function */
|
||||
ROM2[0x71f] = 0;
|
||||
#endif
|
||||
#if 1
|
||||
/* hack for sound protection or time out function */
|
||||
m_subcpu->space(AS_PROGRAM).install_read_handler(0x4004, 0x4005, read8_delegate(FUNC(gsword_state::gsword_hack_r),this));
|
||||
#endif
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(gsword_state,gsword2)
|
||||
{
|
||||
#if 0
|
||||
uint8_t *ROM2 = memregion("sub")->base();
|
||||
|
||||
ROM2[0x1da] = 0xc3; /* patch for rom self check */
|
||||
ROM2[0x726] = 0; /* patch for sound protection or time out function */
|
||||
ROM2[0x727] = 0;
|
||||
#endif
|
||||
#if 1
|
||||
/* hack for sound protection or time out function */
|
||||
m_subcpu->space(AS_PROGRAM).install_read_handler(0x4004, 0x4005, read8_delegate(FUNC(gsword_state::gsword_hack_r),this));
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
GAME( 1983, josvolly, 0, josvolly, josvolly, driver_device, 0, ROT90, "Allumer / Taito Corporation", "Joshi Volleyball", MACHINE_UNEMULATED_PROTECTION | MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1984, gsword, 0, gsword, gsword, gsword_state, gsword, ROT0, "Allumer / Taito Corporation", "Great Swordsman (World?)", MACHINE_SUPPORTS_SAVE )
|
||||
GAME( 1984, gsword2, gsword, gsword, gsword, gsword_state, gsword2, ROT0, "Allumer / Taito Corporation", "Great Swordsman (Japan?)", MACHINE_SUPPORTS_SAVE )
|
||||
|
||||
@ -175,7 +175,7 @@ MACHINE_CONFIG_END
|
||||
/* ROM definitions */
|
||||
|
||||
ROM_START( rm380z34d )
|
||||
ROM_REGION( 0x10000, RM380Z_MAINCPU_TAG, 0 )
|
||||
ROM_REGION( 0x10000, RM380Z_MAINCPU_TAG, 0 )
|
||||
ROM_LOAD( "cos34d-f.bin", 0x0000, 0x1000, CRC(eb128b40) SHA1(c46f358fb76459987e41750d052995563f2f7d53))
|
||||
// chargen ROM is undumped, afaik
|
||||
ROM_REGION( 0x1680, "chargen", 0 )
|
||||
|
||||
@ -348,7 +348,7 @@ static INPUT_PORTS_START( rohga )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
|
||||
|
||||
PORT_START("DSW")
|
||||
PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3")
|
||||
PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coin_A ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( 3C_1C ) )
|
||||
PORT_DIPSETTING( 0x0001, DEF_STR( 2C_1C ) )
|
||||
PORT_DIPSETTING( 0x0007, DEF_STR( 1C_1C ) )
|
||||
@ -357,7 +357,7 @@ static INPUT_PORTS_START( rohga )
|
||||
PORT_DIPSETTING( 0x0004, DEF_STR( 1C_4C ) )
|
||||
PORT_DIPSETTING( 0x0003, DEF_STR( 1C_5C ) )
|
||||
PORT_DIPSETTING( 0x0002, DEF_STR( 1C_6C ) )
|
||||
PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:4,5,6")
|
||||
PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coin_B ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( 3C_1C ) )
|
||||
PORT_DIPSETTING( 0x0008, DEF_STR( 2C_1C ) )
|
||||
PORT_DIPSETTING( 0x0038, DEF_STR( 1C_1C ) )
|
||||
@ -366,46 +366,54 @@ static INPUT_PORTS_START( rohga )
|
||||
PORT_DIPSETTING( 0x0020, DEF_STR( 1C_4C ) )
|
||||
PORT_DIPSETTING( 0x0018, DEF_STR( 1C_5C ) )
|
||||
PORT_DIPSETTING( 0x0010, DEF_STR( 1C_6C ) )
|
||||
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
|
||||
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Flip_Screen ) )
|
||||
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0080, 0x0080, "2 Credits to Start, 1 to Continue" ) PORT_DIPLOCATION("SW1:8")
|
||||
PORT_DIPNAME( 0x0080, 0x0080, "2 Credits to Start, 1 to Continue" )
|
||||
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPUNUSED_DIPLOC( 0x0100, 0x0100, "SW2:1" ) /* Listed as "Unused" */
|
||||
PORT_DIPUNUSED_DIPLOC( 0x0200, 0x0200, "SW2:2" ) /* Listed as "Unused" */
|
||||
PORT_DIPUNUSED_DIPLOC( 0x0400, 0x0400, "SW2:3" ) /* Listed as "Unused" */
|
||||
PORT_DIPUNUSED_DIPLOC( 0x0800, 0x0800, "SW2:4" ) /* Listed as "Unused" */
|
||||
PORT_DIPNAME( 0x3000, 0x3000, "Player's Vitality" ) PORT_DIPLOCATION("SW2:5,6")
|
||||
PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x3000, 0x3000, "Player's Vitality" )
|
||||
PORT_DIPSETTING( 0x3000, DEF_STR( Normal ) )
|
||||
PORT_DIPSETTING( 0x2000, DEF_STR( Low ) )
|
||||
PORT_DIPSETTING( 0x1000, "Lowest" )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( High ) )
|
||||
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:7")
|
||||
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Allow_Continue ) )
|
||||
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
|
||||
PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Demo_Sounds ) )
|
||||
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
|
||||
PORT_START("DSW3") /* Dip switch bank 3 */
|
||||
PORT_DIPNAME( 0x0001, 0x0001, "Stage Clear Bonus" ) PORT_DIPLOCATION("SW3:1") /* Life Recovery At stage clear */
|
||||
PORT_DIPNAME( 0x0001, 0x0001, "Stage Clear Bonus" ) /* Life Recovery At stage clear */
|
||||
PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
|
||||
PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x000c, 0x000c, "Enemy's Vitality" ) PORT_DIPLOCATION("SW3:3,4")
|
||||
PORT_DIPNAME( 0x000c, 0x000c, "Enemy's Vitality" )
|
||||
PORT_DIPSETTING( 0x0008, DEF_STR( Low ) )
|
||||
PORT_DIPSETTING( 0x000c, DEF_STR( Normal ) )
|
||||
PORT_DIPSETTING( 0x0004, DEF_STR( High ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( Highest ) )
|
||||
PORT_DIPNAME( 0x0030, 0x0030, "Enemy Encounter Rate" ) PORT_DIPLOCATION("SW3:5,6")
|
||||
PORT_DIPNAME( 0x0030, 0x0030, "Enemy Encounter Rate" )
|
||||
PORT_DIPSETTING( 0x0020, DEF_STR( Low ) )
|
||||
PORT_DIPSETTING( 0x0030, DEF_STR( Normal ) )
|
||||
PORT_DIPSETTING( 0x0010, DEF_STR( High ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( Highest ) )
|
||||
PORT_DIPNAME( 0x00c0, 0x00c0, "Enemy's Weapon Speed" ) PORT_DIPLOCATION("SW3:7,8")
|
||||
PORT_DIPNAME( 0x00c0, 0x00c0, "Enemy's Weapon Speed" )
|
||||
PORT_DIPSETTING( 0x0080, "Slow" )
|
||||
PORT_DIPSETTING( 0x00c0, DEF_STR( Normal ) )
|
||||
PORT_DIPSETTING( 0x0040, "Fast" )
|
||||
@ -438,7 +446,7 @@ static INPUT_PORTS_START( wizdfire )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
|
||||
|
||||
PORT_START("DSW")
|
||||
PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3")
|
||||
PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coin_A ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( 3C_1C ) )
|
||||
PORT_DIPSETTING( 0x0001, DEF_STR( 2C_1C ) )
|
||||
PORT_DIPSETTING( 0x0007, DEF_STR( 1C_1C ) )
|
||||
@ -447,7 +455,7 @@ static INPUT_PORTS_START( wizdfire )
|
||||
PORT_DIPSETTING( 0x0004, DEF_STR( 1C_4C ) )
|
||||
PORT_DIPSETTING( 0x0003, DEF_STR( 1C_5C ) )
|
||||
PORT_DIPSETTING( 0x0002, DEF_STR( 1C_6C ) )
|
||||
PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:4,5,6")
|
||||
PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coin_B ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( 3C_1C ) )
|
||||
PORT_DIPSETTING( 0x0008, DEF_STR( 2C_1C ) )
|
||||
PORT_DIPSETTING( 0x0038, DEF_STR( 1C_1C ) )
|
||||
@ -456,31 +464,31 @@ static INPUT_PORTS_START( wizdfire )
|
||||
PORT_DIPSETTING( 0x0020, DEF_STR( 1C_4C ) )
|
||||
PORT_DIPSETTING( 0x0018, DEF_STR( 1C_5C ) )
|
||||
PORT_DIPSETTING( 0x0010, DEF_STR( 1C_6C ) )
|
||||
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
|
||||
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Flip_Screen ) )
|
||||
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0080, 0x0080, "2 Credits to Start, 1 to Continue" ) PORT_DIPLOCATION("SW1:8")
|
||||
PORT_DIPNAME( 0x0080, 0x0080, "2 Credits to Start, 1 to Continue" )
|
||||
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
|
||||
PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Lives ) )
|
||||
PORT_DIPSETTING( 0x0000, "2" )
|
||||
PORT_DIPSETTING( 0x0100, "3" )
|
||||
PORT_DIPSETTING( 0x0300, "4" )
|
||||
PORT_DIPSETTING( 0x0200, "5" )
|
||||
PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:3,4")
|
||||
PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Difficulty ) )
|
||||
PORT_DIPSETTING( 0x0800, DEF_STR( Easy ) )
|
||||
PORT_DIPSETTING( 0x0c00, DEF_STR( Normal ) )
|
||||
PORT_DIPSETTING( 0x0400, DEF_STR( Hard ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
|
||||
PORT_DIPNAME( 0x3000, 0x3000, "Magic Gauge Speed" ) PORT_DIPLOCATION("SW2:5,6")
|
||||
PORT_DIPNAME( 0x3000, 0x3000, "Magic Gauge Speed" )
|
||||
PORT_DIPSETTING( 0x0000, "Very Slow" )
|
||||
PORT_DIPSETTING( 0x1000, "Slow" )
|
||||
PORT_DIPSETTING( 0x3000, DEF_STR( Normal ) )
|
||||
PORT_DIPSETTING( 0x2000, "Fast" )
|
||||
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW2:7")
|
||||
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unused ) )
|
||||
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
|
||||
PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Demo_Sounds ) )
|
||||
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
INPUT_PORTS_END
|
||||
@ -511,7 +519,7 @@ static INPUT_PORTS_START( nitrobal )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
|
||||
|
||||
PORT_START("DSW")
|
||||
PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3")
|
||||
PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coin_A ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( 3C_1C ) )
|
||||
PORT_DIPSETTING( 0x0001, DEF_STR( 2C_1C ) )
|
||||
PORT_DIPSETTING( 0x0007, DEF_STR( 1C_1C ) )
|
||||
@ -520,7 +528,7 @@ static INPUT_PORTS_START( nitrobal )
|
||||
PORT_DIPSETTING( 0x0004, DEF_STR( 1C_4C ) )
|
||||
PORT_DIPSETTING( 0x0003, DEF_STR( 1C_5C ) )
|
||||
PORT_DIPSETTING( 0x0002, DEF_STR( 1C_6C ) )
|
||||
PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:4,5,6")
|
||||
PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coin_B ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( 3C_1C ) )
|
||||
PORT_DIPSETTING( 0x0008, DEF_STR( 2C_1C ) )
|
||||
PORT_DIPSETTING( 0x0038, DEF_STR( 1C_1C ) )
|
||||
@ -529,32 +537,32 @@ static INPUT_PORTS_START( nitrobal )
|
||||
PORT_DIPSETTING( 0x0020, DEF_STR( 1C_4C ) )
|
||||
PORT_DIPSETTING( 0x0018, DEF_STR( 1C_5C ) )
|
||||
PORT_DIPSETTING( 0x0010, DEF_STR( 1C_6C ) )
|
||||
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
|
||||
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Flip_Screen ) )
|
||||
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0080, 0x0080, "2 Credits to Start, 1 to Continue" ) PORT_DIPLOCATION("SW1:8")
|
||||
PORT_DIPNAME( 0x0080, 0x0080, "2 Credits to Start, 1 to Continue" )
|
||||
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
|
||||
PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Lives ) )
|
||||
PORT_DIPSETTING( 0x0100, "1" )
|
||||
PORT_DIPSETTING( 0x0000, "2" )
|
||||
PORT_DIPSETTING( 0x0300, "3" )
|
||||
PORT_DIPSETTING( 0x0200, "4" )
|
||||
PORT_DIPNAME( 0x0c00, 0x0c00, "Difficulty?" ) PORT_DIPLOCATION("SW2:3,4")
|
||||
PORT_DIPNAME( 0x0c00, 0x0c00, "Difficulty?" )
|
||||
PORT_DIPSETTING( 0x0800, DEF_STR( Easy ) )
|
||||
PORT_DIPSETTING( 0x0c00, DEF_STR( Normal ) )
|
||||
PORT_DIPSETTING( 0x0400, DEF_STR( Hard ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
|
||||
PORT_DIPNAME( 0x1000, 0x1000, "Split Coin Chutes" ) PORT_DIPLOCATION("SW2:5")
|
||||
PORT_DIPNAME( 0x1000, 0x1000, "Split Coin Chutes" )
|
||||
PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Players) ) PORT_DIPLOCATION("SW2:6")
|
||||
PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Players) )
|
||||
PORT_DIPSETTING( 0x2000, "2" )
|
||||
PORT_DIPSETTING( 0x0000, "3" )
|
||||
PORT_DIPNAME( 0x4000, 0x4000, "Shot Button to Start" ) PORT_DIPLOCATION("SW2:7")
|
||||
PORT_DIPNAME( 0x4000, 0x4000, "Shot Button to Start" )
|
||||
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
|
||||
PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Demo_Sounds ) )
|
||||
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
|
||||
@ -595,10 +603,10 @@ static INPUT_PORTS_START( schmeisr )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
|
||||
|
||||
PORT_START("DSW")
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:1")
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Flip_Screen ) )
|
||||
PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x000e, 0x000e, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:2,3,4")
|
||||
PORT_DIPNAME( 0x000e, 0x000e, DEF_STR( Coin_A ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( 4C_1C ) )
|
||||
PORT_DIPSETTING( 0x0002, DEF_STR( 3C_1C ) )
|
||||
PORT_DIPSETTING( 0x0004, DEF_STR( 2C_1C ) )
|
||||
@ -607,7 +615,7 @@ static INPUT_PORTS_START( schmeisr )
|
||||
PORT_DIPSETTING( 0x000a, DEF_STR( 1C_3C ) )
|
||||
PORT_DIPSETTING( 0x0008, DEF_STR( 1C_4C ) )
|
||||
PORT_DIPSETTING( 0x0006, DEF_STR( 1C_6C ) )
|
||||
PORT_DIPNAME( 0x0070, 0x0070, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:5,6,7")
|
||||
PORT_DIPNAME( 0x0070, 0x0070, DEF_STR( Coin_B ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( 4C_1C ) )
|
||||
PORT_DIPSETTING( 0x0010, DEF_STR( 3C_1C ) )
|
||||
PORT_DIPSETTING( 0x0020, DEF_STR( 2C_1C ) )
|
||||
@ -616,44 +624,55 @@ static INPUT_PORTS_START( schmeisr )
|
||||
PORT_DIPSETTING( 0x0050, DEF_STR( 1C_3C ) )
|
||||
PORT_DIPSETTING( 0x0040, DEF_STR( 1C_4C ) )
|
||||
PORT_DIPSETTING( 0x0030, DEF_STR( 1C_6C ) )
|
||||
PORT_SERVICE_DIPLOC( 0x0080, IP_ACTIVE_LOW, "SW1:8" )
|
||||
PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
|
||||
PORT_DIPSETTING( 0x0200, DEF_STR( Easy ) )
|
||||
PORT_DIPSETTING( 0x0300, DEF_STR( Normal ) )
|
||||
PORT_DIPSETTING( 0x0100, DEF_STR( Hard ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( Hardest ) )
|
||||
PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:3")
|
||||
PORT_SERVICE( 0x0080, IP_ACTIVE_LOW )
|
||||
PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Demo_Sounds ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0400, DEF_STR( On ) )
|
||||
PORT_DIPUNUSED_DIPLOC( 0x0800, 0x0800, "SW2:4" ) /* Listed as "Unused" */
|
||||
PORT_DIPUNUSED_DIPLOC( 0x1000, 0x1000, "SW2:5" ) /* Listed as "Unused" */
|
||||
PORT_DIPUNUSED_DIPLOC( 0x2000, 0x2000, "SW2:6" ) /* Listed as "Unused" */
|
||||
PORT_DIPUNUSED_DIPLOC( 0x4000, 0x4000, "SW2:7" ) /* Listed as "Unused" */
|
||||
PORT_DIPUNUSED_DIPLOC( 0x8000, 0x8000, "SW2:8" ) /* Listed as "Unused" */
|
||||
PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
|
||||
PORT_START("DSW3") /* Dip switch bank 3 - This bank of switches are _NOT_ shown in the test mode screen */
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:2")
|
||||
PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:3")
|
||||
PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0008, 0x0008, "Debug Mode" ) PORT_DIPLOCATION("SW3:4")
|
||||
PORT_DIPNAME( 0x0008, 0x0008, "Debug Mode" )
|
||||
PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5")
|
||||
PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0020, 0x0020, "Freeze Screen" ) PORT_DIPLOCATION("SW3:6")
|
||||
PORT_DIPNAME( 0x0020, 0x0020, "Freeze Screen" )
|
||||
PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7")
|
||||
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:8")
|
||||
PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
INPUT_PORTS_END
|
||||
@ -686,78 +705,79 @@ static INPUT_PORTS_START( hangzo )
|
||||
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen")
|
||||
|
||||
PORT_START("DSW")
|
||||
PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SW1:1,2,3")
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( 3C_1C ) )
|
||||
PORT_DIPSETTING( 0x0001, DEF_STR( 2C_1C ) )
|
||||
PORT_DIPSETTING( 0x0007, DEF_STR( 1C_1C ) )
|
||||
PORT_DIPSETTING( 0x0006, DEF_STR( 1C_2C ) )
|
||||
PORT_DIPSETTING( 0x0005, DEF_STR( 1C_3C ) )
|
||||
PORT_DIPSETTING( 0x0004, DEF_STR( 1C_4C ) )
|
||||
PORT_DIPSETTING( 0x0003, DEF_STR( 1C_5C ) )
|
||||
PORT_DIPSETTING( 0x0002, DEF_STR( 1C_6C ) )
|
||||
PORT_DIPNAME( 0x0038, 0x0038, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW1:4,5,6")
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( 3C_1C ) )
|
||||
PORT_DIPSETTING( 0x0008, DEF_STR( 2C_1C ) )
|
||||
PORT_DIPSETTING( 0x0038, DEF_STR( 1C_1C ) )
|
||||
PORT_DIPSETTING( 0x0030, DEF_STR( 1C_2C ) )
|
||||
PORT_DIPSETTING( 0x0028, DEF_STR( 1C_3C ) )
|
||||
PORT_DIPSETTING( 0x0020, DEF_STR( 1C_4C ) )
|
||||
PORT_DIPSETTING( 0x0018, DEF_STR( 1C_5C ) )
|
||||
PORT_DIPSETTING( 0x0010, DEF_STR( 1C_6C ) )
|
||||
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0080, 0x0080, "2 Credits to Start, 1 to Continue" ) PORT_DIPLOCATION("SW1:8")
|
||||
PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
|
||||
PORT_DIPNAME( 0x0300, 0x0300, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW2:1,2")
|
||||
PORT_DIPSETTING( 0x0100, "1" )
|
||||
PORT_DIPSETTING( 0x0000, "2" )
|
||||
PORT_DIPSETTING( 0x0300, "3" )
|
||||
PORT_DIPSETTING( 0x0200, "4" )
|
||||
PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:3") /* Either 3 & 4 are Difficulty */
|
||||
PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0400, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:4")
|
||||
PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0800, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:5") /* or more likely 5 & 6 are Player's Vitality like Rohga (all other dips seem to match Rohga) */
|
||||
PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x1000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:6")
|
||||
PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x2000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW2:7")
|
||||
PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x4000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW2:8")
|
||||
PORT_DIPNAME( 0x8000, 0x0000, DEF_STR( Demo_Sounds ) )
|
||||
PORT_DIPSETTING( 0x8000, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
|
||||
PORT_START("DSW3")
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:1")
|
||||
PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0001, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0002, 0x0002, "Freeze Player" ) PORT_DIPLOCATION("SW3:2") /* With on, player will not fall down to playing field and be stuck floating at the top of the screen */
|
||||
PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0002, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0004, 0x0004, "Freeze Frame" ) PORT_DIPLOCATION("SW3:3") /* P1 starts & stops freeze, when frozen P2 is single step frame */
|
||||
PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0004, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:4")
|
||||
PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:5")
|
||||
PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0010, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0020, 0x0020, "Freeze Screen" ) PORT_DIPLOCATION("SW3:6")
|
||||
PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0020, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW3:7")
|
||||
PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0040, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x0080, 0x0080, "Debug Mode" ) PORT_DIPLOCATION("SW3:8")
|
||||
PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
|
||||
PORT_DIPSETTING( 0x0080, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
|
||||
INPUT_PORTS_END
|
||||
@ -1521,7 +1541,6 @@ ROM_START( wolffang ) /* Japan */
|
||||
ROM_LOAD( "hb-00.11p", 0x00000, 0x200, CRC(b7a7baad) SHA1(39781c3412493b985d3616ac31142fc00bbcddf4) ) /* ? */
|
||||
ROM_END
|
||||
|
||||
|
||||
ROM_START( wizdfire )
|
||||
ROM_REGION(0x200000, "maincpu", 0 ) /* 68000 code */
|
||||
ROM_LOAD16_BYTE( "je-01.3d", 0x000000, 0x20000, CRC(b6d62367) SHA1(e9521b28660f62b70e6e33c3e9cf345fc106eff6) ) /* Version 2.1 Over Sea */
|
||||
@ -1794,7 +1813,6 @@ ROM_START( gunball )
|
||||
ROM_LOAD( "jn-00.17l", 0x00000, 0x400, CRC(6ac77b84) SHA1(9e1e2cabdb20b819e592a0f07d15658062227fa4) ) /* Priority (unused) */
|
||||
ROM_END
|
||||
|
||||
|
||||
ROM_START( schmeisr )
|
||||
ROM_REGION(0x100000, "maincpu", 0 ) /* 68000 code */
|
||||
ROM_LOAD16_BYTE( "sr001j.8a", 0x000000, 0x80000, CRC(ed31f3ff) SHA1(3e0ae92a07ef94f377730c19069560bda864a64b) )
|
||||
@ -1831,10 +1849,13 @@ ROM_START( schmeisr )
|
||||
ROM_END
|
||||
|
||||
|
||||
ROM_START( hangzo ) /* Found on a Data East DE-0353-3 PCB */
|
||||
|
||||
|
||||
|
||||
ROM_START( hangzo )
|
||||
ROM_REGION(0x200000, "maincpu", 0 ) /* 68000 code */
|
||||
ROM_LOAD16_BYTE( "Pro0H 12.18.2A.27C1001", 0x000000, 0x20000, CRC(ac8087db) SHA1(518193372cde6024fda96c6ed1862245e0bfb465) )
|
||||
ROM_LOAD16_BYTE( "Pro0H 12.18.2D.27C1001", 0x000001, 0x20000, CRC(a6b7f4f4) SHA1(1b3a00ef124d130317171d9042018fbb30662fec) )
|
||||
ROM_LOAD16_BYTE( "Pro0H 12.18.2A.27C1001", 0x000000, 0x20000, CRC(ac8087db) SHA1(518193372cde6024fda96c6ed1862245e0bfb465) )
|
||||
ROM_LOAD16_BYTE( "Pro0H 12.18.2D.27C1001", 0x000001, 0x20000, CRC(a6b7f4f4) SHA1(1b3a00ef124d130317171d9042018fbb30662fec) )
|
||||
ROM_LOAD16_BYTE( "Pro1H 12.10.4A.27C010", 0x040000, 0x20000, CRC(0d04f43d) SHA1(167b595450f6f9b842dc909f6c61a96fa34b7991) )
|
||||
ROM_LOAD16_BYTE( "Pro1L 12.10.4D.27C010", 0x040001, 0x20000, CRC(2e323918) SHA1(f3d9168f395e835b075dfcbb0464770044d350f3) )
|
||||
ROM_LOAD16_BYTE( "Pro2H 12.10.6A.27C010", 0x080000, 0x20000, CRC(bb3185a6) SHA1(fa4ba7b4b53a5b3486c36441463a290b12c2acbe) )
|
||||
|
||||
@ -78,27 +78,26 @@ public:
|
||||
int m_pending_command;
|
||||
|
||||
/* handlers */
|
||||
DECLARE_WRITE16_MEMBER(sound_command_w);
|
||||
DECLARE_WRITE16_MEMBER(turbofrc_sound_command_w);
|
||||
DECLARE_WRITE16_MEMBER(aerfboot_soundlatch_w);
|
||||
DECLARE_READ16_MEMBER(pending_command_r);
|
||||
DECLARE_WRITE8_MEMBER(sound_command_w);
|
||||
DECLARE_WRITE8_MEMBER(aerfboot_soundlatch_w);
|
||||
DECLARE_READ8_MEMBER(pending_command_r);
|
||||
DECLARE_WRITE8_MEMBER(pending_command_clear_w);
|
||||
DECLARE_WRITE8_MEMBER(aerofgt_sh_bankswitch_w);
|
||||
DECLARE_WRITE8_MEMBER(aerfboot_okim6295_banking_w);
|
||||
DECLARE_WRITE16_MEMBER(aerofgt_bg1videoram_w);
|
||||
DECLARE_WRITE16_MEMBER(aerofgt_bg2videoram_w);
|
||||
DECLARE_WRITE16_MEMBER(pspikes_gfxbank_w);
|
||||
DECLARE_WRITE8_MEMBER(pspikes_gfxbank_w);
|
||||
DECLARE_WRITE16_MEMBER(pspikesb_gfxbank_w);
|
||||
DECLARE_WRITE16_MEMBER(spikes91_lookup_w);
|
||||
DECLARE_WRITE16_MEMBER(karatblz_gfxbank_w);
|
||||
DECLARE_WRITE16_MEMBER(spinlbrk_gfxbank_w);
|
||||
DECLARE_WRITE8_MEMBER(karatblz_gfxbank_w);
|
||||
DECLARE_WRITE8_MEMBER(spinlbrk_gfxbank_w);
|
||||
DECLARE_WRITE16_MEMBER(turbofrc_gfxbank_w);
|
||||
DECLARE_WRITE16_MEMBER(aerofgt_gfxbank_w);
|
||||
DECLARE_WRITE16_MEMBER(aerofgt_bg1scrollx_w);
|
||||
DECLARE_WRITE16_MEMBER(aerofgt_bg1scrolly_w);
|
||||
DECLARE_WRITE16_MEMBER(aerofgt_bg2scrollx_w);
|
||||
DECLARE_WRITE16_MEMBER(aerofgt_bg2scrolly_w);
|
||||
DECLARE_WRITE16_MEMBER(pspikes_palette_bank_w);
|
||||
DECLARE_WRITE8_MEMBER(pspikes_palette_bank_w);
|
||||
DECLARE_WRITE16_MEMBER(wbbc97_bitmap_enable_w);
|
||||
DECLARE_WRITE16_MEMBER(pspikesb_oki_banking_w);
|
||||
DECLARE_WRITE16_MEMBER(aerfboo2_okim6295_banking_w);
|
||||
|
||||
@ -194,32 +194,22 @@ void aerofgt_state::setbank( tilemap_t *tmap, int num, int bank )
|
||||
}
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(aerofgt_state::pspikes_gfxbank_w)
|
||||
WRITE8_MEMBER(aerofgt_state::pspikes_gfxbank_w)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
{
|
||||
setbank(m_bg1_tilemap, 0, (data & 0xf0) >> 4);
|
||||
setbank(m_bg1_tilemap, 1, data & 0x0f);
|
||||
}
|
||||
setbank(m_bg1_tilemap, 0, (data & 0xf0) >> 4);
|
||||
setbank(m_bg1_tilemap, 1, data & 0x0f);
|
||||
}
|
||||
|
||||
|
||||
WRITE16_MEMBER(aerofgt_state::karatblz_gfxbank_w)
|
||||
WRITE8_MEMBER(aerofgt_state::karatblz_gfxbank_w)
|
||||
{
|
||||
if (ACCESSING_BITS_8_15)
|
||||
{
|
||||
setbank(m_bg1_tilemap, 0, (data & 0x0100) >> 8);
|
||||
setbank(m_bg2_tilemap, 1, (data & 0x0800) >> 11);
|
||||
}
|
||||
setbank(m_bg1_tilemap, 0, (data & 0x01));
|
||||
setbank(m_bg2_tilemap, 1, (data & 0x08) >> 3);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(aerofgt_state::spinlbrk_gfxbank_w)
|
||||
WRITE8_MEMBER(aerofgt_state::spinlbrk_gfxbank_w)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
{
|
||||
setbank(m_bg1_tilemap, 0, (data & 0x07));
|
||||
setbank(m_bg2_tilemap, 1, (data & 0x38) >> 3);
|
||||
}
|
||||
setbank(m_bg1_tilemap, 0, (data & 0x07));
|
||||
setbank(m_bg2_tilemap, 1, (data & 0x38) >> 3);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(aerofgt_state::turbofrc_gfxbank_w)
|
||||
@ -264,16 +254,13 @@ WRITE16_MEMBER(aerofgt_state::aerofgt_bg2scrolly_w)
|
||||
COMBINE_DATA(&m_bg2scrolly);
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(aerofgt_state::pspikes_palette_bank_w)
|
||||
WRITE8_MEMBER(aerofgt_state::pspikes_palette_bank_w)
|
||||
{
|
||||
if (ACCESSING_BITS_0_7)
|
||||
m_spritepalettebank = data & 0x03;
|
||||
if (m_charpalettebank != (data & 0x1c) >> 2)
|
||||
{
|
||||
m_spritepalettebank = data & 0x03;
|
||||
if (m_charpalettebank != (data & 0x1c) >> 2)
|
||||
{
|
||||
m_charpalettebank = (data & 0x1c) >> 2;
|
||||
m_bg1_tilemap->mark_all_dirty();
|
||||
}
|
||||
m_charpalettebank = (data & 0x1c) >> 2;
|
||||
m_bg1_tilemap->mark_all_dirty();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user