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https://github.com/holub/mame
synced 2025-04-26 02:07:14 +03:00
via6522: fixed the flank timer value which improved but not completelly reverted the vectrex regression
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7c72a2f441
commit
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@ -405,7 +405,7 @@ void via6522_device::shift_in()
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{
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{
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LOGINT("SHIFT in INT request ");
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LOGINT("SHIFT in INT request ");
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// set_int(INT_SR);// TODO: this interrupt is 1-2 clock cycles too early
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// set_int(INT_SR);// TODO: this interrupt is 1-2 clock cycles too early
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m_shift_irq_timer->adjust(clocks_to_attotime(2)); // Delay IRQ 2 flanks for all shift INs (mode 1-3)
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m_shift_irq_timer->adjust(clocks_to_attotime(2)/2); // Delay IRQ 2 flanks for all shift INs (mode 1-3)
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}
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}
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}
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}
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m_shift_counter = (m_shift_counter - 1) & 0x0f; // Count all flanks
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m_shift_counter = (m_shift_counter - 1) & 0x0f; // Count all flanks
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@ -439,11 +439,11 @@ void via6522_device::device_timer(emu_timer &timer, device_timer_id id, int para
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{
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{
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if (SI_O2_CONTROL(m_acr) || SO_O2_CONTROL(m_acr))
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if (SI_O2_CONTROL(m_acr) || SO_O2_CONTROL(m_acr))
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{
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{
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m_shift_timer->adjust(clocks_to_attotime(1));
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m_shift_timer->adjust(clocks_to_attotime(1) / 2);
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}
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}
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else if (SO_T2_RATE(m_acr) || SO_T2_CONTROL(m_acr) || SI_T2_CONTROL(m_acr))
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else if (SO_T2_RATE(m_acr) || SO_T2_CONTROL(m_acr) || SI_T2_CONTROL(m_acr))
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{
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{
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m_shift_timer->adjust(clocks_to_attotime(m_t2ll + 2));
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m_shift_timer->adjust(clocks_to_attotime(m_t2ll + 2) / 2);
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}
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}
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else // otherwise we stop it
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else // otherwise we stop it
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{
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{
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@ -670,12 +670,12 @@ READ8_MEMBER( via6522_device::read )
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LOGSHIFT(" - ACR: %02x ", m_acr);
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LOGSHIFT(" - ACR: %02x ", m_acr);
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if (SI_O2_CONTROL(m_acr) || SO_O2_CONTROL(m_acr))
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if (SI_O2_CONTROL(m_acr) || SO_O2_CONTROL(m_acr))
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{
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{
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m_shift_timer->adjust(clocks_to_attotime(8)); // 8 flanks to start shifter from a read
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m_shift_timer->adjust(clocks_to_attotime(8) / 2); // 8 flanks to start shifter from a read
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LOGSHIFT(" - read SR starts O2 timer ");
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LOGSHIFT(" - read SR starts O2 timer ");
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}
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}
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else if (SI_T2_CONTROL(m_acr) || SO_T2_CONTROL(m_acr))
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else if (SI_T2_CONTROL(m_acr) || SO_T2_CONTROL(m_acr))
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{
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{
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m_shift_timer->adjust(clocks_to_attotime(m_t2ll + 2));
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m_shift_timer->adjust(clocks_to_attotime(m_t2ll + 2) / 2);
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LOGSHIFT(" - read SR starts T2 timer ");
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LOGSHIFT(" - read SR starts T2 timer ");
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}
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}
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else if (! SO_T2_RATE(m_acr))
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else if (! SO_T2_RATE(m_acr))
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@ -855,12 +855,12 @@ WRITE8_MEMBER( via6522_device::write )
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LOGSHIFT(" - ACR is: %02x ", m_acr);
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LOGSHIFT(" - ACR is: %02x ", m_acr);
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if (SO_O2_CONTROL(m_acr) || SI_O2_CONTROL(m_acr))
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if (SO_O2_CONTROL(m_acr) || SI_O2_CONTROL(m_acr))
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{
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{
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m_shift_timer->adjust(clocks_to_attotime(8)); // 8 flanks to start shifte from a write
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m_shift_timer->adjust(clocks_to_attotime(8) / 2); // 8 flanks to start shifte from a write
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LOGSHIFT(" - write SR starts O2 timer");
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LOGSHIFT(" - write SR starts O2 timer");
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}
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}
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else if (SO_T2_RATE(m_acr) || SO_T2_CONTROL(m_acr) || SI_T2_CONTROL(m_acr))
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else if (SO_T2_RATE(m_acr) || SO_T2_CONTROL(m_acr) || SI_T2_CONTROL(m_acr))
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{
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{
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m_shift_timer->adjust(clocks_to_attotime(m_t2ll + 2));
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m_shift_timer->adjust(clocks_to_attotime(m_t2ll + 2) / 2);
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LOGSHIFT(" - write starts T2 timer");
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LOGSHIFT(" - write starts T2 timer");
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}
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}
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else
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else
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