mirror of
https://github.com/holub/mame
synced 2025-05-19 12:18:56 +03:00
Cleanups and version bump.
This commit is contained in:
Aaron Giles
parent
c57cc3659d
commit
eb2ba6cf6c
2
.gitattributes
vendored
2
.gitattributes
vendored
@ -128,7 +128,7 @@ src/emu/cpu/hd6309/hd6309.c svneol=native#text/plain
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src/emu/cpu/hd6309/hd6309.h svneol=native#text/plain
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src/emu/cpu/hd6309/hd6309.h svneol=native#text/plain
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src/emu/cpu/i386/cycles.h svneol=native#text/plain
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src/emu/cpu/i386/cycles.h svneol=native#text/plain
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src/emu/cpu/i386/i386.c svneol=native#text/plain
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src/emu/cpu/i386/i386.c svneol=native#text/plain
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src/emu/cpu/i386/i386.h svneol=native#text/plain
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src/emu/cpu/i386/i386.h -text svneol=native#text/plain
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src/emu/cpu/i386/i386dasm.c svneol=native#text/plain
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src/emu/cpu/i386/i386dasm.c svneol=native#text/plain
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src/emu/cpu/i386/i386op16.c svneol=native#text/plain
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src/emu/cpu/i386/i386op16.c svneol=native#text/plain
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src/emu/cpu/i386/i386op32.c svneol=native#text/plain
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src/emu/cpu/i386/i386op32.c svneol=native#text/plain
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@ -378,9 +378,9 @@ static DISCRETE_SOUND_START(bzone)
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/* FINAL MIX */
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/* FINAL MIX */
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/************************************************/
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/************************************************/
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/* We won't bother emulating the final gain of op-amp IC K5, pin 14.
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/* We won't bother emulating the final gain of op-amp IC K5, pin 14.
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* There signal never reaches a value where it clips, so we will
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* There signal never reaches a value where it clips, so we will
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* just output the final 16-bit level.
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* just output the final 16-bit level.
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*/
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*/
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/* not sure about pokey output levels - below is just a estimate to get a 5V signal */
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/* not sure about pokey output levels - below is just a estimate to get a 5V signal */
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DISCRETE_INPUTX_STREAM(BZ_POKEY_SND, 0, 5.0 / 11000, 0)
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DISCRETE_INPUTX_STREAM(BZ_POKEY_SND, 0, 5.0 / 11000, 0)
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@ -887,8 +887,8 @@ static DISCRETE_SOUND_START(dkongjr)
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//DISCRETE_INPUT_DATA(DS_DAC)
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//DISCRETE_INPUT_DATA(DS_DAC)
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/************************************************
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/************************************************
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* SOUND0 / SOUND7 -
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* SOUND0 / SOUND7 -
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************************************************/
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************************************************/
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DISCRETE_TASK_START(1)
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DISCRETE_TASK_START(1)
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DISCRETE_LOGIC_INVERT(DS_SOUND7,DS_SOUND7_INV)
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DISCRETE_LOGIC_INVERT(DS_SOUND7,DS_SOUND7_INV)
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@ -935,11 +935,11 @@ DISCRETE_TASK_START(1)
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DISCRETE_74LS624(NODE_118, NODE_117, DK_SUP_V, JR_C19, DISC_LS624_OUT_COUNT_F)
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DISCRETE_74LS624(NODE_118, NODE_117, DK_SUP_V, JR_C19, DISC_LS624_OUT_COUNT_F)
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#endif
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#endif
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//DISCRETE_74LS629(NODE_30, /* IC 5K, pin 7 */
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//DISCRETE_74LS629(NODE_30, /* IC 5K, pin 7 */
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// 1, /* ENAB */
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// 1, /* ENAB */
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// NODE_117, DK_SUP_V, /* VMOD, VRNG */
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// NODE_117, DK_SUP_V, /* VMOD, VRNG */
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// JR_C19, JR_R11, /* C, R_FREQ_IN */
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// JR_C19, JR_R11, /* C, R_FREQ_IN */
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// DISC_LS624_OUT_COUNT_F)
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// DISC_LS624_OUT_COUNT_F)
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//DISCRETE_74LS624(NODE_31, NODE_117, DK_SUP_V, JR_C19, DISC_LS624_OUT_COUNT_F)
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//DISCRETE_74LS624(NODE_31, NODE_117, DK_SUP_V, JR_C19, DISC_LS624_OUT_COUNT_F)
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//DISCRETE_WAVELOG2(NODE_30, 1000,NODE_31, 1000)
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//DISCRETE_WAVELOG2(NODE_30, 1000,NODE_31, 1000)
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@ -948,8 +948,8 @@ DISCRETE_TASK_START(1)
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DISCRETE_TASK_END()
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DISCRETE_TASK_END()
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/************************************************
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/************************************************
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* SOUND1 - Jump
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* SOUND1 - Jump
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************************************************/
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************************************************/
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DISCRETE_TASK_START(2)
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DISCRETE_TASK_START(2)
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/* needs NODE_104 from TASK(1) ready */
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/* needs NODE_104 from TASK(1) ready */
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@ -982,11 +982,11 @@ DISCRETE_TASK_END()
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DISCRETE_TASK_START(1)
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DISCRETE_TASK_START(1)
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/* the noise source clock is a 74LS629 IC 7P, pin 10.
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/* the noise source clock is a 74LS629 IC 7P, pin 10.
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* using JR_C20 as the timing cap, with Freq Control tied to 0V
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* using JR_C20 as the timing cap, with Freq Control tied to 0V
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* and Range tied to 5V. This creates a fixed frequency of 710Hz.
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* and Range tied to 5V. This creates a fixed frequency of 710Hz.
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* So for speed, I breadboarded and measured the frequency.
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* So for speed, I breadboarded and measured the frequency.
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* Oct 2009, D.R.
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* Oct 2009, D.R.
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*/
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*/
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DISCRETE_LFSR_NOISE(NODE_21, 1, 1, 710, 1.0, 0, 0.5, &dkongjr_lfsr)
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DISCRETE_LFSR_NOISE(NODE_21, 1, 1, 710, 1.0, 0, 0.5, &dkongjr_lfsr)
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DISCRETE_LS123_INV(NODE_25, DS_SOUND2_INV, JR_R17, JR_C27)
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DISCRETE_LS123_INV(NODE_25, DS_SOUND2_INV, JR_R17, JR_C27)
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DISCRETE_RCDISC_MODULATED(NODE_26, NODE_25, NODE_21, 120, JR_R24, RES_K(0.001), JR_R18, JR_C29, DK_SUP_V)
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DISCRETE_RCDISC_MODULATED(NODE_26, NODE_25, NODE_21, 120, JR_R24, RES_K(0.001), JR_R18, JR_C29, DK_SUP_V)
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@ -998,8 +998,8 @@ DISCRETE_TASK_START(1)
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DISCRETE_TASK_END()
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DISCRETE_TASK_END()
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/************************************************
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/************************************************
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* SOUND9 - Falling
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* SOUND9 - Falling
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************************************************/
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************************************************/
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DISCRETE_TASK_START(1)
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DISCRETE_TASK_START(1)
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#if (USE_LS629)
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#if (USE_LS629)
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@ -124,7 +124,7 @@
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| |Datum: 12.02.96 | |__________| | | |
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| |Datum: 12.02.96 | |__________| | | |
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| |_________________________| |_______________| |
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| |_________________________| |_______________| |
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| ｴ ____ ___________________ __________________ __ |
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| ? ____ ___________________ __________________ __ |
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| / \ |MGI V GER | | | |H | |
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| / \ |MGI V GER | | | |H | |
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| | Batt | |3.9 / I / 8201 | | ALTERA | | | |
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| | Batt | |3.9 / I / 8201 | | ALTERA | | | |
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| | ery | |M27C2001 | | | |__| |
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| | ery | |M27C2001 | | | |__| |
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@ -1557,7 +1557,7 @@ static WRITE8_HANDLER( gekisha_hopper_w )
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{
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{
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static UINT8 val[2];
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static UINT8 val[2];
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val[offset] = data;
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val[offset] = data;
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// popmessage("%02x %02x",val[0],val[1]);
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// popmessage("%02x %02x",val[0],val[1]);
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}
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}
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@ -1605,7 +1605,7 @@ static WRITE8_HANDLER( gekisha_8000_w )
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case 0x8001: dynax_blit_palette01_w(space, offset - 0x01, data); return;
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case 0x8001: dynax_blit_palette01_w(space, offset - 0x01, data); return;
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// case 0x8002: // ? 1
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// case 0x8002: // ? 1
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case 0x8003: dynax_blit_backpen_w(space, offset - 0x03, data); return;
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case 0x8003: dynax_blit_backpen_w(space, offset - 0x03, data); return;
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@ -1641,9 +1641,9 @@ static WRITE8_HANDLER( gekisha_8000_w )
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case 0x8060: keyb = data; return;
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case 0x8060: keyb = data; return;
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// case 0x8080: // ? 0,1,6 (bit 0 = screen disable?)
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// case 0x8080: // ? 0,1,6 (bit 0 = screen disable?)
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// popmessage("80 = %02x", data);
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// popmessage("80 = %02x", data);
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// break;
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// break;
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}
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}
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}
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}
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logerror("%04x: unmapped offset %04X=%02X written with rombank=%02X\n",cpu_get_pc(space->cpu),offset,data,rombank);
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logerror("%04x: unmapped offset %04X=%02X written with rombank=%02X\n",cpu_get_pc(space->cpu),offset,data,rombank);
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@ -2372,8 +2372,8 @@ static INPUT_PORTS_START( hjingi )
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PORT_DIPSETTING( 0x04, DEF_STR( Medium ) )
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PORT_DIPSETTING( 0x04, DEF_STR( Medium ) )
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PORT_DIPSETTING( 0x03, DEF_STR( Low ) )
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PORT_DIPSETTING( 0x03, DEF_STR( Low ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Very_Low ) )
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PORT_DIPSETTING( 0x02, DEF_STR( Very_Low ) )
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// PORT_DIPSETTING( 0x01, DEF_STR( ) )
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// PORT_DIPSETTING( 0x01, DEF_STR( ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( ) )
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// PORT_DIPSETTING( 0x00, DEF_STR( ) )
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PORT_DIPNAME( 0x08, 0x08, "Payout Rate Change" )
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PORT_DIPNAME( 0x08, 0x08, "Payout Rate Change" )
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PORT_DIPSETTING( 0x08, "Big" )
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PORT_DIPSETTING( 0x08, "Big" )
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PORT_DIPSETTING( 0x00, "Small" )
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PORT_DIPSETTING( 0x00, "Small" )
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@ -2450,12 +2450,12 @@ static INPUT_PORTS_START( hjingi )
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) // 18A
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PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 ) // 18A
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PORT_INCLUDE( HANAFUDA_KEYS_BET )
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PORT_INCLUDE( HANAFUDA_KEYS_BET )
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// PORT_INCLUDE( HANAFUDA_KEYS_BET_ALT )
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// PORT_INCLUDE( HANAFUDA_KEYS_BET_ALT )
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PORT_START("BET")
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PORT_START("BET")
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PORT_CONFNAME( 0x40, 0x40, "Allow Betting" )
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PORT_CONFNAME( 0x40, 0x40, "Allow Betting" )
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PORT_CONFSETTING( 0x40, DEF_STR( Yes ) ) // 2 keyboards, normal bet layout, hopper not pulsing in key test
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PORT_CONFSETTING( 0x40, DEF_STR( Yes ) ) // 2 keyboards, normal bet layout, hopper not pulsing in key test
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// PORT_CONFSETTING( 0x00, DEF_STR( No ) ) // 1 keyboard, alt bet layout, hopper pulsing in key test
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// PORT_CONFSETTING( 0x00, DEF_STR( No ) ) // 1 keyboard, alt bet layout, hopper pulsing in key test
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INPUT_PORTS_END
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INPUT_PORTS_END
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@ -2581,7 +2581,7 @@ static DRIVER_INIT( moonqsr )
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static WRITE8_HANDLER( artic_gfxbank_w )
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static WRITE8_HANDLER( artic_gfxbank_w )
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{
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{
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// printf("artic_gfxbank_w %02x\n",data);
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// printf("artic_gfxbank_w %02x\n",data);
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}
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}
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static DRIVER_INIT( pacmanbl )
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static DRIVER_INIT( pacmanbl )
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@ -2655,7 +2655,7 @@ static DRIVER_INIT( tenspot )
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const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
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const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
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/* these are needed for batman part 2 to work properly, this banking is probably a property of the artic board,
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/* these are needed for batman part 2 to work properly, this banking is probably a property of the artic board,
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which tenspot appears to have copied */
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which tenspot appears to have copied */
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/* video extensions */
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/* video extensions */
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//common_init(machine, galaxian_draw_bullet, galaxian_draw_background, batman2_extend_tile_info, upper_extend_sprite_info);
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//common_init(machine, galaxian_draw_bullet, galaxian_draw_background, batman2_extend_tile_info, upper_extend_sprite_info);
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@ -1,17 +1,17 @@
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/****************************************************************************
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/****************************************************************************
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Go! Go! Connie chan Jaka Jaka Janken
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Go! Go! Connie chan Jaka Jaka Janken
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Driver by Mariusz Wojcieszek
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Driver by Mariusz Wojcieszek
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EC9601
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EC9601
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Hudson Chip
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Hudson Chip
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CPU :Hu6280
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CPU :Hu6280
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Video:Hu6202,Hu6260,Hu6270
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Video:Hu6202,Hu6260,Hu6270
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OSC :21.47727MHz
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OSC :21.47727MHz
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Other:XILINX XC7336-15,OKI M6295
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Other:XILINX XC7336-15,OKI M6295
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****************************************************************************/
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****************************************************************************/
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@ -479,7 +479,7 @@ static ADDRESS_MAP_START( wcat3_map, ADDRESS_SPACE_PROGRAM, 8 )
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AM_RANGE(0xb840, 0xb840) AM_DEVWRITE("ay", ay8910_address_w) /* no sound... only use both ports for DSWs */
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AM_RANGE(0xb840, 0xb840) AM_DEVWRITE("ay", ay8910_address_w) /* no sound... only use both ports for DSWs */
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AM_RANGE(0xb850, 0xb850) AM_WRITE(lucky8_outport_w)
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AM_RANGE(0xb850, 0xb850) AM_WRITE(lucky8_outport_w)
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AM_RANGE(0xb870, 0xb870) AM_DEVWRITE("sn", sn76496_w) /* sound */
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AM_RANGE(0xb870, 0xb870) AM_DEVWRITE("sn", sn76496_w) /* sound */
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// AM_RANGE(0xc000, 0xc003) AM_DEVREADWRITE("ppi8255_3", ppi8255_r, ppi8255_w) /* Other PPI initialized? */
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// AM_RANGE(0xc000, 0xc003) AM_DEVREADWRITE("ppi8255_3", ppi8255_r, ppi8255_w) /* Other PPI initialized? */
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AM_RANGE(0xd000, 0xefff) AM_ROM
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AM_RANGE(0xd000, 0xefff) AM_ROM
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AM_RANGE(0xf000, 0xffff) AM_RAM
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AM_RANGE(0xf000, 0xffff) AM_RAM
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ADDRESS_MAP_END
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ADDRESS_MAP_END
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@ -2633,7 +2633,7 @@ INPUT_PORTS_END
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static INPUT_PORTS_START( ns8lines )
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static INPUT_PORTS_START( ns8lines )
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PORT_START("IN0") /* d800 */
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PORT_START("IN0") /* d800 */
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// PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
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// PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_M) PORT_NAME("IN0-01")
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PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_M) PORT_NAME("IN0-01")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_L) PORT_NAME("IN0-02")
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PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_L) PORT_NAME("IN0-02")
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_CODE(KEYCODE_X) PORT_NAME("P1 - Big / Switch Controls")
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PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_CODE(KEYCODE_X) PORT_NAME("P1 - Big / Switch Controls")
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@ -6429,7 +6429,7 @@ Cherry master type game
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.h7 27256 handwritten 5
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.h7 27256 handwritten 5
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.h8 27256 handwritten 6
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.h8 27256 handwritten 6
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.h10 27256 stickered 7 E.A.I.
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.h10 27256 stickered 7 E.A.I.
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.g13 82s129 stickered G13
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.g13 82s129 stickered G13
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.g14 82s129 stickered G14
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.g14 82s129 stickered G14
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.d12 82s123 handwritten 2
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.d12 82s123 handwritten 2
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.d13 82s123 stickered D13
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.d13 82s123 stickered D13
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@ -6438,7 +6438,7 @@ Cherry master type game
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open 24 pin socket @ B13
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open 24 pin socket @ B13
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Daughter board
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Daughter board
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.u5 27512
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.u5 27512
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Z80 on daughter board
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Z80 on daughter board
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SN76489AN
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SN76489AN
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@ -4,37 +4,37 @@
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and similar board / rom numbering (X**-)
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and similar board / rom numbering (X**-)
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The drivers can probably be merged later, although the current per-game handling of the blitter in
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The drivers can probably be merged later, although the current per-game handling of the blitter in
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homedata.c should be looked at.
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homedata.c should be looked at.
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Notes from Stefan Lindberg:
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Notes from Stefan Lindberg:
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Eprom "x70_a04.5g" had wires attached to it, pin 2 and 16 was joined and pin 1,32,31,30 was joined, i
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Eprom "x70_a04.5g" had wires attached to it, pin 2 and 16 was joined and pin 1,32,31,30 was joined, i
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removed them and read the eprom as the type it was (D27c1000D).
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removed them and read the eprom as the type it was (D27c1000D).
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Measured frequencies:
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Measured frequencies:
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MBL68B09E = 2mhz
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MBL68B09E = 2mhz
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MBL68B09E = 2mhz
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MBL68B09E = 2mhz
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z80 = 4mhz
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z80 = 4mhz
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YM2203 = 2mhz
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YM2203 = 2mhz
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See included PCB pics.
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See included PCB pics.
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Roms:
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Roms:
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Name Size CRC32 Chip Type
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Name Size CRC32 Chip Type
|
||||||
---------------------------------------------------------------------------------
|
---------------------------------------------------------------------------------
|
||||||
x70a07.8l 256 0x7d4c9712 82s129
|
x70a07.8l 256 0x7d4c9712 82s129
|
||||||
x70a08.7l 256 0xc4e77174 82s129
|
x70a08.7l 256 0xc4e77174 82s129
|
||||||
x70a09.6l 256 0xd0187957 82s129
|
x70a09.6l 256 0xd0187957 82s129
|
||||||
x70_a03.8g 32768 0x4e298b2d 27c256
|
x70_a03.8g 32768 0x4e298b2d 27c256
|
||||||
x70_a04.5g 131072 0x14392fdb D27c1000D
|
x70_a04.5g 131072 0x14392fdb D27c1000D
|
||||||
x70_a11.1g 32768 0xb394eef7 27c256
|
x70_a11.1g 32768 0xb394eef7 27c256
|
||||||
x70_b02.12e 32768 0x76c9bb6f 27c256
|
x70_b02.12e 32768 0x76c9bb6f 27c256
|
||||||
x70_c01.14e 65536 0xd79d072d 27c512
|
x70_c01.14e 65536 0xd79d072d 27c512
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -753,7 +753,7 @@
|
|||||||
- Crystal: 1x 18.000 MHz.
|
- Crystal: 1x 18.000 MHz.
|
||||||
|
|
||||||
|
|
||||||
Etched in copper on board: TP2
|
Etched in copper on board: TP2
|
||||||
|
|
||||||
.U30 2732a ; stickered (c) 1993 MICRO MFG TURBO POKER CHAR, ROM.
|
.U30 2732a ; stickered (c) 1993 MICRO MFG TURBO POKER CHAR, ROM.
|
||||||
|
|
||||||
@ -1197,12 +1197,12 @@ static WRITE8_DEVICE_HANDLER( counterlamps_w )
|
|||||||
|
|
||||||
//static READ8_DEVICE_HANDLER( ppi2_portc_r )
|
//static READ8_DEVICE_HANDLER( ppi2_portc_r )
|
||||||
//{
|
//{
|
||||||
// return;
|
// return;
|
||||||
//}
|
//}
|
||||||
|
|
||||||
//static WRITE8_DEVICE_HANDLER( ppi2_portc_w )
|
//static WRITE8_DEVICE_HANDLER( ppi2_portc_w )
|
||||||
//{
|
//{
|
||||||
// /* PC0-PC2 don't seems to be connected to any output */
|
// /* PC0-PC2 don't seems to be connected to any output */
|
||||||
//}
|
//}
|
||||||
|
|
||||||
|
|
||||||
@ -1224,8 +1224,8 @@ static WRITE8_HANDLER( vram_data_w )
|
|||||||
np_vram[np_addr] = data & 0xff;
|
np_vram[np_addr] = data & 0xff;
|
||||||
|
|
||||||
/* trigger 8255-2 port C bit 7 (/OBF) */
|
/* trigger 8255-2 port C bit 7 (/OBF) */
|
||||||
// i8255a_pc7_w(devtag_get_device(device->machine, "ppi8255_2"), 0);
|
// i8255a_pc7_w(devtag_get_device(device->machine, "ppi8255_2"), 0);
|
||||||
// i8255a_pc7_w(devtag_get_device(device->machine, "ppi8255_2"), 1);
|
// i8255a_pc7_w(devtag_get_device(device->machine, "ppi8255_2"), 1);
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -1290,7 +1290,7 @@ static ADDRESS_MAP_START( norautp_portmap, ADDRESS_SPACE_IO, 8 )
|
|||||||
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
ADDRESS_MAP_GLOBAL_MASK(0xff)
|
||||||
AM_RANGE(0x60, 0x63) AM_MIRROR(0x1c) AM_DEVREADWRITE("ppi8255_0", i8255a_r, i8255a_w)
|
AM_RANGE(0x60, 0x63) AM_MIRROR(0x1c) AM_DEVREADWRITE("ppi8255_0", i8255a_r, i8255a_w)
|
||||||
AM_RANGE(0xa0, 0xa3) AM_MIRROR(0x1c) AM_DEVREADWRITE("ppi8255_1", i8255a_r, i8255a_w)
|
AM_RANGE(0xa0, 0xa3) AM_MIRROR(0x1c) AM_DEVREADWRITE("ppi8255_1", i8255a_r, i8255a_w)
|
||||||
// AM_RANGE(0xc0, 0xc3) AM_MIRROR(0x3c) AM_DEVREADWRITE("ppi8255_2", i8255a_r, i8255a_w)
|
// AM_RANGE(0xc0, 0xc3) AM_MIRROR(0x3c) AM_DEVREADWRITE("ppi8255_2", i8255a_r, i8255a_w)
|
||||||
AM_RANGE(0xc0, 0xc0) AM_MIRROR(0x3c) AM_READWRITE(vram_data_r, vram_data_w)
|
AM_RANGE(0xc0, 0xc0) AM_MIRROR(0x3c) AM_READWRITE(vram_data_r, vram_data_w)
|
||||||
AM_RANGE(0xc1, 0xc1) AM_MIRROR(0x3c) AM_WRITE(vram_addr_w)
|
AM_RANGE(0xc1, 0xc1) AM_MIRROR(0x3c) AM_WRITE(vram_addr_w)
|
||||||
AM_RANGE(0xc2, 0xc2) AM_MIRROR(0x3c) AM_READ(test_r)
|
AM_RANGE(0xc2, 0xc2) AM_MIRROR(0x3c) AM_READ(test_r)
|
||||||
@ -1348,7 +1348,7 @@ static ADDRESS_MAP_START( dphla_map, ADDRESS_SPACE_PROGRAM, 8 )
|
|||||||
ADDRESS_MAP_END
|
ADDRESS_MAP_END
|
||||||
|
|
||||||
static ADDRESS_MAP_START( dphltest_map, ADDRESS_SPACE_PROGRAM, 8 )
|
static ADDRESS_MAP_START( dphltest_map, ADDRESS_SPACE_PROGRAM, 8 )
|
||||||
// ADDRESS_MAP_GLOBAL_MASK(0x7fff) /* A15 not connected */
|
// ADDRESS_MAP_GLOBAL_MASK(0x7fff) /* A15 not connected */
|
||||||
AM_RANGE(0x0000, 0x6fff) AM_ROM
|
AM_RANGE(0x0000, 0x6fff) AM_ROM
|
||||||
AM_RANGE(0x7000, 0x7fff) AM_RAM
|
AM_RANGE(0x7000, 0x7fff) AM_RAM
|
||||||
AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
|
AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
|
||||||
@ -1612,12 +1612,12 @@ static I8255A_INTERFACE (ppi8255_intf_1)
|
|||||||
//{
|
//{
|
||||||
/* (c0-c3) Group A Mode 2 (5-lines handshacked bidirectional port)
|
/* (c0-c3) Group A Mode 2 (5-lines handshacked bidirectional port)
|
||||||
Group B Mode 0, output; (see below for lines PC0-PC2) */
|
Group B Mode 0, output; (see below for lines PC0-PC2) */
|
||||||
// DEVCB_HANDLER(vram_data_r), /* Port A read (VRAM data read)*/
|
// DEVCB_HANDLER(vram_data_r), /* Port A read (VRAM data read)*/
|
||||||
// DEVCB_NULL, /* Port B read */
|
// DEVCB_NULL, /* Port B read */
|
||||||
// DEVCB_HANDLER(ppi2_portc_r), /* Port C read */
|
// DEVCB_HANDLER(ppi2_portc_r), /* Port C read */
|
||||||
// DEVCB_HANDLER(vram_data_w), /* Port A write (VRAM data write) */
|
// DEVCB_HANDLER(vram_data_w), /* Port A write (VRAM data write) */
|
||||||
// DEVCB_HANDLER(vram_addr_w), /* Port B write (VRAM address write) */
|
// DEVCB_HANDLER(vram_addr_w), /* Port B write (VRAM address write) */
|
||||||
// DEVCB_HANDLER(ppi2_portc_w) /* Port C write */
|
// DEVCB_HANDLER(ppi2_portc_w) /* Port C write */
|
||||||
|
|
||||||
/* PPI-2 is configured as mixed mode2 and mode0 output.
|
/* PPI-2 is configured as mixed mode2 and mode0 output.
|
||||||
It means that port A should be bidirectional and port B just as output.
|
It means that port A should be bidirectional and port B just as output.
|
||||||
@ -1640,7 +1640,7 @@ static MACHINE_DRIVER_START( noraut_base )
|
|||||||
/* 3x 8255 */
|
/* 3x 8255 */
|
||||||
MDRV_I8255A_ADD( "ppi8255_0", ppi8255_intf_0 )
|
MDRV_I8255A_ADD( "ppi8255_0", ppi8255_intf_0 )
|
||||||
MDRV_I8255A_ADD( "ppi8255_1", ppi8255_intf_1 )
|
MDRV_I8255A_ADD( "ppi8255_1", ppi8255_intf_1 )
|
||||||
// MDRV_I8255A_ADD( "ppi8255_2", ppi8255_intf_2 )
|
// MDRV_I8255A_ADD( "ppi8255_2", ppi8255_intf_2 )
|
||||||
|
|
||||||
/* video hardware */
|
/* video hardware */
|
||||||
MDRV_SCREEN_ADD("screen", RASTER)
|
MDRV_SCREEN_ADD("screen", RASTER)
|
||||||
@ -1961,7 +1961,7 @@ ROM_START( dphl )
|
|||||||
ROM_LOAD( "dphl_36e3.u18", 0x1000, 0x1000, CRC(06cf6789) SHA1(587d883c399348b518e3be4d1dc2581824055328) )
|
ROM_LOAD( "dphl_36e3.u18", 0x1000, 0x1000, CRC(06cf6789) SHA1(587d883c399348b518e3be4d1dc2581824055328) )
|
||||||
|
|
||||||
ROM_REGION( 0x1000, "gfx", 0 )
|
ROM_REGION( 0x1000, "gfx", 0 )
|
||||||
// ROM_FILL( 0x0000, 0x0800, 0xff )
|
// ROM_FILL( 0x0000, 0x0800, 0xff )
|
||||||
ROM_LOAD( "dphl_model_2_cgi_3939.u31", 0x0000, 0x1000, CRC(2028db2c) SHA1(0f81bb71e88c60df3817f58c28715ce2ea01ad4d) )
|
ROM_LOAD( "dphl_model_2_cgi_3939.u31", 0x0000, 0x1000, CRC(2028db2c) SHA1(0f81bb71e88c60df3817f58c28715ce2ea01ad4d) )
|
||||||
|
|
||||||
ROM_REGION( 0x0100, "proms", 0 )
|
ROM_REGION( 0x0100, "proms", 0 )
|
||||||
@ -2118,51 +2118,51 @@ ROM_END
|
|||||||
*/
|
*/
|
||||||
static DRIVER_INIT( norautrh )
|
static DRIVER_INIT( norautrh )
|
||||||
{
|
{
|
||||||
// UINT8 *ROM = memory_region(machine, "maincpu");
|
// UINT8 *ROM = memory_region(machine, "maincpu");
|
||||||
// ROM[0x1110] = 0x00;
|
// ROM[0x1110] = 0x00;
|
||||||
// ROM[0x1111] = 0x00;
|
// ROM[0x1111] = 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
static DRIVER_INIT( norautpn )
|
static DRIVER_INIT( norautpn )
|
||||||
{
|
{
|
||||||
// UINT8 *ROM = memory_region(machine, "maincpu");
|
// UINT8 *ROM = memory_region(machine, "maincpu");
|
||||||
// ROM[0x0827] = 0x00;
|
// ROM[0x0827] = 0x00;
|
||||||
// ROM[0x0828] = 0x00;
|
// ROM[0x0828] = 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
static DRIVER_INIT( norautu )
|
static DRIVER_INIT( norautu )
|
||||||
{
|
{
|
||||||
// UINT8 *ROM = memory_region(machine, "maincpu");
|
// UINT8 *ROM = memory_region(machine, "maincpu");
|
||||||
// ROM[0x083c] = 0x00;
|
// ROM[0x083c] = 0x00;
|
||||||
// ROM[0x083d] = 0x00;
|
// ROM[0x083d] = 0x00;
|
||||||
// ROM[0x083e] = 0x00;
|
// ROM[0x083e] = 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
static DRIVER_INIT( gtipoker )
|
static DRIVER_INIT( gtipoker )
|
||||||
{
|
{
|
||||||
// UINT8 *ROM = memory_region(machine, "maincpu");
|
// UINT8 *ROM = memory_region(machine, "maincpu");
|
||||||
// ROM[0x0cc6] = 0x00;
|
// ROM[0x0cc6] = 0x00;
|
||||||
// ROM[0x0cc7] = 0x00;
|
// ROM[0x0cc7] = 0x00;
|
||||||
// ROM[0x0cc8] = 0x00;
|
// ROM[0x0cc8] = 0x00;
|
||||||
// ROM[0x10a5] = 0x00;
|
// ROM[0x10a5] = 0x00;
|
||||||
// ROM[0x10a6] = 0x00;
|
// ROM[0x10a6] = 0x00;
|
||||||
// ROM[0x10a7] = 0x00;
|
// ROM[0x10a7] = 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
static DRIVER_INIT( dphl )
|
static DRIVER_INIT( dphl )
|
||||||
{
|
{
|
||||||
// UINT8 *ROM = memory_region(machine, "maincpu");
|
// UINT8 *ROM = memory_region(machine, "maincpu");
|
||||||
// ROM[0x1510] = 0x00;
|
// ROM[0x1510] = 0x00;
|
||||||
// ROM[0x1511] = 0x00;
|
// ROM[0x1511] = 0x00;
|
||||||
// ROM[0x1512] = 0x00;
|
// ROM[0x1512] = 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
static DRIVER_INIT( dphla )
|
static DRIVER_INIT( dphla )
|
||||||
{
|
{
|
||||||
// UINT8 *ROM = memory_region(machine, "maincpu");
|
// UINT8 *ROM = memory_region(machine, "maincpu");
|
||||||
// ROM[0x0b09] = 0x00;
|
// ROM[0x0b09] = 0x00;
|
||||||
// ROM[0x0b0a] = 0x00;
|
// ROM[0x0b0a] = 0x00;
|
||||||
// ROM[0x0b0b] = 0x00;
|
// ROM[0x0b0b] = 0x00;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -229,7 +229,7 @@ ROM_REGION( 0x100000, "maincpu", 0 ) /* 68k */
|
|||||||
DISK_IMAGE("step3", 0, NO_DUMP)
|
DISK_IMAGE("step3", 0, NO_DUMP)
|
||||||
ROM_END
|
ROM_END
|
||||||
|
|
||||||
//GAME( 1999, stepstag, 0, stepstag, stepstag, 0, ROT0, "Jaleco", "Stepping Stage", GAME_NO_SOUND| GAME_NOT_WORKING) // Original Game
|
//GAME( 1999, stepstag, 0, stepstag, stepstag, 0, ROT0, "Jaleco", "Stepping Stage", GAME_NO_SOUND| GAME_NOT_WORKING) // Original Game
|
||||||
GAME( 1999, stepstag, 0, stepstag, stepstag, 0, ROT0, "Jaleco", "Stepping Stage Special", GAME_NO_SOUND| GAME_NOT_WORKING)
|
GAME( 1999, stepstag, 0, stepstag, stepstag, 0, ROT0, "Jaleco", "Stepping Stage Special", GAME_NO_SOUND| GAME_NOT_WORKING)
|
||||||
//GAME( 1999, stepstag, 0, stepstag, stepstag, 0, ROT0, "Jaleco", "Stepping Stage 2 Supreme", GAME_NO_SOUND| GAME_NOT_WORKING)
|
//GAME( 1999, stepstag, 0, stepstag, stepstag, 0, ROT0, "Jaleco", "Stepping Stage 2 Supreme", GAME_NO_SOUND| GAME_NOT_WORKING)
|
||||||
GAME( 1999, step3, 0, stepstag, stepstag, 0, ROT0, "Jaleco", "Stepping 3 Superior", GAME_NO_SOUND| GAME_NOT_WORKING)
|
GAME( 1999, step3, 0, stepstag, stepstag, 0, ROT0, "Jaleco", "Stepping 3 Superior", GAME_NO_SOUND| GAME_NOT_WORKING)
|
||||||
|
|||||||
@ -1892,7 +1892,7 @@ READ32_HANDLER( n64_si_reg_r )
|
|||||||
{
|
{
|
||||||
switch (offset)
|
switch (offset)
|
||||||
{
|
{
|
||||||
//case 0x00/4: // SI_DRAM_ADDR_REG
|
//case 0x00/4: // SI_DRAM_ADDR_REG
|
||||||
//return si_dram_addr;
|
//return si_dram_addr;
|
||||||
|
|
||||||
case 0x18/4: // SI_STATUS_REG
|
case 0x18/4: // SI_STATUS_REG
|
||||||
|
|||||||
@ -10,4 +10,4 @@
|
|||||||
***************************************************************************/
|
***************************************************************************/
|
||||||
|
|
||||||
extern const char build_version[];
|
extern const char build_version[];
|
||||||
const char build_version[] = "0.134u3 ("__DATE__")";
|
const char build_version[] = "0.134u4 ("__DATE__")";
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user