b5000: rename base class to rw5000

This commit is contained in:
hap 2022-03-28 23:52:01 +02:00
parent 19fe9e23a6
commit eb7bfe8450
29 changed files with 228 additions and 220 deletions

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@ -2853,29 +2853,29 @@ if opt_tool(CPUS, "SUPERFX") then
end end
-------------------------------------------------- --------------------------------------------------
-- Rockwell B5000 family -- Rockwell A/B5000 family
--@src/devices/cpu/b5000/b5000.h,CPUS["B5000"] = true --@src/devices/cpu/rw5000/b5000.h,CPUS["RW5000"] = true
--@src/devices/cpu/b5000/b6000.h,CPUS["B5000"] = true --@src/devices/cpu/rw5000/b6000.h,CPUS["RW5000"] = true
--@src/devices/cpu/b5000/b6100.h,CPUS["B5000"] = true --@src/devices/cpu/rw5000/b6100.h,CPUS["RW5000"] = true
-------------------------------------------------- --------------------------------------------------
if CPUS["B5000"] then if CPUS["RW5000"] then
files { files {
MAME_DIR .. "src/devices/cpu/b5000/b5000base.cpp", MAME_DIR .. "src/devices/cpu/rw5000/rw5000base.cpp",
MAME_DIR .. "src/devices/cpu/b5000/b5000base.h", MAME_DIR .. "src/devices/cpu/rw5000/rw5000base.h",
MAME_DIR .. "src/devices/cpu/b5000/b5000.cpp", MAME_DIR .. "src/devices/cpu/rw5000/b5000.cpp",
MAME_DIR .. "src/devices/cpu/b5000/b5000.h", MAME_DIR .. "src/devices/cpu/rw5000/b5000.h",
MAME_DIR .. "src/devices/cpu/b5000/b5000op.cpp", MAME_DIR .. "src/devices/cpu/rw5000/b5000op.cpp",
MAME_DIR .. "src/devices/cpu/b5000/b6000.cpp", MAME_DIR .. "src/devices/cpu/rw5000/b6000.cpp",
MAME_DIR .. "src/devices/cpu/b5000/b6000.h", MAME_DIR .. "src/devices/cpu/rw5000/b6000.h",
MAME_DIR .. "src/devices/cpu/b5000/b6100.cpp", MAME_DIR .. "src/devices/cpu/rw5000/b6100.cpp",
MAME_DIR .. "src/devices/cpu/b5000/b6100.h", MAME_DIR .. "src/devices/cpu/rw5000/b6100.h",
} }
end end
if opt_tool(CPUS, "B5000") then if opt_tool(CPUS, "RW5000") then
table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/b5000/b5000d.cpp") table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/rw5000/rw5000d.cpp")
table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/b5000/b5000d.h") table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/rw5000/rw5000d.h")
end end
-------------------------------------------------- --------------------------------------------------

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@ -120,7 +120,7 @@ CPUS["UNSP"] = true
CPUS["HCD62121"] = true CPUS["HCD62121"] = true
CPUS["PPS4"] = true CPUS["PPS4"] = true
--CPUS["PPS41"] = true --CPUS["PPS41"] = true
--CPUS["B5000"] = true --CPUS["RW5000"] = true
CPUS["UPD7725"] = true CPUS["UPD7725"] = true
CPUS["HD61700"] = true CPUS["HD61700"] = true
CPUS["LC8670"] = true CPUS["LC8670"] = true

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@ -123,7 +123,7 @@ CPUS["UNSP"] = true
CPUS["HCD62121"] = true CPUS["HCD62121"] = true
CPUS["PPS4"] = true CPUS["PPS4"] = true
CPUS["PPS41"] = true CPUS["PPS41"] = true
CPUS["B5000"] = true CPUS["RW5000"] = true
CPUS["UPD7725"] = true CPUS["UPD7725"] = true
CPUS["HD61700"] = true CPUS["HD61700"] = true
CPUS["LC8670"] = true CPUS["LC8670"] = true
@ -3590,8 +3590,8 @@ files {
MAME_DIR .. "src/mame/includes/aim65.h", MAME_DIR .. "src/mame/includes/aim65.h",
MAME_DIR .. "src/mame/machine/aim65.cpp", MAME_DIR .. "src/mame/machine/aim65.cpp",
MAME_DIR .. "src/mame/drivers/aim65_40.cpp", MAME_DIR .. "src/mame/drivers/aim65_40.cpp",
MAME_DIR .. "src/mame/drivers/hh_b5000.cpp",
MAME_DIR .. "src/mame/drivers/hh_pps41.cpp", MAME_DIR .. "src/mame/drivers/hh_pps41.cpp",
MAME_DIR .. "src/mame/drivers/hh_rw5000.cpp",
} }
createMESSProjects(_target, _subtarget, "rtpc") createMESSProjects(_target, _subtarget, "rtpc")

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@ -27,7 +27,7 @@ void m58846_device::data_128x4(address_map &map)
// device definitions // device definitions
m58846_device::m58846_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) m58846_device::m58846_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: melps4_cpu_device(mconfig, M58846, tag, owner, clock, 11, address_map_constructor(FUNC(m58846_device::program_2kx9), this), 7, address_map_constructor(FUNC(m58846_device::data_128x4), this), 12 /* number of D pins */, 2 /* subroutine page */, 1 /* interrupt page */), m_timer(nullptr) : melps4_cpu_device(mconfig, M58846, tag, owner, clock, 11, address_map_constructor(FUNC(m58846_device::program_2kx9), this), 7, address_map_constructor(FUNC(m58846_device::data_128x4), this), 12 /* number of D pins */, 2 /* subroutine page */, 1 /* interrupt page */), m_timer(nullptr)
{ } { }
@ -93,7 +93,7 @@ void m58846_device::device_timer(emu_timer &timer, device_timer_id id, int param
reset_timer(); reset_timer();
} }
void m58846_device::write_v(uint8_t data) void m58846_device::write_v(u8 data)
{ {
// d0: enable timer 1 irq // d0: enable timer 1 irq
// d1: enable timer 2 irq? (TODO) // d1: enable timer 2 irq? (TODO)

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@ -19,7 +19,7 @@
class m58846_device : public melps4_cpu_device class m58846_device : public melps4_cpu_device
{ {
public: public:
m58846_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); m58846_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected: protected:
// device-level overrides // device-level overrides
@ -31,7 +31,7 @@ protected:
// timers // timers
virtual void device_timer(emu_timer &timer, device_timer_id id, int param) override; virtual void device_timer(emu_timer &timer, device_timer_id id, int param) override;
virtual void write_v(uint8_t data) override; virtual void write_v(u8 data) override;
void data_128x4(address_map &map); void data_128x4(address_map &map);
void program_2kx9(address_map &map); void program_2kx9(address_map &map);

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@ -43,7 +43,7 @@
#include "debugger.h" #include "debugger.h"
melps4_cpu_device::melps4_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, int d_pins, uint8_t sm_page, uint8_t int_page) melps4_cpu_device::melps4_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, int d_pins, u8 sm_page, u8 int_page)
: cpu_device(mconfig, type, tag, owner, clock) : cpu_device(mconfig, type, tag, owner, clock)
, m_program_config("program", ENDIANNESS_LITTLE, 16, prgwidth, -1, program) , m_program_config("program", ENDIANNESS_LITTLE, 16, prgwidth, -1, program)
, m_data_config("data", ENDIANNESS_LITTLE, 8, datawidth, 0, data) , m_data_config("data", ENDIANNESS_LITTLE, 8, datawidth, 0, data)
@ -274,7 +274,7 @@ void melps4_cpu_device::device_reset()
// i/o handling // i/o handling
//------------------------------------------------- //-------------------------------------------------
uint8_t melps4_cpu_device::read_gen_port(int port) u8 melps4_cpu_device::read_gen_port(int port)
{ {
// input generic port // input generic port
switch (port) switch (port)
@ -291,7 +291,7 @@ uint8_t melps4_cpu_device::read_gen_port(int port)
return 0; return 0;
} }
void melps4_cpu_device::write_gen_port(int port, uint8_t data) void melps4_cpu_device::write_gen_port(int port, u8 data)
{ {
// output generic port // output generic port
switch (port) switch (port)
@ -320,7 +320,7 @@ int melps4_cpu_device::read_d_pin(int bit)
{ {
// read port D, return state of selected pin // read port D, return state of selected pin
bit &= 0xf; bit &= 0xf;
uint16_t d = (m_port_d | m_read_d(bit, 0xffff)) & m_d_mask; u16 d = (m_port_d | m_read_d(bit, 0xffff)) & m_d_mask;
return d >> bit & 1; return d >> bit & 1;
} }

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@ -90,18 +90,18 @@ public:
protected: protected:
// construction/destruction // construction/destruction
melps4_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, int d_pins, uint8_t sm_page, uint8_t int_page); melps4_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, int d_pins, u8 sm_page, u8 int_page);
// device-level overrides // device-level overrides
virtual void device_start() override; virtual void device_start() override;
virtual void device_reset() override; virtual void device_reset() override;
// device_execute_interface overrides // device_execute_interface overrides
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 6 - 1) / 6; } // 6 t-states per machine cycle virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 6 - 1) / 6; } // 6 t-states per machine cycle
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 6); } // " virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 6); } // "
virtual uint32_t execute_min_cycles() const noexcept override { return 1; } virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 1+1; } // max opcode cycles + interrupt duration virtual u32 execute_max_cycles() const noexcept override { return 1+1; } // max opcode cycles + interrupt duration
virtual uint32_t execute_input_lines() const noexcept override { return 3; } // up to 3 (some internal) virtual u32 execute_input_lines() const noexcept override { return 3; } // up to 3 (some internal)
virtual void execute_set_input(int line, int state) override; virtual void execute_set_input(int line, int state) override;
virtual void execute_run() override; virtual void execute_run() override;
virtual void execute_one(); virtual void execute_one();
@ -130,32 +130,32 @@ protected:
int m_d_pins; // number of D port pins and bitmask: 11 on '40,'41,'42,'44, 8 on '43, 12 on '45,'46, 16 on '47 int m_d_pins; // number of D port pins and bitmask: 11 on '40,'41,'42,'44, 8 on '43, 12 on '45,'46, 16 on '47
int m_d_mask; // " int m_d_mask; // "
uint8_t m_sm_page; // subroutine default page: 14 on '40 to '44, 2 on '45,'46, 0 on '47 u8 m_sm_page; // subroutine default page: 14 on '40 to '44, 2 on '45,'46, 0 on '47
uint8_t m_int_page; // interrupt routine page: 12 on '40 to '44, 1 on '45,'46, 2 on '47 u8 m_int_page; // interrupt routine page: 12 on '40 to '44, 1 on '45,'46, 2 on '47
uint8_t m_xami_mask; // mask option for XAMI opcode on '40,'41,'45 (0xf for others) u8 m_xami_mask; // mask option for XAMI opcode on '40,'41,'45 (0xf for others)
uint16_t m_sp_mask; // SP opcode location(middle 4 bits): 7 on '40 to '46, 3 on '47 u16 m_sp_mask; // SP opcode location(middle 4 bits): 7 on '40 to '46, 3 on '47
uint16_t m_ba_op; // BA opcode location: 1 on '40 to '46, N/A on '47 u16 m_ba_op; // BA opcode location: 1 on '40 to '46, N/A on '47
uint8_t m_stack_levels; // 3 levels on MELPS 4, 12 levels on MELPS 41/42 u8 m_stack_levels; // 3 levels on MELPS 4, 12 levels on MELPS 41/42
// internal state, misc regs // internal state, misc regs
uint16_t m_pc; // program counter (11 or 10-bit) u16 m_pc; // program counter (11 or 10-bit)
uint16_t m_prev_pc; u16 m_prev_pc;
uint16_t m_stack[12]; // callstack (SK0-SKx, same size as PC) u16 m_stack[12]; // callstack (SK0-SKx, same size as PC)
uint16_t m_op; u16 m_op;
uint16_t m_prev_op; u16 m_prev_op;
uint8_t m_bitmask; // opcode bit argument u8 m_bitmask; // opcode bit argument
uint16_t m_port_d; // last written port data u16 m_port_d; // last written port data
uint8_t m_port_s; // " u8 m_port_s; // "
uint8_t m_port_f; // " u8 m_port_f; // "
uint8_t m_port_t; // " u8 m_port_t; // "
bool m_sm, m_sms; // subroutine mode flag + irq stack bool m_sm, m_sms; // subroutine mode flag + irq stack
bool m_ba_flag; // temp flag indicates BA opcode was executed bool m_ba_flag; // temp flag indicates BA opcode was executed
uint8_t m_sp_param; // temp register holding SP opcode parameter u8 m_sp_param; // temp register holding SP opcode parameter
uint8_t m_cps; // DP,CY or DP',CY' selected u8 m_cps; // DP,CY or DP',CY' selected
bool m_skip; // skip next opcode bool m_skip; // skip next opcode
uint8_t m_inte; // interrupt enable flag u8 m_inte; // interrupt enable flag
int m_intp; // external interrupt polarity ('40 to '44) int m_intp; // external interrupt polarity ('40 to '44)
bool m_irqflag[3]; // irq flags: exf, 1f, 2f (external, timer 1, timer 2) bool m_irqflag[3]; // irq flags: exf, 1f, 2f (external, timer 1, timer 2)
int m_int_state; // INT pin state int m_int_state; // INT pin state
@ -163,24 +163,24 @@ protected:
bool m_prohibit_irq; // interrupt is prohibited during certain opcodes bool m_prohibit_irq; // interrupt is prohibited during certain opcodes
bool m_possible_irq; // indicate that irq needs to be rechecked bool m_possible_irq; // indicate that irq needs to be rechecked
uint8_t m_tmr_count[2]; // timer active count u8 m_tmr_count[2]; // timer active count
uint8_t m_tmr_reload; // timer(2) auto reload u8 m_tmr_reload; // timer(2) auto reload
bool m_tmr_irq_enabled[2]; bool m_tmr_irq_enabled[2];
// work registers (unless specified, each is 4-bit) // work registers (unless specified, each is 4-bit)
uint8_t m_a; // accumulator u8 m_a; // accumulator
uint8_t m_b; // generic u8 m_b; // generic
uint8_t m_e; // 8-bit register, hold data for S output u8 m_e; // 8-bit register, hold data for S output
uint8_t m_y, m_y2; // RAM index Y, Y' (Z.XX.YYYY is DP aka Data Pointer) u8 m_y, m_y2; // RAM index Y, Y' (Z.XX.YYYY is DP aka Data Pointer)
uint8_t m_x, m_x2; // RAM index X, X', 2-bit u8 m_x, m_x2; // RAM index X, X', 2-bit
uint8_t m_z, m_z2; // RAM index Z, Z', 1-bit, optional u8 m_z, m_z2; // RAM index Z, Z', 1-bit, optional
uint8_t m_cy, m_cy2; // carry flag(s) u8 m_cy, m_cy2; // carry flag(s)
uint8_t m_h; // A/D converter H or generic u8 m_h; // A/D converter H or generic
uint8_t m_l; // A/D converter L or generic u8 m_l; // A/D converter L or generic
uint8_t m_c; // A/D converter counter u8 m_c; // A/D converter counter
uint8_t m_v; // timer control V u8 m_v; // timer control V
uint8_t m_w; // timer control W u8 m_w; // timer control W
// i/o handlers // i/o handlers
devcb_read16 m_read_k; devcb_read16 m_read_k;
@ -196,19 +196,19 @@ protected:
devcb_write_line m_write_t; devcb_write_line m_write_t;
virtual void write_t_in(int state) { m_t_in_state = state; } virtual void write_t_in(int state) { m_t_in_state = state; }
virtual void write_v(uint8_t data) { m_v = data; } virtual void write_v(u8 data) { m_v = data; }
virtual void write_w(uint8_t data) { m_w = data; } virtual void write_w(u8 data) { m_w = data; }
virtual void do_interrupt(int which); virtual void do_interrupt(int which);
virtual void check_interrupt(); virtual void check_interrupt();
uint8_t read_gen_port(int port); u8 read_gen_port(int port);
void write_gen_port(int port, uint8_t data); void write_gen_port(int port, u8 data);
int read_d_pin(int bit); int read_d_pin(int bit);
void write_d_pin(int bit, int state); void write_d_pin(int bit, int state);
// misc internal helpers // misc internal helpers
uint8_t ram_r(); u8 ram_r();
void ram_w(uint8_t data); void ram_w(u8 data);
void pop_pc(); void pop_pc();
void push_pc(); void push_pc();

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@ -28,7 +28,7 @@ const char *const melps4_disassembler::em_name[] =
}; };
// number of bits per opcode parameter // number of bits per opcode parameter
const uint8_t melps4_disassembler::em_bits[] = const u8 melps4_disassembler::em_bits[] =
{ {
0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@ -43,7 +43,7 @@ const uint8_t melps4_disassembler::em_bits[] =
0, 0, 0, 0, 0 0, 0, 0, 0, 0
}; };
const uint32_t melps4_disassembler::em_flags[] = const u32 melps4_disassembler::em_flags[] =
{ {
0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@ -62,7 +62,7 @@ const uint32_t melps4_disassembler::em_flags[] =
// M58846 disasm // M58846 disasm
const uint8_t melps4_disassembler::m58846_opmap[0xc0] = const u8 melps4_disassembler::m58846_opmap[0xc0] =
{ {
// 0 1 2 3 4 5 6 7 8 9 A B C D E F // 0 1 2 3 4 5 6 7 8 9 A B C D E F
em_NOP, em_BA, em_INY, em_DEY, em_DI, em_EI, em_RU, em_SU, 0, em_TABE, em_AM, em_OSE, em_TYA, 0, 0, em_CMA, // 0x em_NOP, em_BA, em_INY, em_DEY, em_DI, em_EI, em_RU, em_SU, 0, em_TABE, em_AM, em_OSE, em_TYA, 0, 0, em_CMA, // 0x
@ -81,10 +81,10 @@ const uint8_t melps4_disassembler::m58846_opmap[0xc0] =
offs_t melps4_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) offs_t melps4_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{ {
uint16_t op = opcodes.r16(pc) & 0x1ff; u16 op = opcodes.r16(pc) & 0x1ff;
// get opcode // get opcode
uint8_t instr; u8 instr;
if (op >= 0x180) if (op >= 0x180)
instr = em_B; instr = em_B;
else if (op >= 0x100) else if (op >= 0x100)
@ -94,28 +94,33 @@ offs_t melps4_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
else else
instr = m58846_opmap[op]; instr = m58846_opmap[op];
u32 flags = em_flags[instr];
util::stream_format(stream, "%-6s", em_name[instr]); util::stream_format(stream, "%-6s", em_name[instr]);
// get immediate param // get immediate param
uint8_t bits = em_bits[instr]; u8 bits = em_bits[instr];
// special case for LXY x,y // special case for LXY x,y
if (instr == em_LXY) if (instr == em_LXY)
{ {
uint8_t x = op >> 4 & 3; u8 x = op >> 4 & 3;
uint8_t y = op & 0xf; u8 y = op & 0xf;
util::stream_format(stream, "%d,%d", x, y); util::stream_format(stream, "%d,%d", x, y);
} }
else if (bits > 0) else if (bits > 0)
{ {
uint8_t param = op & ((1 << bits) - 1); u8 param = op & ((1 << bits) - 1);
if (instr == em_A && param == 6)
flags &= ~STEP_COND;
if (bits > 4) if (bits > 4)
util::stream_format(stream, "$%02X", param); util::stream_format(stream, "$%02X", param);
else else
util::stream_format(stream, "%d", param); util::stream_format(stream, "%d", param);
} }
return 1 | (op == 0xa6 ? 0 : em_flags[instr]) | SUPPORTED; return 1 | flags | SUPPORTED;
} }
u32 melps4_disassembler::opcode_alignment() const u32 melps4_disassembler::opcode_alignment() const

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@ -43,9 +43,9 @@ private:
}; };
static const char *const em_name[]; static const char *const em_name[];
static const uint8_t em_bits[]; static const u8 em_bits[];
static const uint32_t em_flags[]; static const u32 em_flags[];
static const uint8_t m58846_opmap[0xc0]; static const u8 m58846_opmap[0xc0];
}; };
#endif #endif

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@ -9,15 +9,15 @@
// internal helpers // internal helpers
inline uint8_t melps4_cpu_device::ram_r() inline u8 melps4_cpu_device::ram_r()
{ {
uint8_t address = (m_z << 6 | m_x << 4 | m_y) & m_datamask; u8 address = (m_z << 6 | m_x << 4 | m_y) & m_datamask;
return m_data->read_byte(address) & 0xf; return m_data->read_byte(address) & 0xf;
} }
inline void melps4_cpu_device::ram_w(uint8_t data) inline void melps4_cpu_device::ram_w(u8 data)
{ {
uint8_t address = (m_z << 6 | m_x << 4 | m_y) & m_datamask; u8 address = (m_z << 6 | m_x << 4 | m_y) & m_datamask;
m_data->write_byte(address, data & 0xf); m_data->write_byte(address, data & 0xf);
} }
@ -135,7 +135,7 @@ void melps4_cpu_device::op_lcps()
m_cps = m_op & 1; m_cps = m_op & 1;
// swap registers // swap registers
uint8_t x, y, z, cy; u8 x, y, z, cy;
x = m_x; x = m_x;
y = m_y; y = m_y;
z = m_z; z = m_z;
@ -172,7 +172,7 @@ void melps4_cpu_device::op_tam()
void melps4_cpu_device::op_xam() void melps4_cpu_device::op_xam()
{ {
// XAM j: exchange RAM with A, xor X with j // XAM j: exchange RAM with A, xor X with j
uint8_t a = m_a; u8 a = m_a;
m_a = ram_r(); m_a = ram_r();
ram_w(a); ram_w(a);
m_x ^= m_op & 3; m_x ^= m_op & 3;
@ -228,7 +228,7 @@ void melps4_cpu_device::op_amcs()
void melps4_cpu_device::op_a() void melps4_cpu_device::op_a()
{ {
// A n: add immediate to A, skip next on no carry (except when n=6) // A n: add immediate to A, skip next on no carry (except when n=6)
uint8_t n = m_op & 0xf; u8 n = m_op & 0xf;
m_a += n; m_a += n;
m_skip = !(m_a & 0x10 || n == 6); m_skip = !(m_a & 0x10 || n == 6);
m_a &= 0xf; m_a &= 0xf;
@ -261,7 +261,7 @@ void melps4_cpu_device::op_cma()
void melps4_cpu_device::op_rl() void melps4_cpu_device::op_rl()
{ {
// RL(undocumented): rotate A left through carry // RL(undocumented): rotate A left through carry
uint8_t c = m_a >> 3 & 1; u8 c = m_a >> 3 & 1;
m_a = (m_a << 1 | m_cy) & 0xf; m_a = (m_a << 1 | m_cy) & 0xf;
m_cy = c; m_cy = c;
} }
@ -269,7 +269,7 @@ void melps4_cpu_device::op_rl()
void melps4_cpu_device::op_rr() void melps4_cpu_device::op_rr()
{ {
// RR(undocumented): rotate A right through carry // RR(undocumented): rotate A right through carry
uint8_t c = m_a & 1; u8 c = m_a & 1;
m_a = m_a >> 1 | m_cy << 3; m_a = m_a >> 1 | m_cy << 3;
m_cy = c; m_cy = c;
} }
@ -334,7 +334,7 @@ void melps4_cpu_device::op_taj()
void melps4_cpu_device::op_xal() void melps4_cpu_device::op_xal()
{ {
// XAL: exchange A with L // XAL: exchange A with L
uint8_t a = m_a; u8 a = m_a;
m_a = m_l; m_a = m_l;
m_l = a; m_l = a;
} }
@ -342,7 +342,7 @@ void melps4_cpu_device::op_xal()
void melps4_cpu_device::op_xah() void melps4_cpu_device::op_xah()
{ {
// XAH: exchange A with H // XAH: exchange A with H
uint8_t a = m_a; u8 a = m_a;
m_a = m_h; m_a = m_h;
m_h = a; m_h = a;
} }
@ -363,7 +363,7 @@ void melps4_cpu_device::op_dec()
void melps4_cpu_device::op_shl() void melps4_cpu_device::op_shl()
{ {
// SHL: set bit in L or H designated by C // SHL: set bit in L or H designated by C
uint8_t mask = 1 << (m_c & 3); u8 mask = 1 << (m_c & 3);
if (m_c & 4) if (m_c & 4)
m_h |= mask; m_h |= mask;
else else
@ -373,7 +373,7 @@ void melps4_cpu_device::op_shl()
void melps4_cpu_device::op_rhl() void melps4_cpu_device::op_rhl()
{ {
// RHL: reset bit in L or H designated by C // RHL: reset bit in L or H designated by C
uint8_t mask = 1 << (m_c & 3); u8 mask = 1 << (m_c & 3);
if (m_c & 4) if (m_c & 4)
m_h &= ~mask; m_h &= ~mask;
else else
@ -499,7 +499,7 @@ void melps4_cpu_device::op_b()
// - short call: subroutine page // - short call: subroutine page
// - short jump: current page, or sub. page + 1 when in sub. mode // - short jump: current page, or sub. page + 1 when in sub. mode
// - long jump/call(B/BM preceded by SP): temp SP register // - long jump/call(B/BM preceded by SP): temp SP register
uint8_t page = m_pc >> 7; u8 page = m_pc >> 7;
if ((m_prev_op & ~0xf) == m_sp_mask) if ((m_prev_op & ~0xf) == m_sp_mask)
{ {
m_sm = false; m_sm = false;

View File

@ -6,6 +6,8 @@
TODO: TODO:
- is unmapped ram mirrored? (that goes for subdevices too) - is unmapped ram mirrored? (that goes for subdevices too)
- not sure how 7seg zero suppression works, the only documentation for it
is a block diagram with the logic connected to the 7seg decoder
- fill unknown data in segment decoder, it's not on a neat PLA - fill unknown data in segment decoder, it's not on a neat PLA
- is ATB an unskippable opcode? nothing relies on it - is ATB an unskippable opcode? nothing relies on it
@ -14,7 +16,7 @@ TODO:
#include "emu.h" #include "emu.h"
#include "b5000.h" #include "b5000.h"
#include "b5000d.h" #include "rw5000d.h"
DEFINE_DEVICE_TYPE(B5000, b5000_cpu_device, "b5000", "Rockwell B5000") DEFINE_DEVICE_TYPE(B5000, b5000_cpu_device, "b5000", "Rockwell B5000")
@ -22,7 +24,7 @@ DEFINE_DEVICE_TYPE(B5000, b5000_cpu_device, "b5000", "Rockwell B5000")
// constructor // constructor
b5000_cpu_device::b5000_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data) : b5000_cpu_device::b5000_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data) :
b5000_base_device(mconfig, type, tag, owner, clock, prgwidth, program, datawidth, data) rw5000_base_device(mconfig, type, tag, owner, clock, prgwidth, program, datawidth, data)
{ } { }
b5000_cpu_device::b5000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : b5000_cpu_device::b5000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
@ -132,7 +134,7 @@ void b5000_cpu_device::execute_one()
case 0x39: op_rsc(); break; case 0x39: op_rsc(); break;
case 0x3b: op_sc(); break; case 0x3b: op_sc(); break;
case 0x74: op_kseg(); break; case 0x74: op_kseg(); break;
case 0x77: m_atbz_step = 1; break; // ATB case 0x77: m_atb_step = 1; break;
default: op_illegal(); break; default: op_illegal(); break;
} }

View File

@ -6,12 +6,12 @@
*/ */
#ifndef MAME_CPU_B5000_B5000_H #ifndef MAME_CPU_RW5000_B5000_H
#define MAME_CPU_B5000_B5000_H #define MAME_CPU_RW5000_B5000_H
#pragma once #pragma once
#include "b5000base.h" #include "rw5000base.h"
// pinout reference (preliminary) // pinout reference (preliminary)
@ -41,7 +41,7 @@
*/ */
class b5000_cpu_device : public b5000_base_device class b5000_cpu_device : public rw5000_base_device
{ {
public: public:
b5000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); b5000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
@ -76,8 +76,8 @@ protected:
// opcode handlers // opcode handlers
virtual void op_tl(); virtual void op_tl();
virtual void op_tra() override; virtual void op_tra_step() override;
virtual void op_ret() override; virtual void op_ret_step() override;
virtual void op_nop(); virtual void op_nop();
virtual void op_lb(u8 bl); virtual void op_lb(u8 bl);
@ -100,7 +100,7 @@ protected:
virtual void op_tc(); virtual void op_tc();
virtual void op_kseg(); virtual void op_kseg();
virtual void op_atbz() override; virtual void op_atb_step() override;
virtual void op_tkb(); virtual void op_tkb();
virtual void op_tkbs(); virtual void op_tkbs();
virtual void op_read(); virtual void op_read();
@ -110,4 +110,4 @@ protected:
DECLARE_DEVICE_TYPE(B5000, b5000_cpu_device) DECLARE_DEVICE_TYPE(B5000, b5000_cpu_device)
#endif // MAME_CPU_B5000_B5000_H #endif // MAME_CPU_RW5000_B5000_H

View File

@ -57,7 +57,7 @@ void b5000_cpu_device::op_tl()
m_s = (m_pc & ~0x3f) | (m_s & 0x3f); m_s = (m_pc & ~0x3f) | (m_s & 0x3f);
} }
void b5000_cpu_device::op_tra() void b5000_cpu_device::op_tra_step()
{ {
assert(m_tra_step > 0); assert(m_tra_step > 0);
@ -95,7 +95,7 @@ void b5000_cpu_device::op_tra()
m_tra_step++; m_tra_step++;
} }
void b5000_cpu_device::op_ret() void b5000_cpu_device::op_ret_step()
{ {
assert(m_ret_step > 0); assert(m_ret_step > 0);
@ -271,12 +271,12 @@ void b5000_cpu_device::op_kseg()
seg_w(0); seg_w(0);
} }
void b5000_cpu_device::op_atbz() void b5000_cpu_device::op_atb_step()
{ {
assert(m_atbz_step > 0); assert(m_atb_step > 0);
// ATBZ (aka ATB on B5xxx): ATB + load strobe (multi step) // ATBZ (aka ATB on B5xxx): ATB + load strobe (multi step)
switch (m_atbz_step) switch (m_atb_step)
{ {
// step 1: ATB + KSEG // step 1: ATB + KSEG
case 1: case 1:
@ -291,14 +291,14 @@ void b5000_cpu_device::op_atbz()
// step 4: load strobe from Bl // step 4: load strobe from Bl
case 4: case 4:
m_write_str(1 << (m_ram_addr & 0xf)); m_write_str(1 << m_prev_bl);
m_atbz_step = 0; m_atb_step = 0;
return; return;
default: default:
break; break;
} }
m_atbz_step++; m_atb_step++;
} }
void b5000_cpu_device::op_tkb() void b5000_cpu_device::op_tkb()

View File

@ -6,8 +6,8 @@
*/ */
#ifndef MAME_CPU_B5000_B6000_H #ifndef MAME_CPU_RW5000_B6000_H
#define MAME_CPU_B5000_B6000_H #define MAME_CPU_RW5000_B6000_H
#pragma once #pragma once
@ -59,10 +59,10 @@ protected:
// opcode handlers // opcode handlers
virtual void op_tkbs() override; virtual void op_tkbs() override;
virtual void op_atbz() override; virtual void op_atbz();
}; };
DECLARE_DEVICE_TYPE(B6000, b6000_cpu_device) DECLARE_DEVICE_TYPE(B6000, b6000_cpu_device)
#endif // MAME_CPU_B5000_B6000_H #endif // MAME_CPU_RW5000_B6000_H

View File

@ -9,7 +9,7 @@
#include "emu.h" #include "emu.h"
#include "b6100.h" #include "b6100.h"
#include "b5000d.h" #include "rw5000d.h"
DEFINE_DEVICE_TYPE(B6100, b6100_cpu_device, "b6100", "Rockwell B6100") DEFINE_DEVICE_TYPE(B6100, b6100_cpu_device, "b6100", "Rockwell B6100")

View File

@ -6,8 +6,8 @@
*/ */
#ifndef MAME_CPU_B5000_B6100_H #ifndef MAME_CPU_RW5000_B6100_H
#define MAME_CPU_B5000_B6100_H #define MAME_CPU_RW5000_B6100_H
#pragma once #pragma once
@ -71,4 +71,4 @@ protected:
DECLARE_DEVICE_TYPE(B6100, b6100_cpu_device) DECLARE_DEVICE_TYPE(B6100, b6100_cpu_device)
#endif // MAME_CPU_B5000_B6100_H #endif // MAME_CPU_RW5000_B6100_H

View File

@ -2,7 +2,7 @@
// copyright-holders:hap // copyright-holders:hap
/* /*
Rockwell B5000 family MCU cores Rockwell A/B5000 family MCU cores
This MCU series sits between A4000 and the more publicly available PPS4/1. This MCU series sits between A4000 and the more publicly available PPS4/1.
Known part numbers: A/B5000, A5300, A/B5500, A/B5900, B6000, B6100. Known part numbers: A/B5000, A5300, A/B5500, A/B5900, B6000, B6100.
@ -19,12 +19,12 @@ A4000 is similar, but too many differences to emulate in this device, probably.
*/ */
#include "emu.h" #include "emu.h"
#include "b5000base.h" #include "rw5000base.h"
#include "debugger.h" #include "debugger.h"
b5000_base_device::b5000_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data) : rw5000_base_device::rw5000_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data) :
cpu_device(mconfig, type, tag, owner, clock), cpu_device(mconfig, type, tag, owner, clock),
m_program_config("program", ENDIANNESS_LITTLE, 8, prgwidth, 0, program), m_program_config("program", ENDIANNESS_LITTLE, 8, prgwidth, 0, program),
m_data_config("data", ENDIANNESS_LITTLE, 8, datawidth, 0, data), m_data_config("data", ENDIANNESS_LITTLE, 8, datawidth, 0, data),
@ -42,7 +42,7 @@ b5000_base_device::b5000_base_device(const machine_config &mconfig, device_type
// device_start - device-specific startup // device_start - device-specific startup
//------------------------------------------------- //-------------------------------------------------
void b5000_base_device::device_start() void rw5000_base_device::device_start()
{ {
m_program = &space(AS_PROGRAM); m_program = &space(AS_PROGRAM);
m_data = &space(AS_DATA); m_data = &space(AS_DATA);
@ -79,7 +79,8 @@ void b5000_base_device::device_start()
m_seg = 0; m_seg = 0;
m_suppress0 = false; m_suppress0 = false;
m_atbz_step = 0; m_atb_step = 0;
m_mtd_step = 0;
m_tra_step = 0; m_tra_step = 0;
m_ret_step = 0; m_ret_step = 0;
@ -106,7 +107,8 @@ void b5000_base_device::device_start()
save_item(NAME(m_seg)); save_item(NAME(m_seg));
save_item(NAME(m_suppress0)); save_item(NAME(m_suppress0));
save_item(NAME(m_atbz_step)); save_item(NAME(m_atb_step));
save_item(NAME(m_mtd_step));
save_item(NAME(m_tra_step)); save_item(NAME(m_tra_step));
save_item(NAME(m_ret_step)); save_item(NAME(m_ret_step));
@ -126,7 +128,7 @@ void b5000_base_device::device_start()
set_icountptr(m_icount); set_icountptr(m_icount);
} }
device_memory_interface::space_config_vector b5000_base_device::memory_space_config() const device_memory_interface::space_config_vector rw5000_base_device::memory_space_config() const
{ {
return space_config_vector { return space_config_vector {
std::make_pair(AS_PROGRAM, &m_program_config), std::make_pair(AS_PROGRAM, &m_program_config),
@ -139,7 +141,7 @@ device_memory_interface::space_config_vector b5000_base_device::memory_space_con
// device_reset - device-specific reset // device_reset - device-specific reset
//------------------------------------------------- //-------------------------------------------------
void b5000_base_device::device_reset() void rw5000_base_device::device_reset()
{ {
reset_pc(); reset_pc();
m_prev_pc = m_pc; m_prev_pc = m_pc;
@ -152,7 +154,8 @@ void b5000_base_device::device_reset()
m_sr = false; m_sr = false;
m_skip = false; m_skip = false;
m_atbz_step = 0; m_atb_step = 0;
m_mtd_step = 0;
m_tra_step = 0; m_tra_step = 0;
m_ret_step = 0; m_ret_step = 0;
} }
@ -162,7 +165,7 @@ void b5000_base_device::device_reset()
// execute // execute
//------------------------------------------------- //-------------------------------------------------
void b5000_base_device::increment_pc() void rw5000_base_device::increment_pc()
{ {
// low part is LFSR // low part is LFSR
int feed = ((m_pc & 0x3e) == 0) ? 1 : 0; int feed = ((m_pc & 0x3e) == 0) ? 1 : 0;
@ -170,7 +173,7 @@ void b5000_base_device::increment_pc()
m_pc = (m_pc & ~0x3f) | (m_pc >> 1 & 0x1f) | (feed << 5); m_pc = (m_pc & ~0x3f) | (m_pc >> 1 & 0x1f) | (feed << 5);
} }
void b5000_base_device::execute_run() void rw5000_base_device::execute_run()
{ {
while (m_icount > 0) while (m_icount > 0)
{ {
@ -201,9 +204,10 @@ void b5000_base_device::execute_run()
// some opcodes have multiple steps and will run in parallel with next ones, // some opcodes have multiple steps and will run in parallel with next ones,
// eg. it may fetch in order A,B and parts executed in order B,A // eg. it may fetch in order A,B and parts executed in order B,A
if (m_atbz_step) op_atbz(); if (m_atb_step) op_atb_step();
if (m_tra_step) op_tra(); if (m_mtd_step) op_mtd_step();
if (m_ret_step) op_ret(); if (m_tra_step) op_tra_step();
if (m_ret_step) op_ret_step();
// some opcodes delay RAM address adjustment for 1 cycle // some opcodes delay RAM address adjustment for 1 cycle
m_ram_addr = (m_bu << 4 & 0x30) | (m_bl & 0xf); m_ram_addr = (m_bu << 4 & 0x30) | (m_bl & 0xf);

View File

@ -2,20 +2,20 @@
// copyright-holders:hap // copyright-holders:hap
/* /*
Rockwell B5000 family MCU cores Rockwell A/B5000 family MCU cores
Don't include this file, include the specific device header instead, Don't include this file, include the specific device header instead,
for example b5000.h for example b5000.h
*/ */
#ifndef MAME_CPU_B5000_B5000BASE_H #ifndef MAME_CPU_RW5000_RW5000BASE_H
#define MAME_CPU_B5000_B5000BASE_H #define MAME_CPU_RW5000_RW5000BASE_H
#pragma once #pragma once
class b5000_base_device : public cpu_device class rw5000_base_device : public cpu_device
{ {
public: public:
// configuration helpers // configuration helpers
@ -38,7 +38,7 @@ public:
protected: protected:
// construction/destruction // construction/destruction
b5000_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data); rw5000_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
// device-level overrides // device-level overrides
virtual void device_start() override; virtual void device_start() override;
@ -94,13 +94,15 @@ protected:
u16 m_seg; u16 m_seg;
bool m_suppress0; bool m_suppress0;
u8 m_atbz_step; u8 m_atb_step;
u8 m_mtd_step;
u8 m_tra_step; u8 m_tra_step;
u8 m_ret_step; u8 m_ret_step;
virtual void op_atbz() { ; } virtual void op_atb_step() { ; }
virtual void op_tra() { ; } virtual void op_mtd_step() { ; }
virtual void op_ret() { ; } virtual void op_tra_step() { ; }
virtual void op_ret_step() { ; }
// i/o handlers // i/o handlers
devcb_read8 m_read_kb; devcb_read8 m_read_kb;
@ -111,4 +113,4 @@ protected:
}; };
#endif // MAME_CPU_B5000_B5000BASE_H #endif // MAME_CPU_RW5000_RW5000BASE_H

View File

@ -2,16 +2,16 @@
// copyright-holders:hap // copyright-holders:hap
/* /*
Rockwell B5000 family MCU disassembler Rockwell A/B5000 family MCU disassembler
*/ */
#include "emu.h" #include "emu.h"
#include "b5000d.h" #include "rw5000d.h"
// constructor // constructor
b5000_common_disassembler::b5000_common_disassembler() rw5000_common_disassembler::rw5000_common_disassembler()
{ {
// init lfsr pc lut // init lfsr pc lut
for (u32 i = 0, pc = 0; i < 0x40; i++) for (u32 i = 0, pc = 0; i < 0x40; i++)
@ -22,7 +22,7 @@ b5000_common_disassembler::b5000_common_disassembler()
} }
} }
offs_t b5000_common_disassembler::increment_pc(offs_t pc) offs_t rw5000_common_disassembler::increment_pc(offs_t pc)
{ {
int feed = ((pc & 0x3e) == 0) ? 1 : 0; int feed = ((pc & 0x3e) == 0) ? 1 : 0;
feed ^= (pc >> 1 ^ pc) & 1; feed ^= (pc >> 1 ^ pc) & 1;
@ -32,7 +32,7 @@ offs_t b5000_common_disassembler::increment_pc(offs_t pc)
// common lookup tables // common lookup tables
const char *const b5000_common_disassembler::s_name[] = const char *const rw5000_common_disassembler::s_name[] =
{ {
"?", "?",
"NOP", "RSC", "SC", "TC", "TAM", "NOP", "RSC", "SC", "TC", "TAM",
@ -46,7 +46,7 @@ const char *const b5000_common_disassembler::s_name[] =
// number of bits per opcode parameter // number of bits per opcode parameter
// note: d4 means bitmask param, d5 means inverted // note: d4 means bitmask param, d5 means inverted
const u8 b5000_common_disassembler::s_bits[] = const u8 rw5000_common_disassembler::s_bits[] =
{ {
0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@ -58,7 +58,7 @@ const u8 b5000_common_disassembler::s_bits[] =
0, 0, 2, 0, 0, 0 0, 0, 2, 0, 0, 0
}; };
const u32 b5000_common_disassembler::s_flags[] = const u32 rw5000_common_disassembler::s_flags[] =
{ {
0, 0,
0, 0, 0, STEP_COND, STEP_COND, 0, 0, 0, STEP_COND, STEP_COND,
@ -67,17 +67,18 @@ const u32 b5000_common_disassembler::s_flags[] =
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, STEP_COND, 0, 0, STEP_COND,
0, STEP_OVER, 0, STEP_OUT, 0, STEP_OVER, 0, STEP_OUT,
STEP_COND, STEP_COND, STEP_COND, 0, 0 STEP_COND, STEP_COND, STEP_COND, STEP_COND, 0, 0
}; };
// common disasm // common disasm
offs_t b5000_common_disassembler::common_disasm(const u8 *lut_opmap, std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) offs_t rw5000_common_disassembler::common_disasm(const u8 *lut_opmap, std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{ {
// get raw opcode // get raw opcode
u8 op = opcodes.r8(pc); u8 op = opcodes.r8(pc);
u8 instr = lut_opmap[op]; u8 instr = lut_opmap[op];
u32 flags = s_flags[instr];
// get parameter // get parameter
u8 bits = s_bits[instr]; u8 bits = s_bits[instr];
@ -93,7 +94,6 @@ offs_t b5000_common_disassembler::common_disasm(const u8 *lut_opmap, std::ostrea
// disassemble it // disassemble it
util::stream_format(stream, "%-6s", s_name[instr]); util::stream_format(stream, "%-6s", s_name[instr]);
u32 flags = s_flags[instr];
if (bits > 0) if (bits > 0)
{ {
// exceptions for opcodes with 2 params // exceptions for opcodes with 2 params
@ -109,11 +109,14 @@ offs_t b5000_common_disassembler::common_disasm(const u8 *lut_opmap, std::ostrea
} }
else if (instr == em_ADD) else if (instr == em_ADD)
{ {
if (param & 1)
flags |= STEP_COND;
switch (param ^ 2) switch (param ^ 2)
{ {
case 1: stream << "S"; flags |= STEP_COND; break; // 0,1 case 1: stream << "S"; break; // 0,1
case 2: stream << "C"; break; // 1,0 case 2: stream << "C"; break; // 1,0
case 3: stream << "C,S"; flags |= STEP_COND; break; // 1,1 case 3: stream << "C,S"; break; // 1,1
default: break; default: break;
} }
} }

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@ -2,21 +2,21 @@
// copyright-holders:hap // copyright-holders:hap
/* /*
Rockwell B5000 family MCU disassembler Rockwell A/B5000 family MCU disassembler
*/ */
#ifndef MAME_CPU_B5000_B5000D_H #ifndef MAME_CPU_RW5000_RW5000D_H
#define MAME_CPU_B5000_B5000D_H #define MAME_CPU_RW5000_RW5000D_H
#pragma once #pragma once
class b5000_common_disassembler : public util::disasm_interface class rw5000_common_disassembler : public util::disasm_interface
{ {
public: public:
b5000_common_disassembler(); rw5000_common_disassembler();
virtual ~b5000_common_disassembler() = default; virtual ~rw5000_common_disassembler() = default;
virtual u32 opcode_alignment() const override { return 1; } virtual u32 opcode_alignment() const override { return 1; }
virtual u32 interface_flags() const override { return NONLINEAR_PC | PAGED; } virtual u32 interface_flags() const override { return NONLINEAR_PC | PAGED; }
@ -49,7 +49,7 @@ protected:
offs_t common_disasm(const u8 *lut_opmap, std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params); offs_t common_disasm(const u8 *lut_opmap, std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params);
}; };
class b5000_disassembler : public b5000_common_disassembler class b5000_disassembler : public rw5000_common_disassembler
{ {
public: public:
b5000_disassembler() = default; b5000_disassembler() = default;
@ -62,7 +62,7 @@ private:
}; };
class b5500_disassembler : public b5000_common_disassembler class b5500_disassembler : public rw5000_common_disassembler
{ {
public: public:
b5500_disassembler() = default; b5500_disassembler() = default;
@ -75,4 +75,4 @@ private:
}; };
#endif // MAME_CPU_B5000_B5000D_H #endif // MAME_CPU_RW5000_RW5000D_H

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@ -64,7 +64,7 @@ private:
void rama1_w(u8 data); void rama1_w(u8 data);
u8 input_r(); u8 input_r();
u8 m_ram[0x100]; u8 m_ram[0x100] = { };
u8 m_ram_address = 0; u8 m_ram_address = 0;
u8 m_ram_data = 0; u8 m_ram_data = 0;
u8 m_ram_control = 0; u8 m_ram_control = 0;
@ -76,8 +76,6 @@ private:
void cr_state::machine_start() void cr_state::machine_start()
{ {
memset(m_ram, 0, sizeof(m_ram));
// register for savestates // register for savestates
save_item(NAME(m_ram)); save_item(NAME(m_ram));
save_item(NAME(m_ram_address)); save_item(NAME(m_ram_address));

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@ -82,10 +82,6 @@ private:
void dsc_state::machine_start() void dsc_state::machine_start()
{ {
// zerofill
m_inp_mux = 0;
m_led_select = 0;
// register for savestates // register for savestates
save_item(NAME(m_inp_mux)); save_item(NAME(m_inp_mux));
save_item(NAME(m_led_select)); save_item(NAME(m_led_select));

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@ -3,7 +3,7 @@
// thanks-to:Sean Riddle // thanks-to:Sean Riddle
/*************************************************************************** /***************************************************************************
Rockwell B5000 MCU series handhelds (before PPS-4/1) Rockwell A/B5000 MCU series handhelds (before PPS-4/1)
Mostly calculators on these MCUs, but also Mattel's first couple of handhelds. Mostly calculators on these MCUs, but also Mattel's first couple of handhelds.
ROM source notes when dumped from another model, but confident it's the same: ROM source notes when dumped from another model, but confident it's the same:
@ -14,9 +14,9 @@ ROM source notes when dumped from another model, but confident it's the same:
#include "emu.h" #include "emu.h"
#include "cpu/b5000/b5000.h" #include "cpu/rw5000/b5000.h"
#include "cpu/b5000/b6000.h" #include "cpu/rw5000/b6000.h"
#include "cpu/b5000/b6100.h" #include "cpu/rw5000/b6100.h"
#include "video/pwm.h" #include "video/pwm.h"
#include "sound/spkrdev.h" #include "sound/spkrdev.h"
@ -30,13 +30,13 @@ ROM source notes when dumped from another model, but confident it's the same:
#include "misatk.lh" #include "misatk.lh"
#include "rw18r.lh" #include "rw18r.lh"
//#include "hh_b5000_test.lh" // common test-layout - use external artwork //#include "hh_rw5000_test.lh" // common test-layout - use external artwork
class hh_b5000_state : public driver_device class hh_rw5000_state : public driver_device
{ {
public: public:
hh_b5000_state(const machine_config &mconfig, device_type type, const char *tag) : hh_rw5000_state(const machine_config &mconfig, device_type type, const char *tag) :
driver_device(mconfig, type, tag), driver_device(mconfig, type, tag),
m_maincpu(*this, "maincpu"), m_maincpu(*this, "maincpu"),
m_display(*this, "display"), m_display(*this, "display"),
@ -53,7 +53,7 @@ protected:
virtual void machine_reset() override; virtual void machine_reset() override;
// devices // devices
required_device<b5000_base_device> m_maincpu; required_device<rw5000_base_device> m_maincpu;
optional_device<pwm_display_device> m_display; optional_device<pwm_display_device> m_display;
optional_device<speaker_sound_device> m_speaker; optional_device<speaker_sound_device> m_speaker;
optional_ioport_array<5> m_inputs; // max 5 optional_ioport_array<5> m_inputs; // max 5
@ -71,7 +71,7 @@ protected:
// machine start/reset // machine start/reset
void hh_b5000_state::machine_start() void hh_rw5000_state::machine_start()
{ {
// register for savestates // register for savestates
save_item(NAME(m_inp_mux)); save_item(NAME(m_inp_mux));
@ -79,7 +79,7 @@ void hh_b5000_state::machine_start()
save_item(NAME(m_seg)); save_item(NAME(m_seg));
} }
void hh_b5000_state::machine_reset() void hh_rw5000_state::machine_reset()
{ {
} }
@ -93,7 +93,7 @@ void hh_b5000_state::machine_reset()
// generic input handlers // generic input handlers
u8 hh_b5000_state::read_inputs(int columns) u8 hh_rw5000_state::read_inputs(int columns)
{ {
u8 ret = 0; u8 ret = 0;
@ -105,7 +105,7 @@ u8 hh_b5000_state::read_inputs(int columns)
return ret; return ret;
} }
void hh_b5000_state::switch_change(int sel, u32 mask, bool next) void hh_rw5000_state::switch_change(int sel, u32 mask, bool next)
{ {
// config switches (for direct control) // config switches (for direct control)
ioport_field *inp = m_inputs[sel]->field(mask); ioport_field *inp = m_inputs[sel]->field(mask);
@ -116,7 +116,7 @@ void hh_b5000_state::switch_change(int sel, u32 mask, bool next)
inp->select_previous_setting(); inp->select_previous_setting();
} }
INPUT_CHANGED_MEMBER(hh_b5000_state::power_button) INPUT_CHANGED_MEMBER(hh_rw5000_state::power_button)
{ {
// power button or switch // power button or switch
bool power = (param) ? (bool(param - 1)) : !newval; bool power = (param) ? (bool(param - 1)) : !newval;
@ -150,11 +150,11 @@ namespace {
***************************************************************************/ ***************************************************************************/
class autorace_state : public hh_b5000_state class autorace_state : public hh_rw5000_state
{ {
public: public:
autorace_state(const machine_config &mconfig, device_type type, const char *tag) : autorace_state(const machine_config &mconfig, device_type type, const char *tag) :
hh_b5000_state(mconfig, type, tag) hh_rw5000_state(mconfig, type, tag)
{ } { }
void autorace(machine_config &config); void autorace(machine_config &config);
@ -194,11 +194,11 @@ static INPUT_PORTS_START( autorace )
PORT_CONFSETTING( 0x01, DEF_STR( On ) ) PORT_CONFSETTING( 0x01, DEF_STR( On ) )
PORT_START("POWER") // power switch PORT_START("POWER") // power switch
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_b5000_state, power_button, 0) PORT_NAME("Start / Reset") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_rw5000_state, power_button, 0) PORT_NAME("Start / Reset")
PORT_START("SWITCH") // fake PORT_START("SWITCH") // fake
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_b5000_state, switch_prev<0>, 0x0c) PORT_NAME("Gear Switch Down") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_rw5000_state, switch_prev<0>, 0x0c) PORT_NAME("Gear Switch Down")
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_b5000_state, switch_next<0>, 0x0c) PORT_NAME("Gear Switch Up") PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_rw5000_state, switch_next<0>, 0x0c) PORT_NAME("Gear Switch Up")
INPUT_PORTS_END INPUT_PORTS_END
void autorace_state::autorace(machine_config &config) void autorace_state::autorace(machine_config &config)
@ -247,11 +247,11 @@ ROM_END
***************************************************************************/ ***************************************************************************/
class misatk_state : public hh_b5000_state class misatk_state : public hh_rw5000_state
{ {
public: public:
misatk_state(const machine_config &mconfig, device_type type, const char *tag) : misatk_state(const machine_config &mconfig, device_type type, const char *tag) :
hh_b5000_state(mconfig, type, tag) hh_rw5000_state(mconfig, type, tag)
{ } { }
void misatk(machine_config &config); void misatk(machine_config &config);
@ -288,7 +288,7 @@ static INPUT_PORTS_START( misatk )
PORT_CONFSETTING( 0x01, DEF_STR( On ) ) PORT_CONFSETTING( 0x01, DEF_STR( On ) )
PORT_START("POWER") // power switch PORT_START("POWER") // power switch
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_b5000_state, power_button, 0) PORT_NAME("Arm / Off") PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_rw5000_state, power_button, 0) PORT_NAME("Arm / Off")
INPUT_PORTS_END INPUT_PORTS_END
void misatk_state::misatk(machine_config &config) void misatk_state::misatk(machine_config &config)
@ -333,11 +333,11 @@ ROM_END
***************************************************************************/ ***************************************************************************/
class mfootb_state : public hh_b5000_state class mfootb_state : public hh_rw5000_state
{ {
public: public:
mfootb_state(const machine_config &mconfig, device_type type, const char *tag) : mfootb_state(const machine_config &mconfig, device_type type, const char *tag) :
hh_b5000_state(mconfig, type, tag) hh_rw5000_state(mconfig, type, tag)
{ } { }
void mfootb(machine_config &config); void mfootb(machine_config &config);
@ -433,11 +433,11 @@ ROM_END
***************************************************************************/ ***************************************************************************/
class mbaseb_state : public hh_b5000_state class mbaseb_state : public hh_rw5000_state
{ {
public: public:
mbaseb_state(const machine_config &mconfig, device_type type, const char *tag) : mbaseb_state(const machine_config &mconfig, device_type type, const char *tag) :
hh_b5000_state(mconfig, type, tag) hh_rw5000_state(mconfig, type, tag)
{ } { }
void mbaseb(machine_config &config); void mbaseb(machine_config &config);
@ -528,11 +528,11 @@ ROM_END
***************************************************************************/ ***************************************************************************/
class gravity_state : public hh_b5000_state class gravity_state : public hh_rw5000_state
{ {
public: public:
gravity_state(const machine_config &mconfig, device_type type, const char *tag) : gravity_state(const machine_config &mconfig, device_type type, const char *tag) :
hh_b5000_state(mconfig, type, tag) hh_rw5000_state(mconfig, type, tag)
{ } { }
void gravity(machine_config &config); void gravity(machine_config &config);
@ -612,11 +612,11 @@ ROM_END
***************************************************************************/ ***************************************************************************/
class rw18r_state : public hh_b5000_state class rw18r_state : public hh_rw5000_state
{ {
public: public:
rw18r_state(const machine_config &mconfig, device_type type, const char *tag) : rw18r_state(const machine_config &mconfig, device_type type, const char *tag) :
hh_b5000_state(mconfig, type, tag) hh_rw5000_state(mconfig, type, tag)
{ } { }
void rw18r(machine_config &config); void rw18r(machine_config &config);

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@ -533,8 +533,6 @@ void tispeak_state::machine_start()
void tispeak_state::init_cartridge() void tispeak_state::init_cartridge()
{ {
m_overlay = 0;
if (m_cart != nullptr && m_cart->exists()) if (m_cart != nullptr && m_cart->exists())
{ {
std::string region_tag; std::string region_tag;

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@ -16442,14 +16442,6 @@ hexionb // bootleg
@source:hh_amis2k.cpp @source:hh_amis2k.cpp
wildfire // Parker Bros wildfire // Parker Bros
@source:hh_b5000.cpp
autorace // Mattel
gravity // Mattel
mbaseb // Mattel
mfootb // Mattel
misatk // Mattel
rw18r // Rockwell
@source:hh_cop400.cpp @source:hh_cop400.cpp
bship82 // Milton Bradley bship82 // Milton Bradley
ctstein // Castle Toy ctstein // Castle Toy
@ -16550,6 +16542,14 @@ rdqa // Selchow & Righter
scrabsen // Selchow & Righter scrabsen // Selchow & Righter
smastmind // Invicta smastmind // Invicta
@source:hh_rw5000.cpp
autorace // Mattel
gravity // Mattel
mbaseb // Mattel
mfootb // Mattel
misatk // Mattel
rw18r // Rockwell
@source:hh_sm510.cpp @source:hh_sm510.cpp
atakaast // Elektronika atakaast // Elektronika
auslalom // Elektronika auslalom // Elektronika

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@ -406,13 +406,13 @@ hec2hrp.cpp
hektor.cpp hektor.cpp
hhtiger.cpp hhtiger.cpp
hh_amis2k.cpp hh_amis2k.cpp
hh_b5000.cpp
hh_cop400.cpp hh_cop400.cpp
hh_cops1.cpp hh_cops1.cpp
hh_hmcs40.cpp hh_hmcs40.cpp
hh_melps4.cpp hh_melps4.cpp
hh_pic16.cpp hh_pic16.cpp
hh_pps41.cpp hh_pps41.cpp
hh_rw5000.cpp
hh_sm510.cpp hh_sm510.cpp
hh_tms1k.cpp hh_tms1k.cpp
hh_ucom4.cpp hh_ucom4.cpp

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@ -28,7 +28,6 @@ using util::BIT;
#include "cpu/arm7/arm7dasm.h" #include "cpu/arm7/arm7dasm.h"
#include "cpu/asap/asapdasm.h" #include "cpu/asap/asapdasm.h"
#include "cpu/avr8/avr8dasm.h" #include "cpu/avr8/avr8dasm.h"
#include "cpu/b5000/b5000d.h"
#include "cpu/bcp/bcpdasm.h" #include "cpu/bcp/bcpdasm.h"
#include "cpu/capricorn/capricorn_dasm.h" #include "cpu/capricorn/capricorn_dasm.h"
#include "cpu/ccpu/ccpudasm.h" #include "cpu/ccpu/ccpudasm.h"
@ -140,6 +139,7 @@ using util::BIT;
#include "cpu/rii/riidasm.h" #include "cpu/rii/riidasm.h"
#include "cpu/romp/rompdasm.h" #include "cpu/romp/rompdasm.h"
#include "cpu/rsp/rsp_dasm.h" #include "cpu/rsp/rsp_dasm.h"
#include "cpu/rw5000/rw5000d.h"
#include "cpu/rx01/rx01dasm.h" #include "cpu/rx01/rx01dasm.h"
#include "cpu/s2650/2650dasm.h" #include "cpu/s2650/2650dasm.h"
#include "cpu/saturn/saturnds.h" #include "cpu/saturn/saturnds.h"