mirror of
https://github.com/holub/mame
synced 2025-04-16 21:44:32 +03:00
b5000: rename base class to rw5000
This commit is contained in:
hap
parent
19fe9e23a6
commit
eb7bfe8450
@ -2853,29 +2853,29 @@ if opt_tool(CPUS, "SUPERFX") then
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end
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--------------------------------------------------
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-- Rockwell B5000 family
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--@src/devices/cpu/b5000/b5000.h,CPUS["B5000"] = true
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--@src/devices/cpu/b5000/b6000.h,CPUS["B5000"] = true
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--@src/devices/cpu/b5000/b6100.h,CPUS["B5000"] = true
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-- Rockwell A/B5000 family
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--@src/devices/cpu/rw5000/b5000.h,CPUS["RW5000"] = true
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--@src/devices/cpu/rw5000/b6000.h,CPUS["RW5000"] = true
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--@src/devices/cpu/rw5000/b6100.h,CPUS["RW5000"] = true
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--------------------------------------------------
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if CPUS["B5000"] then
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if CPUS["RW5000"] then
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files {
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MAME_DIR .. "src/devices/cpu/b5000/b5000base.cpp",
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MAME_DIR .. "src/devices/cpu/b5000/b5000base.h",
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MAME_DIR .. "src/devices/cpu/b5000/b5000.cpp",
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MAME_DIR .. "src/devices/cpu/b5000/b5000.h",
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MAME_DIR .. "src/devices/cpu/b5000/b5000op.cpp",
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MAME_DIR .. "src/devices/cpu/b5000/b6000.cpp",
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MAME_DIR .. "src/devices/cpu/b5000/b6000.h",
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MAME_DIR .. "src/devices/cpu/b5000/b6100.cpp",
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MAME_DIR .. "src/devices/cpu/b5000/b6100.h",
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MAME_DIR .. "src/devices/cpu/rw5000/rw5000base.cpp",
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MAME_DIR .. "src/devices/cpu/rw5000/rw5000base.h",
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MAME_DIR .. "src/devices/cpu/rw5000/b5000.cpp",
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MAME_DIR .. "src/devices/cpu/rw5000/b5000.h",
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MAME_DIR .. "src/devices/cpu/rw5000/b5000op.cpp",
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MAME_DIR .. "src/devices/cpu/rw5000/b6000.cpp",
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MAME_DIR .. "src/devices/cpu/rw5000/b6000.h",
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MAME_DIR .. "src/devices/cpu/rw5000/b6100.cpp",
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MAME_DIR .. "src/devices/cpu/rw5000/b6100.h",
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}
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end
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if opt_tool(CPUS, "B5000") then
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table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/b5000/b5000d.cpp")
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table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/b5000/b5000d.h")
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if opt_tool(CPUS, "RW5000") then
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table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/rw5000/rw5000d.cpp")
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table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/rw5000/rw5000d.h")
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end
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--------------------------------------------------
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@ -120,7 +120,7 @@ CPUS["UNSP"] = true
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CPUS["HCD62121"] = true
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CPUS["PPS4"] = true
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--CPUS["PPS41"] = true
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--CPUS["B5000"] = true
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--CPUS["RW5000"] = true
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CPUS["UPD7725"] = true
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CPUS["HD61700"] = true
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CPUS["LC8670"] = true
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@ -123,7 +123,7 @@ CPUS["UNSP"] = true
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CPUS["HCD62121"] = true
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CPUS["PPS4"] = true
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CPUS["PPS41"] = true
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CPUS["B5000"] = true
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CPUS["RW5000"] = true
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CPUS["UPD7725"] = true
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CPUS["HD61700"] = true
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CPUS["LC8670"] = true
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@ -3590,8 +3590,8 @@ files {
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MAME_DIR .. "src/mame/includes/aim65.h",
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MAME_DIR .. "src/mame/machine/aim65.cpp",
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MAME_DIR .. "src/mame/drivers/aim65_40.cpp",
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MAME_DIR .. "src/mame/drivers/hh_b5000.cpp",
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MAME_DIR .. "src/mame/drivers/hh_pps41.cpp",
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MAME_DIR .. "src/mame/drivers/hh_rw5000.cpp",
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}
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createMESSProjects(_target, _subtarget, "rtpc")
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@ -27,7 +27,7 @@ void m58846_device::data_128x4(address_map &map)
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// device definitions
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m58846_device::m58846_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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m58846_device::m58846_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
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: melps4_cpu_device(mconfig, M58846, tag, owner, clock, 11, address_map_constructor(FUNC(m58846_device::program_2kx9), this), 7, address_map_constructor(FUNC(m58846_device::data_128x4), this), 12 /* number of D pins */, 2 /* subroutine page */, 1 /* interrupt page */), m_timer(nullptr)
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{ }
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@ -93,7 +93,7 @@ void m58846_device::device_timer(emu_timer &timer, device_timer_id id, int param
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reset_timer();
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}
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void m58846_device::write_v(uint8_t data)
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void m58846_device::write_v(u8 data)
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{
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// d0: enable timer 1 irq
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// d1: enable timer 2 irq? (TODO)
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@ -19,7 +19,7 @@
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class m58846_device : public melps4_cpu_device
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{
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public:
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m58846_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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m58846_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
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protected:
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// device-level overrides
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@ -31,7 +31,7 @@ protected:
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// timers
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virtual void device_timer(emu_timer &timer, device_timer_id id, int param) override;
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virtual void write_v(uint8_t data) override;
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virtual void write_v(u8 data) override;
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void data_128x4(address_map &map);
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void program_2kx9(address_map &map);
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@ -43,7 +43,7 @@
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#include "debugger.h"
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melps4_cpu_device::melps4_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, int d_pins, uint8_t sm_page, uint8_t int_page)
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melps4_cpu_device::melps4_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, int d_pins, u8 sm_page, u8 int_page)
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: cpu_device(mconfig, type, tag, owner, clock)
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, m_program_config("program", ENDIANNESS_LITTLE, 16, prgwidth, -1, program)
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, m_data_config("data", ENDIANNESS_LITTLE, 8, datawidth, 0, data)
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@ -274,7 +274,7 @@ void melps4_cpu_device::device_reset()
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// i/o handling
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//-------------------------------------------------
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uint8_t melps4_cpu_device::read_gen_port(int port)
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u8 melps4_cpu_device::read_gen_port(int port)
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{
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// input generic port
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switch (port)
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@ -291,7 +291,7 @@ uint8_t melps4_cpu_device::read_gen_port(int port)
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return 0;
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}
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void melps4_cpu_device::write_gen_port(int port, uint8_t data)
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void melps4_cpu_device::write_gen_port(int port, u8 data)
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{
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// output generic port
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switch (port)
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@ -320,7 +320,7 @@ int melps4_cpu_device::read_d_pin(int bit)
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{
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// read port D, return state of selected pin
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bit &= 0xf;
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uint16_t d = (m_port_d | m_read_d(bit, 0xffff)) & m_d_mask;
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u16 d = (m_port_d | m_read_d(bit, 0xffff)) & m_d_mask;
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return d >> bit & 1;
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}
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@ -90,18 +90,18 @@ public:
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protected:
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// construction/destruction
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melps4_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, int d_pins, uint8_t sm_page, uint8_t int_page);
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melps4_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, int d_pins, u8 sm_page, u8 int_page);
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// device-level overrides
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virtual void device_start() override;
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virtual void device_reset() override;
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// device_execute_interface overrides
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virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 6 - 1) / 6; } // 6 t-states per machine cycle
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virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 6); } // "
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virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
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virtual uint32_t execute_max_cycles() const noexcept override { return 1+1; } // max opcode cycles + interrupt duration
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virtual uint32_t execute_input_lines() const noexcept override { return 3; } // up to 3 (some internal)
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virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 6 - 1) / 6; } // 6 t-states per machine cycle
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virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 6); } // "
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virtual u32 execute_min_cycles() const noexcept override { return 1; }
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virtual u32 execute_max_cycles() const noexcept override { return 1+1; } // max opcode cycles + interrupt duration
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virtual u32 execute_input_lines() const noexcept override { return 3; } // up to 3 (some internal)
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virtual void execute_set_input(int line, int state) override;
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virtual void execute_run() override;
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virtual void execute_one();
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@ -130,32 +130,32 @@ protected:
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int m_d_pins; // number of D port pins and bitmask: 11 on '40,'41,'42,'44, 8 on '43, 12 on '45,'46, 16 on '47
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int m_d_mask; // "
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uint8_t m_sm_page; // subroutine default page: 14 on '40 to '44, 2 on '45,'46, 0 on '47
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uint8_t m_int_page; // interrupt routine page: 12 on '40 to '44, 1 on '45,'46, 2 on '47
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uint8_t m_xami_mask; // mask option for XAMI opcode on '40,'41,'45 (0xf for others)
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uint16_t m_sp_mask; // SP opcode location(middle 4 bits): 7 on '40 to '46, 3 on '47
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uint16_t m_ba_op; // BA opcode location: 1 on '40 to '46, N/A on '47
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uint8_t m_stack_levels; // 3 levels on MELPS 4, 12 levels on MELPS 41/42
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u8 m_sm_page; // subroutine default page: 14 on '40 to '44, 2 on '45,'46, 0 on '47
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u8 m_int_page; // interrupt routine page: 12 on '40 to '44, 1 on '45,'46, 2 on '47
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u8 m_xami_mask; // mask option for XAMI opcode on '40,'41,'45 (0xf for others)
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u16 m_sp_mask; // SP opcode location(middle 4 bits): 7 on '40 to '46, 3 on '47
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u16 m_ba_op; // BA opcode location: 1 on '40 to '46, N/A on '47
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u8 m_stack_levels; // 3 levels on MELPS 4, 12 levels on MELPS 41/42
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// internal state, misc regs
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uint16_t m_pc; // program counter (11 or 10-bit)
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uint16_t m_prev_pc;
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uint16_t m_stack[12]; // callstack (SK0-SKx, same size as PC)
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uint16_t m_op;
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uint16_t m_prev_op;
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uint8_t m_bitmask; // opcode bit argument
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u16 m_pc; // program counter (11 or 10-bit)
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u16 m_prev_pc;
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u16 m_stack[12]; // callstack (SK0-SKx, same size as PC)
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u16 m_op;
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u16 m_prev_op;
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u8 m_bitmask; // opcode bit argument
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uint16_t m_port_d; // last written port data
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uint8_t m_port_s; // "
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uint8_t m_port_f; // "
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uint8_t m_port_t; // "
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u16 m_port_d; // last written port data
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u8 m_port_s; // "
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u8 m_port_f; // "
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u8 m_port_t; // "
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bool m_sm, m_sms; // subroutine mode flag + irq stack
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bool m_ba_flag; // temp flag indicates BA opcode was executed
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uint8_t m_sp_param; // temp register holding SP opcode parameter
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uint8_t m_cps; // DP,CY or DP',CY' selected
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u8 m_sp_param; // temp register holding SP opcode parameter
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u8 m_cps; // DP,CY or DP',CY' selected
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bool m_skip; // skip next opcode
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uint8_t m_inte; // interrupt enable flag
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u8 m_inte; // interrupt enable flag
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int m_intp; // external interrupt polarity ('40 to '44)
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bool m_irqflag[3]; // irq flags: exf, 1f, 2f (external, timer 1, timer 2)
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int m_int_state; // INT pin state
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@ -163,24 +163,24 @@ protected:
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bool m_prohibit_irq; // interrupt is prohibited during certain opcodes
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bool m_possible_irq; // indicate that irq needs to be rechecked
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uint8_t m_tmr_count[2]; // timer active count
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uint8_t m_tmr_reload; // timer(2) auto reload
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u8 m_tmr_count[2]; // timer active count
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u8 m_tmr_reload; // timer(2) auto reload
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bool m_tmr_irq_enabled[2];
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// work registers (unless specified, each is 4-bit)
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uint8_t m_a; // accumulator
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uint8_t m_b; // generic
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uint8_t m_e; // 8-bit register, hold data for S output
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uint8_t m_y, m_y2; // RAM index Y, Y' (Z.XX.YYYY is DP aka Data Pointer)
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uint8_t m_x, m_x2; // RAM index X, X', 2-bit
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uint8_t m_z, m_z2; // RAM index Z, Z', 1-bit, optional
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uint8_t m_cy, m_cy2; // carry flag(s)
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u8 m_a; // accumulator
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u8 m_b; // generic
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u8 m_e; // 8-bit register, hold data for S output
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u8 m_y, m_y2; // RAM index Y, Y' (Z.XX.YYYY is DP aka Data Pointer)
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u8 m_x, m_x2; // RAM index X, X', 2-bit
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u8 m_z, m_z2; // RAM index Z, Z', 1-bit, optional
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u8 m_cy, m_cy2; // carry flag(s)
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uint8_t m_h; // A/D converter H or generic
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uint8_t m_l; // A/D converter L or generic
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uint8_t m_c; // A/D converter counter
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uint8_t m_v; // timer control V
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uint8_t m_w; // timer control W
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u8 m_h; // A/D converter H or generic
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u8 m_l; // A/D converter L or generic
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u8 m_c; // A/D converter counter
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u8 m_v; // timer control V
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u8 m_w; // timer control W
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// i/o handlers
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devcb_read16 m_read_k;
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@ -196,19 +196,19 @@ protected:
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devcb_write_line m_write_t;
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virtual void write_t_in(int state) { m_t_in_state = state; }
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virtual void write_v(uint8_t data) { m_v = data; }
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virtual void write_w(uint8_t data) { m_w = data; }
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virtual void write_v(u8 data) { m_v = data; }
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virtual void write_w(u8 data) { m_w = data; }
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virtual void do_interrupt(int which);
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virtual void check_interrupt();
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uint8_t read_gen_port(int port);
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void write_gen_port(int port, uint8_t data);
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u8 read_gen_port(int port);
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void write_gen_port(int port, u8 data);
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int read_d_pin(int bit);
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void write_d_pin(int bit, int state);
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// misc internal helpers
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uint8_t ram_r();
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void ram_w(uint8_t data);
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u8 ram_r();
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void ram_w(u8 data);
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void pop_pc();
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void push_pc();
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@ -28,7 +28,7 @@ const char *const melps4_disassembler::em_name[] =
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};
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// number of bits per opcode parameter
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const uint8_t melps4_disassembler::em_bits[] =
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const u8 melps4_disassembler::em_bits[] =
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{
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0,
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0, 0, 0, 0, 0, 0, 0, 0, 0,
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@ -43,7 +43,7 @@ const uint8_t melps4_disassembler::em_bits[] =
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0, 0, 0, 0, 0
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};
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const uint32_t melps4_disassembler::em_flags[] =
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const u32 melps4_disassembler::em_flags[] =
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{
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0,
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0, 0, 0, 0, 0, 0, 0, 0, 0,
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@ -62,7 +62,7 @@ const uint32_t melps4_disassembler::em_flags[] =
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// M58846 disasm
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const uint8_t melps4_disassembler::m58846_opmap[0xc0] =
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const u8 melps4_disassembler::m58846_opmap[0xc0] =
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{
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// 0 1 2 3 4 5 6 7 8 9 A B C D E F
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em_NOP, em_BA, em_INY, em_DEY, em_DI, em_EI, em_RU, em_SU, 0, em_TABE, em_AM, em_OSE, em_TYA, 0, 0, em_CMA, // 0x
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@ -81,10 +81,10 @@ const uint8_t melps4_disassembler::m58846_opmap[0xc0] =
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offs_t melps4_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms)
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{
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uint16_t op = opcodes.r16(pc) & 0x1ff;
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u16 op = opcodes.r16(pc) & 0x1ff;
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// get opcode
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uint8_t instr;
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u8 instr;
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if (op >= 0x180)
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instr = em_B;
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else if (op >= 0x100)
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@ -94,28 +94,33 @@ offs_t melps4_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
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else
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instr = m58846_opmap[op];
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u32 flags = em_flags[instr];
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util::stream_format(stream, "%-6s", em_name[instr]);
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// get immediate param
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uint8_t bits = em_bits[instr];
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u8 bits = em_bits[instr];
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// special case for LXY x,y
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if (instr == em_LXY)
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{
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uint8_t x = op >> 4 & 3;
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uint8_t y = op & 0xf;
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u8 x = op >> 4 & 3;
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||||
u8 y = op & 0xf;
|
||||
util::stream_format(stream, "%d,%d", x, y);
|
||||
}
|
||||
else if (bits > 0)
|
||||
{
|
||||
uint8_t param = op & ((1 << bits) - 1);
|
||||
u8 param = op & ((1 << bits) - 1);
|
||||
|
||||
if (instr == em_A && param == 6)
|
||||
flags &= ~STEP_COND;
|
||||
|
||||
if (bits > 4)
|
||||
util::stream_format(stream, "$%02X", param);
|
||||
else
|
||||
util::stream_format(stream, "%d", param);
|
||||
}
|
||||
|
||||
return 1 | (op == 0xa6 ? 0 : em_flags[instr]) | SUPPORTED;
|
||||
return 1 | flags | SUPPORTED;
|
||||
}
|
||||
|
||||
u32 melps4_disassembler::opcode_alignment() const
|
||||
|
||||
@ -43,9 +43,9 @@ private:
|
||||
};
|
||||
|
||||
static const char *const em_name[];
|
||||
static const uint8_t em_bits[];
|
||||
static const uint32_t em_flags[];
|
||||
static const uint8_t m58846_opmap[0xc0];
|
||||
static const u8 em_bits[];
|
||||
static const u32 em_flags[];
|
||||
static const u8 m58846_opmap[0xc0];
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
@ -9,15 +9,15 @@
|
||||
|
||||
// internal helpers
|
||||
|
||||
inline uint8_t melps4_cpu_device::ram_r()
|
||||
inline u8 melps4_cpu_device::ram_r()
|
||||
{
|
||||
uint8_t address = (m_z << 6 | m_x << 4 | m_y) & m_datamask;
|
||||
u8 address = (m_z << 6 | m_x << 4 | m_y) & m_datamask;
|
||||
return m_data->read_byte(address) & 0xf;
|
||||
}
|
||||
|
||||
inline void melps4_cpu_device::ram_w(uint8_t data)
|
||||
inline void melps4_cpu_device::ram_w(u8 data)
|
||||
{
|
||||
uint8_t address = (m_z << 6 | m_x << 4 | m_y) & m_datamask;
|
||||
u8 address = (m_z << 6 | m_x << 4 | m_y) & m_datamask;
|
||||
m_data->write_byte(address, data & 0xf);
|
||||
}
|
||||
|
||||
@ -135,7 +135,7 @@ void melps4_cpu_device::op_lcps()
|
||||
m_cps = m_op & 1;
|
||||
|
||||
// swap registers
|
||||
uint8_t x, y, z, cy;
|
||||
u8 x, y, z, cy;
|
||||
x = m_x;
|
||||
y = m_y;
|
||||
z = m_z;
|
||||
@ -172,7 +172,7 @@ void melps4_cpu_device::op_tam()
|
||||
void melps4_cpu_device::op_xam()
|
||||
{
|
||||
// XAM j: exchange RAM with A, xor X with j
|
||||
uint8_t a = m_a;
|
||||
u8 a = m_a;
|
||||
m_a = ram_r();
|
||||
ram_w(a);
|
||||
m_x ^= m_op & 3;
|
||||
@ -228,7 +228,7 @@ void melps4_cpu_device::op_amcs()
|
||||
void melps4_cpu_device::op_a()
|
||||
{
|
||||
// A n: add immediate to A, skip next on no carry (except when n=6)
|
||||
uint8_t n = m_op & 0xf;
|
||||
u8 n = m_op & 0xf;
|
||||
m_a += n;
|
||||
m_skip = !(m_a & 0x10 || n == 6);
|
||||
m_a &= 0xf;
|
||||
@ -261,7 +261,7 @@ void melps4_cpu_device::op_cma()
|
||||
void melps4_cpu_device::op_rl()
|
||||
{
|
||||
// RL(undocumented): rotate A left through carry
|
||||
uint8_t c = m_a >> 3 & 1;
|
||||
u8 c = m_a >> 3 & 1;
|
||||
m_a = (m_a << 1 | m_cy) & 0xf;
|
||||
m_cy = c;
|
||||
}
|
||||
@ -269,7 +269,7 @@ void melps4_cpu_device::op_rl()
|
||||
void melps4_cpu_device::op_rr()
|
||||
{
|
||||
// RR(undocumented): rotate A right through carry
|
||||
uint8_t c = m_a & 1;
|
||||
u8 c = m_a & 1;
|
||||
m_a = m_a >> 1 | m_cy << 3;
|
||||
m_cy = c;
|
||||
}
|
||||
@ -334,7 +334,7 @@ void melps4_cpu_device::op_taj()
|
||||
void melps4_cpu_device::op_xal()
|
||||
{
|
||||
// XAL: exchange A with L
|
||||
uint8_t a = m_a;
|
||||
u8 a = m_a;
|
||||
m_a = m_l;
|
||||
m_l = a;
|
||||
}
|
||||
@ -342,7 +342,7 @@ void melps4_cpu_device::op_xal()
|
||||
void melps4_cpu_device::op_xah()
|
||||
{
|
||||
// XAH: exchange A with H
|
||||
uint8_t a = m_a;
|
||||
u8 a = m_a;
|
||||
m_a = m_h;
|
||||
m_h = a;
|
||||
}
|
||||
@ -363,7 +363,7 @@ void melps4_cpu_device::op_dec()
|
||||
void melps4_cpu_device::op_shl()
|
||||
{
|
||||
// SHL: set bit in L or H designated by C
|
||||
uint8_t mask = 1 << (m_c & 3);
|
||||
u8 mask = 1 << (m_c & 3);
|
||||
if (m_c & 4)
|
||||
m_h |= mask;
|
||||
else
|
||||
@ -373,7 +373,7 @@ void melps4_cpu_device::op_shl()
|
||||
void melps4_cpu_device::op_rhl()
|
||||
{
|
||||
// RHL: reset bit in L or H designated by C
|
||||
uint8_t mask = 1 << (m_c & 3);
|
||||
u8 mask = 1 << (m_c & 3);
|
||||
if (m_c & 4)
|
||||
m_h &= ~mask;
|
||||
else
|
||||
@ -499,7 +499,7 @@ void melps4_cpu_device::op_b()
|
||||
// - short call: subroutine page
|
||||
// - short jump: current page, or sub. page + 1 when in sub. mode
|
||||
// - long jump/call(B/BM preceded by SP): temp SP register
|
||||
uint8_t page = m_pc >> 7;
|
||||
u8 page = m_pc >> 7;
|
||||
if ((m_prev_op & ~0xf) == m_sp_mask)
|
||||
{
|
||||
m_sm = false;
|
||||
|
||||
@ -6,6 +6,8 @@
|
||||
|
||||
TODO:
|
||||
- is unmapped ram mirrored? (that goes for subdevices too)
|
||||
- not sure how 7seg zero suppression works, the only documentation for it
|
||||
is a block diagram with the logic connected to the 7seg decoder
|
||||
- fill unknown data in segment decoder, it's not on a neat PLA
|
||||
- is ATB an unskippable opcode? nothing relies on it
|
||||
|
||||
@ -14,7 +16,7 @@ TODO:
|
||||
#include "emu.h"
|
||||
#include "b5000.h"
|
||||
|
||||
#include "b5000d.h"
|
||||
#include "rw5000d.h"
|
||||
|
||||
|
||||
DEFINE_DEVICE_TYPE(B5000, b5000_cpu_device, "b5000", "Rockwell B5000")
|
||||
@ -22,7 +24,7 @@ DEFINE_DEVICE_TYPE(B5000, b5000_cpu_device, "b5000", "Rockwell B5000")
|
||||
|
||||
// constructor
|
||||
b5000_cpu_device::b5000_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data) :
|
||||
b5000_base_device(mconfig, type, tag, owner, clock, prgwidth, program, datawidth, data)
|
||||
rw5000_base_device(mconfig, type, tag, owner, clock, prgwidth, program, datawidth, data)
|
||||
{ }
|
||||
|
||||
b5000_cpu_device::b5000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
|
||||
@ -132,7 +134,7 @@ void b5000_cpu_device::execute_one()
|
||||
case 0x39: op_rsc(); break;
|
||||
case 0x3b: op_sc(); break;
|
||||
case 0x74: op_kseg(); break;
|
||||
case 0x77: m_atbz_step = 1; break; // ATB
|
||||
case 0x77: m_atb_step = 1; break;
|
||||
|
||||
default: op_illegal(); break;
|
||||
}
|
||||
@ -6,12 +6,12 @@
|
||||
|
||||
*/
|
||||
|
||||
#ifndef MAME_CPU_B5000_B5000_H
|
||||
#define MAME_CPU_B5000_B5000_H
|
||||
#ifndef MAME_CPU_RW5000_B5000_H
|
||||
#define MAME_CPU_RW5000_B5000_H
|
||||
|
||||
#pragma once
|
||||
|
||||
#include "b5000base.h"
|
||||
#include "rw5000base.h"
|
||||
|
||||
// pinout reference (preliminary)
|
||||
|
||||
@ -41,7 +41,7 @@
|
||||
|
||||
*/
|
||||
|
||||
class b5000_cpu_device : public b5000_base_device
|
||||
class b5000_cpu_device : public rw5000_base_device
|
||||
{
|
||||
public:
|
||||
b5000_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
@ -76,8 +76,8 @@ protected:
|
||||
|
||||
// opcode handlers
|
||||
virtual void op_tl();
|
||||
virtual void op_tra() override;
|
||||
virtual void op_ret() override;
|
||||
virtual void op_tra_step() override;
|
||||
virtual void op_ret_step() override;
|
||||
virtual void op_nop();
|
||||
|
||||
virtual void op_lb(u8 bl);
|
||||
@ -100,7 +100,7 @@ protected:
|
||||
virtual void op_tc();
|
||||
|
||||
virtual void op_kseg();
|
||||
virtual void op_atbz() override;
|
||||
virtual void op_atb_step() override;
|
||||
virtual void op_tkb();
|
||||
virtual void op_tkbs();
|
||||
virtual void op_read();
|
||||
@ -110,4 +110,4 @@ protected:
|
||||
|
||||
DECLARE_DEVICE_TYPE(B5000, b5000_cpu_device)
|
||||
|
||||
#endif // MAME_CPU_B5000_B5000_H
|
||||
#endif // MAME_CPU_RW5000_B5000_H
|
||||
@ -57,7 +57,7 @@ void b5000_cpu_device::op_tl()
|
||||
m_s = (m_pc & ~0x3f) | (m_s & 0x3f);
|
||||
}
|
||||
|
||||
void b5000_cpu_device::op_tra()
|
||||
void b5000_cpu_device::op_tra_step()
|
||||
{
|
||||
assert(m_tra_step > 0);
|
||||
|
||||
@ -95,7 +95,7 @@ void b5000_cpu_device::op_tra()
|
||||
m_tra_step++;
|
||||
}
|
||||
|
||||
void b5000_cpu_device::op_ret()
|
||||
void b5000_cpu_device::op_ret_step()
|
||||
{
|
||||
assert(m_ret_step > 0);
|
||||
|
||||
@ -271,12 +271,12 @@ void b5000_cpu_device::op_kseg()
|
||||
seg_w(0);
|
||||
}
|
||||
|
||||
void b5000_cpu_device::op_atbz()
|
||||
void b5000_cpu_device::op_atb_step()
|
||||
{
|
||||
assert(m_atbz_step > 0);
|
||||
assert(m_atb_step > 0);
|
||||
|
||||
// ATBZ (aka ATB on B5xxx): ATB + load strobe (multi step)
|
||||
switch (m_atbz_step)
|
||||
switch (m_atb_step)
|
||||
{
|
||||
// step 1: ATB + KSEG
|
||||
case 1:
|
||||
@ -291,14 +291,14 @@ void b5000_cpu_device::op_atbz()
|
||||
|
||||
// step 4: load strobe from Bl
|
||||
case 4:
|
||||
m_write_str(1 << (m_ram_addr & 0xf));
|
||||
m_atbz_step = 0;
|
||||
m_write_str(1 << m_prev_bl);
|
||||
m_atb_step = 0;
|
||||
return;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
m_atbz_step++;
|
||||
m_atb_step++;
|
||||
}
|
||||
|
||||
void b5000_cpu_device::op_tkb()
|
||||
@ -6,8 +6,8 @@
|
||||
|
||||
*/
|
||||
|
||||
#ifndef MAME_CPU_B5000_B6000_H
|
||||
#define MAME_CPU_B5000_B6000_H
|
||||
#ifndef MAME_CPU_RW5000_B6000_H
|
||||
#define MAME_CPU_RW5000_B6000_H
|
||||
|
||||
#pragma once
|
||||
|
||||
@ -59,10 +59,10 @@ protected:
|
||||
|
||||
// opcode handlers
|
||||
virtual void op_tkbs() override;
|
||||
virtual void op_atbz() override;
|
||||
virtual void op_atbz();
|
||||
};
|
||||
|
||||
|
||||
DECLARE_DEVICE_TYPE(B6000, b6000_cpu_device)
|
||||
|
||||
#endif // MAME_CPU_B5000_B6000_H
|
||||
#endif // MAME_CPU_RW5000_B6000_H
|
||||
@ -9,7 +9,7 @@
|
||||
#include "emu.h"
|
||||
#include "b6100.h"
|
||||
|
||||
#include "b5000d.h"
|
||||
#include "rw5000d.h"
|
||||
|
||||
|
||||
DEFINE_DEVICE_TYPE(B6100, b6100_cpu_device, "b6100", "Rockwell B6100")
|
||||
@ -6,8 +6,8 @@
|
||||
|
||||
*/
|
||||
|
||||
#ifndef MAME_CPU_B5000_B6100_H
|
||||
#define MAME_CPU_B5000_B6100_H
|
||||
#ifndef MAME_CPU_RW5000_B6100_H
|
||||
#define MAME_CPU_RW5000_B6100_H
|
||||
|
||||
#pragma once
|
||||
|
||||
@ -71,4 +71,4 @@ protected:
|
||||
|
||||
DECLARE_DEVICE_TYPE(B6100, b6100_cpu_device)
|
||||
|
||||
#endif // MAME_CPU_B5000_B6100_H
|
||||
#endif // MAME_CPU_RW5000_B6100_H
|
||||
@ -2,7 +2,7 @@
|
||||
// copyright-holders:hap
|
||||
/*
|
||||
|
||||
Rockwell B5000 family MCU cores
|
||||
Rockwell A/B5000 family MCU cores
|
||||
|
||||
This MCU series sits between A4000 and the more publicly available PPS4/1.
|
||||
Known part numbers: A/B5000, A5300, A/B5500, A/B5900, B6000, B6100.
|
||||
@ -19,12 +19,12 @@ A4000 is similar, but too many differences to emulate in this device, probably.
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
#include "b5000base.h"
|
||||
#include "rw5000base.h"
|
||||
|
||||
#include "debugger.h"
|
||||
|
||||
|
||||
b5000_base_device::b5000_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data) :
|
||||
rw5000_base_device::rw5000_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data) :
|
||||
cpu_device(mconfig, type, tag, owner, clock),
|
||||
m_program_config("program", ENDIANNESS_LITTLE, 8, prgwidth, 0, program),
|
||||
m_data_config("data", ENDIANNESS_LITTLE, 8, datawidth, 0, data),
|
||||
@ -42,7 +42,7 @@ b5000_base_device::b5000_base_device(const machine_config &mconfig, device_type
|
||||
// device_start - device-specific startup
|
||||
//-------------------------------------------------
|
||||
|
||||
void b5000_base_device::device_start()
|
||||
void rw5000_base_device::device_start()
|
||||
{
|
||||
m_program = &space(AS_PROGRAM);
|
||||
m_data = &space(AS_DATA);
|
||||
@ -79,7 +79,8 @@ void b5000_base_device::device_start()
|
||||
m_seg = 0;
|
||||
m_suppress0 = false;
|
||||
|
||||
m_atbz_step = 0;
|
||||
m_atb_step = 0;
|
||||
m_mtd_step = 0;
|
||||
m_tra_step = 0;
|
||||
m_ret_step = 0;
|
||||
|
||||
@ -106,7 +107,8 @@ void b5000_base_device::device_start()
|
||||
save_item(NAME(m_seg));
|
||||
save_item(NAME(m_suppress0));
|
||||
|
||||
save_item(NAME(m_atbz_step));
|
||||
save_item(NAME(m_atb_step));
|
||||
save_item(NAME(m_mtd_step));
|
||||
save_item(NAME(m_tra_step));
|
||||
save_item(NAME(m_ret_step));
|
||||
|
||||
@ -126,7 +128,7 @@ void b5000_base_device::device_start()
|
||||
set_icountptr(m_icount);
|
||||
}
|
||||
|
||||
device_memory_interface::space_config_vector b5000_base_device::memory_space_config() const
|
||||
device_memory_interface::space_config_vector rw5000_base_device::memory_space_config() const
|
||||
{
|
||||
return space_config_vector {
|
||||
std::make_pair(AS_PROGRAM, &m_program_config),
|
||||
@ -139,7 +141,7 @@ device_memory_interface::space_config_vector b5000_base_device::memory_space_con
|
||||
// device_reset - device-specific reset
|
||||
//-------------------------------------------------
|
||||
|
||||
void b5000_base_device::device_reset()
|
||||
void rw5000_base_device::device_reset()
|
||||
{
|
||||
reset_pc();
|
||||
m_prev_pc = m_pc;
|
||||
@ -152,7 +154,8 @@ void b5000_base_device::device_reset()
|
||||
m_sr = false;
|
||||
m_skip = false;
|
||||
|
||||
m_atbz_step = 0;
|
||||
m_atb_step = 0;
|
||||
m_mtd_step = 0;
|
||||
m_tra_step = 0;
|
||||
m_ret_step = 0;
|
||||
}
|
||||
@ -162,7 +165,7 @@ void b5000_base_device::device_reset()
|
||||
// execute
|
||||
//-------------------------------------------------
|
||||
|
||||
void b5000_base_device::increment_pc()
|
||||
void rw5000_base_device::increment_pc()
|
||||
{
|
||||
// low part is LFSR
|
||||
int feed = ((m_pc & 0x3e) == 0) ? 1 : 0;
|
||||
@ -170,7 +173,7 @@ void b5000_base_device::increment_pc()
|
||||
m_pc = (m_pc & ~0x3f) | (m_pc >> 1 & 0x1f) | (feed << 5);
|
||||
}
|
||||
|
||||
void b5000_base_device::execute_run()
|
||||
void rw5000_base_device::execute_run()
|
||||
{
|
||||
while (m_icount > 0)
|
||||
{
|
||||
@ -201,9 +204,10 @@ void b5000_base_device::execute_run()
|
||||
|
||||
// some opcodes have multiple steps and will run in parallel with next ones,
|
||||
// eg. it may fetch in order A,B and parts executed in order B,A
|
||||
if (m_atbz_step) op_atbz();
|
||||
if (m_tra_step) op_tra();
|
||||
if (m_ret_step) op_ret();
|
||||
if (m_atb_step) op_atb_step();
|
||||
if (m_mtd_step) op_mtd_step();
|
||||
if (m_tra_step) op_tra_step();
|
||||
if (m_ret_step) op_ret_step();
|
||||
|
||||
// some opcodes delay RAM address adjustment for 1 cycle
|
||||
m_ram_addr = (m_bu << 4 & 0x30) | (m_bl & 0xf);
|
||||
@ -2,20 +2,20 @@
|
||||
// copyright-holders:hap
|
||||
/*
|
||||
|
||||
Rockwell B5000 family MCU cores
|
||||
Rockwell A/B5000 family MCU cores
|
||||
|
||||
Don't include this file, include the specific device header instead,
|
||||
for example b5000.h
|
||||
|
||||
*/
|
||||
|
||||
#ifndef MAME_CPU_B5000_B5000BASE_H
|
||||
#define MAME_CPU_B5000_B5000BASE_H
|
||||
#ifndef MAME_CPU_RW5000_RW5000BASE_H
|
||||
#define MAME_CPU_RW5000_RW5000BASE_H
|
||||
|
||||
#pragma once
|
||||
|
||||
|
||||
class b5000_base_device : public cpu_device
|
||||
class rw5000_base_device : public cpu_device
|
||||
{
|
||||
public:
|
||||
// configuration helpers
|
||||
@ -38,7 +38,7 @@ public:
|
||||
|
||||
protected:
|
||||
// construction/destruction
|
||||
b5000_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
|
||||
rw5000_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
|
||||
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
@ -94,13 +94,15 @@ protected:
|
||||
u16 m_seg;
|
||||
bool m_suppress0;
|
||||
|
||||
u8 m_atbz_step;
|
||||
u8 m_atb_step;
|
||||
u8 m_mtd_step;
|
||||
u8 m_tra_step;
|
||||
u8 m_ret_step;
|
||||
|
||||
virtual void op_atbz() { ; }
|
||||
virtual void op_tra() { ; }
|
||||
virtual void op_ret() { ; }
|
||||
virtual void op_atb_step() { ; }
|
||||
virtual void op_mtd_step() { ; }
|
||||
virtual void op_tra_step() { ; }
|
||||
virtual void op_ret_step() { ; }
|
||||
|
||||
// i/o handlers
|
||||
devcb_read8 m_read_kb;
|
||||
@ -111,4 +113,4 @@ protected:
|
||||
};
|
||||
|
||||
|
||||
#endif // MAME_CPU_B5000_B5000BASE_H
|
||||
#endif // MAME_CPU_RW5000_RW5000BASE_H
|
||||
@ -2,16 +2,16 @@
|
||||
// copyright-holders:hap
|
||||
/*
|
||||
|
||||
Rockwell B5000 family MCU disassembler
|
||||
Rockwell A/B5000 family MCU disassembler
|
||||
|
||||
*/
|
||||
|
||||
#include "emu.h"
|
||||
#include "b5000d.h"
|
||||
#include "rw5000d.h"
|
||||
|
||||
// constructor
|
||||
|
||||
b5000_common_disassembler::b5000_common_disassembler()
|
||||
rw5000_common_disassembler::rw5000_common_disassembler()
|
||||
{
|
||||
// init lfsr pc lut
|
||||
for (u32 i = 0, pc = 0; i < 0x40; i++)
|
||||
@ -22,7 +22,7 @@ b5000_common_disassembler::b5000_common_disassembler()
|
||||
}
|
||||
}
|
||||
|
||||
offs_t b5000_common_disassembler::increment_pc(offs_t pc)
|
||||
offs_t rw5000_common_disassembler::increment_pc(offs_t pc)
|
||||
{
|
||||
int feed = ((pc & 0x3e) == 0) ? 1 : 0;
|
||||
feed ^= (pc >> 1 ^ pc) & 1;
|
||||
@ -32,7 +32,7 @@ offs_t b5000_common_disassembler::increment_pc(offs_t pc)
|
||||
|
||||
// common lookup tables
|
||||
|
||||
const char *const b5000_common_disassembler::s_name[] =
|
||||
const char *const rw5000_common_disassembler::s_name[] =
|
||||
{
|
||||
"?",
|
||||
"NOP", "RSC", "SC", "TC", "TAM",
|
||||
@ -46,7 +46,7 @@ const char *const b5000_common_disassembler::s_name[] =
|
||||
|
||||
// number of bits per opcode parameter
|
||||
// note: d4 means bitmask param, d5 means inverted
|
||||
const u8 b5000_common_disassembler::s_bits[] =
|
||||
const u8 rw5000_common_disassembler::s_bits[] =
|
||||
{
|
||||
0,
|
||||
0, 0, 0, 0, 0,
|
||||
@ -58,7 +58,7 @@ const u8 b5000_common_disassembler::s_bits[] =
|
||||
0, 0, 2, 0, 0, 0
|
||||
};
|
||||
|
||||
const u32 b5000_common_disassembler::s_flags[] =
|
||||
const u32 rw5000_common_disassembler::s_flags[] =
|
||||
{
|
||||
0,
|
||||
0, 0, 0, STEP_COND, STEP_COND,
|
||||
@ -67,17 +67,18 @@ const u32 b5000_common_disassembler::s_flags[] =
|
||||
0, 0, 0, 0, 0, 0,
|
||||
0, 0, STEP_COND,
|
||||
0, STEP_OVER, 0, STEP_OUT,
|
||||
STEP_COND, STEP_COND, STEP_COND, 0, 0
|
||||
STEP_COND, STEP_COND, STEP_COND, STEP_COND, 0, 0
|
||||
};
|
||||
|
||||
|
||||
// common disasm
|
||||
|
||||
offs_t b5000_common_disassembler::common_disasm(const u8 *lut_opmap, std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms)
|
||||
offs_t rw5000_common_disassembler::common_disasm(const u8 *lut_opmap, std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms)
|
||||
{
|
||||
// get raw opcode
|
||||
u8 op = opcodes.r8(pc);
|
||||
u8 instr = lut_opmap[op];
|
||||
u32 flags = s_flags[instr];
|
||||
|
||||
// get parameter
|
||||
u8 bits = s_bits[instr];
|
||||
@ -93,7 +94,6 @@ offs_t b5000_common_disassembler::common_disasm(const u8 *lut_opmap, std::ostrea
|
||||
// disassemble it
|
||||
util::stream_format(stream, "%-6s", s_name[instr]);
|
||||
|
||||
u32 flags = s_flags[instr];
|
||||
if (bits > 0)
|
||||
{
|
||||
// exceptions for opcodes with 2 params
|
||||
@ -109,11 +109,14 @@ offs_t b5000_common_disassembler::common_disasm(const u8 *lut_opmap, std::ostrea
|
||||
}
|
||||
else if (instr == em_ADD)
|
||||
{
|
||||
if (param & 1)
|
||||
flags |= STEP_COND;
|
||||
|
||||
switch (param ^ 2)
|
||||
{
|
||||
case 1: stream << "S"; flags |= STEP_COND; break; // 0,1
|
||||
case 1: stream << "S"; break; // 0,1
|
||||
case 2: stream << "C"; break; // 1,0
|
||||
case 3: stream << "C,S"; flags |= STEP_COND; break; // 1,1
|
||||
case 3: stream << "C,S"; break; // 1,1
|
||||
default: break;
|
||||
}
|
||||
}
|
||||
@ -2,21 +2,21 @@
|
||||
// copyright-holders:hap
|
||||
/*
|
||||
|
||||
Rockwell B5000 family MCU disassembler
|
||||
Rockwell A/B5000 family MCU disassembler
|
||||
|
||||
*/
|
||||
|
||||
#ifndef MAME_CPU_B5000_B5000D_H
|
||||
#define MAME_CPU_B5000_B5000D_H
|
||||
#ifndef MAME_CPU_RW5000_RW5000D_H
|
||||
#define MAME_CPU_RW5000_RW5000D_H
|
||||
|
||||
#pragma once
|
||||
|
||||
|
||||
class b5000_common_disassembler : public util::disasm_interface
|
||||
class rw5000_common_disassembler : public util::disasm_interface
|
||||
{
|
||||
public:
|
||||
b5000_common_disassembler();
|
||||
virtual ~b5000_common_disassembler() = default;
|
||||
rw5000_common_disassembler();
|
||||
virtual ~rw5000_common_disassembler() = default;
|
||||
|
||||
virtual u32 opcode_alignment() const override { return 1; }
|
||||
virtual u32 interface_flags() const override { return NONLINEAR_PC | PAGED; }
|
||||
@ -49,7 +49,7 @@ protected:
|
||||
offs_t common_disasm(const u8 *lut_opmap, std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms);
|
||||
};
|
||||
|
||||
class b5000_disassembler : public b5000_common_disassembler
|
||||
class b5000_disassembler : public rw5000_common_disassembler
|
||||
{
|
||||
public:
|
||||
b5000_disassembler() = default;
|
||||
@ -62,7 +62,7 @@ private:
|
||||
|
||||
};
|
||||
|
||||
class b5500_disassembler : public b5000_common_disassembler
|
||||
class b5500_disassembler : public rw5000_common_disassembler
|
||||
{
|
||||
public:
|
||||
b5500_disassembler() = default;
|
||||
@ -75,4 +75,4 @@ private:
|
||||
|
||||
};
|
||||
|
||||
#endif // MAME_CPU_B5000_B5000D_H
|
||||
#endif // MAME_CPU_RW5000_RW5000D_H
|
||||
@ -64,7 +64,7 @@ private:
|
||||
void rama1_w(u8 data);
|
||||
u8 input_r();
|
||||
|
||||
u8 m_ram[0x100];
|
||||
u8 m_ram[0x100] = { };
|
||||
u8 m_ram_address = 0;
|
||||
u8 m_ram_data = 0;
|
||||
u8 m_ram_control = 0;
|
||||
@ -76,8 +76,6 @@ private:
|
||||
|
||||
void cr_state::machine_start()
|
||||
{
|
||||
memset(m_ram, 0, sizeof(m_ram));
|
||||
|
||||
// register for savestates
|
||||
save_item(NAME(m_ram));
|
||||
save_item(NAME(m_ram_address));
|
||||
|
||||
@ -82,10 +82,6 @@ private:
|
||||
|
||||
void dsc_state::machine_start()
|
||||
{
|
||||
// zerofill
|
||||
m_inp_mux = 0;
|
||||
m_led_select = 0;
|
||||
|
||||
// register for savestates
|
||||
save_item(NAME(m_inp_mux));
|
||||
save_item(NAME(m_led_select));
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
// thanks-to:Sean Riddle
|
||||
/***************************************************************************
|
||||
|
||||
Rockwell B5000 MCU series handhelds (before PPS-4/1)
|
||||
Rockwell A/B5000 MCU series handhelds (before PPS-4/1)
|
||||
Mostly calculators on these MCUs, but also Mattel's first couple of handhelds.
|
||||
|
||||
ROM source notes when dumped from another model, but confident it's the same:
|
||||
@ -14,9 +14,9 @@ ROM source notes when dumped from another model, but confident it's the same:
|
||||
|
||||
#include "emu.h"
|
||||
|
||||
#include "cpu/b5000/b5000.h"
|
||||
#include "cpu/b5000/b6000.h"
|
||||
#include "cpu/b5000/b6100.h"
|
||||
#include "cpu/rw5000/b5000.h"
|
||||
#include "cpu/rw5000/b6000.h"
|
||||
#include "cpu/rw5000/b6100.h"
|
||||
#include "video/pwm.h"
|
||||
#include "sound/spkrdev.h"
|
||||
|
||||
@ -30,13 +30,13 @@ ROM source notes when dumped from another model, but confident it's the same:
|
||||
#include "misatk.lh"
|
||||
#include "rw18r.lh"
|
||||
|
||||
//#include "hh_b5000_test.lh" // common test-layout - use external artwork
|
||||
//#include "hh_rw5000_test.lh" // common test-layout - use external artwork
|
||||
|
||||
|
||||
class hh_b5000_state : public driver_device
|
||||
class hh_rw5000_state : public driver_device
|
||||
{
|
||||
public:
|
||||
hh_b5000_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
hh_rw5000_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
driver_device(mconfig, type, tag),
|
||||
m_maincpu(*this, "maincpu"),
|
||||
m_display(*this, "display"),
|
||||
@ -53,7 +53,7 @@ protected:
|
||||
virtual void machine_reset() override;
|
||||
|
||||
// devices
|
||||
required_device<b5000_base_device> m_maincpu;
|
||||
required_device<rw5000_base_device> m_maincpu;
|
||||
optional_device<pwm_display_device> m_display;
|
||||
optional_device<speaker_sound_device> m_speaker;
|
||||
optional_ioport_array<5> m_inputs; // max 5
|
||||
@ -71,7 +71,7 @@ protected:
|
||||
|
||||
// machine start/reset
|
||||
|
||||
void hh_b5000_state::machine_start()
|
||||
void hh_rw5000_state::machine_start()
|
||||
{
|
||||
// register for savestates
|
||||
save_item(NAME(m_inp_mux));
|
||||
@ -79,7 +79,7 @@ void hh_b5000_state::machine_start()
|
||||
save_item(NAME(m_seg));
|
||||
}
|
||||
|
||||
void hh_b5000_state::machine_reset()
|
||||
void hh_rw5000_state::machine_reset()
|
||||
{
|
||||
}
|
||||
|
||||
@ -93,7 +93,7 @@ void hh_b5000_state::machine_reset()
|
||||
|
||||
// generic input handlers
|
||||
|
||||
u8 hh_b5000_state::read_inputs(int columns)
|
||||
u8 hh_rw5000_state::read_inputs(int columns)
|
||||
{
|
||||
u8 ret = 0;
|
||||
|
||||
@ -105,7 +105,7 @@ u8 hh_b5000_state::read_inputs(int columns)
|
||||
return ret;
|
||||
}
|
||||
|
||||
void hh_b5000_state::switch_change(int sel, u32 mask, bool next)
|
||||
void hh_rw5000_state::switch_change(int sel, u32 mask, bool next)
|
||||
{
|
||||
// config switches (for direct control)
|
||||
ioport_field *inp = m_inputs[sel]->field(mask);
|
||||
@ -116,7 +116,7 @@ void hh_b5000_state::switch_change(int sel, u32 mask, bool next)
|
||||
inp->select_previous_setting();
|
||||
}
|
||||
|
||||
INPUT_CHANGED_MEMBER(hh_b5000_state::power_button)
|
||||
INPUT_CHANGED_MEMBER(hh_rw5000_state::power_button)
|
||||
{
|
||||
// power button or switch
|
||||
bool power = (param) ? (bool(param - 1)) : !newval;
|
||||
@ -150,11 +150,11 @@ namespace {
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
class autorace_state : public hh_b5000_state
|
||||
class autorace_state : public hh_rw5000_state
|
||||
{
|
||||
public:
|
||||
autorace_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
hh_b5000_state(mconfig, type, tag)
|
||||
hh_rw5000_state(mconfig, type, tag)
|
||||
{ }
|
||||
|
||||
void autorace(machine_config &config);
|
||||
@ -194,11 +194,11 @@ static INPUT_PORTS_START( autorace )
|
||||
PORT_CONFSETTING( 0x01, DEF_STR( On ) )
|
||||
|
||||
PORT_START("POWER") // power switch
|
||||
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_b5000_state, power_button, 0) PORT_NAME("Start / Reset")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_rw5000_state, power_button, 0) PORT_NAME("Start / Reset")
|
||||
|
||||
PORT_START("SWITCH") // fake
|
||||
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_b5000_state, switch_prev<0>, 0x0c) PORT_NAME("Gear Switch Down")
|
||||
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_b5000_state, switch_next<0>, 0x0c) PORT_NAME("Gear Switch Up")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_rw5000_state, switch_prev<0>, 0x0c) PORT_NAME("Gear Switch Down")
|
||||
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_rw5000_state, switch_next<0>, 0x0c) PORT_NAME("Gear Switch Up")
|
||||
INPUT_PORTS_END
|
||||
|
||||
void autorace_state::autorace(machine_config &config)
|
||||
@ -247,11 +247,11 @@ ROM_END
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
class misatk_state : public hh_b5000_state
|
||||
class misatk_state : public hh_rw5000_state
|
||||
{
|
||||
public:
|
||||
misatk_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
hh_b5000_state(mconfig, type, tag)
|
||||
hh_rw5000_state(mconfig, type, tag)
|
||||
{ }
|
||||
|
||||
void misatk(machine_config &config);
|
||||
@ -288,7 +288,7 @@ static INPUT_PORTS_START( misatk )
|
||||
PORT_CONFSETTING( 0x01, DEF_STR( On ) )
|
||||
|
||||
PORT_START("POWER") // power switch
|
||||
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_b5000_state, power_button, 0) PORT_NAME("Arm / Off")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START ) PORT_CHANGED_MEMBER(DEVICE_SELF, hh_rw5000_state, power_button, 0) PORT_NAME("Arm / Off")
|
||||
INPUT_PORTS_END
|
||||
|
||||
void misatk_state::misatk(machine_config &config)
|
||||
@ -333,11 +333,11 @@ ROM_END
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
class mfootb_state : public hh_b5000_state
|
||||
class mfootb_state : public hh_rw5000_state
|
||||
{
|
||||
public:
|
||||
mfootb_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
hh_b5000_state(mconfig, type, tag)
|
||||
hh_rw5000_state(mconfig, type, tag)
|
||||
{ }
|
||||
|
||||
void mfootb(machine_config &config);
|
||||
@ -433,11 +433,11 @@ ROM_END
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
class mbaseb_state : public hh_b5000_state
|
||||
class mbaseb_state : public hh_rw5000_state
|
||||
{
|
||||
public:
|
||||
mbaseb_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
hh_b5000_state(mconfig, type, tag)
|
||||
hh_rw5000_state(mconfig, type, tag)
|
||||
{ }
|
||||
|
||||
void mbaseb(machine_config &config);
|
||||
@ -528,11 +528,11 @@ ROM_END
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
class gravity_state : public hh_b5000_state
|
||||
class gravity_state : public hh_rw5000_state
|
||||
{
|
||||
public:
|
||||
gravity_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
hh_b5000_state(mconfig, type, tag)
|
||||
hh_rw5000_state(mconfig, type, tag)
|
||||
{ }
|
||||
|
||||
void gravity(machine_config &config);
|
||||
@ -612,11 +612,11 @@ ROM_END
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
class rw18r_state : public hh_b5000_state
|
||||
class rw18r_state : public hh_rw5000_state
|
||||
{
|
||||
public:
|
||||
rw18r_state(const machine_config &mconfig, device_type type, const char *tag) :
|
||||
hh_b5000_state(mconfig, type, tag)
|
||||
hh_rw5000_state(mconfig, type, tag)
|
||||
{ }
|
||||
|
||||
void rw18r(machine_config &config);
|
||||
@ -533,8 +533,6 @@ void tispeak_state::machine_start()
|
||||
|
||||
void tispeak_state::init_cartridge()
|
||||
{
|
||||
m_overlay = 0;
|
||||
|
||||
if (m_cart != nullptr && m_cart->exists())
|
||||
{
|
||||
std::string region_tag;
|
||||
|
||||
@ -16442,14 +16442,6 @@ hexionb // bootleg
|
||||
@source:hh_amis2k.cpp
|
||||
wildfire // Parker Bros
|
||||
|
||||
@source:hh_b5000.cpp
|
||||
autorace // Mattel
|
||||
gravity // Mattel
|
||||
mbaseb // Mattel
|
||||
mfootb // Mattel
|
||||
misatk // Mattel
|
||||
rw18r // Rockwell
|
||||
|
||||
@source:hh_cop400.cpp
|
||||
bship82 // Milton Bradley
|
||||
ctstein // Castle Toy
|
||||
@ -16550,6 +16542,14 @@ rdqa // Selchow & Righter
|
||||
scrabsen // Selchow & Righter
|
||||
smastmind // Invicta
|
||||
|
||||
@source:hh_rw5000.cpp
|
||||
autorace // Mattel
|
||||
gravity // Mattel
|
||||
mbaseb // Mattel
|
||||
mfootb // Mattel
|
||||
misatk // Mattel
|
||||
rw18r // Rockwell
|
||||
|
||||
@source:hh_sm510.cpp
|
||||
atakaast // Elektronika
|
||||
auslalom // Elektronika
|
||||
|
||||
@ -406,13 +406,13 @@ hec2hrp.cpp
|
||||
hektor.cpp
|
||||
hhtiger.cpp
|
||||
hh_amis2k.cpp
|
||||
hh_b5000.cpp
|
||||
hh_cop400.cpp
|
||||
hh_cops1.cpp
|
||||
hh_hmcs40.cpp
|
||||
hh_melps4.cpp
|
||||
hh_pic16.cpp
|
||||
hh_pps41.cpp
|
||||
hh_rw5000.cpp
|
||||
hh_sm510.cpp
|
||||
hh_tms1k.cpp
|
||||
hh_ucom4.cpp
|
||||
|
||||
@ -28,7 +28,6 @@ using util::BIT;
|
||||
#include "cpu/arm7/arm7dasm.h"
|
||||
#include "cpu/asap/asapdasm.h"
|
||||
#include "cpu/avr8/avr8dasm.h"
|
||||
#include "cpu/b5000/b5000d.h"
|
||||
#include "cpu/bcp/bcpdasm.h"
|
||||
#include "cpu/capricorn/capricorn_dasm.h"
|
||||
#include "cpu/ccpu/ccpudasm.h"
|
||||
@ -140,6 +139,7 @@ using util::BIT;
|
||||
#include "cpu/rii/riidasm.h"
|
||||
#include "cpu/romp/rompdasm.h"
|
||||
#include "cpu/rsp/rsp_dasm.h"
|
||||
#include "cpu/rw5000/rw5000d.h"
|
||||
#include "cpu/rx01/rx01dasm.h"
|
||||
#include "cpu/s2650/2650dasm.h"
|
||||
#include "cpu/saturn/saturnds.h"
|
||||
|
||||
Loading…
Reference in New Issue
Block a user