msm5232: revise caps and resistors values [Yaei, TremiRodomi] (#11127)

This commit is contained in:
Olivier Galibert 2023-04-23 16:57:24 +02:00 committed by GitHub
parent 9f0e84c601
commit ebe7cb8150
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
7 changed files with 34 additions and 55 deletions

View File

@ -199,31 +199,35 @@ static FILE *sample[9];
/*
* resistance values are guesswork, default capacity is mentioned in the datasheets
* Resistance values are guesswork, default capacity is mentioned in the datasheets
*
* charges external capacitor (default is 0.39uF) via R51
* in approx. 5*1400 * 0.39e-6
* Two errors in the datasheet, one probable, one certain
* - it mentions 0.39uF caps, but most boards have 1uF caps and expect datasheet timings
*
* external capacitor is discharged through R52
* in approx. 5*28750 * 0.39e-6
* - the 330ms timing of decay2 has been measured to be 250ms (which
* also matches the duty cycle information for the rest of the table)
*
* In both cases it ends up with smaller resistor values, which are
* easier to do on-die.
*
* The timings are for a 90% charge/discharge of the external
* capacitor through three possible resistors, one for attack, two for
* decay.
*
* Expected timings are 2ms, 40ms and 250ms respectively with a 1uF
* capacitor.
*
* exp(-t/(r*c)) = (100% - 90%) => r = -r/(log(0.1)*c)
*
* 2ms -> 870 ohms
* 40ms -> 17400 ohms
* 250ms -> 101000 ohms
*/
#define R51 1400 /* charge resistance */
#define R52 28750 /* discharge resistance */
#if 0
/*
C24 = external capacity
osd_printf_debug("Time constant T=R*C =%f sec.\n",R51*C24);
osd_printf_debug("Cap fully charged after 5T=%f sec (sample=%f). Level=%f\n",(R51*C24)*5,(R51*C24)*5*sample_rate , VMAX*0.99326 );
osd_printf_debug("Cap charged after 5T=%f sec (sample=%f). Level=%20.16f\n",(R51*C24)*5,(R51*C24)*5*sample_rate ,
VMAX*(1.0-pow(2.718,-0.0748/(R51*C24))) );
*/
#endif
static constexpr double R51 = 870; /* attack resistance */
static constexpr double R52 = 17400; /* decay 1 resistance */
static constexpr double R53 = 101000; /* decay 2 resistance */
void msm5232_device::init_tables()
@ -244,31 +248,6 @@ void msm5232_device::init_tables()
m_noise_step = ((1<<STEP_SH)/128.0) * scale; /* step of the rng reg in 16.16 format */
/* logerror("noise step=%8x\n", m_noise_step); */
#if 0
{
/* rate tables (in milliseconds) */
static const int ATBL[8] = { 2,4,8,16, 32,64, 32,64};
static const int DTBL[16]= { 40,80,160,320, 640,1280, 640,1280,
333,500,1000,2000, 4000,8000, 4000,8000};
for (i=0; i<8; i++)
{
double clockscale = (double)m_chip_clock / 2119040.0;
double time = (ATBL[i] / 1000.0) / clockscale; /* attack time in seconds */
m_ar_tbl[i] = 0.50 * ( (1.0/time) / (double)m_rate );
/* logerror("ATBL[%i] = %20.16f time = %f s\n",i, m_ar_tbl[i], time); */
}
for (i=0; i<16; i++)
{
double clockscale = (double)m_chip_clock / 2119040.0;
double time = (DTBL[i] / 1000.0) / clockscale; /* decay time in seconds */
m_dr_tbl[i] = 0.50 * ( (1.0/time) / (double)m_rate );
/* logerror("DTBL[%i] = %20.16f time = %f s\n",i, m_dr_tbl[i], time); */
}
}
#endif
for (i=0; i<8; i++)
{
double clockscale = (double)m_chip_clock / 2119040.0;
@ -278,8 +257,8 @@ void msm5232_device::init_tables()
for (i=0; i<8; i++)
{
double clockscale = (double)m_chip_clock / 2119040.0;
m_dr_tbl[i] = ( (1<<i) / clockscale) * (double)R52;
m_dr_tbl[i+8] = (6.25*(1<<i) / clockscale) * (double)R52;
m_dr_tbl[i] = ((1<<i) / clockscale) * (double)R52;
m_dr_tbl[i+8] = ((1<<i) / clockscale) * (double)R53;
}

View File

@ -324,7 +324,7 @@ void ladyfrog_state::ladyfrog(machine_config &config)
aysnd.add_route(ALL_OUTPUTS, "mono", 0.15);
MSM5232(config, m_msm, XTAL(8'000'000)/4);
m_msm->set_capacitors(0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6);
m_msm->set_capacitors(1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6);
m_msm->add_route(0, "mono", 1.0); // pin 28 2'-1
m_msm->add_route(1, "mono", 1.0); // pin 29 4'-1
m_msm->add_route(2, "mono", 1.0); // pin 30 8'-1

View File

@ -595,7 +595,7 @@ void bigevglf_state::bigevglf(machine_config &config)
YM2149(config, "aysnd", 8_MHz_XTAL / 4).add_route(ALL_OUTPUTS, "mono", 0.15); // divider not verified
MSM5232(config, m_msm, 8_MHz_XTAL / 4); // divider not verified
m_msm->set_capacitors(0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6); // 0.65 (???) uF capacitors
m_msm->set_capacitors(1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6); // 1 uF capacitors ?
m_msm->add_route(0, "mono", 1.0); // pin 28 2'-1
m_msm->add_route(1, "mono", 1.0); // pin 29 4'-1
m_msm->add_route(2, "mono", 1.0); // pin 30 8'-1

View File

@ -892,7 +892,7 @@ void buggychl_state::buggychl(machine_config &config)
m_ay[1]->add_route(ALL_OUTPUTS, "mono", 0.50);
MSM5232(config, m_msm, 8_MHz_XTAL / 4);
m_msm->set_capacitors(0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6); // default 0.39 uF capacitors (not verified)
m_msm->set_capacitors(1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6); // default 1 uF capacitors (not verified)
m_msm->add_route(0, "mono", 1.0); // pin 28 2'-1
m_msm->add_route(1, "mono", 1.0); // pin 29 4'-1
m_msm->add_route(2, "mono", 1.0); // pin 30 8'-1

View File

@ -815,7 +815,7 @@ void msisaac_state::msisaac(machine_config &config)
// port A/B likely to be TA7630 filters
MSM5232(config, m_msm, 2'000'000);
m_msm->set_capacitors(0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6); // 0.65 (???) uF capacitors (match the sample, not verified)
m_msm->set_capacitors(1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6); // 1 uF capacitors (match the sample, not verified, standard)
m_msm->add_route(0, "mono", 1.0); // pin 28 2'-1
m_msm->add_route(1, "mono", 1.0); // pin 29 4'-1
m_msm->add_route(2, "mono", 1.0); // pin 30 8'-1

View File

@ -782,7 +782,7 @@ void nycaptor_state::nycaptor(machine_config &config)
ay2.add_route(ALL_OUTPUTS, "speaker", 0.15);
MSM5232(config, m_msm, 2000000);
m_msm->set_capacitors(0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6); /* 0.65 (???) uF capacitors (match the sample, not verified) */
m_msm->set_capacitors(1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6); /* 1 uF capacitors (match the sample, not verified, standard) */
m_msm->add_route(0, "speaker", 1.0); // pin 28 2'-1
m_msm->add_route(1, "speaker", 1.0); // pin 29 4'-1
m_msm->add_route(2, "speaker", 1.0); // pin 30 8'-1
@ -849,7 +849,7 @@ void nycaptor_state::cyclshtg(machine_config &config)
ay2.add_route(ALL_OUTPUTS, "speaker", 0.15);
MSM5232(config, m_msm, 2000000);
m_msm->set_capacitors(0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6); /* 0.65 (???) uF capacitors (match the sample, not verified) */
m_msm->set_capacitors(1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6); /* 1 uF capacitors (match the sample, not verified, standard) */
m_msm->add_route(0, "speaker", 1.0); // pin 28 2'-1
m_msm->add_route(1, "speaker", 1.0); // pin 29 4'-1
m_msm->add_route(2, "speaker", 1.0); // pin 30 8'-1
@ -913,7 +913,7 @@ void nycaptor_state::bronx(machine_config &config)
ay2.add_route(ALL_OUTPUTS, "speaker", 0.15);
MSM5232(config, m_msm, 2000000);
m_msm->set_capacitors(0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6); /* 0.65 (???) uF capacitors (match the sample, not verified) */
m_msm->set_capacitors(1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6); /* 1 uF capacitors (match the sample, not verified, standard) */
m_msm->add_route(0, "speaker", 1.0); // pin 28 2'-1
m_msm->add_route(1, "speaker", 1.0); // pin 29 4'-1
m_msm->add_route(2, "speaker", 1.0); // pin 30 8'-1

View File

@ -674,7 +674,7 @@ void wyvernf0_state::wyvernf0(machine_config &config)
// music
msm5232_device &msm(MSM5232(config, "msm", 2_MHz_XTAL)); // 2MHz - Clock verified
msm.set_capacitors(0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6); /* default 0.39 uF capacitors (not verified) */
msm.set_capacitors(1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6, 1e-6); /* default 1 uF capacitors (not verified) */
msm.add_route(0, "mono", 0.5); // pin 28 2'-1
msm.add_route(1, "mono", 0.5); // pin 29 4'-1
msm.add_route(2, "mono", 0.5); // pin 30 8'-1