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https://github.com/holub/mame
synced 2025-07-14 14:02:01 +03:00
(MESS) trs80.c: Reduce tagmap lookups (nw)
This commit is contained in:
parent
3ffebc8589
commit
ec2c30c77c
@ -26,15 +26,33 @@ class trs80_state : public driver_device
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{
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public:
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trs80_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_printer(*this, "centronics"),
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m_ay31015(*this, "tr1602"),
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m_fdc(*this, "wd179x"),
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m_speaker(*this, SPEAKER_TAG),
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m_cass(*this, CASSETTE_TAG),
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m_p_videoram(*this, "p_videoram"),
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m_region_maincpu(*this, "maincpu")
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: driver_device(mconfig, type, tag)
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, m_maincpu(*this, "maincpu")
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, m_printer(*this, "centronics")
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, m_ay31015(*this, "tr1602")
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, m_fdc(*this, "wd179x")
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, m_speaker(*this, SPEAKER_TAG)
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, m_cass(*this, CASSETTE_TAG)
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, m_p_videoram(*this, "p_videoram")
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, m_region_maincpu(*this, "maincpu")
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, m_bank1(NULL)
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, m_bank2(NULL)
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, m_bank3(NULL)
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, m_bank4(NULL)
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, m_bank5(NULL)
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, m_bank6(NULL)
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, m_bank7(NULL)
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, m_bank8(NULL)
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, m_bank9(NULL)
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, m_bank11(NULL)
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, m_bank12(NULL)
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, m_bank13(NULL)
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, m_bank14(NULL)
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, m_bank15(NULL)
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, m_bank16(NULL)
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, m_bank17(NULL)
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, m_bank18(NULL)
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, m_bank19(NULL)
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{ }
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required_device<cpu_device> m_maincpu;
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@ -130,6 +148,24 @@ public:
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protected:
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required_memory_region m_region_maincpu;
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memory_bank *m_bank1;
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memory_bank *m_bank2;
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memory_bank *m_bank3;
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memory_bank *m_bank4;
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memory_bank *m_bank5;
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memory_bank *m_bank6;
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memory_bank *m_bank7;
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memory_bank *m_bank8;
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memory_bank *m_bank9;
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memory_bank *m_bank11;
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memory_bank *m_bank12;
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memory_bank *m_bank13;
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memory_bank *m_bank14;
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memory_bank *m_bank15;
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memory_bank *m_bank16;
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memory_bank *m_bank17;
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memory_bank *m_bank18;
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memory_bank *m_bank19;
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void trs80_fdc_interrupt_internal();
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};
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@ -230,30 +230,30 @@ WRITE8_MEMBER( trs80_state::trs80m4_84_w )
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if (m_model4 & 4) /* Model 4P gets RAM while Model 4 gets ROM */
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{
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if (m_model4 & 8)
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membank("bank1")->set_base(base);
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m_bank1->set_base(base);
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else
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membank("bank1")->set_base(base + 0x10000);
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m_bank1->set_base(base + 0x10000);
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membank("bank2")->set_base(base + 0x11000);
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membank("bank4")->set_base(base + 0x137ea);
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m_bank2->set_base(base + 0x11000);
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m_bank4->set_base(base + 0x137ea);
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}
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else
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{
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membank("bank1")->set_base(base);
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membank("bank2")->set_base(base + 0x01000);
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membank("bank4")->set_base(base + 0x037ea);
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m_bank1->set_base(base);
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m_bank2->set_base(base + 0x01000);
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m_bank4->set_base(base + 0x037ea);
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}
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membank("bank7")->set_base(base + 0x14000);
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membank("bank8")->set_base(base + 0x1f400);
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membank("bank9")->set_base(base + 0x1f800);
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membank("bank11")->set_base(base + 0x05000);
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membank("bank12")->set_base(base + 0x06000);
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membank("bank14")->set_base(base + 0x09000);
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membank("bank15")->set_base(base + 0x0a000);
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membank("bank17")->set_base(base + 0x14000);
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membank("bank18")->set_base(base + 0x1f400);
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membank("bank19")->set_base(base + 0x1f800);
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m_bank7->set_base(base + 0x14000);
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m_bank8->set_base(base + 0x1f400);
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m_bank9->set_base(base + 0x1f800);
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m_bank11->set_base(base + 0x05000);
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m_bank12->set_base(base + 0x06000);
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m_bank14->set_base(base + 0x09000);
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m_bank15->set_base(base + 0x0a000);
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m_bank17->set_base(base + 0x14000);
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m_bank18->set_base(base + 0x1f400);
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m_bank19->set_base(base + 0x1f800);
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mem.install_readwrite_handler (0x37e8, 0x37e9, read8_delegate(FUNC(trs80_state::trs80_printer_r), this), write8_delegate(FUNC(trs80_state::trs80_printer_w), this)); /* 3 & 13 */
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mem.install_read_handler (0x3800, 0x3bff, read8_delegate(FUNC(trs80_state::trs80_keyboard_r), this)); /* 5 */
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mem.install_readwrite_handler (0x3c00, 0x3fff, read8_delegate(FUNC(trs80_state::trs80_videoram_r), this), write8_delegate(FUNC(trs80_state::trs80_videoram_w), this)); /* 6 & 16 */
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@ -264,77 +264,77 @@ WRITE8_MEMBER( trs80_state::trs80m4_84_w )
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if (m_model4 & 4) /* Model 4P gets RAM while Model 4 gets ROM */
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{
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if (m_model4 & 8)
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membank("bank1")->set_base(base);
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m_bank1->set_base(base);
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else
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membank("bank1")->set_base(base + 0x10000);
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m_bank1->set_base(base + 0x10000);
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membank("bank2")->set_base(base + 0x11000);
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membank("bank3")->set_base(base + 0x137e8);
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membank("bank4")->set_base(base + 0x137ea);
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m_bank2->set_base(base + 0x11000);
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m_bank3->set_base(base + 0x137e8);
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m_bank4->set_base(base + 0x137ea);
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}
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else
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{
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membank("bank1")->set_base(base);
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membank("bank2")->set_base(base + 0x01000);
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membank("bank3")->set_base(base + 0x037e8);
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membank("bank4")->set_base(base + 0x037ea);
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m_bank1->set_base(base);
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m_bank2->set_base(base + 0x01000);
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m_bank3->set_base(base + 0x037e8);
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m_bank4->set_base(base + 0x037ea);
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}
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membank("bank7")->set_base(base + 0x14000);
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membank("bank8")->set_base(base + 0x1f400);
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membank("bank9")->set_base(base + 0x1f800);
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membank("bank11")->set_base(base + 0x10000);
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membank("bank12")->set_base(base + 0x11000);
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membank("bank13")->set_base(base + 0x137e8);
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membank("bank14")->set_base(base + 0x137ea);
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membank("bank15")->set_base(base + 0x0a000);
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membank("bank17")->set_base(base + 0x14000);
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membank("bank18")->set_base(base + 0x1f400);
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membank("bank19")->set_base(base + 0x1f800);
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m_bank7->set_base(base + 0x14000);
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m_bank8->set_base(base + 0x1f400);
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m_bank9->set_base(base + 0x1f800);
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m_bank11->set_base(base + 0x10000);
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m_bank12->set_base(base + 0x11000);
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m_bank13->set_base(base + 0x137e8);
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m_bank14->set_base(base + 0x137ea);
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m_bank15->set_base(base + 0x0a000);
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m_bank17->set_base(base + 0x14000);
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m_bank18->set_base(base + 0x1f400);
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m_bank19->set_base(base + 0x1f800);
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mem.install_read_handler (0x3800, 0x3bff, read8_delegate(FUNC(trs80_state::trs80_keyboard_r), this)); /* 5 */
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mem.install_readwrite_handler (0x3c00, 0x3fff, read8_delegate(FUNC(trs80_state::trs80_videoram_r), this), write8_delegate(FUNC(trs80_state::trs80_videoram_w), this)); /* 6 & 16 */
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break;
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case 2: /* keyboard and video are moved to high memory, and the rest is ram */
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membank("bank1")->set_base(base + 0x10000);
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membank("bank2")->set_base(base + 0x11000);
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membank("bank3")->set_base(base + 0x137e8);
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membank("bank4")->set_base(base + 0x137ea);
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membank("bank5")->set_base(base + 0x13800);
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membank("bank6")->set_base(base + 0x13c00);
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membank("bank7")->set_base(base + 0x14000);
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membank("bank11")->set_base(base + 0x10000);
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membank("bank12")->set_base(base + 0x11000);
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membank("bank13")->set_base(base + 0x137e8);
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membank("bank14")->set_base(base + 0x137ea);
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membank("bank15")->set_base(base + 0x13800);
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membank("bank16")->set_base(base + 0x13c00);
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membank("bank17")->set_base(base + 0x14000);
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membank("bank18")->set_base(base + 0x0a000);
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m_bank1->set_base(base + 0x10000);
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m_bank2->set_base(base + 0x11000);
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m_bank3->set_base(base + 0x137e8);
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m_bank4->set_base(base + 0x137ea);
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m_bank5->set_base(base + 0x13800);
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m_bank6->set_base(base + 0x13c00);
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m_bank7->set_base(base + 0x14000);
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m_bank11->set_base(base + 0x10000);
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m_bank12->set_base(base + 0x11000);
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m_bank13->set_base(base + 0x137e8);
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m_bank14->set_base(base + 0x137ea);
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m_bank15->set_base(base + 0x13800);
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m_bank16->set_base(base + 0x13c00);
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m_bank17->set_base(base + 0x14000);
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m_bank18->set_base(base + 0x0a000);
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mem.install_read_handler (0xf400, 0xf7ff, read8_delegate(FUNC(trs80_state::trs80_keyboard_r), this)); /* 8 */
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mem.install_readwrite_handler (0xf800, 0xffff, read8_delegate(FUNC(trs80_state::trs80_videoram_r), this), write8_delegate(FUNC(trs80_state::trs80_videoram_w), this)); /* 9 & 19 */
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m_model4++;
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break;
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case 3: /* 64k of ram */
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membank("bank1")->set_base(base + 0x10000);
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membank("bank2")->set_base(base + 0x11000);
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membank("bank3")->set_base(base + 0x137e8);
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membank("bank4")->set_base(base + 0x137ea);
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membank("bank5")->set_base(base + 0x13800);
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membank("bank6")->set_base(base + 0x13c00);
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membank("bank7")->set_base(base + 0x14000);
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membank("bank8")->set_base(base + 0x1f400);
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membank("bank9")->set_base(base + 0x1f800);
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membank("bank11")->set_base(base + 0x10000);
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membank("bank12")->set_base(base + 0x11000);
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membank("bank13")->set_base(base + 0x137e8);
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membank("bank14")->set_base(base + 0x137ea);
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membank("bank15")->set_base(base + 0x13800);
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membank("bank16")->set_base(base + 0x13c00);
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membank("bank17")->set_base(base + 0x14000);
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membank("bank18")->set_base(base + 0x1f400);
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membank("bank19")->set_base(base + 0x1f800);
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m_bank1->set_base(base + 0x10000);
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m_bank2->set_base(base + 0x11000);
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m_bank3->set_base(base + 0x137e8);
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m_bank4->set_base(base + 0x137ea);
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m_bank5->set_base(base + 0x13800);
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m_bank6->set_base(base + 0x13c00);
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m_bank7->set_base(base + 0x14000);
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m_bank8->set_base(base + 0x1f400);
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m_bank9->set_base(base + 0x1f800);
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m_bank11->set_base(base + 0x10000);
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m_bank12->set_base(base + 0x11000);
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m_bank13->set_base(base + 0x137e8);
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m_bank14->set_base(base + 0x137ea);
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m_bank15->set_base(base + 0x13800);
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m_bank16->set_base(base + 0x13c00);
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m_bank17->set_base(base + 0x14000);
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m_bank18->set_base(base + 0x1f400);
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m_bank19->set_base(base + 0x1f800);
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break;
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}
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}
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@ -361,10 +361,10 @@ WRITE8_MEMBER( trs80_state::trs80m4p_9c_w ) /* model 4P only - swaps the ROM
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switch (m_model4 & 8)
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{
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case 0: /* Read-only RAM replaces rom */
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membank("bank1")->set_base(m_region_maincpu->base() + 0x10000);
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m_bank1->set_base(m_region_maincpu->base() + 0x10000);
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break;
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case 8: /* Normal setup - rom enabled */
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membank("bank1")->set_base(m_region_maincpu->base());
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m_bank1->set_base(m_region_maincpu->base());
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break;
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}
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}
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@ -863,24 +863,42 @@ MACHINE_RESET_MEMBER(trs80_state,trs80m4)
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m_cassette_data = 0;
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mem.install_read_bank (0x0000, 0x0fff, "bank1");
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m_bank1 = membank("bank1");
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mem.install_read_bank (0x1000, 0x37e7, "bank2");
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m_bank2 = membank("bank2");
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mem.install_read_bank (0x37e8, 0x37e9, "bank3");
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m_bank3 = membank("bank3");
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mem.install_read_bank (0x37ea, 0x37ff, "bank4");
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m_bank4 = membank("bank4");
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mem.install_read_bank (0x3800, 0x3bff, "bank5");
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m_bank5 = membank("bank5");
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mem.install_read_bank (0x3c00, 0x3fff, "bank6");
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m_bank6 = membank("bank6");
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mem.install_read_bank (0x4000, 0xf3ff, "bank7");
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m_bank7 = membank("bank7");
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mem.install_read_bank (0xf400, 0xf7ff, "bank8");
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m_bank8 = membank("bank8");
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mem.install_read_bank (0xf800, 0xffff, "bank9");
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m_bank9 = membank("bank9");
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mem.install_write_bank (0x0000, 0x0fff, "bank11");
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m_bank11 = membank("bank11");
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mem.install_write_bank (0x1000, 0x37e7, "bank12");
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m_bank12 = membank("bank12");
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mem.install_write_bank (0x37e8, 0x37e9, "bank13");
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m_bank13 = membank("bank13");
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mem.install_write_bank (0x37ea, 0x37ff, "bank14");
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m_bank14 = membank("bank14");
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mem.install_write_bank (0x3800, 0x3bff, "bank15");
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m_bank15 = membank("bank15");
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mem.install_write_bank (0x3c00, 0x3fff, "bank16");
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m_bank16 = membank("bank16");
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mem.install_write_bank (0x4000, 0xf3ff, "bank17");
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m_bank17 = membank("bank17");
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mem.install_write_bank (0xf400, 0xf7ff, "bank18");
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m_bank18 = membank("bank18");
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mem.install_write_bank (0xf800, 0xffff, "bank19");
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m_bank19 = membank("bank19");
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trs80m4p_9c_w(mem, 0, 1); /* Enable the ROM */
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trs80m4_84_w(mem, 0, 0); /* switch in devices at power-on */
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}
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