mirror of
https://github.com/holub/mame
synced 2025-06-25 22:04:15 +03:00
Save state support:
* added save state support to the MIPS3 recompiler * added save state support to CAGE audio system * added save state support to the voodoo emulator * added save state support to the smc91c9x emulator * added save state support to the kinst, seattle, and vegas drivers * fixed core video handling of save states with dynamic screen resolutions SMC91C9x: * converted to proper device * updated seattle and vegas drivers to allocate devices * added separate 91C96 device for eventual 2049 use * cleaned up code
This commit is contained in:
parent
1fc4546190
commit
ec54e3911d
@ -7,6 +7,7 @@
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***************************************************************************/
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#include "mips3com.h"
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#include "deprecat.h"
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/***************************************************************************
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@ -21,6 +22,7 @@
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FUNCTION PROTOTYPES
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***************************************************************************/
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static STATE_POSTLOAD( mips3_postload );
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static TIMER_CALLBACK( compare_int_callback );
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static UINT32 compute_config_register(const mips3_state *mips);
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@ -70,6 +72,8 @@ INLINE int tlb_entry_is_global(const mips3_tlb_entry *entry)
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void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, int index, int clock, const mips3_config *config, int (*irqcallback)(int))
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{
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int tlbindex;
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/* initialize based on the config */
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memset(mips, 0, sizeof(*mips));
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mips->flavor = flavor;
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@ -91,6 +95,43 @@ void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, int in
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/* reset the state */
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mips3com_reset(mips);
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/* register for save states */
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state_save_register_item("mips3", index, mips->pc);
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state_save_register_item_array("mips3", index, mips->r);
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state_save_register_item_2d_array("mips3", index, mips->cpr);
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state_save_register_item_2d_array("mips3", index, mips->ccr);
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state_save_register_item("mips3", index, mips->llbit);
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state_save_register_item("mips3", index, mips->count_zero_time);
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for (tlbindex = 0; tlbindex < ARRAY_LENGTH(mips->tlb); tlbindex++)
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{
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state_save_register_item("mips3", index * ARRAY_LENGTH(mips->tlb) + tlbindex, mips->tlb[tlbindex].page_mask);
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state_save_register_item("mips3", index * ARRAY_LENGTH(mips->tlb) + tlbindex, mips->tlb[tlbindex].entry_hi);
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state_save_register_item_array("mips3", index * ARRAY_LENGTH(mips->tlb) + tlbindex, mips->tlb[tlbindex].entry_lo);
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}
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state_save_register_postload(Machine, mips3_postload, mips);
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}
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/*-------------------------------------------------
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mips3_postload - post state load callback
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-------------------------------------------------*/
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static STATE_POSTLOAD( mips3_postload )
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{
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mips3_state *mips = param;
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int tlbindex;
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/* first clear out the existing TLB */
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for (tlbindex = 0; tlbindex < ARRAY_LENGTH(mips->tlb); tlbindex++)
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{
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vtlb_load(mips->vtlb, 2 * tlbindex + 0, 0, 0, 0);
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vtlb_load(mips->vtlb, 2 * tlbindex + 1, 0, 0, 0);
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}
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/* then remap the TLB */
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for (tlbindex = 0; tlbindex < ARRAY_LENGTH(mips->tlb); tlbindex++)
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tlb_map_entry(mips, tlbindex);
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}
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@ -16,22 +16,18 @@
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/*************************************
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*
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* Debugging constants
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*
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*************************************/
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/***************************************************************************
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DEBUGGING
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***************************************************************************/
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#define LOG_ETHERNET (0)
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#define DISPLAY_STATS (0)
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/*************************************
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*
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* Ethernet constants
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*
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*************************************/
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/***************************************************************************
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CONSTANTS
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***************************************************************************/
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#define ETHER_BUFFER_SIZE (2048)
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#define ETHER_RX_BUFFERS (4)
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@ -106,15 +102,15 @@ static const char *const ethernet_regname[64] =
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/*************************************
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*
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* Structures
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*
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*************************************/
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/***************************************************************************
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TYPE DEFINITIONS
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***************************************************************************/
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struct smc91c94_data
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typedef struct _smc91c9x_state smc91c9x_state;
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struct _smc91c9x_state
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{
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void (*irq_handler)(running_machine *machine, int state);
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const device_config *device;
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smc91c9x_irq_func irq_handler;
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/* raw register data and masks */
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UINT16 reg[64];
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@ -138,153 +134,94 @@ struct smc91c94_data
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/*************************************
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*
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* Local variables
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*
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*************************************/
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/***************************************************************************
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FUNCTION PROTOTYPES
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***************************************************************************/
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static struct smc91c94_data ethernet;
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static void update_ethernet_irq(smc91c9x_state *smc);
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/*************************************
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*
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* Prototypes
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*
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*************************************/
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/***************************************************************************
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INLINE FUNCTIONS
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***************************************************************************/
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static void update_ethernet_irq(running_machine *machine);
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/*-------------------------------------------------
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get_safe_token - makes sure that the passed
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in device is, in fact, an IDE controller
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-------------------------------------------------*/
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/*************************************
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*
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* Initialization
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*
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*************************************/
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void smc91c94_init(const struct smc91c9x_interface *config)
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INLINE smc91c9x_state *get_safe_token(const device_config *device)
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{
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ethernet.irq_handler = config->irq_handler;
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assert(device != NULL);
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assert(device->token != NULL);
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assert(device->type == SMC91C94 || device->type == SMC91C96);
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return (smc91c9x_state *)device->token;
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}
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/*************************************
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*
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* Reset
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*
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*************************************/
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/***************************************************************************
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INTERNAL HELPERS
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***************************************************************************/
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void smc91c94_reset(running_machine *machine)
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/*-------------------------------------------------
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update_ethernet_irq - update the IRQ state
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-------------------------------------------------*/
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static void update_ethernet_irq(smc91c9x_state *smc)
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{
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void (*saved_handler)(running_machine *machine, int) = ethernet.irq_handler;
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memset(ðernet, 0, sizeof(ethernet));
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ethernet.irq_handler = saved_handler;
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ethernet.reg[EREG_TCR] = 0x0000; ethernet.regmask[EREG_TCR] = 0x3d87;
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ethernet.reg[EREG_EPH_STATUS] = 0x0000; ethernet.regmask[EREG_EPH_STATUS] = 0x0000;
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ethernet.reg[EREG_RCR] = 0x0000; ethernet.regmask[EREG_RCR] = 0xc307;
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ethernet.reg[EREG_COUNTER] = 0x0000; ethernet.regmask[EREG_COUNTER] = 0x0000;
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ethernet.reg[EREG_MIR] = 0x1212; ethernet.regmask[EREG_MIR] = 0x0000;
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ethernet.reg[EREG_MCR] = 0x3300; ethernet.regmask[EREG_MCR] = 0x00ff;
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ethernet.reg[EREG_BANK] = 0x3300; ethernet.regmask[EREG_BANK] = 0x0007;
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ethernet.reg[EREG_CONFIG] = 0x0030; ethernet.regmask[EREG_CONFIG] = 0x17c6;
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ethernet.reg[EREG_BASE] = 0x1866; ethernet.regmask[EREG_BASE] = 0xfffe;
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ethernet.reg[EREG_IA0_1] = 0x0000; ethernet.regmask[EREG_IA0_1] = 0xffff;
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ethernet.reg[EREG_IA2_3] = 0x0000; ethernet.regmask[EREG_IA2_3] = 0xffff;
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ethernet.reg[EREG_IA4_5] = 0x0000; ethernet.regmask[EREG_IA4_5] = 0xffff;
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ethernet.reg[EREG_GENERAL_PURP] = 0x0000; ethernet.regmask[EREG_GENERAL_PURP] = 0xffff;
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ethernet.reg[EREG_CONTROL] = 0x0100; ethernet.regmask[EREG_CONTROL] = 0x68e7;
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ethernet.reg[EREG_MMU_COMMAND] = 0x0000; ethernet.regmask[EREG_MMU_COMMAND] = 0x00e7;
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ethernet.reg[EREG_PNR_ARR] = 0x8000; ethernet.regmask[EREG_PNR_ARR] = 0x00ff;
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ethernet.reg[EREG_FIFO_PORTS] = 0x8080; ethernet.regmask[EREG_FIFO_PORTS] = 0x0000;
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ethernet.reg[EREG_POINTER] = 0x0000; ethernet.regmask[EREG_POINTER] = 0xf7ff;
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ethernet.reg[EREG_DATA_0] = 0x0000; ethernet.regmask[EREG_DATA_0] = 0xffff;
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ethernet.reg[EREG_DATA_1] = 0x0000; ethernet.regmask[EREG_DATA_1] = 0xffff;
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ethernet.reg[EREG_INTERRUPT] = 0x0004; ethernet.regmask[EREG_INTERRUPT] = 0x7f00;
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ethernet.reg[EREG_MT0_1] = 0x0000; ethernet.regmask[EREG_MT0_1] = 0xffff;
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ethernet.reg[EREG_MT2_3] = 0x0000; ethernet.regmask[EREG_MT2_3] = 0xffff;
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ethernet.reg[EREG_MT4_5] = 0x0000; ethernet.regmask[EREG_MT4_5] = 0xffff;
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ethernet.reg[EREG_MT6_7] = 0x0000; ethernet.regmask[EREG_MT6_7] = 0xffff;
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ethernet.reg[EREG_MGMT] = 0x3030; ethernet.regmask[EREG_MGMT] = 0x0f0f;
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ethernet.reg[EREG_REVISION] = 0x3340; ethernet.regmask[EREG_REVISION] = 0x0000;
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ethernet.reg[EREG_ERCV] = 0x331f; ethernet.regmask[EREG_ERCV] = 0x009f;
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update_ethernet_irq(machine);
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}
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/*************************************
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*
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* Internal IRQ handling
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*
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*************************************/
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static void update_ethernet_irq(running_machine *machine)
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{
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UINT8 mask = ethernet.reg[EREG_INTERRUPT] >> 8;
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UINT8 state = ethernet.reg[EREG_INTERRUPT] & 0xff;
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UINT8 mask = smc->reg[EREG_INTERRUPT] >> 8;
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UINT8 state = smc->reg[EREG_INTERRUPT] & 0xff;
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/* update the IRQ state */
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ethernet.irq_state = ((mask & state) != 0);
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if (ethernet.irq_handler)
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(*ethernet.irq_handler)(machine, ethernet.irq_state ? ASSERT_LINE : CLEAR_LINE);
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smc->irq_state = ((mask & state) != 0);
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if (smc->irq_handler != NULL)
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(*smc->irq_handler)(smc->device, smc->irq_state ? ASSERT_LINE : CLEAR_LINE);
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}
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/*-------------------------------------------------
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update_stats - draw statistics
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-------------------------------------------------*/
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/*************************************
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*
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* Draw the stats
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*
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*************************************/
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static void update_stats(void)
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static void update_stats(smc91c9x_state *smc)
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{
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if (DISPLAY_STATS)
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popmessage("Sent:%d Rec'd:%d", ethernet.sent, ethernet.recd);
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popmessage("Sent:%d Rec'd:%d", smc->sent, smc->recd);
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}
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/*-------------------------------------------------
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finish_enqueue - complete an enqueued packet
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-------------------------------------------------*/
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/*************************************
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*
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* Complete an enqueued packet
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*
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*************************************/
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static void finish_enqueue(running_machine *machine, int param)
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static void finish_enqueue(smc91c9x_state *smc, int param)
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{
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int is_broadcast = (ethernet.tx[4] == 0xff && ethernet.tx[5] == 0xff && ethernet.tx[6] == 0xff &&
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ethernet.tx[7] == 0xff && ethernet.tx[8] == 0xff && ethernet.tx[9] == 0xff);
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int is_broadcast = (smc->tx[4] == 0xff && smc->tx[5] == 0xff && smc->tx[6] == 0xff &&
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smc->tx[7] == 0xff && smc->tx[8] == 0xff && smc->tx[9] == 0xff);
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/* update the EPH register and stuff it in the first transmit word */
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ethernet.reg[EREG_EPH_STATUS] = 0x0001;
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smc->reg[EREG_EPH_STATUS] = 0x0001;
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if (is_broadcast)
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ethernet.reg[EREG_EPH_STATUS] |= 0x0040;
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ethernet.tx[0] = ethernet.reg[EREG_EPH_STATUS];
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ethernet.tx[1] = ethernet.reg[EREG_EPH_STATUS] >> 8;
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smc->reg[EREG_EPH_STATUS] |= 0x0040;
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smc->tx[0] = smc->reg[EREG_EPH_STATUS];
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smc->tx[1] = smc->reg[EREG_EPH_STATUS] >> 8;
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/* signal a transmit interrupt and mark the transmit buffer empty */
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ethernet.reg[EREG_INTERRUPT] |= EINT_TX;
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ethernet.reg[EREG_INTERRUPT] |= EINT_TX_EMPTY;
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ethernet.reg[EREG_FIFO_PORTS] |= 0x0080;
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ethernet.sent++;
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update_stats();
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smc->reg[EREG_INTERRUPT] |= EINT_TX;
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smc->reg[EREG_INTERRUPT] |= EINT_TX_EMPTY;
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smc->reg[EREG_FIFO_PORTS] |= 0x0080;
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smc->sent++;
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update_stats(smc);
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/* loopback? */
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if (ethernet.reg[EREG_TCR] & 0x2002)
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if (ethernet.fifo_count < ETHER_RX_BUFFERS)
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if (smc->reg[EREG_TCR] & 0x2002)
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if (smc->fifo_count < ETHER_RX_BUFFERS)
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{
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int buffer_len = ((ethernet.tx[3] << 8) | ethernet.tx[2]) & 0x7ff;
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UINT8 *packet = ðernet.rx[ethernet.fifo_count++ * ETHER_BUFFER_SIZE];
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int buffer_len = ((smc->tx[3] << 8) | smc->tx[2]) & 0x7ff;
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UINT8 *packet = &smc->rx[smc->fifo_count++ * ETHER_BUFFER_SIZE];
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int packet_len;
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/* compute the packet length */
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@ -297,16 +234,16 @@ static void finish_enqueue(running_machine *machine, int param)
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packet[1] = 0x0000;
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packet[2] = buffer_len;
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packet[3] = buffer_len >> 8;
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memcpy(&packet[4], ðernet.tx[4], 6);
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memcpy(&packet[10], ðernet.tx[10], 6);
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memcpy(&packet[16], ðernet.tx[16], buffer_len - 16);
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memcpy(&packet[4], &smc->tx[4], 6);
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memcpy(&packet[10], &smc->tx[10], 6);
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memcpy(&packet[16], &smc->tx[16], buffer_len - 16);
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/* set the broadcast flag */
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if (is_broadcast)
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packet[1] |= 0x40;
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/* pad? */
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if (ethernet.reg[EREG_TCR & 0x0080])
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if (smc->reg[EREG_TCR & 0x0080])
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if (packet_len < 64)
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{
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memset(&packet[buffer_len], 0, 64+6 - buffer_len);
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@ -317,21 +254,18 @@ static void finish_enqueue(running_machine *machine, int param)
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}
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/* signal a receive */
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ethernet.reg[EREG_INTERRUPT] |= EINT_RCV;
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ethernet.reg[EREG_FIFO_PORTS] &= ~0x8000;
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smc->reg[EREG_INTERRUPT] |= EINT_RCV;
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smc->reg[EREG_FIFO_PORTS] &= ~0x8000;
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}
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update_ethernet_irq(machine);
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update_ethernet_irq(smc);
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}
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/*-------------------------------------------------
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process_command - handle MMU commands
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-------------------------------------------------*/
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/*************************************
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*
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* MMU command processing
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*
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*************************************/
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static void process_command(running_machine *machine, UINT16 data)
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static void process_command(smc91c9x_state *smc, UINT16 data)
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{
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switch ((data >> 5) & 7)
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{
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@ -343,10 +277,10 @@ static void process_command(running_machine *machine, UINT16 data)
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case ECMD_ALLOCATE:
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if (LOG_ETHERNET)
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logerror(" ALLOCATE MEMORY FOR TX (%d)\n", (data & 7));
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ethernet.reg[EREG_PNR_ARR] &= ~0xff00;
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ethernet.reg[EREG_PNR_ARR] |= ethernet.alloc_count++ << 8;
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ethernet.reg[EREG_INTERRUPT] |= 0x0008;
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update_ethernet_irq(machine);
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smc->reg[EREG_PNR_ARR] &= ~0xff00;
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smc->reg[EREG_PNR_ARR] |= smc->alloc_count++ << 8;
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smc->reg[EREG_INTERRUPT] |= 0x0008;
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update_ethernet_irq(smc);
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break;
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case ECMD_RESET_MMU:
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@ -362,20 +296,20 @@ static void process_command(running_machine *machine, UINT16 data)
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case ECMD_REMOVE_RELEASE:
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if (LOG_ETHERNET)
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logerror(" REMOVE AND RELEASE FRAME FROM RX FIFO\n");
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ethernet.reg[EREG_INTERRUPT] &= ~EINT_RCV;
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if (ethernet.fifo_count > 0)
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ethernet.fifo_count--;
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if (ethernet.fifo_count > 0)
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smc->reg[EREG_INTERRUPT] &= ~EINT_RCV;
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if (smc->fifo_count > 0)
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smc->fifo_count--;
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if (smc->fifo_count > 0)
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{
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memmove(ðernet.rx[0], ðernet.rx[ETHER_BUFFER_SIZE], ethernet.fifo_count * ETHER_BUFFER_SIZE);
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ethernet.reg[EREG_INTERRUPT] |= EINT_RCV;
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ethernet.reg[EREG_FIFO_PORTS] &= ~0x8000;
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memmove(&smc->rx[0], &smc->rx[ETHER_BUFFER_SIZE], smc->fifo_count * ETHER_BUFFER_SIZE);
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smc->reg[EREG_INTERRUPT] |= EINT_RCV;
|
||||
smc->reg[EREG_FIFO_PORTS] &= ~0x8000;
|
||||
}
|
||||
else
|
||||
ethernet.reg[EREG_FIFO_PORTS] |= 0x8000;
|
||||
update_ethernet_irq(machine);
|
||||
ethernet.recd++;
|
||||
update_stats();
|
||||
smc->reg[EREG_FIFO_PORTS] |= 0x8000;
|
||||
update_ethernet_irq(smc);
|
||||
smc->recd++;
|
||||
update_stats(smc);
|
||||
break;
|
||||
|
||||
case ECMD_RELEASE_PACKET:
|
||||
@ -386,7 +320,7 @@ static void process_command(running_machine *machine, UINT16 data)
|
||||
case ECMD_ENQUEUE_PACKET:
|
||||
if (LOG_ETHERNET)
|
||||
logerror(" ENQUEUE TX PACKET\n");
|
||||
finish_enqueue(machine, 0);
|
||||
finish_enqueue(smc, 0);
|
||||
break;
|
||||
|
||||
case ECMD_RESET_FIFOS:
|
||||
@ -394,80 +328,81 @@ static void process_command(running_machine *machine, UINT16 data)
|
||||
logerror(" RESET TX FIFOS\n");
|
||||
break;
|
||||
}
|
||||
ethernet.reg[EREG_MMU_COMMAND] &= ~0x0001;
|
||||
smc->reg[EREG_MMU_COMMAND] &= ~0x0001;
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Core read handler
|
||||
*
|
||||
*************************************/
|
||||
/***************************************************************************
|
||||
CORE READ/WRITE HANDLERS
|
||||
***************************************************************************/
|
||||
|
||||
READ16_HANDLER( smc91c94_r )
|
||||
/*-------------------------------------------------
|
||||
smc91c9x_r - handle a read from the device
|
||||
-------------------------------------------------*/
|
||||
|
||||
READ16_DEVICE_HANDLER( smc91c9x_r )
|
||||
{
|
||||
smc91c9x_state *smc = get_safe_token(device);
|
||||
UINT32 result = ~0;
|
||||
|
||||
/* determine the effective register */
|
||||
offset %= 8;
|
||||
if (offset != EREG_BANK)
|
||||
offset += 8 * (ethernet.reg[EREG_BANK] & 7);
|
||||
result = ethernet.reg[offset];
|
||||
offset += 8 * (smc->reg[EREG_BANK] & 7);
|
||||
result = smc->reg[offset];
|
||||
|
||||
switch (offset)
|
||||
{
|
||||
case EREG_PNR_ARR:
|
||||
if (ACCESSING_BITS_8_15)
|
||||
{
|
||||
ethernet.reg[EREG_INTERRUPT] &= ~0x0008;
|
||||
update_ethernet_irq(machine);
|
||||
smc->reg[EREG_INTERRUPT] &= ~0x0008;
|
||||
update_ethernet_irq(smc);
|
||||
}
|
||||
break;
|
||||
|
||||
case EREG_DATA_0: /* data register */
|
||||
case EREG_DATA_1: /* data register */
|
||||
{
|
||||
UINT8 *buffer = (ethernet.reg[EREG_POINTER] & 0x8000) ? ethernet.rx : ethernet.tx;
|
||||
int addr = ethernet.reg[EREG_POINTER] & 0x7ff;
|
||||
UINT8 *buffer = (smc->reg[EREG_POINTER] & 0x8000) ? smc->rx : smc->tx;
|
||||
int addr = smc->reg[EREG_POINTER] & 0x7ff;
|
||||
result = buffer[addr++];
|
||||
if (ACCESSING_BITS_8_15)
|
||||
result |= buffer[addr++] << 8;
|
||||
if (ethernet.reg[EREG_POINTER] & 0x4000)
|
||||
ethernet.reg[EREG_POINTER] = (ethernet.reg[EREG_POINTER] & ~0x7ff) | (addr & 0x7ff);
|
||||
if (smc->reg[EREG_POINTER] & 0x4000)
|
||||
smc->reg[EREG_POINTER] = (smc->reg[EREG_POINTER] & ~0x7ff) | (addr & 0x7ff);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (LOG_ETHERNET && offset != EREG_BANK)
|
||||
logerror("%08X:ethernet_r(%s) = %04X & %04X\n", activecpu_get_pc(), ethernet_regname[offset], result, mem_mask);
|
||||
logerror("%08X:smc91c9x_r(%s) = %04X & %04X\n", activecpu_get_pc(), ethernet_regname[offset], result, mem_mask);
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
smc91c9x_w - handle a write to the device
|
||||
-------------------------------------------------*/
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Core write handler
|
||||
*
|
||||
*************************************/
|
||||
|
||||
WRITE16_HANDLER( smc91c94_w )
|
||||
WRITE16_DEVICE_HANDLER( smc91c9x_w )
|
||||
{
|
||||
smc91c9x_state *smc = get_safe_token(device);
|
||||
UINT16 olddata;
|
||||
|
||||
/* determine the effective register */
|
||||
offset %= 8;
|
||||
if (offset != EREG_BANK)
|
||||
offset += 8 * (ethernet.reg[EREG_BANK] & 7);
|
||||
offset += 8 * (smc->reg[EREG_BANK] & 7);
|
||||
|
||||
/* update the data generically */
|
||||
olddata = ethernet.reg[offset];
|
||||
mem_mask &= ethernet.regmask[offset];
|
||||
COMBINE_DATA(ðernet.reg[offset]);
|
||||
olddata = smc->reg[offset];
|
||||
mem_mask &= smc->regmask[offset];
|
||||
COMBINE_DATA(&smc->reg[offset]);
|
||||
|
||||
if (LOG_ETHERNET && offset != 7)
|
||||
logerror("%08X:ethernet_w(%s) = %04X & %04X\n", activecpu_get_pc(), ethernet_regname[offset], data, mem_mask);
|
||||
logerror("%08X:smc91c9x_w(%s) = %04X & %04X\n", activecpu_get_pc(), ethernet_regname[offset], data, mem_mask);
|
||||
|
||||
/* handle it */
|
||||
switch (offset)
|
||||
@ -490,7 +425,7 @@ WRITE16_HANDLER( smc91c94_w )
|
||||
case EREG_RCR: /* receive control register */
|
||||
if (LOG_ETHERNET)
|
||||
{
|
||||
if (data & 0x8000) smc91c94_reset(machine);
|
||||
if (data & 0x8000) device_reset(device);
|
||||
if (data & 0x8000) logerror(" SOFT RST\n");
|
||||
if (data & 0x4000) logerror(" FILT_CAR\n");
|
||||
if (data & 0x0200) logerror(" STRIP CRC\n");
|
||||
@ -540,25 +475,181 @@ WRITE16_HANDLER( smc91c94_w )
|
||||
break;
|
||||
|
||||
case EREG_MMU_COMMAND: /* command register */
|
||||
process_command(machine, data);
|
||||
process_command(smc, data);
|
||||
break;
|
||||
|
||||
case EREG_DATA_0: /* data register */
|
||||
case EREG_DATA_1: /* data register */
|
||||
{
|
||||
UINT8 *buffer = (ethernet.reg[EREG_POINTER] & 0x8000) ? ethernet.rx : ethernet.tx;
|
||||
int addr = ethernet.reg[EREG_POINTER] & 0x7ff;
|
||||
UINT8 *buffer = (smc->reg[EREG_POINTER] & 0x8000) ? smc->rx : smc->tx;
|
||||
int addr = smc->reg[EREG_POINTER] & 0x7ff;
|
||||
buffer[addr++] = data;
|
||||
if (ACCESSING_BITS_8_15)
|
||||
buffer[addr++] = data >> 8;
|
||||
if (ethernet.reg[EREG_POINTER] & 0x4000)
|
||||
ethernet.reg[EREG_POINTER] = (ethernet.reg[EREG_POINTER] & ~0x7ff) | (addr & 0x7ff);
|
||||
if (smc->reg[EREG_POINTER] & 0x4000)
|
||||
smc->reg[EREG_POINTER] = (smc->reg[EREG_POINTER] & ~0x7ff) | (addr & 0x7ff);
|
||||
break;
|
||||
}
|
||||
|
||||
case EREG_INTERRUPT:
|
||||
ethernet.reg[EREG_INTERRUPT] &= ~(data & 0x56);
|
||||
update_ethernet_irq(machine);
|
||||
smc->reg[EREG_INTERRUPT] &= ~(data & 0x56);
|
||||
update_ethernet_irq(smc);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
DEVICE INTERFACE
|
||||
***************************************************************************/
|
||||
|
||||
/*-------------------------------------------------
|
||||
device start callback
|
||||
-------------------------------------------------*/
|
||||
|
||||
static DEVICE_START( smc91c9x )
|
||||
{
|
||||
const smc91c9x_config *config = device->inline_config;
|
||||
smc91c9x_state *smc = get_safe_token(device);
|
||||
char unique_tag[50];
|
||||
|
||||
/* validate some basic stuff */
|
||||
assert(device != NULL);
|
||||
assert(device->static_config == NULL);
|
||||
assert(device->inline_config != NULL);
|
||||
assert(device->machine != NULL);
|
||||
assert(device->machine->config != NULL);
|
||||
|
||||
/* store a pointer back to the device */
|
||||
smc->device = device;
|
||||
smc->irq_handler = config->interrupt;
|
||||
|
||||
/* create the name for save states */
|
||||
assert(strlen(device->tag) < 30);
|
||||
state_save_combine_module_and_tag(unique_tag, "smc91c9x", device->tag);
|
||||
|
||||
/* register ide states */
|
||||
state_save_register_item_array(unique_tag, 0, smc->reg);
|
||||
state_save_register_item_array(unique_tag, 0, smc->regmask);
|
||||
state_save_register_item(unique_tag, 0, smc->irq_state);
|
||||
state_save_register_item(unique_tag, 0, smc->alloc_count);
|
||||
state_save_register_item(unique_tag, 0, smc->fifo_count);
|
||||
state_save_register_item_array(unique_tag, 0, smc->rx);
|
||||
state_save_register_item_array(unique_tag, 0, smc->tx);
|
||||
state_save_register_item(unique_tag, 0, smc->sent);
|
||||
state_save_register_item(unique_tag, 0, smc->recd);
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
device reset callback
|
||||
-------------------------------------------------*/
|
||||
|
||||
static DEVICE_RESET( smc91c9x )
|
||||
{
|
||||
smc91c9x_state *smc = get_safe_token(device);
|
||||
|
||||
memset(smc->reg, 0, sizeof(smc->reg));
|
||||
memset(smc->regmask, 0, sizeof(smc->regmask));
|
||||
smc->irq_state = 0;
|
||||
smc->alloc_count = 0;
|
||||
smc->fifo_count = 0;
|
||||
smc->sent = 0;
|
||||
smc->recd = 0;
|
||||
|
||||
smc->reg[EREG_TCR] = 0x0000; smc->regmask[EREG_TCR] = 0x3d87;
|
||||
smc->reg[EREG_EPH_STATUS] = 0x0000; smc->regmask[EREG_EPH_STATUS] = 0x0000;
|
||||
smc->reg[EREG_RCR] = 0x0000; smc->regmask[EREG_RCR] = 0xc307;
|
||||
smc->reg[EREG_COUNTER] = 0x0000; smc->regmask[EREG_COUNTER] = 0x0000;
|
||||
smc->reg[EREG_MIR] = 0x1212; smc->regmask[EREG_MIR] = 0x0000;
|
||||
smc->reg[EREG_MCR] = 0x3300; smc->regmask[EREG_MCR] = 0x00ff;
|
||||
smc->reg[EREG_BANK] = 0x3300; smc->regmask[EREG_BANK] = 0x0007;
|
||||
|
||||
smc->reg[EREG_CONFIG] = 0x0030; smc->regmask[EREG_CONFIG] = 0x17c6;
|
||||
smc->reg[EREG_BASE] = 0x1866; smc->regmask[EREG_BASE] = 0xfffe;
|
||||
smc->reg[EREG_IA0_1] = 0x0000; smc->regmask[EREG_IA0_1] = 0xffff;
|
||||
smc->reg[EREG_IA2_3] = 0x0000; smc->regmask[EREG_IA2_3] = 0xffff;
|
||||
smc->reg[EREG_IA4_5] = 0x0000; smc->regmask[EREG_IA4_5] = 0xffff;
|
||||
smc->reg[EREG_GENERAL_PURP] = 0x0000; smc->regmask[EREG_GENERAL_PURP] = 0xffff;
|
||||
smc->reg[EREG_CONTROL] = 0x0100; smc->regmask[EREG_CONTROL] = 0x68e7;
|
||||
|
||||
smc->reg[EREG_MMU_COMMAND] = 0x0000; smc->regmask[EREG_MMU_COMMAND] = 0x00e7;
|
||||
smc->reg[EREG_PNR_ARR] = 0x8000; smc->regmask[EREG_PNR_ARR] = 0x00ff;
|
||||
smc->reg[EREG_FIFO_PORTS] = 0x8080; smc->regmask[EREG_FIFO_PORTS] = 0x0000;
|
||||
smc->reg[EREG_POINTER] = 0x0000; smc->regmask[EREG_POINTER] = 0xf7ff;
|
||||
smc->reg[EREG_DATA_0] = 0x0000; smc->regmask[EREG_DATA_0] = 0xffff;
|
||||
smc->reg[EREG_DATA_1] = 0x0000; smc->regmask[EREG_DATA_1] = 0xffff;
|
||||
smc->reg[EREG_INTERRUPT] = 0x0004; smc->regmask[EREG_INTERRUPT] = 0x7f00;
|
||||
|
||||
smc->reg[EREG_MT0_1] = 0x0000; smc->regmask[EREG_MT0_1] = 0xffff;
|
||||
smc->reg[EREG_MT2_3] = 0x0000; smc->regmask[EREG_MT2_3] = 0xffff;
|
||||
smc->reg[EREG_MT4_5] = 0x0000; smc->regmask[EREG_MT4_5] = 0xffff;
|
||||
smc->reg[EREG_MT6_7] = 0x0000; smc->regmask[EREG_MT6_7] = 0xffff;
|
||||
smc->reg[EREG_MGMT] = 0x3030; smc->regmask[EREG_MGMT] = 0x0f0f;
|
||||
smc->reg[EREG_REVISION] = 0x3340; smc->regmask[EREG_REVISION] = 0x0000;
|
||||
smc->reg[EREG_ERCV] = 0x331f; smc->regmask[EREG_ERCV] = 0x009f;
|
||||
|
||||
update_ethernet_irq(smc);
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
device set info callback
|
||||
-------------------------------------------------*/
|
||||
|
||||
static DEVICE_SET_INFO( smc91c9x )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
/* no parameters to set */
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
device get info callback
|
||||
-------------------------------------------------*/
|
||||
|
||||
static DEVICE_GET_INFO( smc91c9x )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(smc91c9x_state); break;
|
||||
case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(smc91c9x_config); break;
|
||||
case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_PERIPHERAL; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case DEVINFO_FCT_SET_INFO: info->set_info = DEVICE_SET_INFO_NAME(smc91c9x); break;
|
||||
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(smc91c9x); break;
|
||||
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(smc91c9x);break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case DEVINFO_STR_NAME: /* provided by subclasses */ break;
|
||||
case DEVINFO_STR_FAMILY: info->s = "SMC91C9X Ethernet Controller";break;
|
||||
case DEVINFO_STR_VERSION: info->s = "1.0"; break;
|
||||
case DEVINFO_STR_SOURCE_FILE: info->s = __FILE__; break;
|
||||
case DEVINFO_STR_CREDITS: info->s = "Copyright Nicola Salmoria and the MAME Team"; break;
|
||||
}
|
||||
}
|
||||
|
||||
DEVICE_GET_INFO( smc91c94 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case DEVINFO_STR_NAME: info->s = "SMC91C94"; break;
|
||||
default: DEVICE_GET_INFO_CALL(smc91c9x); break;
|
||||
}
|
||||
}
|
||||
|
||||
DEVICE_GET_INFO( smc91c96 )
|
||||
{
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case DEVINFO_STR_NAME: info->s = "SMC91C96"; break;
|
||||
default: DEVICE_GET_INFO_CALL(smc91c9x); break;
|
||||
}
|
||||
}
|
||||
|
@ -9,14 +9,56 @@
|
||||
#ifndef __SMC91C9X__
|
||||
#define __SMC91C9X__
|
||||
|
||||
struct smc91c9x_interface
|
||||
|
||||
/***************************************************************************
|
||||
TYPE DEFINITIONS
|
||||
***************************************************************************/
|
||||
|
||||
typedef void (*smc91c9x_irq_func)(const device_config *device, int state);
|
||||
|
||||
|
||||
typedef struct _smc91c9x_config smc91c9x_config;
|
||||
struct _smc91c9x_config
|
||||
{
|
||||
void (*irq_handler)(running_machine *machine, int state);
|
||||
smc91c9x_irq_func interrupt;
|
||||
};
|
||||
|
||||
void smc91c94_init(const struct smc91c9x_interface *config);
|
||||
void smc91c94_reset(running_machine *machine);
|
||||
READ16_HANDLER( smc91c94_r );
|
||||
WRITE16_HANDLER( smc91c94_w );
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
DEVICE CONFIGURATION MACROS
|
||||
***************************************************************************/
|
||||
|
||||
#define MDRV_SMC91C94_ADD(_tag, _callback) \
|
||||
MDRV_DEVICE_ADD(_tag, SMC91C94) \
|
||||
MDRV_DEVICE_CONFIG_DATAPTR(smc91c9x_config, interrupt, _callback)
|
||||
|
||||
#define MDRV_SMC91C96_ADD(_tag, _callback) \
|
||||
MDRV_DEVICE_ADD(_tag, SMC91C96) \
|
||||
MDRV_DEVICE_CONFIG_DATAPTR(smc91c9x_config, interrupt, _callback)
|
||||
|
||||
#define MDRV_SMC91C94_REMOVE(_tag) \
|
||||
MDRV_DEVICE_REMOVE(_tag, SMC91C94)
|
||||
|
||||
#define MDRV_SMC91C96_REMOVE(_tag) \
|
||||
MDRV_DEVICE_REMOVE(_tag, SMC91C96)
|
||||
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
FUNCTION PROTOTYPES
|
||||
***************************************************************************/
|
||||
|
||||
READ16_DEVICE_HANDLER( smc91c9x_r );
|
||||
WRITE16_DEVICE_HANDLER( smc91c9x_w );
|
||||
|
||||
|
||||
/* ----- device interface ----- */
|
||||
|
||||
/* device get info callbacks */
|
||||
#define SMC91C94 DEVICE_GET_INFO_NAME(smc91c94)
|
||||
#define SMC91C96 DEVICE_GET_INFO_NAME(smc91c96)
|
||||
DEVICE_GET_INFO( smc91c94 );
|
||||
DEVICE_GET_INFO( smc91c96 );
|
||||
|
||||
#endif
|
||||
|
160
src/emu/video.c
160
src/emu/video.c
@ -176,6 +176,9 @@ static void init_buffered_spriteram(void);
|
||||
static void allocate_graphics(running_machine *machine, const gfx_decode_entry *gfxdecodeinfo);
|
||||
static void decode_graphics(running_machine *machine, const gfx_decode_entry *gfxdecodeinfo);
|
||||
|
||||
static void realloc_screen_bitmaps(const device_config *screen);
|
||||
static STATE_POSTLOAD( video_screen_postload );
|
||||
|
||||
/* global rendering */
|
||||
static TIMER_CALLBACK( vblank_begin_callback );
|
||||
static TIMER_CALLBACK( vblank_end_callback );
|
||||
@ -652,73 +655,20 @@ void video_screen_configure(const device_config *screen, int width, int height,
|
||||
assert(width > 0);
|
||||
assert(height > 0);
|
||||
assert(visarea != NULL);
|
||||
assert(visarea->min_x >= 0);
|
||||
assert(visarea->min_y >= 0);
|
||||
assert(visarea->min_x < width);
|
||||
assert(visarea->min_y < height);
|
||||
assert(frame_period > 0);
|
||||
|
||||
/* reallocate bitmap if necessary */
|
||||
if (config->type != SCREEN_TYPE_VECTOR)
|
||||
{
|
||||
int curwidth = 0, curheight = 0;
|
||||
|
||||
/* reality checks */
|
||||
assert(visarea->min_x >= 0);
|
||||
assert(visarea->min_y >= 0);
|
||||
assert(visarea->min_x < width);
|
||||
assert(visarea->min_y < height);
|
||||
|
||||
/* extract the current width/height from the bitmap */
|
||||
if (state->bitmap[0] != NULL)
|
||||
{
|
||||
curwidth = state->bitmap[0]->width;
|
||||
curheight = state->bitmap[0]->height;
|
||||
}
|
||||
|
||||
/* if we're too small to contain this width/height, reallocate our bitmaps and textures */
|
||||
if (width > curwidth || height > curheight)
|
||||
{
|
||||
bitmap_format screen_format = config->format;
|
||||
|
||||
/* free what we have currently */
|
||||
if (state->texture[0] != NULL)
|
||||
render_texture_free(state->texture[0]);
|
||||
if (state->texture[1] != NULL)
|
||||
render_texture_free(state->texture[1]);
|
||||
if (state->bitmap[0] != NULL)
|
||||
bitmap_free(state->bitmap[0]);
|
||||
if (state->bitmap[1] != NULL)
|
||||
bitmap_free(state->bitmap[1]);
|
||||
|
||||
/* compute new width/height */
|
||||
curwidth = MAX(width, curwidth);
|
||||
curheight = MAX(height, curheight);
|
||||
|
||||
/* choose the texture format - convert the screen format to a texture format */
|
||||
switch (screen_format)
|
||||
{
|
||||
case BITMAP_FORMAT_INDEXED16: state->texture_format = TEXFORMAT_PALETTE16; break;
|
||||
case BITMAP_FORMAT_RGB15: state->texture_format = TEXFORMAT_RGB15; break;
|
||||
case BITMAP_FORMAT_RGB32: state->texture_format = TEXFORMAT_RGB32; break;
|
||||
default: fatalerror("Invalid bitmap format!"); break;
|
||||
}
|
||||
|
||||
/* allocate bitmaps */
|
||||
state->bitmap[0] = bitmap_alloc(curwidth, curheight, screen_format);
|
||||
bitmap_set_palette(state->bitmap[0], screen->machine->palette);
|
||||
state->bitmap[1] = bitmap_alloc(curwidth, curheight, screen_format);
|
||||
bitmap_set_palette(state->bitmap[1], screen->machine->palette);
|
||||
|
||||
/* allocate textures */
|
||||
state->texture[0] = render_texture_alloc(NULL, NULL);
|
||||
render_texture_set_bitmap(state->texture[0], state->bitmap[0], visarea, 0, state->texture_format);
|
||||
state->texture[1] = render_texture_alloc(NULL, NULL);
|
||||
render_texture_set_bitmap(state->texture[1], state->bitmap[1], visarea, 0, state->texture_format);
|
||||
}
|
||||
}
|
||||
|
||||
/* now fill in the new parameters */
|
||||
/* fill in the new parameters */
|
||||
state->width = width;
|
||||
state->height = height;
|
||||
state->visarea = *visarea;
|
||||
|
||||
/* reallocate bitmap if necessary */
|
||||
realloc_screen_bitmaps(screen);
|
||||
|
||||
/* compute timing parameters */
|
||||
state->frame_period = frame_period;
|
||||
state->scantime = frame_period / height;
|
||||
@ -746,6 +696,70 @@ void video_screen_configure(const device_config *screen, int width, int height,
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
realloc_screen_bitmaps - reallocate screen
|
||||
bitmaps as necessary
|
||||
-------------------------------------------------*/
|
||||
|
||||
static void realloc_screen_bitmaps(const device_config *screen)
|
||||
{
|
||||
screen_state *state = get_safe_token(screen);
|
||||
screen_config *config = screen->inline_config;
|
||||
if (config->type != SCREEN_TYPE_VECTOR)
|
||||
{
|
||||
int curwidth = 0, curheight = 0;
|
||||
|
||||
/* extract the current width/height from the bitmap */
|
||||
if (state->bitmap[0] != NULL)
|
||||
{
|
||||
curwidth = state->bitmap[0]->width;
|
||||
curheight = state->bitmap[0]->height;
|
||||
}
|
||||
|
||||
/* if we're too small to contain this width/height, reallocate our bitmaps and textures */
|
||||
if (state->width > curwidth || state->height > curheight)
|
||||
{
|
||||
bitmap_format screen_format = config->format;
|
||||
|
||||
/* free what we have currently */
|
||||
if (state->texture[0] != NULL)
|
||||
render_texture_free(state->texture[0]);
|
||||
if (state->texture[1] != NULL)
|
||||
render_texture_free(state->texture[1]);
|
||||
if (state->bitmap[0] != NULL)
|
||||
bitmap_free(state->bitmap[0]);
|
||||
if (state->bitmap[1] != NULL)
|
||||
bitmap_free(state->bitmap[1]);
|
||||
|
||||
/* compute new width/height */
|
||||
curwidth = MAX(state->width, curwidth);
|
||||
curheight = MAX(state->height, curheight);
|
||||
|
||||
/* choose the texture format - convert the screen format to a texture format */
|
||||
switch (screen_format)
|
||||
{
|
||||
case BITMAP_FORMAT_INDEXED16: state->texture_format = TEXFORMAT_PALETTE16; break;
|
||||
case BITMAP_FORMAT_RGB15: state->texture_format = TEXFORMAT_RGB15; break;
|
||||
case BITMAP_FORMAT_RGB32: state->texture_format = TEXFORMAT_RGB32; break;
|
||||
default: fatalerror("Invalid bitmap format!"); break;
|
||||
}
|
||||
|
||||
/* allocate bitmaps */
|
||||
state->bitmap[0] = bitmap_alloc(curwidth, curheight, screen_format);
|
||||
bitmap_set_palette(state->bitmap[0], screen->machine->palette);
|
||||
state->bitmap[1] = bitmap_alloc(curwidth, curheight, screen_format);
|
||||
bitmap_set_palette(state->bitmap[1], screen->machine->palette);
|
||||
|
||||
/* allocate textures */
|
||||
state->texture[0] = render_texture_alloc(NULL, NULL);
|
||||
render_texture_set_bitmap(state->texture[0], state->bitmap[0], &state->visarea, 0, state->texture_format);
|
||||
state->texture[1] = render_texture_alloc(NULL, NULL);
|
||||
render_texture_set_bitmap(state->texture[1], state->bitmap[1], &state->visarea, 0, state->texture_format);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
video_screen_set_visarea - just set the visible area
|
||||
of a screen
|
||||
@ -1229,11 +1243,35 @@ static DEVICE_START( video_screen )
|
||||
assert(strlen(screen->tag) < 30);
|
||||
state_save_combine_module_and_tag(unique_tag, "video_screen", screen->tag);
|
||||
|
||||
state_save_register_item(unique_tag, 0, state->width);
|
||||
state_save_register_item(unique_tag, 0, state->height);
|
||||
state_save_register_item(unique_tag, 0, state->visarea.min_x);
|
||||
state_save_register_item(unique_tag, 0, state->visarea.min_y);
|
||||
state_save_register_item(unique_tag, 0, state->visarea.max_x);
|
||||
state_save_register_item(unique_tag, 0, state->visarea.max_y);
|
||||
state_save_register_item(unique_tag, 0, state->last_partial_scan);
|
||||
state_save_register_item(unique_tag, 0, state->frame_period);
|
||||
state_save_register_item(unique_tag, 0, state->scantime);
|
||||
state_save_register_item(unique_tag, 0, state->pixeltime);
|
||||
state_save_register_item(unique_tag, 0, state->vblank_period);
|
||||
state_save_register_item(unique_tag, 0, state->vblank_start_time.seconds);
|
||||
state_save_register_item(unique_tag, 0, state->vblank_start_time.attoseconds);
|
||||
state_save_register_item(unique_tag, 0, state->vblank_end_time.seconds);
|
||||
state_save_register_item(unique_tag, 0, state->vblank_end_time.attoseconds);
|
||||
state_save_register_item(unique_tag, 0, state->frame_number);
|
||||
state_save_register_postload(device->machine, video_screen_postload, (void *)device);
|
||||
}
|
||||
|
||||
|
||||
/*-------------------------------------------------
|
||||
video_screen_postload - after a state load,
|
||||
reconfigure each screen
|
||||
-------------------------------------------------*/
|
||||
|
||||
static STATE_POSTLOAD( video_screen_postload )
|
||||
{
|
||||
const device_config *screen = param;
|
||||
realloc_screen_bitmaps(screen);
|
||||
}
|
||||
|
||||
|
||||
|
@ -1523,12 +1523,10 @@ struct _setup_vertex
|
||||
typedef struct _fbi_state fbi_state;
|
||||
struct _fbi_state
|
||||
{
|
||||
void * ram; /* pointer to frame buffer RAM */
|
||||
UINT8 * ram; /* pointer to frame buffer RAM */
|
||||
UINT32 mask; /* mask to apply to pointers */
|
||||
UINT16 * rgb[3]; /* pointer to 3 RGB buffers */
|
||||
UINT16 * aux; /* pointer to 1 aux buffer */
|
||||
UINT32 rgbmax[3]; /* maximum valid offset in each RGB buffer */
|
||||
UINT32 auxmax; /* maximum valid offset in the aux buffer */
|
||||
UINT32 rgboffs[3]; /* word offset to 3 RGB buffers */
|
||||
UINT32 auxoffs; /* word offset to 1 aux buffer */
|
||||
|
||||
UINT8 frontbuf; /* front buffer index */
|
||||
UINT8 backbuf; /* back buffer index */
|
||||
@ -3551,7 +3549,7 @@ static void raster_##name(void *destbase, INT32 y, const poly_extent *extent, co
|
||||
\
|
||||
/* get pointers to the target buffer and depth buffer */ \
|
||||
dest = (UINT16 *)destbase + scry * v->fbi.rowpixels; \
|
||||
depth = v->fbi.aux ? (v->fbi.aux + scry * v->fbi.rowpixels) : NULL; \
|
||||
depth = (v->fbi.auxoffs != ~0) ? ((UINT16 *)(v->fbi.ram + v->fbi.auxoffs) + scry * v->fbi.rowpixels) : NULL; \
|
||||
\
|
||||
/* compute the starting parameters */ \
|
||||
dx = startx - (extra->ax >> 4); \
|
||||
|
@ -194,6 +194,7 @@ static void init_fbi(voodoo_state *v, fbi_state *f, void *memory, int fbmem);
|
||||
static void init_tmu_shared(tmu_shared_state *s);
|
||||
static void init_tmu(voodoo_state *v, tmu_state *t, voodoo_reg *reg, void *memory, int tmem);
|
||||
static void soft_reset(voodoo_state *v);
|
||||
static void recompute_video_memory(voodoo_state *v);
|
||||
static void check_stalled_cpu(voodoo_state *v, attotime current_time);
|
||||
static void flush_fifos(voodoo_state *v, attotime current_time);
|
||||
static TIMER_CALLBACK( stall_cpu_callback );
|
||||
@ -383,12 +384,13 @@ int voodoo_update(const device_config *device, bitmap_t *bitmap, const rectangle
|
||||
|
||||
/* copy from the current front buffer */
|
||||
for (y = cliprect->min_y; y <= cliprect->max_y; y++)
|
||||
{
|
||||
UINT16 *src = v->fbi.rgb[drawbuf] + (y - v->fbi.yoffs) * v->fbi.rowpixels - v->fbi.xoffs;
|
||||
UINT32 *dst = BITMAP_ADDR32(bitmap, y, 0);
|
||||
for (x = cliprect->min_x; x <= cliprect->max_x; x++)
|
||||
dst[x] = v->fbi.pen[src[x]];
|
||||
}
|
||||
if (y >= v->fbi.yoffs)
|
||||
{
|
||||
UINT16 *src = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[drawbuf]) + (y - v->fbi.yoffs) * v->fbi.rowpixels - v->fbi.xoffs;
|
||||
UINT32 *dst = BITMAP_ADDR32(bitmap, y, 0);
|
||||
for (x = cliprect->min_x; x <= cliprect->max_x; x++)
|
||||
dst[x] = v->fbi.pen[src[x]];
|
||||
}
|
||||
|
||||
/* update stats display */
|
||||
statskey = (input_code_pressed(KEYCODE_BACKSLASH) != 0);
|
||||
@ -406,7 +408,7 @@ int voodoo_update(const device_config *device, bitmap_t *bitmap, const rectangle
|
||||
{
|
||||
for (y = cliprect->min_y; y <= cliprect->max_y; y++)
|
||||
{
|
||||
UINT16 *src = v->fbi.aux + (y - v->fbi.yoffs) * v->fbi.rowpixels - v->fbi.xoffs;
|
||||
UINT16 *src = (UINT16 *)(v->fbi.ram + v->fbi.auxoffs) + (y - v->fbi.yoffs) * v->fbi.rowpixels - v->fbi.xoffs;
|
||||
UINT32 *dst = BITMAP_ADDR32(bitmap, y, 0);
|
||||
for (x = cliprect->min_x; x <= cliprect->max_x; x++)
|
||||
dst[x] = ((src[x] << 8) & 0xff0000) | ((src[x] >> 0) & 0xff00) | ((src[x] >> 8) & 0xff);
|
||||
@ -460,8 +462,8 @@ static void init_fbi(voodoo_state *v, fbi_state *f, void *memory, int fbmem)
|
||||
/* allocate frame buffer RAM and set pointers */
|
||||
f->ram = memory;
|
||||
f->mask = fbmem - 1;
|
||||
f->rgb[0] = f->rgb[1] = f->rgb[2] = f->ram;
|
||||
f->aux = f->ram;
|
||||
f->rgboffs[0] = f->rgboffs[1] = f->rgboffs[2] = 0;
|
||||
f->auxoffs = ~0;
|
||||
|
||||
/* default to 0x0 */
|
||||
f->frontbuf = 0;
|
||||
@ -486,7 +488,7 @@ static void init_fbi(voodoo_state *v, fbi_state *f, void *memory, int fbmem)
|
||||
f->vblank = FALSE;
|
||||
|
||||
/* initialize the memory FIFO */
|
||||
f->fifo.base = f->ram;
|
||||
f->fifo.base = NULL;
|
||||
f->fifo.size = f->fifo.in = f->fifo.out = 0;
|
||||
|
||||
/* set the fog delta mask */
|
||||
@ -591,6 +593,192 @@ static void init_tmu(voodoo_state *v, tmu_state *t, voodoo_reg *reg, void *memor
|
||||
}
|
||||
|
||||
|
||||
static STATE_POSTLOAD( voodoo_postload )
|
||||
{
|
||||
voodoo_state *v = param;
|
||||
int index, subindex;
|
||||
|
||||
v->fbi.clut_dirty = TRUE;
|
||||
for (index = 0; index < ARRAY_LENGTH(v->tmu); index++)
|
||||
{
|
||||
v->tmu[index].regdirty = TRUE;
|
||||
for (subindex = 0; subindex < ARRAY_LENGTH(v->tmu[index].ncc); subindex++)
|
||||
v->tmu[index].ncc[subindex].dirty = TRUE;
|
||||
}
|
||||
|
||||
/* recompute video memory to get the FBI FIFO base recomputed */
|
||||
if (v->type <= VOODOO_2)
|
||||
recompute_video_memory(v);
|
||||
}
|
||||
|
||||
|
||||
static void init_save_state(const device_config *device)
|
||||
{
|
||||
voodoo_state *v = get_safe_token(device);
|
||||
char unique_tag[50];
|
||||
int index, subindex;
|
||||
|
||||
state_save_register_postload(device->machine, voodoo_postload, v);
|
||||
|
||||
/* create the name for save states */
|
||||
assert(strlen(device->tag) < 30);
|
||||
state_save_combine_module_and_tag(unique_tag, "voodoo", device->tag);
|
||||
|
||||
/* register states: core */
|
||||
state_save_register_item(unique_tag, 0, v->extra_cycles);
|
||||
state_save_register_item_pointer(unique_tag, 0, (&v->reg[0].u), ARRAY_LENGTH(v->reg));
|
||||
state_save_register_item(unique_tag, 0, v->alt_regmap);
|
||||
|
||||
/* register states: pci */
|
||||
state_save_register_item(unique_tag, 0, v->pci.fifo.in);
|
||||
state_save_register_item(unique_tag, 0, v->pci.fifo.out);
|
||||
state_save_register_item(unique_tag, 0, v->pci.init_enable);
|
||||
state_save_register_item(unique_tag, 0, v->pci.stall_state);
|
||||
state_save_register_item(unique_tag, 0, v->pci.op_pending);
|
||||
state_save_register_item(unique_tag, 0, v->pci.op_end_time.seconds);
|
||||
state_save_register_item(unique_tag, 0, v->pci.op_end_time.attoseconds);
|
||||
state_save_register_item_array(unique_tag, 0, v->pci.fifo_mem);
|
||||
|
||||
/* register states: dac */
|
||||
state_save_register_item_array(unique_tag, 0, v->dac.reg);
|
||||
state_save_register_item(unique_tag, 0, v->dac.read_result);
|
||||
|
||||
/* register states: fbi */
|
||||
state_save_register_item_pointer(unique_tag, 0, v->fbi.ram, v->fbi.mask + 1);
|
||||
state_save_register_item_array(unique_tag, 0, v->fbi.rgboffs);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.auxoffs);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.frontbuf);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.backbuf);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.swaps_pending);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.video_changed);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.yorigin);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.lfb_base);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.lfb_stride);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.width);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.height);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.xoffs);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.yoffs);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.vsyncscan);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.rowpixels);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.vblank);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.vblank_count);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.vblank_swap_pending);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.vblank_swap);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.vblank_dont_swap);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.cheating_allowed);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.sign);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.ax);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.ay);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.bx);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.by);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.cx);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.cy);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.startr);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.startg);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.startb);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.starta);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.startz);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.startw);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.drdx);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.dgdx);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.dbdx);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.dadx);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.dzdx);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.dwdx);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.drdy);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.dgdy);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.dbdy);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.dady);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.dzdy);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.dwdy);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.lfb_stats.pixels_in);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.lfb_stats.pixels_out);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.lfb_stats.chroma_fail);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.lfb_stats.zfunc_fail);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.lfb_stats.afunc_fail);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.lfb_stats.clip_fail);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.lfb_stats.stipple_count);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.sverts);
|
||||
for (index = 0; index < ARRAY_LENGTH(v->fbi.svert); index++)
|
||||
{
|
||||
state_save_register_item(unique_tag, index, v->fbi.svert[index].x);
|
||||
state_save_register_item(unique_tag, index, v->fbi.svert[index].y);
|
||||
state_save_register_item(unique_tag, index, v->fbi.svert[index].a);
|
||||
state_save_register_item(unique_tag, index, v->fbi.svert[index].r);
|
||||
state_save_register_item(unique_tag, index, v->fbi.svert[index].g);
|
||||
state_save_register_item(unique_tag, index, v->fbi.svert[index].b);
|
||||
state_save_register_item(unique_tag, index, v->fbi.svert[index].z);
|
||||
state_save_register_item(unique_tag, index, v->fbi.svert[index].wb);
|
||||
state_save_register_item(unique_tag, index, v->fbi.svert[index].w0);
|
||||
state_save_register_item(unique_tag, index, v->fbi.svert[index].s0);
|
||||
state_save_register_item(unique_tag, index, v->fbi.svert[index].t0);
|
||||
state_save_register_item(unique_tag, index, v->fbi.svert[index].w1);
|
||||
state_save_register_item(unique_tag, index, v->fbi.svert[index].s1);
|
||||
state_save_register_item(unique_tag, index, v->fbi.svert[index].t1);
|
||||
}
|
||||
state_save_register_item(unique_tag, 0, v->fbi.fifo.size);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.fifo.in);
|
||||
state_save_register_item(unique_tag, 0, v->fbi.fifo.out);
|
||||
for (index = 0; index < ARRAY_LENGTH(v->fbi.cmdfifo); index++)
|
||||
{
|
||||
state_save_register_item(unique_tag, index, v->fbi.cmdfifo[index].enable);
|
||||
state_save_register_item(unique_tag, index, v->fbi.cmdfifo[index].count_holes);
|
||||
state_save_register_item(unique_tag, index, v->fbi.cmdfifo[index].base);
|
||||
state_save_register_item(unique_tag, index, v->fbi.cmdfifo[index].end);
|
||||
state_save_register_item(unique_tag, index, v->fbi.cmdfifo[index].rdptr);
|
||||
state_save_register_item(unique_tag, index, v->fbi.cmdfifo[index].amin);
|
||||
state_save_register_item(unique_tag, index, v->fbi.cmdfifo[index].amax);
|
||||
state_save_register_item(unique_tag, index, v->fbi.cmdfifo[index].depth);
|
||||
state_save_register_item(unique_tag, index, v->fbi.cmdfifo[index].holes);
|
||||
}
|
||||
state_save_register_item_array(unique_tag, 0, v->fbi.fogblend);
|
||||
state_save_register_item_array(unique_tag, 0, v->fbi.fogdelta);
|
||||
state_save_register_item_array(unique_tag, 0, v->fbi.clut);
|
||||
|
||||
/* register states: tmu */
|
||||
for (index = 0; index < ARRAY_LENGTH(v->tmu); index++)
|
||||
{
|
||||
tmu_state *tmu = &v->tmu[index];
|
||||
if (tmu->ram == NULL)
|
||||
continue;
|
||||
if (tmu->ram != v->fbi.ram)
|
||||
state_save_register_item_pointer(unique_tag, index, tmu->ram, tmu->mask + 1);
|
||||
state_save_register_item(unique_tag, index, tmu->starts);
|
||||
state_save_register_item(unique_tag, index, tmu->startt);
|
||||
state_save_register_item(unique_tag, index, tmu->startw);
|
||||
state_save_register_item(unique_tag, index, tmu->dsdx);
|
||||
state_save_register_item(unique_tag, index, tmu->dtdx);
|
||||
state_save_register_item(unique_tag, index, tmu->dwdx);
|
||||
state_save_register_item(unique_tag, index, tmu->dsdy);
|
||||
state_save_register_item(unique_tag, index, tmu->dtdy);
|
||||
state_save_register_item(unique_tag, index, tmu->dwdy);
|
||||
for (subindex = 0; subindex < ARRAY_LENGTH(tmu->ncc); subindex++)
|
||||
{
|
||||
state_save_register_item_array(unique_tag, index * ARRAY_LENGTH(tmu->ncc) + subindex, tmu->ncc[subindex].ir);
|
||||
state_save_register_item_array(unique_tag, index * ARRAY_LENGTH(tmu->ncc) + subindex, tmu->ncc[subindex].ig);
|
||||
state_save_register_item_array(unique_tag, index * ARRAY_LENGTH(tmu->ncc) + subindex, tmu->ncc[subindex].ib);
|
||||
state_save_register_item_array(unique_tag, index * ARRAY_LENGTH(tmu->ncc) + subindex, tmu->ncc[subindex].qr);
|
||||
state_save_register_item_array(unique_tag, index * ARRAY_LENGTH(tmu->ncc) + subindex, tmu->ncc[subindex].qg);
|
||||
state_save_register_item_array(unique_tag, index * ARRAY_LENGTH(tmu->ncc) + subindex, tmu->ncc[subindex].qb);
|
||||
state_save_register_item_array(unique_tag, index * ARRAY_LENGTH(tmu->ncc) + subindex, tmu->ncc[subindex].y);
|
||||
}
|
||||
}
|
||||
|
||||
/* register states: banshee */
|
||||
if (v->type >= VOODOO_BANSHEE)
|
||||
{
|
||||
state_save_register_item_array(unique_tag, 0, v->banshee.io);
|
||||
state_save_register_item_array(unique_tag, 0, v->banshee.agp);
|
||||
state_save_register_item_array(unique_tag, 0, v->banshee.vga);
|
||||
state_save_register_item_array(unique_tag, 0, v->banshee.crtc);
|
||||
state_save_register_item_array(unique_tag, 0, v->banshee.seq);
|
||||
state_save_register_item_array(unique_tag, 0, v->banshee.gc);
|
||||
state_save_register_item_array(unique_tag, 0, v->banshee.att);
|
||||
state_save_register_item(unique_tag, 0, v->banshee.attff);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
@ -665,7 +853,7 @@ static void swap_buffers(voodoo_state *v)
|
||||
{
|
||||
if (v->type < VOODOO_2 || !v->fbi.vblank_dont_swap)
|
||||
{
|
||||
if (v->fbi.rgb[2] == NULL)
|
||||
if (v->fbi.rgboffs[2] == ~0)
|
||||
{
|
||||
v->fbi.frontbuf = 1 - v->fbi.frontbuf;
|
||||
v->fbi.backbuf = 1 - v->fbi.frontbuf;
|
||||
@ -678,10 +866,7 @@ static void swap_buffers(voodoo_state *v)
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
v->fbi.rgb[0] = (UINT16 *)((UINT8 *)v->fbi.ram + (v->reg[leftOverlayBuf].u & v->fbi.mask & ~0x0f));
|
||||
v->fbi.rgbmax[0] = (UINT16 *)((UINT8 *)v->fbi.ram + v->fbi.mask + 1) - v->fbi.rgb[0];
|
||||
}
|
||||
v->fbi.rgboffs[0] = v->reg[leftOverlayBuf].u & v->fbi.mask & ~0x0f;
|
||||
|
||||
/* decrement the pending count and reset our state */
|
||||
if (v->fbi.swaps_pending)
|
||||
@ -886,10 +1071,10 @@ static void recompute_video_memory(voodoo_state *v)
|
||||
// logerror("VOODOO.%d.VIDMEM: buffer_pages=%X fifo=%X-%X tiles=%X rowpix=%d\n", v->index, buffer_pages, fifo_start_page, fifo_last_page, v->fbi.x_tiles, v->fbi.rowpixels);
|
||||
|
||||
/* first RGB buffer always starts at 0 */
|
||||
v->fbi.rgb[0] = v->fbi.ram;
|
||||
v->fbi.rgboffs[0] = 0;
|
||||
|
||||
/* second RGB buffer starts immediately afterwards */
|
||||
v->fbi.rgb[1] = (UINT16 *)((UINT8 *)v->fbi.ram + buffer_pages * 0x1000);
|
||||
v->fbi.rgboffs[1] = buffer_pages * 0x1000;
|
||||
|
||||
/* remaining buffers are based on the config */
|
||||
switch (memory_config)
|
||||
@ -898,48 +1083,32 @@ static void recompute_video_memory(voodoo_state *v)
|
||||
logerror("VOODOO.%d.ERROR:Unexpected memory configuration in recompute_video_memory!\n", v->index);
|
||||
|
||||
case 0: /* 2 color buffers, 1 aux buffer */
|
||||
v->fbi.rgb[2] = NULL;
|
||||
v->fbi.aux = (UINT16 *)((UINT8 *)v->fbi.ram + 2 * buffer_pages * 0x1000);
|
||||
v->fbi.rgboffs[2] = ~0;
|
||||
v->fbi.auxoffs = 2 * buffer_pages * 0x1000;
|
||||
break;
|
||||
|
||||
case 1: /* 3 color buffers, 0 aux buffers */
|
||||
v->fbi.rgb[2] = (UINT16 *)((UINT8 *)v->fbi.ram + 2 * buffer_pages * 0x1000);
|
||||
v->fbi.aux = NULL;
|
||||
v->fbi.rgboffs[2] = 2 * buffer_pages * 0x1000;
|
||||
v->fbi.auxoffs = ~0;
|
||||
break;
|
||||
|
||||
case 2: /* 3 color buffers, 1 aux buffers */
|
||||
v->fbi.rgb[2] = (UINT16 *)((UINT8 *)v->fbi.ram + 2 * buffer_pages * 0x1000);
|
||||
v->fbi.aux = (UINT16 *)((UINT8 *)v->fbi.ram + 3 * buffer_pages * 0x1000);
|
||||
v->fbi.rgboffs[2] = 2 * buffer_pages * 0x1000;
|
||||
v->fbi.auxoffs = 3 * buffer_pages * 0x1000;
|
||||
break;
|
||||
}
|
||||
|
||||
/* clamp the RGB buffers to video memory */
|
||||
for (buf = 0; buf < 3; buf++)
|
||||
{
|
||||
v->fbi.rgbmax[buf] = 0;
|
||||
if (v->fbi.rgb[buf])
|
||||
{
|
||||
if ((UINT8 *)v->fbi.rgb[buf] > (UINT8 *)v->fbi.ram + v->fbi.mask)
|
||||
v->fbi.rgb[buf] = (UINT16 *)((UINT8 *)v->fbi.ram + v->fbi.mask);
|
||||
v->fbi.rgbmax[buf] = (UINT16 *)((UINT8 *)v->fbi.ram + v->fbi.mask + 1) - v->fbi.rgb[buf];
|
||||
}
|
||||
}
|
||||
if (v->fbi.rgboffs[buf] != ~0 && v->fbi.rgboffs[buf] > v->fbi.mask)
|
||||
v->fbi.rgboffs[buf] = v->fbi.mask;
|
||||
|
||||
/* clamp the aux buffer to video memory */
|
||||
v->fbi.auxmax = 0;
|
||||
if (v->fbi.aux)
|
||||
{
|
||||
if ((UINT8 *)v->fbi.aux > (UINT8 *)v->fbi.ram + v->fbi.mask)
|
||||
v->fbi.aux = (UINT16 *)((UINT8 *)v->fbi.ram + v->fbi.mask);
|
||||
v->fbi.auxmax = (UINT16 *)((UINT8 *)v->fbi.ram + v->fbi.mask + 1) - v->fbi.aux;
|
||||
}
|
||||
if (v->fbi.auxoffs != ~0 && v->fbi.auxoffs > v->fbi.mask)
|
||||
v->fbi.auxoffs = v->fbi.mask;
|
||||
|
||||
/* mame_printf_debug("rgb[0] = %08X rgb[1] = %08X rgb[2] = %08X aux = %08X\n",
|
||||
(UINT8 *)v->fbi.rgb[0] - (UINT8 *)v->fbi.ram,
|
||||
(UINT8 *)v->fbi.rgb[1] - (UINT8 *)v->fbi.ram,
|
||||
v->fbi.rgb[2] ? ((UINT8 *)v->fbi.rgb[2] - (UINT8 *)v->fbi.ram) : 0,
|
||||
(UINT8 *)v->fbi.aux - (UINT8 *)v->fbi.ram);*/
|
||||
// logerror("VOODOO.%d.VIDMEM: rgbmax=%X,%X,%X auxmax=%X\n", v->index, v->fbi.rgbmax[0], v->fbi.rgbmax[1], v->fbi.rgbmax[2], v->fbi.auxmax);
|
||||
v->fbi.rgboffs[0], v->fbi.rgboffs[1], v->fbi.rgboffs[2], v->fbi.auxoffs);*/
|
||||
|
||||
/* compute the memory FIFO location and size */
|
||||
if (fifo_last_page > v->fbi.mask / 0x1000)
|
||||
@ -948,7 +1117,7 @@ static void recompute_video_memory(voodoo_state *v)
|
||||
/* is it valid and enabled? */
|
||||
if (fifo_start_page <= fifo_last_page && FBIINIT0_ENABLE_MEMORY_FIFO(v->reg[fbiInit0].u))
|
||||
{
|
||||
v->fbi.fifo.base = (UINT32 *)((UINT8 *)v->fbi.ram + fifo_start_page * 0x1000);
|
||||
v->fbi.fifo.base = (UINT32 *)(v->fbi.ram + fifo_start_page * 0x1000);
|
||||
v->fbi.fifo.size = (fifo_last_page + 1 - fifo_start_page) * 0x1000 / 4;
|
||||
if (v->fbi.fifo.size > 65536*2)
|
||||
v->fbi.fifo.size = 65536*2;
|
||||
@ -965,7 +1134,7 @@ static void recompute_video_memory(voodoo_state *v)
|
||||
fifo_reset(&v->fbi.fifo);
|
||||
|
||||
/* reset our front/back buffers if they are out of range */
|
||||
if (!v->fbi.rgb[2])
|
||||
if (v->fbi.rgboffs[2] == ~0)
|
||||
{
|
||||
if (v->fbi.frontbuf == 2)
|
||||
v->fbi.frontbuf = 0;
|
||||
@ -1265,7 +1434,7 @@ INLINE INT32 prepare_tmu(tmu_state *t)
|
||||
|
||||
static int cmdfifo_compute_expected_depth(voodoo_state *v, cmdfifo_info *f)
|
||||
{
|
||||
UINT32 *fifobase = v->fbi.ram;
|
||||
UINT32 *fifobase = (UINT32 *)v->fbi.ram;
|
||||
UINT32 readptr = f->rdptr;
|
||||
UINT32 command = fifobase[readptr / 4];
|
||||
int i, count = 0;
|
||||
@ -1405,7 +1574,7 @@ static int cmdfifo_compute_expected_depth(voodoo_state *v, cmdfifo_info *f)
|
||||
|
||||
static UINT32 cmdfifo_execute(voodoo_state *v, cmdfifo_info *f)
|
||||
{
|
||||
UINT32 *fifobase = v->fbi.ram;
|
||||
UINT32 *fifobase = (UINT32 *)v->fbi.ram;
|
||||
UINT32 readptr = f->rdptr;
|
||||
UINT32 *src = &fifobase[readptr / 4];
|
||||
UINT32 command = *src++;
|
||||
@ -1746,7 +1915,7 @@ static INT32 cmdfifo_execute_if_ready(voodoo_state *v, cmdfifo_info *f)
|
||||
static void cmdfifo_w(voodoo_state *v, cmdfifo_info *f, offs_t offset, UINT32 data)
|
||||
{
|
||||
UINT32 addr = f->base + offset * 4;
|
||||
UINT32 *fifobase = v->fbi.ram;
|
||||
UINT32 *fifobase = (UINT32 *)v->fbi.ram;
|
||||
|
||||
if (LOG_CMDFIFO_VERBOSE) logerror("CMDFIFO_w(%04X) = %08X\n", offset, data);
|
||||
|
||||
@ -2441,10 +2610,7 @@ static INT32 register_w(voodoo_state *v, offs_t offset, UINT32 data)
|
||||
if (v->type == VOODOO_2 && (chips & 1))
|
||||
v->fbi.cmdfifo[0].amin = data;
|
||||
else if (v->type >= VOODOO_BANSHEE && (chips & 1))
|
||||
{
|
||||
v->fbi.rgb[1] = (UINT16 *)((UINT8 *)v->fbi.ram + (data & v->fbi.mask & ~0x0f));
|
||||
v->fbi.rgbmax[1] = (UINT16 *)((UINT8 *)v->fbi.ram + v->fbi.mask + 1) - v->fbi.rgb[1];
|
||||
}
|
||||
v->fbi.rgboffs[1] = data & v->fbi.mask & ~0x0f;
|
||||
break;
|
||||
|
||||
case cmdFifoAMax:
|
||||
@ -2465,10 +2631,7 @@ static INT32 register_w(voodoo_state *v, offs_t offset, UINT32 data)
|
||||
if (v->type == VOODOO_2 && (chips & 1))
|
||||
v->fbi.cmdfifo[0].depth = data;
|
||||
else if (v->type >= VOODOO_BANSHEE && (chips & 1))
|
||||
{
|
||||
v->fbi.aux = (UINT16 *)((UINT8 *)v->fbi.ram + (data & v->fbi.mask & ~0x0f));
|
||||
v->fbi.auxmax = (UINT16 *)((UINT8 *)v->fbi.ram + v->fbi.mask + 1) - v->fbi.aux;
|
||||
}
|
||||
v->fbi.auxoffs = data & v->fbi.mask & ~0x0f;
|
||||
break;
|
||||
|
||||
case cmdFifoHoles:
|
||||
@ -2845,21 +3008,21 @@ static INT32 lfb_w(voodoo_state *v, offs_t offset, UINT32 data, UINT32 mem_mask,
|
||||
switch (destbuf)
|
||||
{
|
||||
case 0: /* front buffer */
|
||||
dest = v->fbi.rgb[v->fbi.frontbuf];
|
||||
destmax = v->fbi.rgbmax[v->fbi.frontbuf];
|
||||
dest = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.frontbuf]);
|
||||
destmax = (v->fbi.mask + 1 - v->fbi.rgboffs[v->fbi.frontbuf]) / 2;
|
||||
v->fbi.video_changed = TRUE;
|
||||
break;
|
||||
|
||||
case 1: /* back buffer */
|
||||
dest = v->fbi.rgb[v->fbi.backbuf];
|
||||
destmax = v->fbi.rgbmax[v->fbi.backbuf];
|
||||
dest = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.backbuf]);
|
||||
destmax = (v->fbi.mask + 1 - v->fbi.rgboffs[v->fbi.backbuf]) / 2;
|
||||
break;
|
||||
|
||||
default: /* reserved */
|
||||
return 0;
|
||||
}
|
||||
depth = v->fbi.aux;
|
||||
depthmax = v->fbi.auxmax;
|
||||
depth = (UINT16 *)(v->fbi.ram + v->fbi.auxoffs);
|
||||
depthmax = (v->fbi.mask + 1 - v->fbi.auxoffs) / 2;
|
||||
|
||||
/* wait for any outstanding work to finish */
|
||||
poly_wait(v->poly, "LFB Write");
|
||||
@ -3631,20 +3794,20 @@ static UINT32 lfb_r(voodoo_state *v, offs_t offset, int forcefront)
|
||||
switch (destbuf)
|
||||
{
|
||||
case 0: /* front buffer */
|
||||
buffer = v->fbi.rgb[v->fbi.frontbuf];
|
||||
bufmax = v->fbi.rgbmax[v->fbi.frontbuf];
|
||||
buffer = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.frontbuf]);
|
||||
bufmax = (v->fbi.mask + 1 - v->fbi.rgboffs[v->fbi.frontbuf]) / 2;
|
||||
break;
|
||||
|
||||
case 1: /* back buffer */
|
||||
buffer = v->fbi.rgb[v->fbi.backbuf];
|
||||
bufmax = v->fbi.rgbmax[v->fbi.backbuf];
|
||||
buffer = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.backbuf]);
|
||||
bufmax = (v->fbi.mask + 1 - v->fbi.rgboffs[v->fbi.backbuf]) / 2;
|
||||
break;
|
||||
|
||||
case 2: /* aux buffer */
|
||||
buffer = v->fbi.aux;
|
||||
bufmax = v->fbi.auxmax;
|
||||
if (!buffer)
|
||||
if (v->fbi.auxoffs == ~0)
|
||||
return 0xffffffff;
|
||||
buffer = (UINT16 *)(v->fbi.ram + v->fbi.auxoffs);
|
||||
bufmax = (v->fbi.mask + 1 - v->fbi.auxoffs) / 2;
|
||||
break;
|
||||
|
||||
default: /* reserved */
|
||||
@ -4285,7 +4448,6 @@ static DEVICE_START( voodoo )
|
||||
voodoo_state *v = get_safe_token(device);
|
||||
const raster_info *info;
|
||||
void *fbmem, *tmumem[2];
|
||||
char unique_tag[50];
|
||||
UINT32 tmumem0;
|
||||
int val;
|
||||
|
||||
@ -4449,13 +4611,9 @@ static DEVICE_START( voodoo )
|
||||
|
||||
/* do a soft reset to reset everything else */
|
||||
soft_reset(v);
|
||||
|
||||
/* create the name for save states */
|
||||
assert(strlen(device->tag) < 30);
|
||||
state_save_combine_module_and_tag(unique_tag, "voodoo", device->tag);
|
||||
|
||||
/* register states */
|
||||
// state_save_register_item(unique_tag, 0, ide->adapter_control);
|
||||
|
||||
/* register for save states */
|
||||
init_save_state(device);
|
||||
}
|
||||
|
||||
|
||||
@ -4503,6 +4661,7 @@ static DEVICE_SET_INFO( voodoo )
|
||||
|
||||
DEVICE_GET_INFO( voodoo )
|
||||
{
|
||||
const voodoo_config *config = (device != NULL) ? device->inline_config : NULL;
|
||||
switch (state)
|
||||
{
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
@ -4517,7 +4676,16 @@ DEVICE_GET_INFO( voodoo )
|
||||
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(voodoo);break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case DEVINFO_STR_NAME: info->s = "3dfx Voodoo"; break;
|
||||
case DEVINFO_STR_NAME:
|
||||
switch (config->type)
|
||||
{
|
||||
default:
|
||||
case VOODOO_1: info->s = "3dfx Voodoo Graphics"; break;
|
||||
case VOODOO_2: info->s = "3dfx Voodoo 2"; break;
|
||||
case VOODOO_BANSHEE: info->s = "3dfx Voodoo Banshee"; break;
|
||||
case VOODOO_3: info->s = "3dfx Voodoo 3"; break;
|
||||
}
|
||||
break;
|
||||
case DEVINFO_STR_FAMILY: info->s = "3dfx Voodoo Graphics"; break;
|
||||
case DEVINFO_STR_VERSION: info->s = "1.0"; break;
|
||||
case DEVINFO_STR_SOURCE_FILE: info->s = __FILE__; break;
|
||||
@ -4560,11 +4728,11 @@ static INT32 fastfill(voodoo_state *v)
|
||||
switch (destbuf)
|
||||
{
|
||||
case 0: /* front buffer */
|
||||
drawbuf = v->fbi.rgb[v->fbi.frontbuf];
|
||||
drawbuf = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.frontbuf]);
|
||||
break;
|
||||
|
||||
case 1: /* back buffer */
|
||||
drawbuf = v->fbi.rgb[v->fbi.backbuf];
|
||||
drawbuf = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.backbuf]);
|
||||
break;
|
||||
|
||||
default: /* reserved */
|
||||
@ -4698,12 +4866,12 @@ static INT32 triangle(voodoo_state *v)
|
||||
switch (destbuf)
|
||||
{
|
||||
case 0: /* front buffer */
|
||||
drawbuf = v->fbi.rgb[v->fbi.frontbuf];
|
||||
drawbuf = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.frontbuf]);
|
||||
v->fbi.video_changed = TRUE;
|
||||
break;
|
||||
|
||||
case 1: /* back buffer */
|
||||
drawbuf = v->fbi.rgb[v->fbi.backbuf];
|
||||
drawbuf = (UINT16 *)(v->fbi.ram + v->fbi.rgboffs[v->fbi.backbuf]);
|
||||
break;
|
||||
|
||||
default: /* reserved */
|
||||
@ -5196,11 +5364,11 @@ static void raster_fastfill(void *destbase, INT32 y, const poly_extent *extent,
|
||||
}
|
||||
|
||||
/* fill this dest buffer row */
|
||||
if (FBZMODE_AUX_BUFFER_MASK(v->reg[fbzMode].u) && v->fbi.aux)
|
||||
if (FBZMODE_AUX_BUFFER_MASK(v->reg[fbzMode].u) && v->fbi.auxoffs != ~0)
|
||||
{
|
||||
UINT16 color = v->reg[zaColor].u;
|
||||
UINT64 expanded = ((UINT64)color << 48) | ((UINT64)color << 32) | (color << 16) | color;
|
||||
UINT16 *dest = v->fbi.aux + scry * v->fbi.rowpixels;
|
||||
UINT16 *dest = (UINT16 *)(v->fbi.ram + v->fbi.auxoffs) + scry * v->fbi.rowpixels;
|
||||
|
||||
for (x = startx; x < stopx && (x & 3) != 0; x++)
|
||||
dest[x] = color;
|
||||
|
@ -171,6 +171,16 @@ void cage_init(running_machine *machine, int boot_region, offs_t speedup)
|
||||
|
||||
if (speedup)
|
||||
speedup_ram = memory_install_write32_handler(machine, cage_cpu, ADDRESS_SPACE_PROGRAM, speedup, speedup, 0, 0, speedup_w);
|
||||
|
||||
state_save_register_global(cpu_to_cage_ready);
|
||||
state_save_register_global(cage_to_cpu_ready);
|
||||
state_save_register_global(serial_period_per_word.seconds);
|
||||
state_save_register_global(serial_period_per_word.attoseconds);
|
||||
state_save_register_global(dma_enabled);
|
||||
state_save_register_global(dma_timer_enabled);
|
||||
state_save_register_global_array(cage_timer_enabled);
|
||||
state_save_register_global(cage_from_main);
|
||||
state_save_register_global(cage_control);
|
||||
}
|
||||
|
||||
|
||||
|
@ -144,7 +144,6 @@ Notes:
|
||||
static UINT32 *rambase, *rambase2, *rombase;
|
||||
static UINT32 *video_base;
|
||||
static UINT32 *kinst_control;
|
||||
static UINT32 *kinst_speedup;
|
||||
|
||||
static const UINT8 *control_map;
|
||||
|
||||
@ -223,9 +222,6 @@ static MACHINE_START( kinst )
|
||||
|
||||
static MACHINE_RESET( kinst )
|
||||
{
|
||||
/* reset the IDE controller */
|
||||
devtag_reset(machine, IDE_CONTROLLER, "ide");
|
||||
|
||||
/* set a safe base location for video */
|
||||
video_base = &rambase[0x30000/4];
|
||||
}
|
||||
@ -396,37 +392,6 @@ static WRITE32_HANDLER( kinst_control_w )
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Speedups
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static TIMER_CALLBACK( end_spin )
|
||||
{
|
||||
cpu_triggerint(machine, 0);
|
||||
}
|
||||
|
||||
|
||||
static READ32_HANDLER( kinst_speedup_r )
|
||||
{
|
||||
if (activecpu_get_pc() == 0x88029890 || /* KI */
|
||||
activecpu_get_pc() == 0x8802c2d0 /* KI2 */)
|
||||
{
|
||||
UINT32 r3 = activecpu_get_reg(MIPS3_R3);
|
||||
UINT32 r26 = activecpu_get_reg(MIPS3_R26) - *kinst_speedup;
|
||||
if (r26 < r3)
|
||||
{
|
||||
timer_set(ATTOTIME_IN_CYCLES((r3 - r26) * 2, 0), NULL, 0, end_spin);
|
||||
cpu_spinuntil_int();
|
||||
}
|
||||
}
|
||||
return *kinst_speedup;
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Main CPU memory handlers
|
||||
@ -689,7 +654,7 @@ static MACHINE_DRIVER_START( kinst )
|
||||
MDRV_IDE_CONTROLLER_ADD("ide", 0, ide_interrupt)
|
||||
|
||||
/* video hardware */
|
||||
MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK )
|
||||
MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
|
||||
|
||||
MDRV_SCREEN_ADD("main", RASTER)
|
||||
MDRV_SCREEN_REFRESH_RATE(60)
|
||||
@ -901,9 +866,6 @@ static DRIVER_INIT( kinst )
|
||||
|
||||
/* set up the control register mapping */
|
||||
control_map = kinst_control_map;
|
||||
|
||||
/* optimize one of the non-standard loops */
|
||||
kinst_speedup = memory_install_read32_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x8808f5bc, 0x8808f5bf, 0, 0, kinst_speedup_r);
|
||||
}
|
||||
|
||||
|
||||
@ -922,9 +884,6 @@ static DRIVER_INIT( kinst2 )
|
||||
|
||||
/* set up the control register mapping */
|
||||
control_map = kinst2_control_map;
|
||||
|
||||
/* optimize one of the non-standard loops */
|
||||
kinst_speedup = memory_install_read32_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x887ff544, 0x887ff547, 0, 0, kinst_speedup_r);
|
||||
}
|
||||
|
||||
|
||||
@ -935,13 +894,13 @@ static DRIVER_INIT( kinst2 )
|
||||
*
|
||||
*************************************/
|
||||
|
||||
GAME( 1994, kinst, 0, kinst, kinst, kinst, ROT0, "Rare", "Killer Instinct (v1.5d)", 0 )
|
||||
GAME( 1994, kinst14, kinst, kinst, kinst2, kinst, ROT0, "Rare", "Killer Instinct (v1.4)", 0 )
|
||||
GAME( 1994, kinst13, kinst, kinst, kinst2, kinst, ROT0, "Rare", "Killer Instinct (v1.3)", 0 )
|
||||
GAME( 1994, kinstp, kinst, kinst, kinst2, kinst, ROT0, "Rare", "Killer Instinct (proto v4.7)", 0 )
|
||||
GAME( 1994, kinst, 0, kinst, kinst, kinst, ROT0, "Rare", "Killer Instinct (v1.5d)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1994, kinst14, kinst, kinst, kinst2, kinst, ROT0, "Rare", "Killer Instinct (v1.4)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1994, kinst13, kinst, kinst, kinst2, kinst, ROT0, "Rare", "Killer Instinct (v1.3)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1994, kinstp, kinst, kinst, kinst2, kinst, ROT0, "Rare", "Killer Instinct (proto v4.7)", GAME_SUPPORTS_SAVE )
|
||||
|
||||
GAME( 1995, kinst2, 0, kinst, kinst2, kinst2, ROT0, "Rare", "Killer Instinct 2 (v1.4)", 0 )
|
||||
GAME( 1995, kinst2k, kinst2, kinst, kinst2, kinst2, ROT0, "Rare", "Killer Instinct 2 (v1.4k, upgrade kit)", GAME_NOT_WORKING )
|
||||
GAME( 1995, kinst213, kinst2, kinst, kinst2, kinst2, ROT0, "Rare", "Killer Instinct 2 (v1.3)", 0 )
|
||||
GAME( 1995, kinst211, kinst2, kinst, kinst2, kinst2, ROT0, "Rare", "Killer Instinct 2 (v1.1)", 0 )
|
||||
GAME( 1995, kinst210, kinst2, kinst, kinst2, kinst2, ROT0, "Rare", "Killer Instinct 2 (v1.0)", 0 )
|
||||
GAME( 1995, kinst2, 0, kinst, kinst2, kinst2, ROT0, "Rare", "Killer Instinct 2 (v1.4)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1995, kinst2k, kinst2, kinst, kinst2, kinst2, ROT0, "Rare", "Killer Instinct 2 (v1.4k, upgrade kit)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1995, kinst213, kinst2, kinst, kinst2, kinst2, ROT0, "Rare", "Killer Instinct 2 (v1.3)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1995, kinst211, kinst2, kinst, kinst2, kinst2, ROT0, "Rare", "Killer Instinct 2 (v1.1)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1995, kinst210, kinst2, kinst, kinst2, kinst2, ROT0, "Rare", "Killer Instinct 2 (v1.0)", GAME_SUPPORTS_SAVE )
|
||||
|
@ -379,7 +379,8 @@
|
||||
*
|
||||
*************************************/
|
||||
|
||||
struct galileo_timer
|
||||
typedef struct _galileo_timer galileo_timer;
|
||||
struct _galileo_timer
|
||||
{
|
||||
emu_timer * timer;
|
||||
UINT32 count;
|
||||
@ -387,13 +388,14 @@ struct galileo_timer
|
||||
};
|
||||
|
||||
|
||||
struct galileo_data
|
||||
typedef struct _galileo_data galileo_data;
|
||||
struct _galileo_data
|
||||
{
|
||||
/* raw register data */
|
||||
UINT32 reg[0x1000/4];
|
||||
|
||||
/* timer info */
|
||||
struct galileo_timer timer[4];
|
||||
galileo_timer timer[4];
|
||||
|
||||
/* DMA info */
|
||||
INT8 dma_active;
|
||||
@ -406,7 +408,8 @@ struct galileo_data
|
||||
};
|
||||
|
||||
|
||||
struct widget_data
|
||||
typedef struct _widget_data widget_data;
|
||||
struct _widget_data
|
||||
{
|
||||
/* ethernet register address */
|
||||
UINT8 ethernet_addr;
|
||||
@ -427,8 +430,8 @@ struct widget_data
|
||||
static UINT32 *rambase;
|
||||
static UINT32 *rombase;
|
||||
|
||||
static struct galileo_data galileo;
|
||||
static struct widget_data widget;
|
||||
static galileo_data galileo;
|
||||
static widget_data widget;
|
||||
|
||||
static const device_config *voodoo_device;
|
||||
static UINT8 voodoo_stalled;
|
||||
@ -497,6 +500,8 @@ static VIDEO_UPDATE( seattle )
|
||||
|
||||
static MACHINE_START( seattle )
|
||||
{
|
||||
int index;
|
||||
|
||||
voodoo_device = device_list_find_by_tag(machine->config->devicelist, VOODOO_GRAPHICS, "voodoo");
|
||||
|
||||
/* allocate timers for the galileo */
|
||||
@ -520,6 +525,36 @@ static MACHINE_START( seattle )
|
||||
cpunum_set_info_int(0, CPUINFO_INT_MIPS3_FASTRAM_END, 0x1fc7ffff);
|
||||
cpunum_set_info_ptr(0, CPUINFO_PTR_MIPS3_FASTRAM_BASE, rombase);
|
||||
cpunum_set_info_int(0, CPUINFO_INT_MIPS3_FASTRAM_READONLY, 1);
|
||||
|
||||
/* register for save states */
|
||||
state_save_register_global_array(galileo.reg);
|
||||
state_save_register_global(galileo.dma_active);
|
||||
state_save_register_global_array(galileo.dma_stalled_on_voodoo);
|
||||
state_save_register_global_array(galileo.pci_bridge_regs);
|
||||
state_save_register_global_array(galileo.pci_3dfx_regs);
|
||||
state_save_register_global_array(galileo.pci_ide_regs);
|
||||
for (index = 0; index < ARRAY_LENGTH(galileo.timer); index++)
|
||||
{
|
||||
state_save_register_item("galileo", index, galileo.timer[index].count);
|
||||
state_save_register_item("galileo", index, galileo.timer[index].active);
|
||||
}
|
||||
state_save_register_global(widget.ethernet_addr);
|
||||
state_save_register_global(widget.irq_num);
|
||||
state_save_register_global(widget.irq_mask);
|
||||
state_save_register_global(voodoo_stalled);
|
||||
state_save_register_global(cpu_stalled_on_voodoo);
|
||||
state_save_register_global(cpu_stalled_offset);
|
||||
state_save_register_global(cpu_stalled_data);
|
||||
state_save_register_global(cpu_stalled_mem_mask);
|
||||
state_save_register_global(board_config);
|
||||
state_save_register_global(ethernet_irq_num);
|
||||
state_save_register_global(ethernet_irq_state);
|
||||
state_save_register_global(vblank_irq_num);
|
||||
state_save_register_global(vblank_latch);
|
||||
state_save_register_global(vblank_state);
|
||||
state_save_register_global(pending_analog_read);
|
||||
state_save_register_global(status_leds);
|
||||
state_save_register_global(cmos_write_enabled);
|
||||
}
|
||||
|
||||
|
||||
@ -547,8 +582,6 @@ static MACHINE_RESET( seattle )
|
||||
galileo_reset();
|
||||
if (board_config == SEATTLE_WIDGET_CONFIG)
|
||||
widget_reset(machine);
|
||||
if (board_config == FLAGSTAFF_CONFIG)
|
||||
smc91c94_reset(machine);
|
||||
}
|
||||
|
||||
|
||||
@ -586,12 +619,6 @@ static void ethernet_interrupt(running_machine *machine, int state)
|
||||
}
|
||||
|
||||
|
||||
static const struct smc91c9x_interface ethernet_intf =
|
||||
{
|
||||
ethernet_interrupt
|
||||
};
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
@ -875,7 +902,7 @@ static void update_galileo_irqs(running_machine *machine)
|
||||
static TIMER_CALLBACK( galileo_timer_callback )
|
||||
{
|
||||
int which = param;
|
||||
struct galileo_timer *timer = &galileo.timer[which];
|
||||
galileo_timer *timer = &galileo.timer[which];
|
||||
|
||||
if (LOG_TIMERS)
|
||||
logerror("timer %d fired\n", which);
|
||||
@ -1062,7 +1089,7 @@ static READ32_HANDLER( galileo_r )
|
||||
case GREG_TIMER3_COUNT:
|
||||
{
|
||||
int which = offset % 4;
|
||||
struct galileo_timer *timer = &galileo.timer[which];
|
||||
galileo_timer *timer = &galileo.timer[which];
|
||||
|
||||
result = timer->count;
|
||||
if (timer->active)
|
||||
@ -1169,7 +1196,7 @@ static WRITE32_HANDLER( galileo_w )
|
||||
case GREG_TIMER3_COUNT:
|
||||
{
|
||||
int which = offset % 4;
|
||||
struct galileo_timer *timer = &galileo.timer[which];
|
||||
galileo_timer *timer = &galileo.timer[which];
|
||||
|
||||
if (which != 0)
|
||||
data &= 0xffffff;
|
||||
@ -1188,7 +1215,7 @@ static WRITE32_HANDLER( galileo_w )
|
||||
logerror("%08X:timer/counter control = %08X\n", activecpu_get_pc(), data);
|
||||
for (which = 0, mask = 0x01; which < 4; which++, mask <<= 2)
|
||||
{
|
||||
struct galileo_timer *timer = &galileo.timer[which];
|
||||
galileo_timer *timer = &galileo.timer[which];
|
||||
if (!timer->active && (data & mask))
|
||||
{
|
||||
timer->active = 1;
|
||||
@ -1441,21 +1468,21 @@ static WRITE32_HANDLER( carnevil_gun_w )
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static READ32_HANDLER( ethernet_r )
|
||||
static READ32_DEVICE_HANDLER( ethernet_r )
|
||||
{
|
||||
if (!(offset & 8))
|
||||
return smc91c94_r(machine, offset & 7, mem_mask & 0xffff);
|
||||
return smc91c9x_r(device, offset & 7, mem_mask & 0xffff);
|
||||
else
|
||||
return smc91c94_r(machine, offset & 7, mem_mask & 0x00ff);
|
||||
return smc91c9x_r(device, offset & 7, mem_mask & 0x00ff);
|
||||
}
|
||||
|
||||
|
||||
static WRITE32_HANDLER( ethernet_w )
|
||||
static WRITE32_DEVICE_HANDLER( ethernet_w )
|
||||
{
|
||||
if (!(offset & 8))
|
||||
smc91c94_w(machine, offset & 7, data & 0xffff, mem_mask | 0xffff);
|
||||
smc91c9x_w(device, offset & 7, data & 0xffff, mem_mask | 0xffff);
|
||||
else
|
||||
smc91c94_w(machine, offset & 7, data & 0x00ff, mem_mask | 0x00ff);
|
||||
smc91c9x_w(device, offset & 7, data & 0x00ff, mem_mask | 0x00ff);
|
||||
}
|
||||
|
||||
|
||||
@ -1471,7 +1498,6 @@ static void widget_reset(running_machine *machine)
|
||||
UINT8 saved_irq = widget.irq_num;
|
||||
memset(&widget, 0, sizeof(widget));
|
||||
widget.irq_num = saved_irq;
|
||||
smc91c94_reset(machine);
|
||||
}
|
||||
|
||||
|
||||
@ -1487,7 +1513,7 @@ static void update_widget_irq(running_machine *machine)
|
||||
}
|
||||
|
||||
|
||||
static READ32_HANDLER( widget_r )
|
||||
static READ32_DEVICE_HANDLER( widget_r )
|
||||
{
|
||||
UINT32 result = ~0;
|
||||
|
||||
@ -1503,11 +1529,11 @@ static READ32_HANDLER( widget_r )
|
||||
break;
|
||||
|
||||
case WREG_ANALOG:
|
||||
result = analog_port_r(machine, 0, mem_mask);
|
||||
result = analog_port_r(device->machine, 0, mem_mask);
|
||||
break;
|
||||
|
||||
case WREG_ETHER_DATA:
|
||||
result = smc91c94_r(machine, widget.ethernet_addr & 7, mem_mask & 0xffff);
|
||||
result = smc91c9x_r(device, widget.ethernet_addr & 7, mem_mask & 0xffff);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -1517,7 +1543,7 @@ static READ32_HANDLER( widget_r )
|
||||
}
|
||||
|
||||
|
||||
static WRITE32_HANDLER( widget_w )
|
||||
static WRITE32_DEVICE_HANDLER( widget_w )
|
||||
{
|
||||
if (LOG_WIDGET)
|
||||
logerror("Widget write (%02X) = %08X & %08X\n", offset*4, data, mem_mask);
|
||||
@ -1530,15 +1556,15 @@ static WRITE32_HANDLER( widget_w )
|
||||
|
||||
case WREG_INTERRUPT:
|
||||
widget.irq_mask = data;
|
||||
update_widget_irq(machine);
|
||||
update_widget_irq(device->machine);
|
||||
break;
|
||||
|
||||
case WREG_ANALOG:
|
||||
analog_port_w(machine, 0, data, mem_mask);
|
||||
analog_port_w(device->machine, 0, data, mem_mask);
|
||||
break;
|
||||
|
||||
case WREG_ETHER_DATA:
|
||||
smc91c94_w(machine, widget.ethernet_addr & 7, data & 0xffff, mem_mask & 0xffff);
|
||||
smc91c9x_w(device, widget.ethernet_addr & 7, data & 0xffff, mem_mask & 0xffff);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -2459,33 +2485,46 @@ MACHINE_DRIVER_END
|
||||
|
||||
static MACHINE_DRIVER_START( phoenixsa )
|
||||
MDRV_IMPORT_FROM(seattle_common)
|
||||
MDRV_CPU_REPLACE("main", R4700LE, SYSTEM_CLOCK*2)
|
||||
MDRV_IMPORT_FROM(dcs2_audio_2115)
|
||||
MDRV_CPU_REPLACE("main", R4700LE, SYSTEM_CLOCK*2)
|
||||
MACHINE_DRIVER_END
|
||||
|
||||
|
||||
static MACHINE_DRIVER_START( seattle150 )
|
||||
MDRV_IMPORT_FROM(seattle_common)
|
||||
MDRV_CPU_REPLACE("main", R5000LE, SYSTEM_CLOCK*3)
|
||||
MDRV_IMPORT_FROM(dcs2_audio_2115)
|
||||
MDRV_CPU_REPLACE("main", R5000LE, SYSTEM_CLOCK*3)
|
||||
MACHINE_DRIVER_END
|
||||
|
||||
|
||||
static MACHINE_DRIVER_START( seattle150_widget )
|
||||
MDRV_IMPORT_FROM(seattle150)
|
||||
MDRV_SMC91C94_ADD("ethernet", ethernet_interrupt)
|
||||
MACHINE_DRIVER_END
|
||||
|
||||
|
||||
static MACHINE_DRIVER_START( seattle200 )
|
||||
MDRV_IMPORT_FROM(seattle_common)
|
||||
MDRV_CPU_REPLACE("main", R5000LE, SYSTEM_CLOCK*4)
|
||||
MDRV_IMPORT_FROM(dcs2_audio_2115)
|
||||
MDRV_CPU_REPLACE("main", R5000LE, SYSTEM_CLOCK*4)
|
||||
MACHINE_DRIVER_END
|
||||
|
||||
|
||||
static MACHINE_DRIVER_START( seattle200_widget )
|
||||
MDRV_IMPORT_FROM(seattle200)
|
||||
MDRV_SMC91C94_ADD("ethernet", ethernet_interrupt)
|
||||
MACHINE_DRIVER_END
|
||||
|
||||
|
||||
static MACHINE_DRIVER_START( flagstaff )
|
||||
MDRV_IMPORT_FROM(seattle_common)
|
||||
MDRV_IMPORT_FROM(cage_seattle)
|
||||
MDRV_CPU_REPLACE("main", R5000LE, SYSTEM_CLOCK*4)
|
||||
|
||||
MDRV_SMC91C94_ADD("ethernet", ethernet_interrupt)
|
||||
|
||||
MDRV_3DFX_VOODOO_MODIFY("voodoo")
|
||||
MDRV_3DFX_VOODOO_TMU_MEMORY(1, 4)
|
||||
|
||||
MDRV_IMPORT_FROM(cage_seattle)
|
||||
MACHINE_DRIVER_END
|
||||
|
||||
|
||||
@ -2709,6 +2748,8 @@ ROM_END
|
||||
|
||||
static void init_common(running_machine *machine, int ioasic, int serialnum, int yearoffs, int config)
|
||||
{
|
||||
const device_config *device;
|
||||
|
||||
/* initialize the subsystems */
|
||||
midway_ioasic_init(machine, ioasic, serialnum, yearoffs, ioasic_irq);
|
||||
|
||||
@ -2718,13 +2759,13 @@ static void init_common(running_machine *machine, int ioasic, int serialnum, int
|
||||
{
|
||||
case PHOENIX_CONFIG:
|
||||
/* original Phoenix board only has 4MB of RAM */
|
||||
memory_install_readwrite32_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x00400000, 0x007fffff, 0, 0, SMH_NOP, SMH_NOP);
|
||||
memory_install_readwrite32_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x00400000, 0x007fffff, 0, 0, SMH_UNMAP, SMH_UNMAP);
|
||||
break;
|
||||
|
||||
case SEATTLE_WIDGET_CONFIG:
|
||||
/* set up the widget board */
|
||||
memory_install_readwrite32_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x16c00000, 0x16c0001f, 0, 0, widget_r, widget_w);
|
||||
smc91c94_init(ðernet_intf);
|
||||
device = device_list_find_by_tag(machine->config->devicelist, SMC91C94, "ethernet");
|
||||
memory_install_readwrite32_device_handler(device, 0, ADDRESS_SPACE_PROGRAM, 0x16c00000, 0x16c0001f, 0, 0, widget_r, widget_w);
|
||||
break;
|
||||
|
||||
case FLAGSTAFF_CONFIG:
|
||||
@ -2732,8 +2773,8 @@ static void init_common(running_machine *machine, int ioasic, int serialnum, int
|
||||
memory_install_readwrite32_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x14000000, 0x14000003, 0, 0, analog_port_r, analog_port_w);
|
||||
|
||||
/* set up the ethernet controller */
|
||||
memory_install_readwrite32_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x16c00000, 0x16c0003f, 0, 0, ethernet_r, ethernet_w);
|
||||
smc91c94_init(ðernet_intf);
|
||||
device = device_list_find_by_tag(machine->config->devicelist, SMC91C94, "ethernet");
|
||||
memory_install_readwrite32_device_handler(device, 0, ADDRESS_SPACE_PROGRAM, 0x16c00000, 0x16c0003f, 0, 0, ethernet_r, ethernet_w);
|
||||
break;
|
||||
}
|
||||
|
||||
@ -2900,21 +2941,21 @@ static DRIVER_INIT( hyprdriv )
|
||||
*************************************/
|
||||
|
||||
/* Atari */
|
||||
GAME( 1996, wg3dh, 0, phoenixsa, wg3dh, wg3dh, ROT0, "Atari Games", "Wayne Gretzky's 3D Hockey", 0 )
|
||||
GAME( 1996, mace, 0, seattle150, mace, mace, ROT0, "Atari Games", "Mace: The Dark Age (boot ROM 1.0ce, HDD 1.0b)", 0 )
|
||||
GAME( 1997, macea, mace, seattle150, mace, mace, ROT0, "Atari Games", "Mace: The Dark Age (HDD 1.0a", 0 )
|
||||
GAME( 1996, sfrush, 0, flagstaff, sfrush, sfrush, ROT0, "Atari Games", "San Francisco Rush", 0 )
|
||||
GAME( 1996, sfrushrk, 0, flagstaff, sfrushrk, sfrushrk, ROT0, "Atari Games", "San Francisco Rush: The Rock", GAME_NOT_WORKING )
|
||||
GAME( 1998, calspeed, 0, seattle150, calspeed, calspeed, ROT0, "Atari Games", "California Speed (Version 2.1a, 4/17/98)", 0 )
|
||||
GAME( 1998, calspeda, calspeed, seattle150, calspeed, calspeed, ROT0, "Atari Games", "California Speed (Version 1.0r7a 3/4/98)", 0 )
|
||||
GAME( 1998, vaportrx, 0, seattle200, vaportrx, vaportrx, ROT0, "Atari Games", "Vapor TRX", 0 )
|
||||
GAME( 1998, vaportrp, vaportrx, seattle200, vaportrx, vaportrx, ROT0, "Atari Games", "Vapor TRX (prototype)", 0 )
|
||||
GAME( 1996, wg3dh, 0, phoenixsa, wg3dh, wg3dh, ROT0, "Atari Games", "Wayne Gretzky's 3D Hockey", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1996, mace, 0, seattle150, mace, mace, ROT0, "Atari Games", "Mace: The Dark Age (boot ROM 1.0ce, HDD 1.0b)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1997, macea, mace, seattle150, mace, mace, ROT0, "Atari Games", "Mace: The Dark Age (HDD 1.0a", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1996, sfrush, 0, flagstaff, sfrush, sfrush, ROT0, "Atari Games", "San Francisco Rush", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1996, sfrushrk, 0, flagstaff, sfrushrk, sfrushrk, ROT0, "Atari Games", "San Francisco Rush: The Rock", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, calspeed, 0, seattle150_widget, calspeed, calspeed, ROT0, "Atari Games", "California Speed (Version 2.1a, 4/17/98)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, calspeda, calspeed, seattle150_widget, calspeed, calspeed, ROT0, "Atari Games", "California Speed (Version 1.0r7a 3/4/98)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, vaportrx, 0, seattle200_widget, vaportrx, vaportrx, ROT0, "Atari Games", "Vapor TRX", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, vaportrp, vaportrx, seattle200_widget, vaportrx, vaportrx, ROT0, "Atari Games", "Vapor TRX (prototype)", GAME_SUPPORTS_SAVE )
|
||||
|
||||
/* Midway */
|
||||
GAME( 1997, biofreak, 0, seattle150, biofreak, biofreak, ROT0, "Midway Games", "BioFreaks (prototype)", 0 )
|
||||
GAME( 1997, blitz, 0, seattle150, blitz, blitz, ROT0, "Midway Games", "NFL Blitz (boot ROM 1.2)", 0 )
|
||||
GAME( 1997, blitz11, blitz, seattle150, blitz, blitz, ROT0, "Midway Games", "NFL Blitz (boot ROM 1.1)", 0 )
|
||||
GAME( 1998, blitz99, 0, seattle150, blitz99, blitz99, ROT0, "Midway Games", "NFL Blitz '99", 0 )
|
||||
GAME( 1999, blitz2k, 0, seattle150, blitz99, blitz2k, ROT0, "Midway Games", "NFL Blitz 2000 Gold Edition", 0 )
|
||||
GAME( 1998, carnevil, 0, seattle150, carnevil, carnevil, ROT0, "Midway Games", "CarnEvil", 0 )
|
||||
GAME( 1998, hyprdriv, 0, seattle200, hyprdriv, hyprdriv, ROT0, "Midway Games", "Hyperdrive", 0 )
|
||||
GAME( 1997, biofreak, 0, seattle150, biofreak, biofreak, ROT0, "Midway Games", "BioFreaks (prototype)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1997, blitz, 0, seattle150, blitz, blitz, ROT0, "Midway Games", "NFL Blitz (boot ROM 1.2)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1997, blitz11, blitz, seattle150, blitz, blitz, ROT0, "Midway Games", "NFL Blitz (boot ROM 1.1)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, blitz99, 0, seattle150, blitz99, blitz99, ROT0, "Midway Games", "NFL Blitz '99", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1999, blitz2k, 0, seattle150, blitz99, blitz2k, ROT0, "Midway Games", "NFL Blitz 2000 Gold Edition", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, carnevil, 0, seattle150, carnevil, carnevil, ROT0, "Midway Games", "CarnEvil", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, hyprdriv, 0, seattle200_widget, hyprdriv, hyprdriv, ROT0, "Midway Games", "Hyperdrive", GAME_SUPPORTS_SAVE )
|
||||
|
@ -501,6 +501,7 @@ static struct dynamic_address
|
||||
*
|
||||
*************************************/
|
||||
|
||||
static STATE_POSTLOAD( vegas_postload );
|
||||
static TIMER_CALLBACK( nile_timer_callback );
|
||||
static void ide_interrupt(const device_config *device, int state);
|
||||
static void remap_dynamic_addresses(running_machine *machine);
|
||||
@ -519,7 +520,6 @@ static VIDEO_UPDATE( vegas )
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
* Machine init
|
||||
@ -559,6 +559,22 @@ static MACHINE_START( vegas )
|
||||
cpunum_set_info_int(0, CPUINFO_INT_MIPS3_FASTRAM_END, 0x1fc7ffff);
|
||||
cpunum_set_info_ptr(0, CPUINFO_PTR_MIPS3_FASTRAM_BASE, rombase);
|
||||
cpunum_set_info_int(0, CPUINFO_INT_MIPS3_FASTRAM_READONLY, 1);
|
||||
|
||||
/* register for save states */
|
||||
state_save_register_global(nile_irq_state);
|
||||
state_save_register_global(ide_irq_state);
|
||||
state_save_register_global_array(pci_bridge_regs);
|
||||
state_save_register_global_array(pci_ide_regs);
|
||||
state_save_register_global_array(pci_3dfx_regs);
|
||||
state_save_register_global(vblank_state);
|
||||
state_save_register_global_array(sio_data);
|
||||
state_save_register_global(sio_irq_clear);
|
||||
state_save_register_global(sio_irq_enable);
|
||||
state_save_register_global(sio_irq_state);
|
||||
state_save_register_global(sio_led_state);
|
||||
state_save_register_global(pending_analog_read);
|
||||
state_save_register_global(cmos_unlocked);
|
||||
state_save_register_postload(machine, vegas_postload, NULL);
|
||||
}
|
||||
|
||||
|
||||
@ -576,9 +592,6 @@ static MACHINE_RESET( vegas )
|
||||
dcs_reset_w(0);
|
||||
}
|
||||
|
||||
/* reset subsystems */
|
||||
smc91c94_reset(machine);
|
||||
|
||||
/* initialize IRQ states */
|
||||
ide_irq_state = 0;
|
||||
nile_irq_state = 0;
|
||||
@ -586,6 +599,11 @@ static MACHINE_RESET( vegas )
|
||||
}
|
||||
|
||||
|
||||
static STATE_POSTLOAD( vegas_postload )
|
||||
{
|
||||
remap_dynamic_addresses(machine);
|
||||
}
|
||||
|
||||
|
||||
/*************************************
|
||||
*
|
||||
@ -1292,13 +1310,13 @@ static void ioasic_irq(running_machine *machine, int state)
|
||||
}
|
||||
|
||||
|
||||
static void ethernet_interrupt(running_machine *machine, int state)
|
||||
static void ethernet_interrupt(const device_config *device, int state)
|
||||
{
|
||||
if (state)
|
||||
sio_irq_state |= 0x10;
|
||||
else
|
||||
sio_irq_state &= ~0x10;
|
||||
update_sio_irqs(machine);
|
||||
update_sio_irqs(device->machine);
|
||||
}
|
||||
|
||||
|
||||
@ -1473,23 +1491,23 @@ static WRITE32_DEVICE_HANDLER( ide_alt_w )
|
||||
}
|
||||
|
||||
|
||||
static READ32_HANDLER( ethernet_r )
|
||||
static READ32_DEVICE_HANDLER( ethernet_r )
|
||||
{
|
||||
UINT32 result = 0;
|
||||
if (ACCESSING_BITS_0_15)
|
||||
result |= smc91c94_r(machine, offset * 2 + 0, mem_mask);
|
||||
result |= smc91c9x_r(device, offset * 2 + 0, mem_mask);
|
||||
if (ACCESSING_BITS_16_31)
|
||||
result |= smc91c94_r(machine, offset * 2 + 1, mem_mask >> 16) << 16;
|
||||
result |= smc91c9x_r(device, offset * 2 + 1, mem_mask >> 16) << 16;
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
static WRITE32_HANDLER( ethernet_w )
|
||||
static WRITE32_DEVICE_HANDLER( ethernet_w )
|
||||
{
|
||||
if (ACCESSING_BITS_0_15)
|
||||
smc91c94_w(machine, offset * 2 + 0, data, mem_mask);
|
||||
smc91c9x_w(device, offset * 2 + 0, data, mem_mask);
|
||||
if (ACCESSING_BITS_16_31)
|
||||
smc91c94_w(machine, offset * 2 + 1, data >> 16, mem_mask >> 16);
|
||||
smc91c9x_w(device, offset * 2 + 1, data >> 16, mem_mask >> 16);
|
||||
}
|
||||
|
||||
|
||||
@ -1540,6 +1558,7 @@ INLINE void _add_dynamic_device_address(const device_config *device, offs_t star
|
||||
|
||||
static void remap_dynamic_addresses(running_machine *machine)
|
||||
{
|
||||
const device_config *ethernet = device_list_find_by_tag(machine->config->devicelist, SMC91C94, "ethernet");
|
||||
const device_config *ide = device_list_find_by_tag(machine->config->devicelist, IDE_CONTROLLER, "ide");
|
||||
int voodoo_type = voodoo_get_type(voodoo_device);
|
||||
offs_t base;
|
||||
@ -1600,7 +1619,7 @@ static void remap_dynamic_addresses(running_machine *machine)
|
||||
base = nile_regs[NREG_DCS7] & 0x1fffff00;
|
||||
if (base >= ramsize)
|
||||
{
|
||||
add_dynamic_address(base + 0x1000, base + 0x100f, ethernet_r, ethernet_w);
|
||||
add_dynamic_device_address(ethernet, base + 0x1000, base + 0x100f, ethernet_r, ethernet_w);
|
||||
if (dcs_idma_cs == 7)
|
||||
{
|
||||
add_dynamic_address(base + 0x5000, base + 0x5003, NULL, dsio_idma_addr_w);
|
||||
@ -2210,6 +2229,8 @@ static MACHINE_DRIVER_START( vegascore )
|
||||
|
||||
MDRV_IDE_CONTROLLER_ADD("ide", 0, ide_interrupt)
|
||||
|
||||
MDRV_SMC91C94_ADD("ethernet", ethernet_interrupt)
|
||||
|
||||
MDRV_3DFX_VOODOO_2_ADD("voodoo", STD_VOODOO_2_CLOCK, 2, "main")
|
||||
MDRV_3DFX_VOODOO_TMU_MEMORY(0, 4)
|
||||
MDRV_3DFX_VOODOO_TMU_MEMORY(1, 4)
|
||||
@ -2446,15 +2467,9 @@ ROM_END
|
||||
|
||||
static void init_common(running_machine *machine, int ioasic, int serialnum)
|
||||
{
|
||||
static const struct smc91c9x_interface ethernet_intf =
|
||||
{
|
||||
ethernet_interrupt
|
||||
};
|
||||
|
||||
/* initialize the subsystems */
|
||||
midway_ioasic_init(machine, ioasic, serialnum, 80, ioasic_irq);
|
||||
midway_ioasic_set_auto_ack(1);
|
||||
smc91c94_init(ðernet_intf);
|
||||
|
||||
/* allocate RAM for the timekeeper */
|
||||
timekeeper_nvram_size = 0x8000;
|
||||
@ -2580,26 +2595,26 @@ static DRIVER_INIT( cartfury )
|
||||
*************************************/
|
||||
|
||||
/* Vegas + Vegas SIO + Voodoo 2 */
|
||||
GAME( 1998, gauntleg, 0, vegas, gauntleg, gauntleg, ROT0, "Atari Games", "Gauntlet Legends (version 1.6)", 0 )
|
||||
GAME( 1998, gauntl12, gauntleg, vegas, gauntleg, gauntleg, ROT0, "Atari Games", "Gauntlet Legends (version 1.2)", GAME_NO_SOUND )
|
||||
GAME( 1998, tenthdeg, 0, vegas, tenthdeg, tenthdeg, ROT0, "Atari Games", "Tenth Degree (prototype)", 0 )
|
||||
GAME( 1998, gauntleg, 0, vegas, gauntleg, gauntleg, ROT0, "Atari Games", "Gauntlet Legends (version 1.6)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, gauntl12, gauntleg, vegas, gauntleg, gauntleg, ROT0, "Atari Games", "Gauntlet Legends (version 1.2)", GAME_NO_SOUND | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, tenthdeg, 0, vegas, tenthdeg, tenthdeg, ROT0, "Atari Games", "Tenth Degree (prototype)", GAME_SUPPORTS_SAVE )
|
||||
|
||||
/* Durango + Vegas SIO + Voodoo 2 */
|
||||
GAME( 1999, gauntdl, 0, vegas, gauntdl, gauntdl, ROT0, "Midway Games", "Gauntlet Dark Legacy (version DL 2.52)", 0 )
|
||||
GAME( 1999, gauntd24, gauntdl, vegas, gauntdl, gauntdl, ROT0, "Midway Games", "Gauntlet Dark Legacy (version DL 2.4)", 0 )
|
||||
GAME( 1999, warfa, 0, vegas250, warfa, warfa, ROT0, "Atari Games", "War: The Final Assault", GAME_NOT_WORKING )
|
||||
GAME( 1999, gauntdl, 0, vegas, gauntdl, gauntdl, ROT0, "Midway Games", "Gauntlet Dark Legacy (version DL 2.52)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1999, gauntd24, gauntdl, vegas, gauntdl, gauntdl, ROT0, "Midway Games", "Gauntlet Dark Legacy (version DL 2.4)", GAME_SUPPORTS_SAVE )
|
||||
GAME( 1999, warfa, 0, vegas250, warfa, warfa, ROT0, "Atari Games", "War: The Final Assault", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
|
||||
/* Durango + DSIO + Voodoo 2 */
|
||||
GAME( 1999, roadburn, 0, vegas32m, roadburn, roadburn, ROT0, "Atari Games", "Road Burners", GAME_NOT_WORKING )
|
||||
GAME( 1999, roadburn, 0, vegas32m, roadburn, roadburn, ROT0, "Atari Games", "Road Burners", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
|
||||
/* Durango + DSIO? + Voodoo banshee */
|
||||
GAME( 1998, nbashowt, 0, vegasban, nbashowt, nbashowt, ROT0, "Midway Games", "NBA Showtime: NBA on NBC", GAME_NO_SOUND | GAME_NOT_WORKING )
|
||||
GAME( 1999, nbanfl, 0, vegasban, nbashowt, nbanfl, ROT0, "Midway Games", "NBA Showtime / NFL Blitz 2000", GAME_NO_SOUND | GAME_NOT_WORKING )
|
||||
GAME( 1998, nbashowt, 0, vegasban, nbashowt, nbashowt, ROT0, "Midway Games", "NBA Showtime: NBA on NBC", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1999, nbanfl, 0, vegasban, nbashowt, nbanfl, ROT0, "Midway Games", "NBA Showtime / NFL Blitz 2000", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
|
||||
/* Durango + Denver SIO + Voodoo 3 */
|
||||
GAME( 1998, sf2049, 0, denver, sf2049, sf2049, ROT0, "Atari Games", "San Francisco Rush 2049", GAME_NO_SOUND | GAME_NOT_WORKING )
|
||||
GAME( 1998, sf2049se, sf2049, denver, sf2049se, sf2049se, ROT0, "Atari Games", "San Francisco Rush 2049: Special Edition", GAME_NO_SOUND | GAME_NOT_WORKING )
|
||||
GAME( 1998, sf2049te, sf2049, denver, sf2049te, sf2049te, ROT0, "Atari Games", "San Francisco Rush 2049: Tournament Edition", GAME_NO_SOUND | GAME_NOT_WORKING )
|
||||
GAME( 1998, sf2049, 0, denver, sf2049, sf2049, ROT0, "Atari Games", "San Francisco Rush 2049", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, sf2049se, sf2049, denver, sf2049se, sf2049se, ROT0, "Atari Games", "San Francisco Rush 2049: Special Edition", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
GAME( 1998, sf2049te, sf2049, denver, sf2049te, sf2049te, ROT0, "Atari Games", "San Francisco Rush 2049: Tournament Edition", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE)
|
||||
|
||||
/* Durango + Vegas SIO + Voodoo 3 */
|
||||
GAME( 2000, cartfury, 0, vegasv3, cartfury, cartfury, ROT0, "Midway Games", "Cart Fury", GAME_NO_SOUND | GAME_NOT_WORKING )
|
||||
GAME( 2000, cartfury, 0, vegasv3, cartfury, cartfury, ROT0, "Midway Games", "Cart Fury", GAME_NO_SOUND | GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
|
||||
|
@ -250,13 +250,6 @@ INLINE UINT8 make_bcd(UINT8 data)
|
||||
}
|
||||
|
||||
|
||||
#ifdef UNUSED_FUNCTON
|
||||
INLINE UINT8 unmake_bcd(UINT8 data)
|
||||
{
|
||||
return ((data & 0xf0) >> 4) * 10 + (data & 0x0f);
|
||||
}
|
||||
#endif
|
||||
|
||||
static TIMER_CALLBACK( reset_timer )
|
||||
{
|
||||
pic.time_just_written = 0;
|
||||
|
Loading…
Reference in New Issue
Block a user